From c009789d85ac3ab3eb0c6eb4efbe15893c58284b Mon Sep 17 00:00:00 2001 From: Rios Kao Date: Thu, 22 Feb 2024 12:01:18 +0000 Subject: [PATCH] tegu: update fortemedia table note: convert FM table version to 1.4.2 Test: build pass Bug: 326371366 Change-Id: I68920c995686286cfab3fcf51f20f206fb890139 --- audio/tegu/tuning/fortemedia/BLUETOOTH.dat | Bin 223718 -> 279682 bytes audio/tegu/tuning/fortemedia/BLUETOOTH.mods | 120936 +++++++++-------- audio/tegu/tuning/fortemedia/HANDSET.dat | Bin 202414 -> 258170 bytes audio/tegu/tuning/fortemedia/HANDSET.mods | 57964 +++++--- audio/tegu/tuning/fortemedia/HANDSFREE.dat | Bin 74590 -> 118342 bytes audio/tegu/tuning/fortemedia/HANDSFREE.mods | 34783 +++-- audio/tegu/tuning/fortemedia/HEADSET.dat | Bin 340890 -> 430266 bytes audio/tegu/tuning/fortemedia/HEADSET.mods | 49602 +++++-- 8 files changed, 162279 insertions(+), 101006 deletions(-) diff --git a/audio/tegu/tuning/fortemedia/BLUETOOTH.dat b/audio/tegu/tuning/fortemedia/BLUETOOTH.dat index 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+#SINGLE_API_VER 1.4.2 #EXPORT_FLAG BLUETOOTH -#SINGLE_API_VER 1.2.0 -#SAVE_TIME 2022-02-11 16:24:43 +#PARAM_MODE FULL +#SAVE_MODE 3 +#SAVE_TIME 2024-02-22 17:40:38 + +#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6FFD //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x053D //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7652 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0100 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7B00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x2000 //TX_MIN_EQ_RE_EST_3 +156 0x2000 //TX_MIN_EQ_RE_EST_4 +157 0x2000 //TX_MIN_EQ_RE_EST_5 +158 0x2000 //TX_MIN_EQ_RE_EST_6 +159 0x2000 //TX_MIN_EQ_RE_EST_7 +160 0x2000 //TX_MIN_EQ_RE_EST_8 +161 0x3000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x6000 //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x6000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x2000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0008 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FEE //TX_DTD_THR1_0 +198 0x7FEE //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7EF4 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0FA0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x1000 //TX_ADPT_STRICT_L +222 0x1000 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x157C //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x1000 //TX_B_POST_FILT_ECHO_L +229 0x1000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0BB8 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xF200 //TX_THR_SN_EST_2 +245 0xF200 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0050 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0080 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x0018 //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x7F00 //TX_LAMBDA_EQ_BF +272 0x0800 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0800 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0020 //TX_NS_LVL_CTRL_1 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 +285 0x0012 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0004 //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000F //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x000F //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x2000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x2000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x3000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x7000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7000 //TX_LAMBDA_PFILT_S_0 +340 0x7400 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7000 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 +344 0x7D00 //TX_LAMBDA_PFILT_S_5 +345 0x7900 //TX_LAMBDA_PFILT_S_6 +346 0x7D00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0FA0 //TX_DT_BINVAD_ENDF +358 0x0080 //TX_C_POST_FLT_DT +359 0x4000 //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0023 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x03ED //TX_NOISE_TH_2 +372 0x2CEC //TX_NOISE_TH_3 +373 0x4268 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0FA0 //TX_NOISE_TH_6 +379 0x000A //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x1000 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x7000 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x000A //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x007A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x5000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0014 //TX_FDEQ_SUBNUM +567 0x5250 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4A43 //TX_FDEQ_GAIN_3 +571 0x374B //TX_FDEQ_GAIN_4 +572 0x3444 //TX_FDEQ_GAIN_5 +573 0x433C //TX_FDEQ_GAIN_6 +574 0x3A37 //TX_FDEQ_GAIN_7 +575 0x2A2A //TX_FDEQ_GAIN_8 +576 0x303C //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0014 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4A4A //TX_PREEQ_GAIN_MIC1_7 +674 0x4B4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4D4E //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x484A //TX_PREEQ_GAIN_MIC2_6 +722 0x4B4B //TX_PREEQ_GAIN_MIC2_7 +723 0x4B4C //TX_PREEQ_GAIN_MIC2_8 +724 0x4D50 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0708 //TX_PREEQ_BIN_MIC2_6 +746 0x090A //TX_PREEQ_BIN_MIC2_7 +747 0x0B0C //TX_PREEQ_BIN_MIC2_8 +748 0x0D0E //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x4000 //TX_TDDRC_ALPHA_UP_01 +784 0x4000 //TX_TDDRC_ALPHA_UP_02 +785 0x4000 //TX_TDDRC_ALPHA_UP_03 +786 0x4000 //TX_TDDRC_ALPHA_UP_04 +787 0x6000 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x0130 //TX_TPKA_FP +831 0x0400 //TX_MIN_G_FP +832 0x0800 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0018 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x4000 //TX_TDDRC_ALPHA_UP_00 +861 0x6000 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x1C2F //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x4000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0300 //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0009 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7F00 //TX_MICMUTE_EAD_THR +909 0x4000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7F44 //TX_DTD_THR1_MICMUTE_0 +912 0x7EF4 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x0FA0 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x000F //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x3BF6 //TX_TFMASKM4_2_DT_THR +945 0x7F26 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA06C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0xA06C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-WB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6FFD //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x053D //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0C00 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6C00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x6000 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x5000 //TX_GAIN_NP +169 0x02A0 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0088 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF8 //TX_DTD_THR1_0 +198 0x7FF8 //TX_DTD_THR1_1 +199 0x7FEE //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x5000 //TX_DTD_THR2_0 +205 0x5000 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x1F40 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1194 //TX_RATIO_DT_L_TH_HIGH +226 0x4A38 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x4000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x07D0 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xF400 //TX_THR_SN_EST_2 +245 0xFC00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0018 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x4000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x2000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x2000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x7FFF //TX_B_POST_FILT_2 +325 0x7FFF //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x2000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x001E //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0320 //TX_NOISE_TH_1 +371 0x0384 //TX_NOISE_TH_2 +372 0x2904 //TX_NOISE_TH_3 +373 0x3E80 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0F0A //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x7FFF //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0005 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x001E //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x07D0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5048 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4A4F //TX_FDEQ_GAIN_2 +570 0x4E48 //TX_FDEQ_GAIN_3 +571 0x4444 //TX_FDEQ_GAIN_4 +572 0x444B //TX_FDEQ_GAIN_5 +573 0x5152 //TX_FDEQ_GAIN_6 +574 0x584F //TX_FDEQ_GAIN_7 +575 0x4950 //TX_FDEQ_GAIN_8 +576 0x4C48 //TX_FDEQ_GAIN_9 +577 0x3D40 //TX_FDEQ_GAIN_10 +578 0x4240 //TX_FDEQ_GAIN_11 +579 0x4C4C //TX_FDEQ_GAIN_12 +580 0x4C4C //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0F10 //TX_FDEQ_BIN_10 +602 0x1011 //TX_FDEQ_BIN_11 +603 0x1112 //TX_FDEQ_BIN_12 +604 0x120B //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0F10 //TX_PREEQ_BIN_MIC0_10 +652 0x1011 //TX_PREEQ_BIN_MIC0_11 +653 0x1112 //TX_PREEQ_BIN_MIC0_12 +654 0x120B //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x484A //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4C4E //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5454 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1112 //TX_PREEQ_BIN_MIC1_12 +703 0x120B //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x484A //TX_PREEQ_GAIN_MIC2_3 +719 0x4B4A //TX_PREEQ_GAIN_MIC2_4 +720 0x4B4C //TX_PREEQ_GAIN_MIC2_5 +721 0x4C4D //TX_PREEQ_GAIN_MIC2_6 +722 0x4F50 //TX_PREEQ_GAIN_MIC2_7 +723 0x5050 //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5252 //TX_PREEQ_GAIN_MIC2_10 +726 0x5253 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x5454 //TX_PREEQ_GAIN_MIC2_13 +729 0x5455 //TX_PREEQ_GAIN_MIC2_14 +730 0x5555 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0808 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0009 //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x0100 //TX_TPKA_FP +831 0x0400 //TX_MIN_G_FP +832 0x0800 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0018 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x20C6 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02EE //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0009 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7FF6 //TX_MICMUTE_EAD_THR +909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7FFF //TX_DTD_THR1_MICMUTE_0 +912 0x7FDF //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7918 //TX_DTD_THR1_MICMUTE_3 +915 0x7000 //TX_DTD_THR2_MICMUTE_0 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x1F40 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x1F40 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x000F //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x3C0A //TX_TFMASKM4_2_DT_THR +945 0x2710 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA06C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0xA06C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6FFD //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x6000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0260 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0160 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF3 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x6CCC //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0FA0 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x0578 //TX_RATIO_DT_L_TH_HIGH +226 0x5528 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x6000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0190 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFD00 //TX_THR_SN_EST_2 +245 0xFC00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x000C //TX_NS_LVL_CTRL_2 +284 0x001A //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x001A //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x4000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x2000 //TX_SNRI_SUP_1 +302 0x3000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x2000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x7000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7400 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x01F4 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x2000 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0FA0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x300C //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0005 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0200 //TX_METAL_RTO_THR +410 0x07D0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E58 //TX_FDEQ_GAIN_6 +574 0x565E //TX_FDEQ_GAIN_7 +575 0x484E //TX_FDEQ_GAIN_8 +576 0x4E4C //TX_FDEQ_GAIN_9 +577 0x4A4A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x6050 //TX_FDEQ_GAIN_12 +580 0x585C //TX_FDEQ_GAIN_13 +581 0x5C70 //TX_FDEQ_GAIN_14 +582 0x7880 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x0100 //TX_TPKA_FP +831 0x0400 //TX_MIN_G_FP +832 0x0800 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0018 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x237B //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0x8000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x6000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02F0 //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0009 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7FD0 //TX_MICMUTE_EAD_THR +909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7DFA //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 +913 0x7FDA //TX_DTD_THR1_MICMUTE_2 +914 0x7EF4 //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x3E80 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x3E80 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x0014 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x36B0 //TX_TFMASKM4_2_DT_THR +945 0x6590 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0003 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x8064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-FB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x4B7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A4 //TX_DIST2REF1 +22 0x0017 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0FF7 //TX_PGA_0 +28 0x0FF7 //TX_PGA_1 +29 0x0FF7 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4853 //TX_FDEQ_GAIN_9 +577 0x5450 //TX_FDEQ_GAIN_10 +578 0x7465 //TX_FDEQ_GAIN_11 +579 0x807F //TX_FDEQ_GAIN_12 +580 0x82C4 //TX_FDEQ_GAIN_13 +581 0xC4C4 //TX_FDEQ_GAIN_14 +582 0xC4C4 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 +624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 +625 0x5456 //TX_PREEQ_GAIN_MIC0_8 +626 0x585C //TX_PREEQ_GAIN_MIC0_9 +627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 +628 0x7478 //TX_PREEQ_GAIN_MIC0_11 +629 0x705C //TX_PREEQ_GAIN_MIC0_12 +630 0x4838 //TX_PREEQ_GAIN_MIC0_13 +631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x0909 //TX_PREEQ_BIN_MIC0_7 +649 0x090B //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x1414 //TX_PREEQ_BIN_MIC0_12 +654 0x1C1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x462C //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x1812 //TX_PREEQ_BIN_MIC1_0 +691 0x0A0A //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x080A //TX_PREEQ_BIN_MIC1_3 +694 0x0B09 //TX_PREEQ_BIN_MIC1_4 +695 0x0A06 //TX_PREEQ_BIN_MIC1_5 +696 0x0606 //TX_PREEQ_BIN_MIC1_6 +697 0x0605 //TX_PREEQ_BIN_MIC1_7 +698 0x050A //TX_PREEQ_BIN_MIC1_8 +699 0x1505 //TX_PREEQ_BIN_MIC1_9 +700 0x0506 //TX_PREEQ_BIN_MIC1_10 +701 0x0615 //TX_PREEQ_BIN_MIC1_11 +702 0x1516 //TX_PREEQ_BIN_MIC1_12 +703 0x2021 //TX_PREEQ_BIN_MIC1_13 +704 0x2021 //TX_PREEQ_BIN_MIC1_14 +705 0x2021 //TX_PREEQ_BIN_MIC1_15 +706 0x0800 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0004 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0A98 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0000 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0000 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0000 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0000 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0000 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0000 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x0000 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0000 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0000 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0000 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0000 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0000 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x0000 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0000 //TX_EASSA_NONLECHO_TH +978 0x0000 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0000 //TX_EASSA_NONLHFG +981 0x0000 //TX_EASSA_DT2000HZ_REFG +982 0x0000 //TX_EASSA_DT400HZ_MAING +983 0x0000 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x0064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0500 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000A //RX_NS_LVL_CTRL +23 0xF600 //RX_THR_SN_EST +24 0x7000 //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BT_HAC-RESERVE2-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6F7D //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x6000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0260 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0160 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF3 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x6CCC //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0FA0 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x0578 //TX_RATIO_DT_L_TH_HIGH +226 0x5528 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x6000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0190 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFD00 //TX_THR_SN_EST_2 +245 0xFC00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x000C //TX_NS_LVL_CTRL_2 +284 0x001A //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x001A //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x4000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x2000 //TX_SNRI_SUP_1 +302 0x3000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x2000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x7000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7400 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x01F4 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x2000 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0FA0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x300C //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0005 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0200 //TX_METAL_RTO_THR +410 0x07D0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E58 //TX_FDEQ_GAIN_6 +574 0x565E //TX_FDEQ_GAIN_7 +575 0x484E //TX_FDEQ_GAIN_8 +576 0x4E4C //TX_FDEQ_GAIN_9 +577 0x4A4A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x6050 //TX_FDEQ_GAIN_12 +580 0x585C //TX_FDEQ_GAIN_13 +581 0x5C70 //TX_FDEQ_GAIN_14 +582 0x7880 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0018 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x27D0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0x8000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x6000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02F0 //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0009 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7FD0 //TX_MICMUTE_EAD_THR +909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7DFA //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 +913 0x7FDA //TX_DTD_THR1_MICMUTE_2 +914 0x7EF4 //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x3E80 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x3E80 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x0014 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x36B0 //TX_TFMASKM4_2_DT_THR +945 0x6590 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0003 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x8064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-NB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0008 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x0240 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B0B //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0000 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4242 //TX_FDEQ_GAIN_6 +574 0x423C //TX_FDEQ_GAIN_7 +575 0x3C3C //TX_FDEQ_GAIN_8 +576 0x3434 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1104 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA06C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0xA06C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-WB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0008 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x0240 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0A6D //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0000 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4444 //TX_FDEQ_GAIN_7 +575 0x4444 //TX_FDEQ_GAIN_8 +576 0x3C3C //TX_FDEQ_GAIN_9 +577 0x3C3C //TX_FDEQ_GAIN_10 +578 0x3C3C //TX_FDEQ_GAIN_11 +579 0x3C30 //TX_FDEQ_GAIN_12 +580 0x3030 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1112 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA06C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0xA06C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0000 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0970 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x8064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-FB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0009 //TX_OPERATION_MODE_1 +2 0x0020 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0200 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x0400 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x3000 //TX_MIN_EQ_RE_EST_1 +154 0x4000 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x6000 //TX_MIN_EQ_RE_EST_6 +159 0x6000 //TX_MIN_EQ_RE_EST_7 +160 0x6000 //TX_MIN_EQ_RE_EST_8 +161 0x6000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x4000 //TX_MIN_EQ_RE_EST_11 +164 0x4000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x3000 //TX_C_POST_FLT +168 0x4500 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x5000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7F00 //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x0800 //TX_DTD_THR2_0 +205 0x0800 //TX_DTD_THR2_1 +206 0x0800 //TX_DTD_THR2_2 +207 0x0800 //TX_DTD_THR2_3 +208 0x0800 //TX_DTD_THR2_4 +209 0x0100 //TX_DTD_THR2_5 +210 0x0100 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00C0 //TX_EPD_OFFSET_00 +233 0x00C0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF700 //TX_THR_SN_EST_0 +243 0xFB00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF700 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF600 //TX_THR_SN_EST_5 +248 0xF600 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0200 //TX_DELTA_THR_SN_EST_0 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0012 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0019 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x0011 //TX_MIN_GAIN_S_6 +296 0x000C //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7000 //TX_SNRI_SUP_0 +301 0x7000 //TX_SNRI_SUP_1 +302 0x7000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0016 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x6000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x6000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7CCD //TX_LAMBDA_PFILT_S_0 +340 0x7CCD //TX_LAMBDA_PFILT_S_1 +341 0x7CCD //TX_LAMBDA_PFILT_S_2 +342 0x7CCD //TX_LAMBDA_PFILT_S_3 +343 0x7CCD //TX_LAMBDA_PFILT_S_4 +344 0x7CCD //TX_LAMBDA_PFILT_S_5 +345 0x7CCD //TX_LAMBDA_PFILT_S_6 +346 0x7CCD //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0500 //TX_A_PEPPER +349 0x1600 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0020 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x02A6 //TX_NOISE_TH_1 +371 0x04B0 //TX_NOISE_TH_2 +372 0x3194 //TX_NOISE_TH_3 +373 0x0960 //TX_NOISE_TH_4 +374 0x5555 //TX_NOISE_TH_5 +375 0x3FF4 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x02BC //TX_NOISE_TH_6 +379 0x0020 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0020 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0001 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0200 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x2064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0500 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF600 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB-RESERVE2-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0000 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0970 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x8064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-NB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0008 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2A68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B0B //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4242 //TX_FDEQ_GAIN_6 +574 0x423C //TX_FDEQ_GAIN_7 +575 0x3C3C //TX_FDEQ_GAIN_8 +576 0x3434 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1104 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA06C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0xA06C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-WB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0008 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2A68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0A6D //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4444 //TX_FDEQ_GAIN_7 +575 0x4444 //TX_FDEQ_GAIN_8 +576 0x3C3C //TX_FDEQ_GAIN_9 +577 0x3C3C //TX_FDEQ_GAIN_10 +578 0x3C3C //TX_FDEQ_GAIN_11 +579 0x3C30 //TX_FDEQ_GAIN_12 +580 0x3030 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1112 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA06C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0xA06C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2A28 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0970 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x8064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-FB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0009 //TX_OPERATION_MODE_1 +2 0x0020 //TX_PATCH_REG +3 0x286A //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0200 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x0400 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x3000 //TX_MIN_EQ_RE_EST_1 +154 0x4000 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x6000 //TX_MIN_EQ_RE_EST_6 +159 0x6000 //TX_MIN_EQ_RE_EST_7 +160 0x6000 //TX_MIN_EQ_RE_EST_8 +161 0x6000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x4000 //TX_MIN_EQ_RE_EST_11 +164 0x4000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x3000 //TX_C_POST_FLT +168 0x4500 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x5000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7F00 //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x0800 //TX_DTD_THR2_0 +205 0x0800 //TX_DTD_THR2_1 +206 0x0800 //TX_DTD_THR2_2 +207 0x0800 //TX_DTD_THR2_3 +208 0x0800 //TX_DTD_THR2_4 +209 0x0100 //TX_DTD_THR2_5 +210 0x0100 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00C0 //TX_EPD_OFFSET_00 +233 0x00C0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF700 //TX_THR_SN_EST_0 +243 0xFB00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF700 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF600 //TX_THR_SN_EST_5 +248 0xF600 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0200 //TX_DELTA_THR_SN_EST_0 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0012 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0019 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x0011 //TX_MIN_GAIN_S_6 +296 0x000C //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7000 //TX_SNRI_SUP_0 +301 0x7000 //TX_SNRI_SUP_1 +302 0x7000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0016 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x6000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x6000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7CCD //TX_LAMBDA_PFILT_S_0 +340 0x7CCD //TX_LAMBDA_PFILT_S_1 +341 0x7CCD //TX_LAMBDA_PFILT_S_2 +342 0x7CCD //TX_LAMBDA_PFILT_S_3 +343 0x7CCD //TX_LAMBDA_PFILT_S_4 +344 0x7CCD //TX_LAMBDA_PFILT_S_5 +345 0x7CCD //TX_LAMBDA_PFILT_S_6 +346 0x7CCD //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0500 //TX_A_PEPPER +349 0x1600 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0020 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x02A6 //TX_NOISE_TH_1 +371 0x04B0 //TX_NOISE_TH_2 +372 0x3194 //TX_NOISE_TH_3 +373 0x0960 //TX_NOISE_TH_4 +374 0x5555 //TX_NOISE_TH_5 +375 0x3FF4 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x02BC //TX_NOISE_TH_6 +379 0x0020 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0020 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0001 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0200 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x2064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0500 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF600 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTNB_NREC-RESERVE2-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2A28 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0970 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x8064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-NB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0008 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x0240 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B0B //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0000 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4242 //TX_FDEQ_GAIN_6 +574 0x423C //TX_FDEQ_GAIN_7 +575 0x3C3C //TX_FDEQ_GAIN_8 +576 0x3434 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1104 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA06C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0xA06C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-WB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0008 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x0240 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0A6D //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0000 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4444 //TX_FDEQ_GAIN_7 +575 0x4444 //TX_FDEQ_GAIN_8 +576 0x3C3C //TX_FDEQ_GAIN_9 +577 0x3C3C //TX_FDEQ_GAIN_10 +578 0x3C3C //TX_FDEQ_GAIN_11 +579 0x3C30 //TX_FDEQ_GAIN_12 +580 0x3030 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1112 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA06C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0xA06C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0000 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0970 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x8064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-FB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0009 //TX_OPERATION_MODE_1 +2 0x0020 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0200 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x0400 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x3000 //TX_MIN_EQ_RE_EST_1 +154 0x4000 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x6000 //TX_MIN_EQ_RE_EST_6 +159 0x6000 //TX_MIN_EQ_RE_EST_7 +160 0x6000 //TX_MIN_EQ_RE_EST_8 +161 0x6000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x4000 //TX_MIN_EQ_RE_EST_11 +164 0x4000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x3000 //TX_C_POST_FLT +168 0x4500 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x5000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7F00 //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x0800 //TX_DTD_THR2_0 +205 0x0800 //TX_DTD_THR2_1 +206 0x0800 //TX_DTD_THR2_2 +207 0x0800 //TX_DTD_THR2_3 +208 0x0800 //TX_DTD_THR2_4 +209 0x0100 //TX_DTD_THR2_5 +210 0x0100 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00C0 //TX_EPD_OFFSET_00 +233 0x00C0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF700 //TX_THR_SN_EST_0 +243 0xFB00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF700 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF600 //TX_THR_SN_EST_5 +248 0xF600 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0200 //TX_DELTA_THR_SN_EST_0 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0012 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0019 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x0011 //TX_MIN_GAIN_S_6 +296 0x000C //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7000 //TX_SNRI_SUP_0 +301 0x7000 //TX_SNRI_SUP_1 +302 0x7000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0016 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x6000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x6000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7CCD //TX_LAMBDA_PFILT_S_0 +340 0x7CCD //TX_LAMBDA_PFILT_S_1 +341 0x7CCD //TX_LAMBDA_PFILT_S_2 +342 0x7CCD //TX_LAMBDA_PFILT_S_3 +343 0x7CCD //TX_LAMBDA_PFILT_S_4 +344 0x7CCD //TX_LAMBDA_PFILT_S_5 +345 0x7CCD //TX_LAMBDA_PFILT_S_6 +346 0x7CCD //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0500 //TX_A_PEPPER +349 0x1600 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0020 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x02A6 //TX_NOISE_TH_1 +371 0x04B0 //TX_NOISE_TH_2 +372 0x3194 //TX_NOISE_TH_3 +373 0x0960 //TX_NOISE_TH_4 +374 0x5555 //TX_NOISE_TH_5 +375 0x3FF4 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x02BC //TX_NOISE_TH_6 +379 0x0020 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0020 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0001 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0200 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x2064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0500 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF600 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB-RESERVE2-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0000 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0970 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x8064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x8064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0008 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2A68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B0B //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4242 //TX_FDEQ_GAIN_6 +574 0x423C //TX_FDEQ_GAIN_7 +575 0x3C3C //TX_FDEQ_GAIN_8 +576 0x3434 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1104 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA06C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4444 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x4040 //RX_FDEQ_GAIN_8 +48 0x4040 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0xA06C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0008 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2A68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0A6D //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4444 //TX_FDEQ_GAIN_7 +575 0x4444 //TX_FDEQ_GAIN_8 +576 0x3C3C //TX_FDEQ_GAIN_9 +577 0x3C3C //TX_FDEQ_GAIN_10 +578 0x3C3C //TX_FDEQ_GAIN_11 +579 0x3C30 //TX_FDEQ_GAIN_12 +580 0x3030 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1112 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7FFF //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA06C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0001 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7E70 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x3C3C //RX_FDEQ_GAIN_9 +49 0x3C3C //RX_FDEQ_GAIN_10 +50 0x3838 //RX_FDEQ_GAIN_11 +51 0x3838 //RX_FDEQ_GAIN_12 +52 0x3030 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1112 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0xA06C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0001 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2A28 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0970 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x8064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0009 //TX_OPERATION_MODE_1 +2 0x0020 //TX_PATCH_REG +3 0x286A //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0200 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x0400 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x3000 //TX_MIN_EQ_RE_EST_1 +154 0x4000 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x6000 //TX_MIN_EQ_RE_EST_6 +159 0x6000 //TX_MIN_EQ_RE_EST_7 +160 0x6000 //TX_MIN_EQ_RE_EST_8 +161 0x6000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x4000 //TX_MIN_EQ_RE_EST_11 +164 0x4000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x3000 //TX_C_POST_FLT +168 0x4500 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x5000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7F00 //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x0800 //TX_DTD_THR2_0 +205 0x0800 //TX_DTD_THR2_1 +206 0x0800 //TX_DTD_THR2_2 +207 0x0800 //TX_DTD_THR2_3 +208 0x0800 //TX_DTD_THR2_4 +209 0x0100 //TX_DTD_THR2_5 +210 0x0100 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00C0 //TX_EPD_OFFSET_00 +233 0x00C0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF700 //TX_THR_SN_EST_0 +243 0xFB00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF700 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF600 //TX_THR_SN_EST_5 +248 0xF600 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0200 //TX_DELTA_THR_SN_EST_0 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0012 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0019 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x0011 //TX_MIN_GAIN_S_6 +296 0x000C //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7000 //TX_SNRI_SUP_0 +301 0x7000 //TX_SNRI_SUP_1 +302 0x7000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0016 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x6000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x6000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7CCD //TX_LAMBDA_PFILT_S_0 +340 0x7CCD //TX_LAMBDA_PFILT_S_1 +341 0x7CCD //TX_LAMBDA_PFILT_S_2 +342 0x7CCD //TX_LAMBDA_PFILT_S_3 +343 0x7CCD //TX_LAMBDA_PFILT_S_4 +344 0x7CCD //TX_LAMBDA_PFILT_S_5 +345 0x7CCD //TX_LAMBDA_PFILT_S_6 +346 0x7CCD //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0500 //TX_A_PEPPER +349 0x1600 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0020 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x02A6 //TX_NOISE_TH_1 +371 0x04B0 //TX_NOISE_TH_2 +372 0x3194 //TX_NOISE_TH_3 +373 0x0960 //TX_NOISE_TH_4 +374 0x5555 //TX_NOISE_TH_5 +375 0x3FF4 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x02BC //TX_NOISE_TH_6 +379 0x0020 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0020 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0001 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0200 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x2064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0500 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF600 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME BLUETOOTH-BTWB_NREC-RESERVE2-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2A28 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0915 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF400 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0970 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x8064 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0000 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x7FFF //RX_TDDRC_THRD_2 +115 0x7FFF //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0155 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x8064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-RESERVE1-VOICE_GENERIC-FB -#PARAM_MODE FULL #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX @@ -38,9 +67414,9 @@ 27 0x0800 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF @@ -146,11 +67522,11 @@ 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -405,7 +67781,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0000 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L +397 0x0000 //TX_LOGSNR_THR 398 0x0000 //TX_C_POST_FLT_MASK 399 0x0000 //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ @@ -532,10 +67908,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x0000 //TX_GSC_RTOH_TH 523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR @@ -553,26 +67929,26 @@ 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x0000 //TX_WNS_REFGAIN +546 0x0000 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0000 //TX_BF_LESSCUT_BBIN -554 0x0000 //TX_BF_LESSCUT_EBIN -555 0x0000 //TX_POSTBFB0 -556 0x0000 //TX_POSTBFB -557 0x0000 //TX_POSTBFE -558 0x0000 //TX_SPEECH_SNR_TH -559 0x0000 //TX_PB_MAX_PRI_SNR_TH -560 0x0000 //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0000 //TX_BVE_NOISE_FLOOR_1 +554 0x0000 //TX_BVE_NOISE_FLOOR_2 +555 0x0000 //TX_BVE_NOISE_FLOOR_3 +556 0x0000 //TX_BVE_NOISE_FLOOR_4 +557 0x0000 //TX_BVE_NOISE_FLOOR_5 +558 0x0000 //TX_BVE_NOISE_FLOOR_6 +559 0x0000 //TX_BVE_NOISE_FLOOR_7 +560 0x0000 //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -831,12 +68207,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x0000 //TX_NOISE_FLOOR_TH +824 0x0000 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x0000 //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -914,7 +68290,7 @@ 903 0x0000 //TX_MICMUTE_CVG_TIME 904 0x0000 //TX_MICMUTE_RELEASE_TIME 905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0000 //TX_MICMUTE_DIST2REF_1 907 0x0000 //TX_MICMUTE_FRQ_AEC_L 908 0x0000 //TX_MICMUTE_EAD_THR 909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE @@ -941,35 +68317,61 @@ 930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK 931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0000 //TX_MICMUTE_POST_MASK_SUP +934 0x0000 //TX_MICMUTE_PRE_MASK_SUP +935 0x0000 //TX_MICMUTE_SDPCRN_GAIN +936 0x0000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x0000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x0000 //TX_MIC1RUB_AMP_THR 939 0x0000 //TX_MIC1MUTE_RATIO_THR 940 0x0000 //TX_MIC1MUTE_AMP_THR 941 0x0000 //TX_MIC1MUTE_CVG_TIME 942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX 0 0x0000 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -996,8 +68398,8 @@ 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0000 //RX_FADE_IN_PERIOD 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -1847,8 +69249,8 @@ 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0000 //RX_FADE_IN_PERIOD 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -2673,53403 +70075,3 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x053D //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x5000 //TX_THR_PITCH_DET_0 -131 0x4800 //TX_THR_PITCH_DET_1 -132 0x4000 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0100 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7500 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 -153 0x0200 //TX_MIN_EQ_RE_EST_1 -154 0x0200 //TX_MIN_EQ_RE_EST_2 -155 0x0200 //TX_MIN_EQ_RE_EST_3 -156 0x0200 //TX_MIN_EQ_RE_EST_4 -157 0x0200 //TX_MIN_EQ_RE_EST_5 -158 0x0200 //TX_MIN_EQ_RE_EST_6 -159 0x1800 //TX_MIN_EQ_RE_EST_7 -160 0x1800 //TX_MIN_EQ_RE_EST_8 -161 0x3000 //TX_MIN_EQ_RE_EST_9 -162 0x4000 //TX_MIN_EQ_RE_EST_10 -163 0x6000 //TX_MIN_EQ_RE_EST_11 -164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x2000 //TX_LAMBDA_RE_EST -166 0x0000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT -168 0x2000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x157C //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x1000 //TX_ADPT_STRICT_L -222 0x1000 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF900 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x01A0 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x7F00 //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0800 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0017 //TX_NS_LVL_CTRL_1 -283 0x0015 //TX_NS_LVL_CTRL_2 -284 0x0012 //TX_NS_LVL_CTRL_3 -285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x000D //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 -292 0x000F //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x000F //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x4000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x1000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x2400 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x2000 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 -318 0x3000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x3000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E00 //TX_LAMBDA_PFILT -339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7400 //TX_LAMBDA_PFILT_S_1 -341 0x7900 //TX_LAMBDA_PFILT_S_2 -342 0x7000 //TX_LAMBDA_PFILT_S_3 -343 0x7D00 //TX_LAMBDA_PFILT_S_4 -344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7900 //TX_LAMBDA_PFILT_S_6 -346 0x7D00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x0FA0 //TX_DT_BINVAD_ENDF -358 0x0400 //TX_C_POST_FLT_DT -359 0x4000 //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x03ED //TX_NOISE_TH_2 -372 0x2EE0 //TX_NOISE_TH_3 -373 0x5528 //TX_NOISE_TH_4 -374 0x7FFF //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0FA0 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x1000 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x000A //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x007A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x5000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x7FFF //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0014 //TX_FDEQ_SUBNUM -567 0x5858 //TX_FDEQ_GAIN_0 -568 0x5850 //TX_FDEQ_GAIN_1 -569 0x5050 //TX_FDEQ_GAIN_2 -570 0x5048 //TX_FDEQ_GAIN_3 -571 0x3C48 //TX_FDEQ_GAIN_4 -572 0x3C48 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4842 //TX_FDEQ_GAIN_7 -575 0x3030 //TX_FDEQ_GAIN_8 -576 0x3030 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D08 //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0014 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4B4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D08 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C08 //TX_PREEQ_BIN_MIC1_2 -693 0x0700 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x7800 //TX_PREEQ_BIN_MIC2_0 -740 0x0000 //TX_PREEQ_BIN_MIC2_1 -741 0x0000 //TX_PREEQ_BIN_MIC2_2 -742 0x0000 //TX_PREEQ_BIN_MIC2_3 -743 0x0000 //TX_PREEQ_BIN_MIC2_4 -744 0x0000 //TX_PREEQ_BIN_MIC2_5 -745 0x0000 //TX_PREEQ_BIN_MIC2_6 -746 0x0000 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0065 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0065 //TX_MIC_CALIBRATION_2 -768 0x0065 //TX_MIC_CALIBRATION_3 -769 0x0044 //TX_MIC_PWR_BIAS_0 -770 0x0044 //TX_MIC_PWR_BIAS_1 -771 0x0044 //TX_MIC_PWR_BIAS_2 -772 0x0044 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x4000 //TX_TDDRC_ALPHA_UP_01 -784 0x4000 //TX_TDDRC_ALPHA_UP_02 -785 0x4000 //TX_TDDRC_ALPHA_UP_03 -786 0x4000 //TX_TDDRC_ALPHA_UP_04 -787 0x6000 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0004 //TX_TDDRC_THRD_0 -855 0x0010 //TX_TDDRC_THRD_1 -856 0x1800 //TX_TDDRC_THRD_2 -857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 -860 0x4000 //TX_TDDRC_ALPHA_UP_00 -861 0x6000 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x206C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x206C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x053D //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0C00 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x5000 //TX_THR_PITCH_DET_0 -131 0x4800 //TX_THR_PITCH_DET_1 -132 0x4000 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0300 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6800 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0200 //TX_MIN_EQ_RE_EST_2 -155 0x0200 //TX_MIN_EQ_RE_EST_3 -156 0x0200 //TX_MIN_EQ_RE_EST_4 -157 0x0200 //TX_MIN_EQ_RE_EST_5 -158 0x0200 //TX_MIN_EQ_RE_EST_6 -159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x1000 //TX_MIN_EQ_RE_EST_8 -161 0x1000 //TX_MIN_EQ_RE_EST_9 -162 0x1000 //TX_MIN_EQ_RE_EST_10 -163 0x1000 //TX_MIN_EQ_RE_EST_11 -164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x4000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT -168 0x5000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x5000 //TX_DTD_THR2_0 -205 0x5000 //TX_DTD_THR2_1 -206 0x5000 //TX_DTD_THR2_2 -207 0x5000 //TX_DTD_THR2_3 -208 0x5000 //TX_DTD_THR2_4 -209 0x5000 //TX_DTD_THR2_5 -210 0x5000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x07D0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x7FFF //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFB00 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0018 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x50C0 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x4C00 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x4000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7C00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7A00 //TX_LAMBDA_PFILT_S_2 -342 0x7C00 //TX_LAMBDA_PFILT_S_3 -343 0x7C00 //TX_LAMBDA_PFILT_S_4 -344 0x7C00 //TX_LAMBDA_PFILT_S_5 -345 0x7C00 //TX_LAMBDA_PFILT_S_6 -346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0800 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0140 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0032 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x017E //TX_NOISE_TH_1 -371 0x0230 //TX_NOISE_TH_2 -372 0x3492 //TX_NOISE_TH_3 -373 0x4E20 //TX_NOISE_TH_4 -374 0x55B8 //TX_NOISE_TH_5 -375 0x49E6 //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0F0A //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x4000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x5050 //TX_FDEQ_GAIN_0 -568 0x5048 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4850 //TX_FDEQ_GAIN_5 -573 0x5050 //TX_FDEQ_GAIN_6 -574 0x5048 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x3C36 //TX_FDEQ_GAIN_10 -578 0x3A3A //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1104 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x5E64 //TX_PREEQ_GAIN_MIC0_12 -630 0x6464 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 -651 0x0F10 //TX_PREEQ_BIN_MIC0_10 -652 0x1011 //TX_PREEQ_BIN_MIC0_11 -653 0x1104 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x0700 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0800 //TX_TDDRC_ALPHA_UP_01 -784 0x0800 //TX_TDDRC_ALPHA_UP_02 -785 0x0800 //TX_TDDRC_ALPHA_UP_03 -786 0x0800 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 -856 0x1800 //TX_TDDRC_THRD_2 -857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 -860 0x0800 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x206C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0001 //RX_SAMPLINGFREQ_SIG -3 0x0001 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x206C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0001 //RX_SAMPLINGFREQ_SIG -160 0x0001 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-SWB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3B33 //TX_DIST2REF_11 -73 0x0A70 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x5000 //TX_THR_PITCH_DET_0 -131 0x4800 //TX_THR_PITCH_DET_1 -132 0x4000 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0400 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7600 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x2000 //TX_MIN_EQ_RE_EST_0 -153 0x0600 //TX_MIN_EQ_RE_EST_1 -154 0x3000 //TX_MIN_EQ_RE_EST_2 -155 0x3000 //TX_MIN_EQ_RE_EST_3 -156 0x3000 //TX_MIN_EQ_RE_EST_4 -157 0x3000 //TX_MIN_EQ_RE_EST_5 -158 0x3000 //TX_MIN_EQ_RE_EST_6 -159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x7800 //TX_MIN_EQ_RE_EST_8 -161 0x7800 //TX_MIN_EQ_RE_EST_9 -162 0x7800 //TX_MIN_EQ_RE_EST_10 -163 0x7800 //TX_MIN_EQ_RE_EST_11 -164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x3000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7FF0 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x7E00 //TX_DTD_THR2_0 -205 0x7E00 //TX_DTD_THR2_1 -206 0x5000 //TX_DTD_THR2_2 -207 0x5000 //TX_DTD_THR2_3 -208 0x5000 //TX_DTD_THR2_4 -209 0x5000 //TX_DTD_THR2_5 -210 0x5000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x36B0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x7FFF //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x6590 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x1000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x2328 //TX_RATIO_DT_L0_TH_HIGH -235 0x7FFF //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFA00 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0000 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0100 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x003C //TX_NS_LVL_CTRL_1 -283 0x0024 //TX_NS_LVL_CTRL_2 -284 0x003C //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x003C //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x1400 //TX_SNRI_SUP_1 -302 0x1400 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x50C0 //TX_SNRI_SUP_5 -306 0x1400 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x4C00 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x7C00 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x6000 //TX_B_POST_FILT_1 -324 0x6000 //TX_B_POST_FILT_2 -325 0x6000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7D00 //TX_LAMBDA_PFILT_S_1 -341 0x7D00 //TX_LAMBDA_PFILT_S_2 -342 0x7D00 //TX_LAMBDA_PFILT_S_3 -343 0x7D00 //TX_LAMBDA_PFILT_S_4 -344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 -346 0x7D00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0040 //TX_DT_BINVAD_TH_0 -354 0x0040 //TX_DT_BINVAD_TH_1 -355 0x0100 //TX_DT_BINVAD_TH_2 -356 0x0100 //TX_DT_BINVAD_TH_3 -357 0x36B0 //TX_DT_BINVAD_ENDF -358 0x0200 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0140 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x01F4 //TX_NOISE_TH_2 -372 0x36B0 //TX_NOISE_TH_3 -373 0x2710 //TX_NOISE_TH_4 -374 0x2CEC //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0050 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x4000 //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x2000 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x4000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4850 //TX_FDEQ_GAIN_2 -570 0x5050 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x484A //TX_FDEQ_GAIN_5 -573 0x4E5E //TX_FDEQ_GAIN_6 -574 0x5C4C //TX_FDEQ_GAIN_7 -575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x4448 //TX_FDEQ_GAIN_10 -578 0x4850 //TX_FDEQ_GAIN_11 -579 0x5C6A //TX_FDEQ_GAIN_12 -580 0x5A84 //TX_FDEQ_GAIN_13 -581 0x7880 //TX_FDEQ_GAIN_14 -582 0x7F7F //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x6474 //TX_PREEQ_GAIN_MIC0_12 -630 0x7870 //TX_PREEQ_GAIN_MIC0_13 -631 0x5C48 //TX_PREEQ_GAIN_MIC0_14 -632 0x383C //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1719 //TX_PREEQ_BIN_MIC0_11 -653 0x1B1E //TX_PREEQ_BIN_MIC0_12 -654 0x1E1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x282C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x070F //TX_PREEQ_BIN_MIC1_8 -699 0x1F08 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0920 //TX_PREEQ_BIN_MIC1_11 -702 0x2020 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0xF200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0050 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0050 //TX_MIC_CALIBRATION_2 -768 0x0050 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x0000 //TX_GAIN_LIMIT_2 -776 0x0000 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0800 //TX_TDDRC_ALPHA_UP_01 -784 0x0800 //TX_TDDRC_ALPHA_UP_02 -785 0x0800 //TX_TDDRC_ALPHA_UP_03 -786 0x0800 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1000 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 -860 0x0800 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0E21 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2064 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x1800 //RX_THR_PITCH_DET_0 -14 0x1000 //RX_THR_PITCH_DET_1 -15 0x0800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL -23 0x9000 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x2064 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0003 //RX_SAMPLINGFREQ_SIG -160 0x0003 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x1800 //RX_THR_PITCH_DET_0 -171 0x1000 //RX_THR_PITCH_DET_1 -172 0x0800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL -180 0x9000 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-FB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x4B7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0FF7 //TX_PGA_0 -28 0x0FF7 //TX_PGA_1 -29 0x0FF7 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3B33 //TX_DIST2REF_11 -73 0x0A70 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0300 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7A00 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x2000 //TX_MIN_EQ_RE_EST_1 -154 0x2000 //TX_MIN_EQ_RE_EST_2 -155 0x4000 //TX_MIN_EQ_RE_EST_3 -156 0x4000 //TX_MIN_EQ_RE_EST_4 -157 0x7FFF //TX_MIN_EQ_RE_EST_5 -158 0x7FFF //TX_MIN_EQ_RE_EST_6 -159 0x7FFF //TX_MIN_EQ_RE_EST_7 -160 0x7FFF //TX_MIN_EQ_RE_EST_8 -161 0x7FFF //TX_MIN_EQ_RE_EST_9 -162 0x7FFF //TX_MIN_EQ_RE_EST_10 -163 0x7FFF //TX_MIN_EQ_RE_EST_11 -164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0CCD //TX_LAMBDA_CB_NLE -167 0x2000 //TX_C_POST_FLT -168 0x7FFF //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x09C4 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7D00 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0DAC //TX_DT_CUT_K -214 0x0020 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x7FFF //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFB00 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0018 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x50C0 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x4C00 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x4000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7C00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7A00 //TX_LAMBDA_PFILT_S_2 -342 0x7C00 //TX_LAMBDA_PFILT_S_3 -343 0x7C00 //TX_LAMBDA_PFILT_S_4 -344 0x7C00 //TX_LAMBDA_PFILT_S_5 -345 0x7C00 //TX_LAMBDA_PFILT_S_6 -346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 -357 0x1F40 //TX_DT_BINVAD_ENDF -358 0x0100 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x0DAC //TX_NOISE_TH_2 -372 0x4E20 //TX_NOISE_TH_3 -373 0x4E20 //TX_NOISE_TH_4 -374 0x59D8 //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x2710 //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x2000 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x7FFF //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4853 //TX_FDEQ_GAIN_9 -577 0x5450 //TX_FDEQ_GAIN_10 -578 0x7465 //TX_FDEQ_GAIN_11 -579 0x807F //TX_FDEQ_GAIN_12 -580 0x82C4 //TX_FDEQ_GAIN_13 -581 0xC4C4 //TX_FDEQ_GAIN_14 -582 0xC4C4 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2011 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 -624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 -625 0x5456 //TX_PREEQ_GAIN_MIC0_8 -626 0x585C //TX_PREEQ_GAIN_MIC0_9 -627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 -628 0x7478 //TX_PREEQ_GAIN_MIC0_11 -629 0x705C //TX_PREEQ_GAIN_MIC0_12 -630 0x4838 //TX_PREEQ_GAIN_MIC0_13 -631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x0909 //TX_PREEQ_BIN_MIC0_7 -649 0x090B //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x1414 //TX_PREEQ_BIN_MIC0_12 -654 0x1C1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x462C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0030 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x1812 //TX_PREEQ_BIN_MIC1_0 -691 0x0A0A //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x080A //TX_PREEQ_BIN_MIC1_3 -694 0x0B09 //TX_PREEQ_BIN_MIC1_4 -695 0x0A06 //TX_PREEQ_BIN_MIC1_5 -696 0x0606 //TX_PREEQ_BIN_MIC1_6 -697 0x0605 //TX_PREEQ_BIN_MIC1_7 -698 0x050A //TX_PREEQ_BIN_MIC1_8 -699 0x1505 //TX_PREEQ_BIN_MIC1_9 -700 0x0506 //TX_PREEQ_BIN_MIC1_10 -701 0x0615 //TX_PREEQ_BIN_MIC1_11 -702 0x1516 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x2021 //TX_PREEQ_BIN_MIC1_14 -705 0x2021 //TX_PREEQ_BIN_MIC1_15 -706 0x0800 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0004 //TX_FILTINDX -854 0x0004 //TX_TDDRC_THRD_0 -855 0x0016 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0A98 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x0064 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0500 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x000A //RX_NS_LVL_CTRL -23 0xF600 //RX_THR_SN_EST -24 0x7000 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x0064 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0004 //RX_SAMPLINGFREQ_SIG -160 0x0004 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0500 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x000A //RX_NS_LVL_CTRL -180 0xF600 //RX_THR_SN_EST -181 0x7000 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-NB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0008 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x0240 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0A13 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7D83 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0019 //TX_EPD_OFFSET_00 -233 0x0019 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0000 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x0000 //TX_NS_FP_K_METAL -411 0x7FFF //TX_NOISEDET_BOOST_TH -412 0x0000 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4242 //TX_FDEQ_GAIN_6 -574 0x423C //TX_FDEQ_GAIN_7 -575 0x3C3C //TX_FDEQ_GAIN_8 -576 0x3434 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1104 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0808 //TX_PREEQ_BIN_MIC0_7 -649 0x0808 //TX_PREEQ_BIN_MIC0_8 -650 0x0808 //TX_PREEQ_BIN_MIC0_9 -651 0x0808 //TX_PREEQ_BIN_MIC0_10 -652 0x0808 //TX_PREEQ_BIN_MIC0_11 -653 0x0808 //TX_PREEQ_BIN_MIC0_12 -654 0x0808 //TX_PREEQ_BIN_MIC0_13 -655 0x0808 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0808 //TX_PREEQ_BIN_MIC1_7 -698 0x0808 //TX_PREEQ_BIN_MIC1_8 -699 0x0808 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0808 //TX_PREEQ_BIN_MIC1_11 -702 0x0808 //TX_PREEQ_BIN_MIC1_12 -703 0x0808 //TX_PREEQ_BIN_MIC1_13 -704 0x0808 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x07F2 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x206C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x206C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-WB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0008 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x0240 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0915 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7D83 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0019 //TX_EPD_OFFSET_00 -233 0x0019 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0000 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x0000 //TX_NS_FP_K_METAL -411 0x7FFF //TX_NOISEDET_BOOST_TH -412 0x0000 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4444 //TX_FDEQ_GAIN_7 -575 0x4444 //TX_FDEQ_GAIN_8 -576 0x3C3C //TX_FDEQ_GAIN_9 -577 0x3C3C //TX_FDEQ_GAIN_10 -578 0x3C3C //TX_FDEQ_GAIN_11 -579 0x3C30 //TX_FDEQ_GAIN_12 -580 0x3030 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1112 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0808 //TX_PREEQ_BIN_MIC0_7 -649 0x0808 //TX_PREEQ_BIN_MIC0_8 -650 0x0808 //TX_PREEQ_BIN_MIC0_9 -651 0x0808 //TX_PREEQ_BIN_MIC0_10 -652 0x0808 //TX_PREEQ_BIN_MIC0_11 -653 0x0808 //TX_PREEQ_BIN_MIC0_12 -654 0x0808 //TX_PREEQ_BIN_MIC0_13 -655 0x0808 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0808 //TX_PREEQ_BIN_MIC1_7 -698 0x0808 //TX_PREEQ_BIN_MIC1_8 -699 0x0808 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0808 //TX_PREEQ_BIN_MIC1_11 -702 0x0808 //TX_PREEQ_BIN_MIC1_12 -703 0x0808 //TX_PREEQ_BIN_MIC1_13 -704 0x0808 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x07F2 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x206C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0001 //RX_SAMPLINGFREQ_SIG -3 0x0001 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x206C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0001 //RX_SAMPLINGFREQ_SIG -160 0x0001 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-SWB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x0200 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0915 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7EFF //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00F0 //TX_EPD_OFFSET_00 -233 0x00F0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000B //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x2000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7900 //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0000 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4868 //TX_PREEQ_GAIN_MIC0_8 -626 0x6860 //TX_PREEQ_GAIN_MIC0_9 -627 0x6048 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0970 //TX_TDDRC_DRC_GAIN -867 0x78D6 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2064 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x1800 //RX_THR_PITCH_DET_0 -14 0x1000 //RX_THR_PITCH_DET_1 -15 0x0800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL -23 0x9000 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x2064 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0003 //RX_SAMPLINGFREQ_SIG -160 0x0003 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x1800 //RX_THR_PITCH_DET_0 -171 0x1000 //RX_THR_PITCH_DET_1 -172 0x0800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL -180 0x9000 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-FB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0009 //TX_OPERATION_MODE_1 -2 0x0020 //TX_PATCH_REG -3 0x0200 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0915 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0200 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6000 //TX_EAD_THR -151 0x0400 //TX_THR_RE_EST -152 0x3000 //TX_MIN_EQ_RE_EST_0 -153 0x3000 //TX_MIN_EQ_RE_EST_1 -154 0x4000 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x6000 //TX_MIN_EQ_RE_EST_6 -159 0x6000 //TX_MIN_EQ_RE_EST_7 -160 0x6000 //TX_MIN_EQ_RE_EST_8 -161 0x6000 //TX_MIN_EQ_RE_EST_9 -162 0x4000 //TX_MIN_EQ_RE_EST_10 -163 0x4000 //TX_MIN_EQ_RE_EST_11 -164 0x4000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x4000 //TX_LAMBDA_CB_NLE -167 0x3000 //TX_C_POST_FLT -168 0x4500 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x5000 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7F00 //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x0800 //TX_DTD_THR2_0 -205 0x0800 //TX_DTD_THR2_1 -206 0x0800 //TX_DTD_THR2_2 -207 0x0800 //TX_DTD_THR2_3 -208 0x0800 //TX_DTD_THR2_4 -209 0x0100 //TX_DTD_THR2_5 -210 0x0100 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x03E8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00C0 //TX_EPD_OFFSET_00 -233 0x00C0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF700 //TX_THR_SN_EST_0 -243 0xFB00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF700 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xF600 //TX_THR_SN_EST_5 -248 0xF600 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0400 //TX_DELTA_THR_SN_EST_1 -252 0x0300 //TX_DELTA_THR_SN_EST_2 -253 0x0600 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x2000 //TX_B_POST_FLT_1 -281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0019 //TX_NS_LVL_CTRL_3 -285 0x0010 //TX_NS_LVL_CTRL_4 -286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0019 //TX_NS_LVL_CTRL_6 -288 0x0010 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000F //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0011 //TX_MIN_GAIN_S_6 -296 0x000C //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7000 //TX_SNRI_SUP_0 -301 0x7000 //TX_SNRI_SUP_1 -302 0x7000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x6000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0016 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x6000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x6000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x4000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7CCD //TX_LAMBDA_PFILT_S_0 -340 0x7CCD //TX_LAMBDA_PFILT_S_1 -341 0x7CCD //TX_LAMBDA_PFILT_S_2 -342 0x7CCD //TX_LAMBDA_PFILT_S_3 -343 0x7CCD //TX_LAMBDA_PFILT_S_4 -344 0x7CCD //TX_LAMBDA_PFILT_S_5 -345 0x7CCD //TX_LAMBDA_PFILT_S_6 -346 0x7CCD //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0500 //TX_A_PEPPER -349 0x1600 //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x02A6 //TX_NOISE_TH_1 -371 0x04B0 //TX_NOISE_TH_2 -372 0x3194 //TX_NOISE_TH_3 -373 0x0960 //TX_NOISE_TH_4 -374 0x5555 //TX_NOISE_TH_5 -375 0x3FF4 //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x0000 //TX_NOISE_TH_5_4 -378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2011 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0001 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0200 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2064 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0500 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x000A //RX_NS_LVL_CTRL -23 0xF600 //RX_THR_SN_EST -24 0x7000 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x0064 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0004 //RX_SAMPLINGFREQ_SIG -160 0x0004 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0500 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x000A //RX_NS_LVL_CTRL -180 0xF600 //RX_THR_SN_EST -181 0x7000 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-NB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0008 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2A68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0A13 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7D83 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0019 //TX_EPD_OFFSET_00 -233 0x0019 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x0000 //TX_NS_FP_K_METAL -411 0x7FFF //TX_NOISEDET_BOOST_TH -412 0x0000 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4242 //TX_FDEQ_GAIN_6 -574 0x423C //TX_FDEQ_GAIN_7 -575 0x3C3C //TX_FDEQ_GAIN_8 -576 0x3434 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1104 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0808 //TX_PREEQ_BIN_MIC0_7 -649 0x0808 //TX_PREEQ_BIN_MIC0_8 -650 0x0808 //TX_PREEQ_BIN_MIC0_9 -651 0x0808 //TX_PREEQ_BIN_MIC0_10 -652 0x0808 //TX_PREEQ_BIN_MIC0_11 -653 0x0808 //TX_PREEQ_BIN_MIC0_12 -654 0x0808 //TX_PREEQ_BIN_MIC0_13 -655 0x0808 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0808 //TX_PREEQ_BIN_MIC1_7 -698 0x0808 //TX_PREEQ_BIN_MIC1_8 -699 0x0808 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0808 //TX_PREEQ_BIN_MIC1_11 -702 0x0808 //TX_PREEQ_BIN_MIC1_12 -703 0x0808 //TX_PREEQ_BIN_MIC1_13 -704 0x0808 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x07F2 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x206C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x206C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-WB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0008 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2A68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0915 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7D83 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0019 //TX_EPD_OFFSET_00 -233 0x0019 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x0000 //TX_NS_FP_K_METAL -411 0x7FFF //TX_NOISEDET_BOOST_TH -412 0x0000 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4444 //TX_FDEQ_GAIN_7 -575 0x4444 //TX_FDEQ_GAIN_8 -576 0x3C3C //TX_FDEQ_GAIN_9 -577 0x3C3C //TX_FDEQ_GAIN_10 -578 0x3C3C //TX_FDEQ_GAIN_11 -579 0x3C30 //TX_FDEQ_GAIN_12 -580 0x3030 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1112 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0808 //TX_PREEQ_BIN_MIC0_7 -649 0x0808 //TX_PREEQ_BIN_MIC0_8 -650 0x0808 //TX_PREEQ_BIN_MIC0_9 -651 0x0808 //TX_PREEQ_BIN_MIC0_10 -652 0x0808 //TX_PREEQ_BIN_MIC0_11 -653 0x0808 //TX_PREEQ_BIN_MIC0_12 -654 0x0808 //TX_PREEQ_BIN_MIC0_13 -655 0x0808 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0808 //TX_PREEQ_BIN_MIC1_7 -698 0x0808 //TX_PREEQ_BIN_MIC1_8 -699 0x0808 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0808 //TX_PREEQ_BIN_MIC1_11 -702 0x0808 //TX_PREEQ_BIN_MIC1_12 -703 0x0808 //TX_PREEQ_BIN_MIC1_13 -704 0x0808 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x07F2 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x206C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0001 //RX_SAMPLINGFREQ_SIG -3 0x0001 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x206C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0001 //RX_SAMPLINGFREQ_SIG -160 0x0001 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-SWB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2A28 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0915 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7EFF //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00F0 //TX_EPD_OFFSET_00 -233 0x00F0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000B //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x2000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7900 //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4868 //TX_PREEQ_GAIN_MIC0_8 -626 0x6860 //TX_PREEQ_GAIN_MIC0_9 -627 0x6048 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0970 //TX_TDDRC_DRC_GAIN -867 0x78D6 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2064 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x1800 //RX_THR_PITCH_DET_0 -14 0x1000 //RX_THR_PITCH_DET_1 -15 0x0800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL -23 0x9000 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x2064 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0003 //RX_SAMPLINGFREQ_SIG -160 0x0003 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x1800 //RX_THR_PITCH_DET_0 -171 0x1000 //RX_THR_PITCH_DET_1 -172 0x0800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL -180 0x9000 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-FB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0009 //TX_OPERATION_MODE_1 -2 0x0020 //TX_PATCH_REG -3 0x286A //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0915 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0200 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6000 //TX_EAD_THR -151 0x0400 //TX_THR_RE_EST -152 0x3000 //TX_MIN_EQ_RE_EST_0 -153 0x3000 //TX_MIN_EQ_RE_EST_1 -154 0x4000 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x6000 //TX_MIN_EQ_RE_EST_6 -159 0x6000 //TX_MIN_EQ_RE_EST_7 -160 0x6000 //TX_MIN_EQ_RE_EST_8 -161 0x6000 //TX_MIN_EQ_RE_EST_9 -162 0x4000 //TX_MIN_EQ_RE_EST_10 -163 0x4000 //TX_MIN_EQ_RE_EST_11 -164 0x4000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x4000 //TX_LAMBDA_CB_NLE -167 0x3000 //TX_C_POST_FLT -168 0x4500 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x5000 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7F00 //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x0800 //TX_DTD_THR2_0 -205 0x0800 //TX_DTD_THR2_1 -206 0x0800 //TX_DTD_THR2_2 -207 0x0800 //TX_DTD_THR2_3 -208 0x0800 //TX_DTD_THR2_4 -209 0x0100 //TX_DTD_THR2_5 -210 0x0100 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x03E8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00C0 //TX_EPD_OFFSET_00 -233 0x00C0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF700 //TX_THR_SN_EST_0 -243 0xFB00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF700 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xF600 //TX_THR_SN_EST_5 -248 0xF600 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0400 //TX_DELTA_THR_SN_EST_1 -252 0x0300 //TX_DELTA_THR_SN_EST_2 -253 0x0600 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x2000 //TX_B_POST_FLT_1 -281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0019 //TX_NS_LVL_CTRL_3 -285 0x0010 //TX_NS_LVL_CTRL_4 -286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0019 //TX_NS_LVL_CTRL_6 -288 0x0010 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000F //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0011 //TX_MIN_GAIN_S_6 -296 0x000C //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7000 //TX_SNRI_SUP_0 -301 0x7000 //TX_SNRI_SUP_1 -302 0x7000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x6000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0016 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x6000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x6000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x4000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7CCD //TX_LAMBDA_PFILT_S_0 -340 0x7CCD //TX_LAMBDA_PFILT_S_1 -341 0x7CCD //TX_LAMBDA_PFILT_S_2 -342 0x7CCD //TX_LAMBDA_PFILT_S_3 -343 0x7CCD //TX_LAMBDA_PFILT_S_4 -344 0x7CCD //TX_LAMBDA_PFILT_S_5 -345 0x7CCD //TX_LAMBDA_PFILT_S_6 -346 0x7CCD //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0500 //TX_A_PEPPER -349 0x1600 //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x02A6 //TX_NOISE_TH_1 -371 0x04B0 //TX_NOISE_TH_2 -372 0x3194 //TX_NOISE_TH_3 -373 0x0960 //TX_NOISE_TH_4 -374 0x5555 //TX_NOISE_TH_5 -375 0x3FF4 //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x0000 //TX_NOISE_TH_5_4 -378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2011 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0001 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0200 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2064 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0500 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x000A //RX_NS_LVL_CTRL -23 0xF600 //RX_THR_SN_EST -24 0x7000 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x0064 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0004 //RX_SAMPLINGFREQ_SIG -160 0x0004 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0500 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x000A //RX_NS_LVL_CTRL -180 0xF600 //RX_THR_SN_EST -181 0x7000 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-NB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0008 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x0240 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0A13 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7D83 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0019 //TX_EPD_OFFSET_00 -233 0x0019 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0000 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x0000 //TX_NS_FP_K_METAL -411 0x7FFF //TX_NOISEDET_BOOST_TH -412 0x0000 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4242 //TX_FDEQ_GAIN_6 -574 0x423C //TX_FDEQ_GAIN_7 -575 0x3C3C //TX_FDEQ_GAIN_8 -576 0x3434 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1104 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0808 //TX_PREEQ_BIN_MIC0_7 -649 0x0808 //TX_PREEQ_BIN_MIC0_8 -650 0x0808 //TX_PREEQ_BIN_MIC0_9 -651 0x0808 //TX_PREEQ_BIN_MIC0_10 -652 0x0808 //TX_PREEQ_BIN_MIC0_11 -653 0x0808 //TX_PREEQ_BIN_MIC0_12 -654 0x0808 //TX_PREEQ_BIN_MIC0_13 -655 0x0808 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0808 //TX_PREEQ_BIN_MIC1_7 -698 0x0808 //TX_PREEQ_BIN_MIC1_8 -699 0x0808 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0808 //TX_PREEQ_BIN_MIC1_11 -702 0x0808 //TX_PREEQ_BIN_MIC1_12 -703 0x0808 //TX_PREEQ_BIN_MIC1_13 -704 0x0808 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x07F2 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x206C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x206C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-WB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0008 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x0240 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0915 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7D83 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0019 //TX_EPD_OFFSET_00 -233 0x0019 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0000 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x0000 //TX_NS_FP_K_METAL -411 0x7FFF //TX_NOISEDET_BOOST_TH -412 0x0000 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4444 //TX_FDEQ_GAIN_7 -575 0x4444 //TX_FDEQ_GAIN_8 -576 0x3C3C //TX_FDEQ_GAIN_9 -577 0x3C3C //TX_FDEQ_GAIN_10 -578 0x3C3C //TX_FDEQ_GAIN_11 -579 0x3C30 //TX_FDEQ_GAIN_12 -580 0x3030 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1112 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0808 //TX_PREEQ_BIN_MIC0_7 -649 0x0808 //TX_PREEQ_BIN_MIC0_8 -650 0x0808 //TX_PREEQ_BIN_MIC0_9 -651 0x0808 //TX_PREEQ_BIN_MIC0_10 -652 0x0808 //TX_PREEQ_BIN_MIC0_11 -653 0x0808 //TX_PREEQ_BIN_MIC0_12 -654 0x0808 //TX_PREEQ_BIN_MIC0_13 -655 0x0808 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0808 //TX_PREEQ_BIN_MIC1_7 -698 0x0808 //TX_PREEQ_BIN_MIC1_8 -699 0x0808 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0808 //TX_PREEQ_BIN_MIC1_11 -702 0x0808 //TX_PREEQ_BIN_MIC1_12 -703 0x0808 //TX_PREEQ_BIN_MIC1_13 -704 0x0808 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x07F2 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x206C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0001 //RX_SAMPLINGFREQ_SIG -3 0x0001 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x206C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0001 //RX_SAMPLINGFREQ_SIG -160 0x0001 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-SWB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x0200 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0915 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7EFF //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00F0 //TX_EPD_OFFSET_00 -233 0x00F0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000B //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x2000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7900 //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0000 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4868 //TX_PREEQ_GAIN_MIC0_8 -626 0x6860 //TX_PREEQ_GAIN_MIC0_9 -627 0x6048 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0970 //TX_TDDRC_DRC_GAIN -867 0x78D6 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2064 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x1800 //RX_THR_PITCH_DET_0 -14 0x1000 //RX_THR_PITCH_DET_1 -15 0x0800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL -23 0x9000 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x2064 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0003 //RX_SAMPLINGFREQ_SIG -160 0x0003 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x1800 //RX_THR_PITCH_DET_0 -171 0x1000 //RX_THR_PITCH_DET_1 -172 0x0800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL -180 0x9000 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-FB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0009 //TX_OPERATION_MODE_1 -2 0x0020 //TX_PATCH_REG -3 0x0200 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0915 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0200 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6000 //TX_EAD_THR -151 0x0400 //TX_THR_RE_EST -152 0x3000 //TX_MIN_EQ_RE_EST_0 -153 0x3000 //TX_MIN_EQ_RE_EST_1 -154 0x4000 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x6000 //TX_MIN_EQ_RE_EST_6 -159 0x6000 //TX_MIN_EQ_RE_EST_7 -160 0x6000 //TX_MIN_EQ_RE_EST_8 -161 0x6000 //TX_MIN_EQ_RE_EST_9 -162 0x4000 //TX_MIN_EQ_RE_EST_10 -163 0x4000 //TX_MIN_EQ_RE_EST_11 -164 0x4000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x4000 //TX_LAMBDA_CB_NLE -167 0x3000 //TX_C_POST_FLT -168 0x4500 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x5000 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7F00 //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x0800 //TX_DTD_THR2_0 -205 0x0800 //TX_DTD_THR2_1 -206 0x0800 //TX_DTD_THR2_2 -207 0x0800 //TX_DTD_THR2_3 -208 0x0800 //TX_DTD_THR2_4 -209 0x0100 //TX_DTD_THR2_5 -210 0x0100 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x03E8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00C0 //TX_EPD_OFFSET_00 -233 0x00C0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF700 //TX_THR_SN_EST_0 -243 0xFB00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF700 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xF600 //TX_THR_SN_EST_5 -248 0xF600 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0400 //TX_DELTA_THR_SN_EST_1 -252 0x0300 //TX_DELTA_THR_SN_EST_2 -253 0x0600 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x2000 //TX_B_POST_FLT_1 -281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0019 //TX_NS_LVL_CTRL_3 -285 0x0010 //TX_NS_LVL_CTRL_4 -286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0019 //TX_NS_LVL_CTRL_6 -288 0x0010 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000F //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0011 //TX_MIN_GAIN_S_6 -296 0x000C //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7000 //TX_SNRI_SUP_0 -301 0x7000 //TX_SNRI_SUP_1 -302 0x7000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x6000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0016 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x6000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x6000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x4000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7CCD //TX_LAMBDA_PFILT_S_0 -340 0x7CCD //TX_LAMBDA_PFILT_S_1 -341 0x7CCD //TX_LAMBDA_PFILT_S_2 -342 0x7CCD //TX_LAMBDA_PFILT_S_3 -343 0x7CCD //TX_LAMBDA_PFILT_S_4 -344 0x7CCD //TX_LAMBDA_PFILT_S_5 -345 0x7CCD //TX_LAMBDA_PFILT_S_6 -346 0x7CCD //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0500 //TX_A_PEPPER -349 0x1600 //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x02A6 //TX_NOISE_TH_1 -371 0x04B0 //TX_NOISE_TH_2 -372 0x3194 //TX_NOISE_TH_3 -373 0x0960 //TX_NOISE_TH_4 -374 0x5555 //TX_NOISE_TH_5 -375 0x3FF4 //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x0000 //TX_NOISE_TH_5_4 -378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2011 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0001 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0200 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2064 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0500 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x000A //RX_NS_LVL_CTRL -23 0xF600 //RX_THR_SN_EST -24 0x7000 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x0064 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0004 //RX_SAMPLINGFREQ_SIG -160 0x0004 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0500 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x000A //RX_NS_LVL_CTRL -180 0xF600 //RX_THR_SN_EST -181 0x7000 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0008 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2A68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0A13 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7D83 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0019 //TX_EPD_OFFSET_00 -233 0x0019 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x0000 //TX_NS_FP_K_METAL -411 0x7FFF //TX_NOISEDET_BOOST_TH -412 0x0000 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4242 //TX_FDEQ_GAIN_6 -574 0x423C //TX_FDEQ_GAIN_7 -575 0x3C3C //TX_FDEQ_GAIN_8 -576 0x3434 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1104 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0808 //TX_PREEQ_BIN_MIC0_7 -649 0x0808 //TX_PREEQ_BIN_MIC0_8 -650 0x0808 //TX_PREEQ_BIN_MIC0_9 -651 0x0808 //TX_PREEQ_BIN_MIC0_10 -652 0x0808 //TX_PREEQ_BIN_MIC0_11 -653 0x0808 //TX_PREEQ_BIN_MIC0_12 -654 0x0808 //TX_PREEQ_BIN_MIC0_13 -655 0x0808 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0808 //TX_PREEQ_BIN_MIC1_7 -698 0x0808 //TX_PREEQ_BIN_MIC1_8 -699 0x0808 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0808 //TX_PREEQ_BIN_MIC1_11 -702 0x0808 //TX_PREEQ_BIN_MIC1_12 -703 0x0808 //TX_PREEQ_BIN_MIC1_13 -704 0x0808 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x07F2 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x206C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x017F //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4444 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x4040 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x206C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x017F //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4444 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x4040 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0008 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2A68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0915 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7D83 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0019 //TX_EPD_OFFSET_00 -233 0x0019 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x0000 //TX_NS_FP_K_METAL -411 0x7FFF //TX_NOISEDET_BOOST_TH -412 0x0000 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4444 //TX_FDEQ_GAIN_7 -575 0x4444 //TX_FDEQ_GAIN_8 -576 0x3C3C //TX_FDEQ_GAIN_9 -577 0x3C3C //TX_FDEQ_GAIN_10 -578 0x3C3C //TX_FDEQ_GAIN_11 -579 0x3C30 //TX_FDEQ_GAIN_12 -580 0x3030 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1112 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0808 //TX_PREEQ_BIN_MIC0_7 -649 0x0808 //TX_PREEQ_BIN_MIC0_8 -650 0x0808 //TX_PREEQ_BIN_MIC0_9 -651 0x0808 //TX_PREEQ_BIN_MIC0_10 -652 0x0808 //TX_PREEQ_BIN_MIC0_11 -653 0x0808 //TX_PREEQ_BIN_MIC0_12 -654 0x0808 //TX_PREEQ_BIN_MIC0_13 -655 0x0808 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0808 //TX_PREEQ_BIN_MIC1_7 -698 0x0808 //TX_PREEQ_BIN_MIC1_8 -699 0x0808 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0808 //TX_PREEQ_BIN_MIC1_11 -702 0x0808 //TX_PREEQ_BIN_MIC1_12 -703 0x0808 //TX_PREEQ_BIN_MIC1_13 -704 0x0808 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x07F2 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x206C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0001 //RX_SAMPLINGFREQ_SIG -3 0x0001 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7E70 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x3C3C //RX_FDEQ_GAIN_9 -49 0x3C3C //RX_FDEQ_GAIN_10 -50 0x3838 //RX_FDEQ_GAIN_11 -51 0x3838 //RX_FDEQ_GAIN_12 -52 0x3030 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1112 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x206C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0001 //RX_SAMPLINGFREQ_SIG -160 0x0001 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7E70 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x3C3C //RX_FDEQ_GAIN_9 -206 0x3C3C //RX_FDEQ_GAIN_10 -207 0x3838 //RX_FDEQ_GAIN_11 -208 0x3838 //RX_FDEQ_GAIN_12 -209 0x3030 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1112 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2A28 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0915 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7EFF //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00F0 //TX_EPD_OFFSET_00 -233 0x00F0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000B //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x2000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7900 //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4868 //TX_PREEQ_GAIN_MIC0_8 -626 0x6860 //TX_PREEQ_GAIN_MIC0_9 -627 0x6048 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0970 //TX_TDDRC_DRC_GAIN -867 0x78D6 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2064 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x1800 //RX_THR_PITCH_DET_0 -14 0x1000 //RX_THR_PITCH_DET_1 -15 0x0800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL -23 0x9000 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x2064 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0003 //RX_SAMPLINGFREQ_SIG -160 0x0003 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x1800 //RX_THR_PITCH_DET_0 -171 0x1000 //RX_THR_PITCH_DET_1 -172 0x0800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL -180 0x9000 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0009 //TX_OPERATION_MODE_1 -2 0x0020 //TX_PATCH_REG -3 0x286A //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0915 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0200 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6000 //TX_EAD_THR -151 0x0400 //TX_THR_RE_EST -152 0x3000 //TX_MIN_EQ_RE_EST_0 -153 0x3000 //TX_MIN_EQ_RE_EST_1 -154 0x4000 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x6000 //TX_MIN_EQ_RE_EST_6 -159 0x6000 //TX_MIN_EQ_RE_EST_7 -160 0x6000 //TX_MIN_EQ_RE_EST_8 -161 0x6000 //TX_MIN_EQ_RE_EST_9 -162 0x4000 //TX_MIN_EQ_RE_EST_10 -163 0x4000 //TX_MIN_EQ_RE_EST_11 -164 0x4000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x4000 //TX_LAMBDA_CB_NLE -167 0x3000 //TX_C_POST_FLT -168 0x4500 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x5000 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7F00 //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x0800 //TX_DTD_THR2_0 -205 0x0800 //TX_DTD_THR2_1 -206 0x0800 //TX_DTD_THR2_2 -207 0x0800 //TX_DTD_THR2_3 -208 0x0800 //TX_DTD_THR2_4 -209 0x0100 //TX_DTD_THR2_5 -210 0x0100 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x03E8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00C0 //TX_EPD_OFFSET_00 -233 0x00C0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF700 //TX_THR_SN_EST_0 -243 0xFB00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF700 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xF600 //TX_THR_SN_EST_5 -248 0xF600 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0400 //TX_DELTA_THR_SN_EST_1 -252 0x0300 //TX_DELTA_THR_SN_EST_2 -253 0x0600 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x2000 //TX_B_POST_FLT_1 -281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0019 //TX_NS_LVL_CTRL_3 -285 0x0010 //TX_NS_LVL_CTRL_4 -286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0019 //TX_NS_LVL_CTRL_6 -288 0x0010 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000F //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0011 //TX_MIN_GAIN_S_6 -296 0x000C //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7000 //TX_SNRI_SUP_0 -301 0x7000 //TX_SNRI_SUP_1 -302 0x7000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x6000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0016 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x6000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x6000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x4000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7CCD //TX_LAMBDA_PFILT_S_0 -340 0x7CCD //TX_LAMBDA_PFILT_S_1 -341 0x7CCD //TX_LAMBDA_PFILT_S_2 -342 0x7CCD //TX_LAMBDA_PFILT_S_3 -343 0x7CCD //TX_LAMBDA_PFILT_S_4 -344 0x7CCD //TX_LAMBDA_PFILT_S_5 -345 0x7CCD //TX_LAMBDA_PFILT_S_6 -346 0x7CCD //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0500 //TX_A_PEPPER -349 0x1600 //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x02A6 //TX_NOISE_TH_1 -371 0x04B0 //TX_NOISE_TH_2 -372 0x3194 //TX_NOISE_TH_3 -373 0x0960 //TX_NOISE_TH_4 -374 0x5555 //TX_NOISE_TH_5 -375 0x3FF4 //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x0000 //TX_NOISE_TH_5_4 -378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MORENS_TFMASK_TH -381 0xFFEE //TX_DRC_QUIET_FLOOR -382 0x6000 //TX_RATIODTL_CUT_TH -383 0xFFF3 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_POST_MASK_SUP_HSNE -392 0x0000 //TX_TAIL_DET_TH -393 0x0000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0800 //TX_SUPHIGH_TH -396 0x00C8 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_C_POST_FLT_MASK -399 0x0005 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DEREVERB_LF_MU -515 0x0000 //TX_DEREVERB_HF_MU -516 0x0000 //TX_DEREVERB_DELAY -517 0x0000 //TX_DEREVERB_COEF_LEN -518 0x0000 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x0000 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2011 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0001 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0200 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x0000 //TX_SENDFUNC_REG_MICMUTE -898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0000 //TX_MICMUTE_RATIO_THR -900 0x0000 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x0000 //TX_MICMUTE_LOG_EYR_TH -903 0x0000 //TX_MICMUTE_CVG_TIME -904 0x0000 //TX_MICMUTE_RELEASE_TIME -905 0x0000 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0000 //TX_MICMUTE_FRQ_AEC_L -908 0x0000 //TX_MICMUTE_EAD_THR -909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x0000 //TX_DTD_THR1_MICMUTE_0 -912 0x0000 //TX_DTD_THR1_MICMUTE_1 -913 0x0000 //TX_DTD_THR1_MICMUTE_2 -914 0x0000 //TX_DTD_THR1_MICMUTE_3 -915 0x0000 //TX_DTD_THR2_MICMUTE_0 -916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x0000 //TX_MICMUTE_C_POST_FLT -922 0x0000 //TX_MICMUTE_DT_CUT_K -923 0x0000 //TX_MICMUTE_DT_CUT_THR -924 0x0000 //TX_MICMUTE_DT_CUT_K2 -925 0x0000 //TX_MICMUTE_DT_CUT_THR2 -926 0x0000 //TX_MICMUTE_DT2_HOLD_N -927 0x0000 //TX_MICMUTE_RATIODTH_THCUT -928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK -931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0000 //TX_MICMUTE_DT_CUT_K1 -933 0x0000 //TX_MICMUTE_N2_SN_EST -934 0x0000 //TX_MICMUTE_THR_SN_EST_0 -935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 -936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x0000 //TX_MICMUTE_B_POST_FILT_0 -938 0x0000 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x0000 //TX_MIC1MUTE_AMP_THR -941 0x0000 //TX_MIC1MUTE_CVG_TIME -942 0x0000 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2064 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0500 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x000A //RX_NS_LVL_CTRL -23 0xF600 //RX_THR_SN_EST -24 0x7000 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0000 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x7FFF //RX_TDDRC_THRD_2 -115 0x7FFF //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0155 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x0064 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0004 //RX_SAMPLINGFREQ_SIG -160 0x0004 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0500 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x000A //RX_NS_LVL_CTRL -180 0xF600 //RX_THR_SN_EST -181 0x7000 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0000 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x7FFF //RX_TDDRC_THRD_2 -272 0x7FFF //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0155 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - diff --git a/audio/tegu/tuning/fortemedia/HANDSET.dat b/audio/tegu/tuning/fortemedia/HANDSET.dat index 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zs-L{Vx9Y3E`V!zPj6M_*ZUP-kfGB2yXch)BECgbi z2~RX768-Y9%+u# zvW@IW9=Q)r?!y>5;n&H&WL@;Ao5@Mr*=K2}Kl}(|_|##&_ZOEQX1Jtn!`+T!f1ZQv zzQaLw-&(}&RugZx7jt`43Afuy`5L>K977qeX(;DyZ58}S9hH1{&l*1btk?a^M`m0{ ztfhL4V##$_$#vB1=ZfV3H!BBuZtiPbG2zsk!-*E!8Pr%O$#C2>8x3SOT+R!;uKprd zYA%w;B!KJ$3e$dJN$2}qaBzKusUARNNtRH%H{h*H`qUrD? zraug)JG*d8bvni^_tVV1T;+RN55J{>-yu#B&HRKa%{ x%IQ2UoW1w=19GyCg&S&c!G^+EPiV;83D)cZK9+gzdDcz`_GdKSH=pj&{R>7LS-k)N diff --git a/audio/tegu/tuning/fortemedia/HANDSFREE.mods b/audio/tegu/tuning/fortemedia/HANDSFREE.mods index acf77bd..26e767d 100644 --- a/audio/tegu/tuning/fortemedia/HANDSFREE.mods +++ b/audio/tegu/tuning/fortemedia/HANDSFREE.mods @@ -1,19 +1,8105 @@ #PLATFORM_NAME gChip +#SINGLE_API_VER 1.4.2 #EXPORT_FLAG HANDSFREE -#SINGLE_API_VER 1.2.0 -#SAVE_TIME 2022-02-10 16:25:23 +#PARAM_MODE FULL +#SAVE_MODE 3 +#SAVE_TIME 2024-02-22 17:40:36 -#CASE_NAME HANDSFREE-HANDFREE-RESERVE1-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6FFD //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x053D //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7652 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0100 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7B00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x2000 //TX_MIN_EQ_RE_EST_3 +156 0x2000 //TX_MIN_EQ_RE_EST_4 +157 0x2000 //TX_MIN_EQ_RE_EST_5 +158 0x2000 //TX_MIN_EQ_RE_EST_6 +159 0x2000 //TX_MIN_EQ_RE_EST_7 +160 0x2000 //TX_MIN_EQ_RE_EST_8 +161 0x3000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x6000 //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x6000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x2000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0008 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FEE //TX_DTD_THR1_0 +198 0x7FEE //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7EF4 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0FA0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x1000 //TX_ADPT_STRICT_L +222 0x1000 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x157C //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x1000 //TX_B_POST_FILT_ECHO_L +229 0x1000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0BB8 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xF200 //TX_THR_SN_EST_2 +245 0xF200 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0050 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0080 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x0018 //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x7F00 //TX_LAMBDA_EQ_BF +272 0x0800 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0800 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0020 //TX_NS_LVL_CTRL_1 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 +285 0x0012 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0004 //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000F //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x000F //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x2000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x2000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x3000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x7000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7000 //TX_LAMBDA_PFILT_S_0 +340 0x7400 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7000 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 +344 0x7D00 //TX_LAMBDA_PFILT_S_5 +345 0x7900 //TX_LAMBDA_PFILT_S_6 +346 0x7D00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0FA0 //TX_DT_BINVAD_ENDF +358 0x0080 //TX_C_POST_FLT_DT +359 0x4000 //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0023 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x03ED //TX_NOISE_TH_2 +372 0x2CEC //TX_NOISE_TH_3 +373 0x4268 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0FA0 //TX_NOISE_TH_6 +379 0x000A //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x1000 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x7000 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x000A //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x007A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x5000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0014 //TX_FDEQ_SUBNUM +567 0x5250 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4A43 //TX_FDEQ_GAIN_3 +571 0x374B //TX_FDEQ_GAIN_4 +572 0x3444 //TX_FDEQ_GAIN_5 +573 0x433C //TX_FDEQ_GAIN_6 +574 0x3A37 //TX_FDEQ_GAIN_7 +575 0x2A2A //TX_FDEQ_GAIN_8 +576 0x303C //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0014 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4A4A //TX_PREEQ_GAIN_MIC1_7 +674 0x4B4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4D4E //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x484A //TX_PREEQ_GAIN_MIC2_6 +722 0x4B4B //TX_PREEQ_GAIN_MIC2_7 +723 0x4B4C //TX_PREEQ_GAIN_MIC2_8 +724 0x4D50 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0708 //TX_PREEQ_BIN_MIC2_6 +746 0x090A //TX_PREEQ_BIN_MIC2_7 +747 0x0B0C //TX_PREEQ_BIN_MIC2_8 +748 0x0D0E //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x4000 //TX_TDDRC_ALPHA_UP_01 +784 0x4000 //TX_TDDRC_ALPHA_UP_02 +785 0x4000 //TX_TDDRC_ALPHA_UP_03 +786 0x4000 //TX_TDDRC_ALPHA_UP_04 +787 0x6000 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x0130 //TX_TPKA_FP +831 0x0400 //TX_MIN_G_FP +832 0x0800 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0018 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x4000 //TX_TDDRC_ALPHA_UP_00 +861 0x6000 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x1C2F //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x4000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0300 //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0009 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7F00 //TX_MICMUTE_EAD_THR +909 0x4000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7F44 //TX_DTD_THR1_MICMUTE_0 +912 0x7EF4 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x0FA0 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x000F //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x3BF6 //TX_TFMASKM4_2_DT_THR +945 0x7F26 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x247C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0004 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x1500 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8484 //RX_FDEQ_GAIN_0 +40 0x8866 //RX_FDEQ_GAIN_1 +41 0x6858 //RX_FDEQ_GAIN_2 +42 0x7077 //RX_FDEQ_GAIN_3 +43 0x8E89 //RX_FDEQ_GAIN_4 +44 0x7B71 //RX_FDEQ_GAIN_5 +45 0x6655 //RX_FDEQ_GAIN_6 +46 0x5452 //RX_FDEQ_GAIN_7 +47 0x524D //RX_FDEQ_GAIN_8 +48 0x5A60 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0302 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0C08 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x1407 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8484 //RX_FDEQ_GAIN_0 +40 0x8866 //RX_FDEQ_GAIN_1 +41 0x6858 //RX_FDEQ_GAIN_2 +42 0x7077 //RX_FDEQ_GAIN_3 +43 0x8E89 //RX_FDEQ_GAIN_4 +44 0x7B71 //RX_FDEQ_GAIN_5 +45 0x6655 //RX_FDEQ_GAIN_6 +46 0x5452 //RX_FDEQ_GAIN_7 +47 0x524D //RX_FDEQ_GAIN_8 +48 0x5A60 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0302 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0C08 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x1407 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0089 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8484 //RX_FDEQ_GAIN_0 +40 0x8866 //RX_FDEQ_GAIN_1 +41 0x6858 //RX_FDEQ_GAIN_2 +42 0x7077 //RX_FDEQ_GAIN_3 +43 0x8E89 //RX_FDEQ_GAIN_4 +44 0x7B71 //RX_FDEQ_GAIN_5 +45 0x6655 //RX_FDEQ_GAIN_6 +46 0x5452 //RX_FDEQ_GAIN_7 +47 0x524D //RX_FDEQ_GAIN_8 +48 0x5A60 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0302 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0C08 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x1407 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00C0 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0112 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8484 //RX_FDEQ_GAIN_0 +40 0x8866 //RX_FDEQ_GAIN_1 +41 0x6858 //RX_FDEQ_GAIN_2 +42 0x7077 //RX_FDEQ_GAIN_3 +43 0x8E89 //RX_FDEQ_GAIN_4 +44 0x7B71 //RX_FDEQ_GAIN_5 +45 0x6655 //RX_FDEQ_GAIN_6 +46 0x5452 //RX_FDEQ_GAIN_7 +47 0x524D //RX_FDEQ_GAIN_8 +48 0x5A60 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0302 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0C08 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x1407 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0191 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x8484 //RX_FDEQ_GAIN_0 +40 0x8866 //RX_FDEQ_GAIN_1 +41 0x6858 //RX_FDEQ_GAIN_2 +42 0x7077 //RX_FDEQ_GAIN_3 +43 0x8E89 //RX_FDEQ_GAIN_4 +44 0x7B71 //RX_FDEQ_GAIN_5 +45 0x6655 //RX_FDEQ_GAIN_6 +46 0x5452 //RX_FDEQ_GAIN_7 +47 0x524D //RX_FDEQ_GAIN_8 +48 0x5A60 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0302 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0C08 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x1407 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02A9 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x9C9C //RX_FDEQ_GAIN_0 +40 0x9D74 //RX_FDEQ_GAIN_1 +41 0x706C //RX_FDEQ_GAIN_2 +42 0x809A //RX_FDEQ_GAIN_3 +43 0xA6A4 //RX_FDEQ_GAIN_4 +44 0xAA99 //RX_FDEQ_GAIN_5 +45 0x775F //RX_FDEQ_GAIN_6 +46 0x5F4A //RX_FDEQ_GAIN_7 +47 0x4A4A //RX_FDEQ_GAIN_8 +48 0x5060 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0302 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0C08 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x1407 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04BB //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x9C9C //RX_FDEQ_GAIN_0 +40 0x9D74 //RX_FDEQ_GAIN_1 +41 0x706C //RX_FDEQ_GAIN_2 +42 0x809A //RX_FDEQ_GAIN_3 +43 0xA6A4 //RX_FDEQ_GAIN_4 +44 0xAA99 //RX_FDEQ_GAIN_5 +45 0x775F //RX_FDEQ_GAIN_6 +46 0x5F4A //RX_FDEQ_GAIN_7 +47 0x4A4A //RX_FDEQ_GAIN_8 +48 0x5060 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0302 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0C08 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x1407 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0005 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0015 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0058 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0082 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-WB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6FFD //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x053D //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0C00 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6C00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x6000 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x5000 //TX_GAIN_NP +169 0x02A0 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0088 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF8 //TX_DTD_THR1_0 +198 0x7FF8 //TX_DTD_THR1_1 +199 0x7FEE //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x5000 //TX_DTD_THR2_0 +205 0x5000 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x1F40 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1194 //TX_RATIO_DT_L_TH_HIGH +226 0x4A38 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x4000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x07D0 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xF400 //TX_THR_SN_EST_2 +245 0xFC00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0018 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x4000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x2000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x2000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x7FFF //TX_B_POST_FILT_2 +325 0x7FFF //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x2000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x001E //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0320 //TX_NOISE_TH_1 +371 0x0384 //TX_NOISE_TH_2 +372 0x2904 //TX_NOISE_TH_3 +373 0x3E80 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0F0A //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x7FFF //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0005 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x001E //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x07D0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5048 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4A4F //TX_FDEQ_GAIN_2 +570 0x4E48 //TX_FDEQ_GAIN_3 +571 0x4444 //TX_FDEQ_GAIN_4 +572 0x444B //TX_FDEQ_GAIN_5 +573 0x5152 //TX_FDEQ_GAIN_6 +574 0x584F //TX_FDEQ_GAIN_7 +575 0x4950 //TX_FDEQ_GAIN_8 +576 0x4C48 //TX_FDEQ_GAIN_9 +577 0x3D40 //TX_FDEQ_GAIN_10 +578 0x4240 //TX_FDEQ_GAIN_11 +579 0x4C4C //TX_FDEQ_GAIN_12 +580 0x4C4C //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0F10 //TX_FDEQ_BIN_10 +602 0x1011 //TX_FDEQ_BIN_11 +603 0x1112 //TX_FDEQ_BIN_12 +604 0x120B //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0F10 //TX_PREEQ_BIN_MIC0_10 +652 0x1011 //TX_PREEQ_BIN_MIC0_11 +653 0x1112 //TX_PREEQ_BIN_MIC0_12 +654 0x120B //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x484A //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4C4E //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5454 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1112 //TX_PREEQ_BIN_MIC1_12 +703 0x120B //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x484A //TX_PREEQ_GAIN_MIC2_3 +719 0x4B4A //TX_PREEQ_GAIN_MIC2_4 +720 0x4B4C //TX_PREEQ_GAIN_MIC2_5 +721 0x4C4D //TX_PREEQ_GAIN_MIC2_6 +722 0x4F50 //TX_PREEQ_GAIN_MIC2_7 +723 0x5050 //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5252 //TX_PREEQ_GAIN_MIC2_10 +726 0x5253 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x5454 //TX_PREEQ_GAIN_MIC2_13 +729 0x5455 //TX_PREEQ_GAIN_MIC2_14 +730 0x5555 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0808 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0009 //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x0100 //TX_TPKA_FP +831 0x0400 //TX_MIN_G_FP +832 0x0800 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0018 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x20C6 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02EE //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0009 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7FF6 //TX_MICMUTE_EAD_THR +909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7FFF //TX_DTD_THR1_MICMUTE_0 +912 0x7FDF //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7918 //TX_DTD_THR1_MICMUTE_3 +915 0x7000 //TX_DTD_THR2_MICMUTE_0 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x1F40 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x1F40 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x000F //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x3C0A //TX_TFMASKM4_2_DT_THR +945 0x2710 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x247C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7B02 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x847A //RX_FDEQ_GAIN_0 +40 0x6C66 //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x7084 //RX_FDEQ_GAIN_3 +43 0x7E82 //RX_FDEQ_GAIN_4 +44 0x7874 //RX_FDEQ_GAIN_5 +45 0x5864 //RX_FDEQ_GAIN_6 +46 0x625C //RX_FDEQ_GAIN_7 +47 0x5C50 //RX_FDEQ_GAIN_8 +48 0x545A //RX_FDEQ_GAIN_9 +49 0x5C58 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x6460 //RX_FDEQ_GAIN_12 +52 0x5048 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0401 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0202 //RX_FDEQ_BIN_3 +67 0x0704 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1006 //RX_FDEQ_BIN_10 +74 0x1614 //RX_FDEQ_BIN_11 +75 0x1414 //RX_FDEQ_BIN_12 +76 0x1404 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x0CE0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03FC //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x1000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x845C //RX_FDEQ_GAIN_0 +40 0x5050 //RX_FDEQ_GAIN_1 +41 0x545A //RX_FDEQ_GAIN_2 +42 0x6773 //RX_FDEQ_GAIN_3 +43 0x7A77 //RX_FDEQ_GAIN_4 +44 0x6D6C //RX_FDEQ_GAIN_5 +45 0x6361 //RX_FDEQ_GAIN_6 +46 0x635D //RX_FDEQ_GAIN_7 +47 0x5A5E //RX_FDEQ_GAIN_8 +48 0x6060 //RX_FDEQ_GAIN_9 +49 0x605C //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x6460 //RX_FDEQ_GAIN_12 +52 0x5048 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0401 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0403 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1006 //RX_FDEQ_BIN_10 +74 0x1614 //RX_FDEQ_BIN_11 +75 0x1414 //RX_FDEQ_BIN_12 +76 0x1404 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x845C //RX_FDEQ_GAIN_0 +40 0x5050 //RX_FDEQ_GAIN_1 +41 0x545A //RX_FDEQ_GAIN_2 +42 0x6773 //RX_FDEQ_GAIN_3 +43 0x7A77 //RX_FDEQ_GAIN_4 +44 0x6D6C //RX_FDEQ_GAIN_5 +45 0x6361 //RX_FDEQ_GAIN_6 +46 0x635D //RX_FDEQ_GAIN_7 +47 0x5A5E //RX_FDEQ_GAIN_8 +48 0x6060 //RX_FDEQ_GAIN_9 +49 0x605C //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x6460 //RX_FDEQ_GAIN_12 +52 0x5048 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0401 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0403 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1006 //RX_FDEQ_BIN_10 +74 0x1614 //RX_FDEQ_BIN_11 +75 0x1414 //RX_FDEQ_BIN_12 +76 0x1404 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0087 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x845C //RX_FDEQ_GAIN_0 +40 0x5050 //RX_FDEQ_GAIN_1 +41 0x545A //RX_FDEQ_GAIN_2 +42 0x6773 //RX_FDEQ_GAIN_3 +43 0x7A77 //RX_FDEQ_GAIN_4 +44 0x6D6C //RX_FDEQ_GAIN_5 +45 0x6361 //RX_FDEQ_GAIN_6 +46 0x635D //RX_FDEQ_GAIN_7 +47 0x5A5E //RX_FDEQ_GAIN_8 +48 0x6060 //RX_FDEQ_GAIN_9 +49 0x605C //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x6460 //RX_FDEQ_GAIN_12 +52 0x5048 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0401 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0403 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1006 //RX_FDEQ_BIN_10 +74 0x1614 //RX_FDEQ_BIN_11 +75 0x1414 //RX_FDEQ_BIN_12 +76 0x1404 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00BE //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0118 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x845C //RX_FDEQ_GAIN_0 +40 0x5050 //RX_FDEQ_GAIN_1 +41 0x545A //RX_FDEQ_GAIN_2 +42 0x6773 //RX_FDEQ_GAIN_3 +43 0x7A77 //RX_FDEQ_GAIN_4 +44 0x6D6C //RX_FDEQ_GAIN_5 +45 0x6361 //RX_FDEQ_GAIN_6 +46 0x635D //RX_FDEQ_GAIN_7 +47 0x5A5E //RX_FDEQ_GAIN_8 +48 0x6060 //RX_FDEQ_GAIN_9 +49 0x605C //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x6460 //RX_FDEQ_GAIN_12 +52 0x5048 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0401 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0403 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1006 //RX_FDEQ_BIN_10 +74 0x1614 //RX_FDEQ_BIN_11 +75 0x1414 //RX_FDEQ_BIN_12 +76 0x1404 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x018B //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x845C //RX_FDEQ_GAIN_0 +40 0x5050 //RX_FDEQ_GAIN_1 +41 0x545A //RX_FDEQ_GAIN_2 +42 0x6773 //RX_FDEQ_GAIN_3 +43 0x7A77 //RX_FDEQ_GAIN_4 +44 0x6D6C //RX_FDEQ_GAIN_5 +45 0x6361 //RX_FDEQ_GAIN_6 +46 0x635D //RX_FDEQ_GAIN_7 +47 0x5A5E //RX_FDEQ_GAIN_8 +48 0x6060 //RX_FDEQ_GAIN_9 +49 0x605C //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x6460 //RX_FDEQ_GAIN_12 +52 0x5048 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0401 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0403 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1006 //RX_FDEQ_BIN_10 +74 0x1614 //RX_FDEQ_BIN_11 +75 0x1414 //RX_FDEQ_BIN_12 +76 0x1404 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0274 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x8060 //RX_FDEQ_GAIN_0 +40 0x535B //RX_FDEQ_GAIN_1 +41 0x6061 //RX_FDEQ_GAIN_2 +42 0x6E78 //RX_FDEQ_GAIN_3 +43 0x8994 //RX_FDEQ_GAIN_4 +44 0x9485 //RX_FDEQ_GAIN_5 +45 0x6A52 //RX_FDEQ_GAIN_6 +46 0x4F4E //RX_FDEQ_GAIN_7 +47 0x4C4F //RX_FDEQ_GAIN_8 +48 0x4A4B //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C54 //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x8088 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0401 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0403 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1006 //RX_FDEQ_BIN_10 +74 0x1614 //RX_FDEQ_BIN_11 +75 0x1414 //RX_FDEQ_BIN_12 +76 0x1404 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x041F //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x8060 //RX_FDEQ_GAIN_0 +40 0x535B //RX_FDEQ_GAIN_1 +41 0x6061 //RX_FDEQ_GAIN_2 +42 0x6E78 //RX_FDEQ_GAIN_3 +43 0x8994 //RX_FDEQ_GAIN_4 +44 0x9485 //RX_FDEQ_GAIN_5 +45 0x6A52 //RX_FDEQ_GAIN_6 +46 0x4F4E //RX_FDEQ_GAIN_7 +47 0x4C4F //RX_FDEQ_GAIN_8 +48 0x4A4B //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C54 //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x8088 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0401 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0403 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1006 //RX_FDEQ_BIN_10 +74 0x1614 //RX_FDEQ_BIN_11 +75 0x1414 //RX_FDEQ_BIN_12 +76 0x1404 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0033 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0049 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6864 //RX_FDEQ_GAIN_1 +198 0x7070 //RX_FDEQ_GAIN_2 +199 0x6058 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6FFD //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x6000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0260 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0160 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF3 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x6CCC //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0FA0 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x0578 //TX_RATIO_DT_L_TH_HIGH +226 0x5528 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x6000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0190 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFD00 //TX_THR_SN_EST_2 +245 0xFC00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x000C //TX_NS_LVL_CTRL_2 +284 0x001A //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x001A //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x4000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x2000 //TX_SNRI_SUP_1 +302 0x3000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x2000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x7000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7400 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x01F4 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x2000 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0FA0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x300C //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0005 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0200 //TX_METAL_RTO_THR +410 0x07D0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E58 //TX_FDEQ_GAIN_6 +574 0x565E //TX_FDEQ_GAIN_7 +575 0x484E //TX_FDEQ_GAIN_8 +576 0x4E4C //TX_FDEQ_GAIN_9 +577 0x4A4A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x6050 //TX_FDEQ_GAIN_12 +580 0x585C //TX_FDEQ_GAIN_13 +581 0x5C70 //TX_FDEQ_GAIN_14 +582 0x7880 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x0100 //TX_TPKA_FP +831 0x0400 //TX_MIN_G_FP +832 0x0800 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0018 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x237B //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0x8000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x6000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02F0 //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0009 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7FD0 //TX_MICMUTE_EAD_THR +909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7DFA //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 +913 0x7FDA //TX_DTD_THR1_MICMUTE_2 +914 0x7EF4 //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x3E80 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x3E80 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x0014 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x36B0 //TX_TFMASKM4_2_DT_THR +945 0x6590 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x247C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x847C //RX_FDEQ_GAIN_0 +40 0x5A56 //RX_FDEQ_GAIN_1 +41 0x6266 //RX_FDEQ_GAIN_2 +42 0x6E7A //RX_FDEQ_GAIN_3 +43 0x8678 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x706E //RX_FDEQ_GAIN_6 +46 0x6C64 //RX_FDEQ_GAIN_7 +47 0x5C6A //RX_FDEQ_GAIN_8 +48 0x6268 //RX_FDEQ_GAIN_9 +49 0x6462 //RX_FDEQ_GAIN_10 +50 0x646E //RX_FDEQ_GAIN_11 +51 0x6860 //RX_FDEQ_GAIN_12 +52 0x646A //RX_FDEQ_GAIN_13 +53 0x7478 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0105 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x0CE0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03FC //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x1000 //RX_MAX_G_FP +129 0x0058 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0056 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x007D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00B5 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x016A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x022A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x8586 //RX_FDEQ_GAIN_4 +44 0x8682 //RX_FDEQ_GAIN_5 +45 0x7459 //RX_FDEQ_GAIN_6 +46 0x4B4A //RX_FDEQ_GAIN_7 +47 0x4C58 //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x5A48 //RX_FDEQ_GAIN_10 +50 0x487C //RX_FDEQ_GAIN_11 +51 0x685A //RX_FDEQ_GAIN_12 +52 0x5A60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x9090 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x038C //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x8586 //RX_FDEQ_GAIN_4 +44 0x8682 //RX_FDEQ_GAIN_5 +45 0x7459 //RX_FDEQ_GAIN_6 +46 0x4B4A //RX_FDEQ_GAIN_7 +47 0x4C58 //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x5A48 //RX_FDEQ_GAIN_10 +50 0x487C //RX_FDEQ_GAIN_11 +51 0x685A //RX_FDEQ_GAIN_12 +52 0x5A60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x9090 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x247C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x847C //RX_FDEQ_GAIN_0 +197 0x5A56 //RX_FDEQ_GAIN_1 +198 0x6266 //RX_FDEQ_GAIN_2 +199 0x6E7A //RX_FDEQ_GAIN_3 +200 0x8678 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x706E //RX_FDEQ_GAIN_6 +203 0x6C64 //RX_FDEQ_GAIN_7 +204 0x5C6A //RX_FDEQ_GAIN_8 +205 0x6268 //RX_FDEQ_GAIN_9 +206 0x6462 //RX_FDEQ_GAIN_10 +207 0x646E //RX_FDEQ_GAIN_11 +208 0x6860 //RX_FDEQ_GAIN_12 +209 0x646A //RX_FDEQ_GAIN_13 +210 0x7478 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0105 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x0CE0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03FC //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x1000 //RX_MAX_G_FP +286 0x0058 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0056 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x007D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x00B5 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x016A //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x022A //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x8586 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7459 //RX_FDEQ_GAIN_6 +203 0x4B4A //RX_FDEQ_GAIN_7 +204 0x4C58 //RX_FDEQ_GAIN_8 +205 0x4C4C //RX_FDEQ_GAIN_9 +206 0x5A48 //RX_FDEQ_GAIN_10 +207 0x487C //RX_FDEQ_GAIN_11 +208 0x685A //RX_FDEQ_GAIN_12 +209 0x5A60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x9090 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0006 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x038C //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x8586 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7459 //RX_FDEQ_GAIN_6 +203 0x4B4A //RX_FDEQ_GAIN_7 +204 0x4C58 //RX_FDEQ_GAIN_8 +205 0x4C4C //RX_FDEQ_GAIN_9 +206 0x5A48 //RX_FDEQ_GAIN_10 +207 0x487C //RX_FDEQ_GAIN_11 +208 0x685A //RX_FDEQ_GAIN_12 +209 0x5A60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x9090 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-FB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x6B54 //TX_SENDFUNC_MODE_0 +3 0x4B7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -29,7 +8115,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x0096 //TX_DIST2REF1 22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -38,9 +8124,9 @@ 27 0x0A19 //TX_PGA_0 28 0x0A19 //TX_PGA_1 29 0x0A19 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -146,11 +8232,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -405,7 +8491,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -532,10 +8618,10 @@ 521 0x3A98 //TX_GSC_RTOL_TH 522 0x3A98 //TX_GSC_RTOH_TH 523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -553,26 +8639,26 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -631,17 +8717,17 @@ 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x484B //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x484C //TX_PREEQ_GAIN_MIC0_10 -628 0x4C4C //TX_PREEQ_GAIN_MIC0_11 -629 0x4038 //TX_PREEQ_GAIN_MIC0_12 -630 0x3838 //TX_PREEQ_GAIN_MIC0_13 -631 0x4840 //TX_PREEQ_GAIN_MIC0_14 -632 0x3848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 @@ -680,15 +8766,15 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +672 0x4645 //TX_PREEQ_GAIN_MIC1_6 +673 0x4442 //TX_PREEQ_GAIN_MIC1_7 +674 0x4140 //TX_PREEQ_GAIN_MIC1_8 +675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 +676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 +677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3938 //TX_PREEQ_GAIN_MIC1_12 +679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 +680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 @@ -698,23 +8784,23 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x1812 //TX_PREEQ_BIN_MIC1_0 -691 0x0A0A //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x080A //TX_PREEQ_BIN_MIC1_3 -694 0x0B09 //TX_PREEQ_BIN_MIC1_4 -695 0x0A06 //TX_PREEQ_BIN_MIC1_5 -696 0x0606 //TX_PREEQ_BIN_MIC1_6 -697 0x0605 //TX_PREEQ_BIN_MIC1_7 -698 0x050A //TX_PREEQ_BIN_MIC1_8 -699 0x1505 //TX_PREEQ_BIN_MIC1_9 -700 0x0506 //TX_PREEQ_BIN_MIC1_10 -701 0x0615 //TX_PREEQ_BIN_MIC1_11 -702 0x1516 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x2021 //TX_PREEQ_BIN_MIC1_14 -705 0x2021 //TX_PREEQ_BIN_MIC1_15 -706 0x0800 //TX_PREEQ_BIN_MIC1_16 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -831,12 +8917,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -914,7 +9000,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -941,35 +9027,61 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX 0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -996,8 +9108,8 @@ 22 0x0014 //RX_NS_LVL_CTRL 23 0xF400 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT -25 0x00C8 //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -1847,8 +9959,8 @@ 179 0x0014 //RX_NS_LVL_CTRL 180 0xF400 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT -182 0x00C8 //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -2673,10697 +10785,16 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSFREE-HANDFREE-CUSTOM2-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM1-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x6B5C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0010 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0A19 //TX_PGA_0 -28 0x0A19 //TX_PGA_1 -29 0x0A19 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3B33 //TX_DIST2REF_11 -73 0x0A70 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0300 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7A00 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x2000 //TX_MIN_EQ_RE_EST_1 -154 0x2000 //TX_MIN_EQ_RE_EST_2 -155 0x4000 //TX_MIN_EQ_RE_EST_3 -156 0x4000 //TX_MIN_EQ_RE_EST_4 -157 0x7FFF //TX_MIN_EQ_RE_EST_5 -158 0x7FFF //TX_MIN_EQ_RE_EST_6 -159 0x7FFF //TX_MIN_EQ_RE_EST_7 -160 0x7FFF //TX_MIN_EQ_RE_EST_8 -161 0x7FFF //TX_MIN_EQ_RE_EST_9 -162 0x7FFF //TX_MIN_EQ_RE_EST_10 -163 0x7FFF //TX_MIN_EQ_RE_EST_11 -164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0CCD //TX_LAMBDA_CB_NLE -167 0x2000 //TX_C_POST_FLT -168 0x7FFF //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x09C4 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7D00 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0DAC //TX_DT_CUT_K -214 0x0020 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x7FFF //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0063 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFB00 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0018 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x50C0 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x4C00 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x4000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7C00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7A00 //TX_LAMBDA_PFILT_S_2 -342 0x7C00 //TX_LAMBDA_PFILT_S_3 -343 0x7C00 //TX_LAMBDA_PFILT_S_4 -344 0x7C00 //TX_LAMBDA_PFILT_S_5 -345 0x7C00 //TX_LAMBDA_PFILT_S_6 -346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 -357 0x1F40 //TX_DT_BINVAD_ENDF -358 0x0100 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x0DAC //TX_NOISE_TH_2 -372 0x4E20 //TX_NOISE_TH_3 -373 0x4E20 //TX_NOISE_TH_4 -374 0x59D8 //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x2710 //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x7999 //TX_RATIODTL_CUT_TH -383 0x0119 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x4000 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x2000 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x7FFF //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x3000 //TX_DEREVERB_LF_MU -515 0x34CD //TX_DEREVERB_HF_MU -516 0x0007 //TX_DEREVERB_DELAY -517 0x0004 //TX_DEREVERB_COEF_LEN -518 0x0003 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x3A98 //TX_GSC_RTOL_TH -522 0x3A98 //TX_GSC_RTOH_TH -523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x5048 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x5B5B //TX_FDEQ_GAIN_10 -578 0x737B //TX_FDEQ_GAIN_11 -579 0x7B9A //TX_FDEQ_GAIN_12 -580 0x9AC4 //TX_FDEQ_GAIN_13 -581 0xC4C4 //TX_FDEQ_GAIN_14 -582 0xC4C4 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2011 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4849 //TX_PREEQ_GAIN_MIC0_6 -624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 -626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 -627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 -628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 -629 0x4838 //TX_PREEQ_GAIN_MIC0_12 -630 0x3858 //TX_PREEQ_GAIN_MIC0_13 -631 0x7060 //TX_PREEQ_GAIN_MIC0_14 -632 0x9870 //TX_PREEQ_GAIN_MIC0_15 -633 0x5848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x4000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0030 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x1812 //TX_PREEQ_BIN_MIC1_0 -691 0x0A0A //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x080A //TX_PREEQ_BIN_MIC1_3 -694 0x0B09 //TX_PREEQ_BIN_MIC1_4 -695 0x0A06 //TX_PREEQ_BIN_MIC1_5 -696 0x0606 //TX_PREEQ_BIN_MIC1_6 -697 0x0605 //TX_PREEQ_BIN_MIC1_7 -698 0x050A //TX_PREEQ_BIN_MIC1_8 -699 0x1505 //TX_PREEQ_BIN_MIC1_9 -700 0x0506 //TX_PREEQ_BIN_MIC1_10 -701 0x0615 //TX_PREEQ_BIN_MIC1_11 -702 0x1516 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x2021 //TX_PREEQ_BIN_MIC1_14 -705 0x2021 //TX_PREEQ_BIN_MIC1_15 -706 0x0800 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0004 //TX_FILTINDX -854 0x0004 //TX_TDDRC_THRD_0 -855 0x0016 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0FDA //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x006C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -10 0x065B //RX_PGA -11 0x7E56 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0014 //RX_NS_LVL_CTRL -23 0xF400 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x00C8 //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5640 //RX_FDEQ_GAIN_10 -50 0x4040 //RX_FDEQ_GAIN_11 -51 0x5C58 //RX_FDEQ_GAIN_12 -52 0x5C60 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03C3 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0012 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03C3 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5640 //RX_FDEQ_GAIN_10 -50 0x4040 //RX_FDEQ_GAIN_11 -51 0x5C58 //RX_FDEQ_GAIN_12 -52 0x5C60 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0012 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03C3 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5640 //RX_FDEQ_GAIN_10 -50 0x4040 //RX_FDEQ_GAIN_11 -51 0x5C58 //RX_FDEQ_GAIN_12 -52 0x5C60 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001A //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03C3 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5640 //RX_FDEQ_GAIN_10 -50 0x4040 //RX_FDEQ_GAIN_11 -51 0x5C58 //RX_FDEQ_GAIN_12 -52 0x5C60 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0025 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03C3 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5640 //RX_FDEQ_GAIN_10 -50 0x4040 //RX_FDEQ_GAIN_11 -51 0x5C58 //RX_FDEQ_GAIN_12 -52 0x5C60 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0034 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03C3 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5640 //RX_FDEQ_GAIN_10 -50 0x4040 //RX_FDEQ_GAIN_11 -51 0x5C58 //RX_FDEQ_GAIN_12 -52 0x5C60 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x004D //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03C3 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5640 //RX_FDEQ_GAIN_10 -50 0x4040 //RX_FDEQ_GAIN_11 -51 0x5C58 //RX_FDEQ_GAIN_12 -52 0x5C60 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0074 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03C3 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5640 //RX_FDEQ_GAIN_10 -50 0x4040 //RX_FDEQ_GAIN_11 -51 0x5C58 //RX_FDEQ_GAIN_12 -52 0x5C60 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x006C //_ -158 0x0000 //_ -159 0x0004 //_ -160 0x0004 //_ -161 0x000A //_ -162 0x0000 //_ -163 0x4000 //_ -164 0x4000 //_ -165 0x4000 //_ -166 0x4000 //_ -167 0x065B //_ -168 0x7E56 //_ -169 0x4000 //_ -170 0x7800 //_ -171 0x7000 //_ -172 0x6000 //_ -173 0x0008 //_ -174 0x0003 //_ -175 0x0100 //_ -176 0x0020 //_ -177 0x0400 //_ -178 0x000C //_ -179 0x0014 //_ -180 0xF400 //_ -181 0x7E00 //_ -182 0x00C8 //_ -183 0x0190 //_ -184 0x7EB8 //_ -185 0x7EB8 //_ -186 0x7EB8 //_ -187 0x0002 //_ -188 0x0800 //_ -189 0x7EB8 //_ -190 0x7FFF //_ -191 0x0800 //_ -192 0x199A //_ -193 0x0000 //_ -194 0x4000 //_ -195 0x0020 //_ -196 0x4848 //_ -197 0x4848 //_ -198 0x4848 //_ -199 0x4870 //_ -200 0x4848 //_ -201 0x4848 //_ -202 0x4850 //_ -203 0x485C //_ -204 0x5C60 //_ -205 0x685C //_ -206 0x5640 //_ -207 0x4040 //_ -208 0x5C58 //_ -209 0x5C60 //_ -210 0x6060 //_ -211 0x6060 //_ -212 0x4848 //_ -213 0x4848 //_ -214 0x4848 //_ -215 0x4848 //_ -216 0x4848 //_ -217 0x4848 //_ -218 0x4848 //_ -219 0x4848 //_ -220 0x0202 //_ -221 0x0203 //_ -222 0x0303 //_ -223 0x0402 //_ -224 0x0504 //_ -225 0x0209 //_ -226 0x0808 //_ -227 0x090A //_ -228 0x0B0C //_ -229 0x0D0E //_ -230 0x1013 //_ -231 0x1719 //_ -232 0x1B1E //_ -233 0x1E1E //_ -234 0x1E28 //_ -235 0x282C //_ -236 0x0000 //_ -237 0x0000 //_ -238 0x0000 //_ -239 0x0000 //_ -240 0x0000 //_ -241 0x0000 //_ -242 0x0000 //_ -243 0x0000 //_ -244 0x4000 //_ -245 0x0320 //_ -246 0x0018 //_ -247 0x0030 //_ -248 0x0050 //_ -249 0x0080 //_ -250 0x0004 //_ -251 0x5000 //_ -252 0x5000 //_ -253 0x2000 //_ -254 0x5000 //_ -255 0x6400 //_ -256 0x6400 //_ -257 0x2000 //_ -258 0x5000 //_ -259 0x4000 //_ -260 0x4000 //_ -261 0x4000 //_ -262 0x4000 //_ -263 0x7FFF //_ -264 0x7FFF //_ -265 0x7FFF //_ -266 0x7FFF //_ -267 0x0000 //_ -268 0x0002 //_ -269 0x0001 //_ -270 0x0002 //_ -271 0x1800 //_ -272 0x1800 //_ -273 0x6000 //_ -274 0x6E00 //_ -275 0x4000 //_ -276 0x7EB8 //_ -277 0x0000 //_ -278 0x199A //_ -279 0x0001 //_ -280 0x0CCD //_ -281 0x03C3 //_ -282 0x7C00 //_ -283 0x2000 //_ -284 0x2000 //_ -285 0x0080 //_ -286 0x0012 //_ -287 0x0000 //_ -288 0x0000 //_ -289 0x3000 //_ -290 0x3000 //_ -291 0x1800 //_ -292 0x1000 //_ -293 0x04CD //_ -294 0x0F33 //_ -295 0x7333 //_ -296 0x199A //_ -297 0x7333 //_ -298 0x0004 //_ -299 0x6CCD //_ -300 0x799A //_ -301 0x001E //_ -302 0x3000 //_ -303 0x3200 //_ -304 0x2000 //_ -305 0x2000 //_ -306 0x2000 //_ -307 0x2000 //_ -308 0x2000 //_ -309 0x2000 //_ -310 0x2000 //_ -311 0x0000 //_ -312 0x0000 //_ -313 0x0000 //_ -#VOL 0 -163 0x4000 //RX_TDDRC_ALPHA_UP_1 -164 0x4000 //RX_TDDRC_ALPHA_UP_2 -165 0x4000 //RX_TDDRC_ALPHA_UP_3 -166 0x4000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0001 //RX_TDDRC_THRD_0 -270 0x0002 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x6000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x4000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x03C3 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4870 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x485C //RX_FDEQ_GAIN_7 -204 0x5C60 //RX_FDEQ_GAIN_8 -205 0x685C //RX_FDEQ_GAIN_9 -206 0x5640 //RX_FDEQ_GAIN_10 -207 0x4040 //RX_FDEQ_GAIN_11 -208 0x5C58 //RX_FDEQ_GAIN_12 -209 0x5C60 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 -211 0x6060 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0402 //RX_FDEQ_BIN_3 -224 0x0504 //RX_FDEQ_BIN_4 -225 0x0209 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0012 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x4000 //RX_TDDRC_ALPHA_UP_1 -164 0x4000 //RX_TDDRC_ALPHA_UP_2 -165 0x4000 //RX_TDDRC_ALPHA_UP_3 -166 0x4000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0001 //RX_TDDRC_THRD_0 -270 0x0002 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x6000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x4000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x03C3 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4870 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x485C //RX_FDEQ_GAIN_7 -204 0x5C60 //RX_FDEQ_GAIN_8 -205 0x685C //RX_FDEQ_GAIN_9 -206 0x5640 //RX_FDEQ_GAIN_10 -207 0x4040 //RX_FDEQ_GAIN_11 -208 0x5C58 //RX_FDEQ_GAIN_12 -209 0x5C60 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 -211 0x6060 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0402 //RX_FDEQ_BIN_3 -224 0x0504 //RX_FDEQ_BIN_4 -225 0x0209 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001A //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x4000 //RX_TDDRC_ALPHA_UP_1 -164 0x4000 //RX_TDDRC_ALPHA_UP_2 -165 0x4000 //RX_TDDRC_ALPHA_UP_3 -166 0x4000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0001 //RX_TDDRC_THRD_0 -270 0x0002 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x6000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x4000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x03C3 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4870 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x485C //RX_FDEQ_GAIN_7 -204 0x5C60 //RX_FDEQ_GAIN_8 -205 0x685C //RX_FDEQ_GAIN_9 -206 0x5640 //RX_FDEQ_GAIN_10 -207 0x4040 //RX_FDEQ_GAIN_11 -208 0x5C58 //RX_FDEQ_GAIN_12 -209 0x5C60 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 -211 0x6060 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0402 //RX_FDEQ_BIN_3 -224 0x0504 //RX_FDEQ_BIN_4 -225 0x0209 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0025 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x4000 //RX_TDDRC_ALPHA_UP_1 -164 0x4000 //RX_TDDRC_ALPHA_UP_2 -165 0x4000 //RX_TDDRC_ALPHA_UP_3 -166 0x4000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0001 //RX_TDDRC_THRD_0 -270 0x0002 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x6000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x4000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x03C3 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4870 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x485C //RX_FDEQ_GAIN_7 -204 0x5C60 //RX_FDEQ_GAIN_8 -205 0x685C //RX_FDEQ_GAIN_9 -206 0x5640 //RX_FDEQ_GAIN_10 -207 0x4040 //RX_FDEQ_GAIN_11 -208 0x5C58 //RX_FDEQ_GAIN_12 -209 0x5C60 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 -211 0x6060 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0402 //RX_FDEQ_BIN_3 -224 0x0504 //RX_FDEQ_BIN_4 -225 0x0209 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0034 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x4000 //RX_TDDRC_ALPHA_UP_1 -164 0x4000 //RX_TDDRC_ALPHA_UP_2 -165 0x4000 //RX_TDDRC_ALPHA_UP_3 -166 0x4000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0001 //RX_TDDRC_THRD_0 -270 0x0002 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x6000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x4000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x03C3 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4870 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x485C //RX_FDEQ_GAIN_7 -204 0x5C60 //RX_FDEQ_GAIN_8 -205 0x685C //RX_FDEQ_GAIN_9 -206 0x5640 //RX_FDEQ_GAIN_10 -207 0x4040 //RX_FDEQ_GAIN_11 -208 0x5C58 //RX_FDEQ_GAIN_12 -209 0x5C60 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 -211 0x6060 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0402 //RX_FDEQ_BIN_3 -224 0x0504 //RX_FDEQ_BIN_4 -225 0x0209 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x004D //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x4000 //RX_TDDRC_ALPHA_UP_1 -164 0x4000 //RX_TDDRC_ALPHA_UP_2 -165 0x4000 //RX_TDDRC_ALPHA_UP_3 -166 0x4000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0001 //RX_TDDRC_THRD_0 -270 0x0002 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x6000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x4000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x03C3 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4870 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x485C //RX_FDEQ_GAIN_7 -204 0x5C60 //RX_FDEQ_GAIN_8 -205 0x685C //RX_FDEQ_GAIN_9 -206 0x5640 //RX_FDEQ_GAIN_10 -207 0x4040 //RX_FDEQ_GAIN_11 -208 0x5C58 //RX_FDEQ_GAIN_12 -209 0x5C60 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 -211 0x6060 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0402 //RX_FDEQ_BIN_3 -224 0x0504 //RX_FDEQ_BIN_4 -225 0x0209 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0074 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x4000 //RX_TDDRC_ALPHA_UP_1 -164 0x4000 //RX_TDDRC_ALPHA_UP_2 -165 0x4000 //RX_TDDRC_ALPHA_UP_3 -166 0x4000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0001 //RX_TDDRC_THRD_0 -270 0x0002 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x6000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x4000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x03C3 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4870 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x485C //RX_FDEQ_GAIN_7 -204 0x5C60 //RX_FDEQ_GAIN_8 -205 0x685C //RX_FDEQ_GAIN_9 -206 0x5640 //RX_FDEQ_GAIN_10 -207 0x4040 //RX_FDEQ_GAIN_11 -208 0x5C58 //RX_FDEQ_GAIN_12 -209 0x5C60 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 -211 0x6060 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0402 //RX_FDEQ_BIN_3 -224 0x0504 //RX_FDEQ_BIN_4 -225 0x0209 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSFREE-HANDFREE-CUSTOM1-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x6B74 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0010 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0A19 //TX_PGA_0 -28 0x0A19 //TX_PGA_1 -29 0x0A19 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3B33 //TX_DIST2REF_11 -73 0x0A70 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0300 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7A00 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x2000 //TX_MIN_EQ_RE_EST_1 -154 0x2000 //TX_MIN_EQ_RE_EST_2 -155 0x4000 //TX_MIN_EQ_RE_EST_3 -156 0x4000 //TX_MIN_EQ_RE_EST_4 -157 0x7FFF //TX_MIN_EQ_RE_EST_5 -158 0x7FFF //TX_MIN_EQ_RE_EST_6 -159 0x7FFF //TX_MIN_EQ_RE_EST_7 -160 0x7FFF //TX_MIN_EQ_RE_EST_8 -161 0x7FFF //TX_MIN_EQ_RE_EST_9 -162 0x7FFF //TX_MIN_EQ_RE_EST_10 -163 0x7FFF //TX_MIN_EQ_RE_EST_11 -164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0CCD //TX_LAMBDA_CB_NLE -167 0x2000 //TX_C_POST_FLT -168 0x7FFF //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x09C4 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7D00 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0DAC //TX_DT_CUT_K -214 0x0020 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x7FFF //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0063 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFB00 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0018 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x50C0 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x4C00 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x4000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7C00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7A00 //TX_LAMBDA_PFILT_S_2 -342 0x7C00 //TX_LAMBDA_PFILT_S_3 -343 0x7C00 //TX_LAMBDA_PFILT_S_4 -344 0x7C00 //TX_LAMBDA_PFILT_S_5 -345 0x7C00 //TX_LAMBDA_PFILT_S_6 -346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 -357 0x1F40 //TX_DT_BINVAD_ENDF -358 0x0100 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x0DAC //TX_NOISE_TH_2 -372 0x4E20 //TX_NOISE_TH_3 -373 0x4E20 //TX_NOISE_TH_4 -374 0x59D8 //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x2710 //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x7999 //TX_RATIODTL_CUT_TH -383 0x0119 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x4000 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x2000 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x7FFF //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x3000 //TX_DEREVERB_LF_MU -515 0x34CD //TX_DEREVERB_HF_MU -516 0x0007 //TX_DEREVERB_DELAY -517 0x0004 //TX_DEREVERB_COEF_LEN -518 0x0003 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x3A98 //TX_GSC_RTOL_TH -522 0x3A98 //TX_GSC_RTOH_TH -523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x5048 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x5B5B //TX_FDEQ_GAIN_10 -578 0x737B //TX_FDEQ_GAIN_11 -579 0x7B9A //TX_FDEQ_GAIN_12 -580 0x9AC4 //TX_FDEQ_GAIN_13 -581 0xC4C4 //TX_FDEQ_GAIN_14 -582 0xC4C4 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2011 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4849 //TX_PREEQ_GAIN_MIC0_6 -624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 -626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 -627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 -628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 -629 0x4838 //TX_PREEQ_GAIN_MIC0_12 -630 0x3858 //TX_PREEQ_GAIN_MIC0_13 -631 0x7060 //TX_PREEQ_GAIN_MIC0_14 -632 0x9870 //TX_PREEQ_GAIN_MIC0_15 -633 0x5848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x4000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0030 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x1812 //TX_PREEQ_BIN_MIC1_0 -691 0x0A0A //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x080A //TX_PREEQ_BIN_MIC1_3 -694 0x0B09 //TX_PREEQ_BIN_MIC1_4 -695 0x0A06 //TX_PREEQ_BIN_MIC1_5 -696 0x0606 //TX_PREEQ_BIN_MIC1_6 -697 0x0605 //TX_PREEQ_BIN_MIC1_7 -698 0x050A //TX_PREEQ_BIN_MIC1_8 -699 0x1505 //TX_PREEQ_BIN_MIC1_9 -700 0x0506 //TX_PREEQ_BIN_MIC1_10 -701 0x0615 //TX_PREEQ_BIN_MIC1_11 -702 0x1516 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x2021 //TX_PREEQ_BIN_MIC1_14 -705 0x2021 //TX_PREEQ_BIN_MIC1_15 -706 0x0800 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0004 //TX_FILTINDX -854 0x0004 //TX_TDDRC_THRD_0 -855 0x0016 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0FDA //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x006C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -10 0x065B //RX_PGA -11 0x7E56 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0014 //RX_NS_LVL_CTRL -23 0xF400 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x00C8 //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5640 //RX_FDEQ_GAIN_10 -50 0x4040 //RX_FDEQ_GAIN_11 -51 0x5C58 //RX_FDEQ_GAIN_12 -52 0x5C60 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03C3 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0012 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03C3 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5640 //RX_FDEQ_GAIN_10 -50 0x4040 //RX_FDEQ_GAIN_11 -51 0x5C58 //RX_FDEQ_GAIN_12 -52 0x5C60 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0012 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03C3 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5640 //RX_FDEQ_GAIN_10 -50 0x4040 //RX_FDEQ_GAIN_11 -51 0x5C58 //RX_FDEQ_GAIN_12 -52 0x5C60 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001A //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03C3 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5640 //RX_FDEQ_GAIN_10 -50 0x4040 //RX_FDEQ_GAIN_11 -51 0x5C58 //RX_FDEQ_GAIN_12 -52 0x5C60 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0025 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03C3 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5640 //RX_FDEQ_GAIN_10 -50 0x4040 //RX_FDEQ_GAIN_11 -51 0x5C58 //RX_FDEQ_GAIN_12 -52 0x5C60 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0034 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03C3 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5640 //RX_FDEQ_GAIN_10 -50 0x4040 //RX_FDEQ_GAIN_11 -51 0x5C58 //RX_FDEQ_GAIN_12 -52 0x5C60 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x004D //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03C3 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5640 //RX_FDEQ_GAIN_10 -50 0x4040 //RX_FDEQ_GAIN_11 -51 0x5C58 //RX_FDEQ_GAIN_12 -52 0x5C60 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0074 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03C3 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5640 //RX_FDEQ_GAIN_10 -50 0x4040 //RX_FDEQ_GAIN_11 -51 0x5C58 //RX_FDEQ_GAIN_12 -52 0x5C60 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x006C //_ -158 0x0000 //_ -159 0x0004 //_ -160 0x0004 //_ -161 0x000A //_ -162 0x0000 //_ -163 0x4000 //_ -164 0x4000 //_ -165 0x4000 //_ -166 0x4000 //_ -167 0x065B //_ -168 0x7E56 //_ -169 0x4000 //_ -170 0x7800 //_ -171 0x7000 //_ -172 0x6000 //_ -173 0x0008 //_ -174 0x0003 //_ -175 0x0100 //_ -176 0x0020 //_ -177 0x0400 //_ -178 0x000C //_ -179 0x0014 //_ -180 0xF400 //_ -181 0x7E00 //_ -182 0x00C8 //_ -183 0x0190 //_ -184 0x7EB8 //_ -185 0x7EB8 //_ -186 0x7EB8 //_ -187 0x0002 //_ -188 0x0800 //_ -189 0x7EB8 //_ -190 0x7FFF //_ -191 0x0800 //_ -192 0x199A //_ -193 0x0000 //_ -194 0x4000 //_ -195 0x0020 //_ -196 0x4848 //_ -197 0x4848 //_ -198 0x4848 //_ -199 0x4870 //_ -200 0x4848 //_ -201 0x4848 //_ -202 0x4850 //_ -203 0x485C //_ -204 0x5C60 //_ -205 0x685C //_ -206 0x5640 //_ -207 0x4040 //_ -208 0x5C58 //_ -209 0x5C60 //_ -210 0x6060 //_ -211 0x6060 //_ -212 0x4848 //_ -213 0x4848 //_ -214 0x4848 //_ -215 0x4848 //_ -216 0x4848 //_ -217 0x4848 //_ -218 0x4848 //_ -219 0x4848 //_ -220 0x0202 //_ -221 0x0203 //_ -222 0x0303 //_ -223 0x0402 //_ -224 0x0504 //_ -225 0x0209 //_ -226 0x0808 //_ -227 0x090A //_ -228 0x0B0C //_ -229 0x0D0E //_ -230 0x1013 //_ -231 0x1719 //_ -232 0x1B1E //_ -233 0x1E1E //_ -234 0x1E28 //_ -235 0x282C //_ -236 0x0000 //_ -237 0x0000 //_ -238 0x0000 //_ -239 0x0000 //_ -240 0x0000 //_ -241 0x0000 //_ -242 0x0000 //_ -243 0x0000 //_ -244 0x4000 //_ -245 0x0320 //_ -246 0x0018 //_ -247 0x0030 //_ -248 0x0050 //_ -249 0x0080 //_ -250 0x0004 //_ -251 0x5000 //_ -252 0x5000 //_ -253 0x2000 //_ -254 0x5000 //_ -255 0x6400 //_ -256 0x6400 //_ -257 0x2000 //_ -258 0x5000 //_ -259 0x4000 //_ -260 0x4000 //_ -261 0x4000 //_ -262 0x4000 //_ -263 0x7FFF //_ -264 0x7FFF //_ -265 0x7FFF //_ -266 0x7FFF //_ -267 0x0000 //_ -268 0x0002 //_ -269 0x0001 //_ -270 0x0002 //_ -271 0x1800 //_ -272 0x1800 //_ -273 0x6000 //_ -274 0x6E00 //_ -275 0x4000 //_ -276 0x7EB8 //_ -277 0x0000 //_ -278 0x199A //_ -279 0x0001 //_ -280 0x0CCD //_ -281 0x03C3 //_ -282 0x7C00 //_ -283 0x2000 //_ -284 0x2000 //_ -285 0x0080 //_ -286 0x0012 //_ -287 0x0000 //_ -288 0x0000 //_ -289 0x3000 //_ -290 0x3000 //_ -291 0x1800 //_ -292 0x1000 //_ -293 0x04CD //_ -294 0x0F33 //_ -295 0x7333 //_ -296 0x199A //_ -297 0x7333 //_ -298 0x0004 //_ -299 0x6CCD //_ -300 0x799A //_ -301 0x001E //_ -302 0x3000 //_ -303 0x3200 //_ -304 0x2000 //_ -305 0x2000 //_ -306 0x2000 //_ -307 0x2000 //_ -308 0x2000 //_ -309 0x2000 //_ -310 0x2000 //_ -311 0x0000 //_ -312 0x0000 //_ -313 0x0000 //_ -#VOL 0 -163 0x4000 //RX_TDDRC_ALPHA_UP_1 -164 0x4000 //RX_TDDRC_ALPHA_UP_2 -165 0x4000 //RX_TDDRC_ALPHA_UP_3 -166 0x4000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0001 //RX_TDDRC_THRD_0 -270 0x0002 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x6000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x4000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x03C3 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4870 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x485C //RX_FDEQ_GAIN_7 -204 0x5C60 //RX_FDEQ_GAIN_8 -205 0x685C //RX_FDEQ_GAIN_9 -206 0x5640 //RX_FDEQ_GAIN_10 -207 0x4040 //RX_FDEQ_GAIN_11 -208 0x5C58 //RX_FDEQ_GAIN_12 -209 0x5C60 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 -211 0x6060 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0402 //RX_FDEQ_BIN_3 -224 0x0504 //RX_FDEQ_BIN_4 -225 0x0209 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0012 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x4000 //RX_TDDRC_ALPHA_UP_1 -164 0x4000 //RX_TDDRC_ALPHA_UP_2 -165 0x4000 //RX_TDDRC_ALPHA_UP_3 -166 0x4000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0001 //RX_TDDRC_THRD_0 -270 0x0002 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x6000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x4000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x03C3 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4870 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x485C //RX_FDEQ_GAIN_7 -204 0x5C60 //RX_FDEQ_GAIN_8 -205 0x685C //RX_FDEQ_GAIN_9 -206 0x5640 //RX_FDEQ_GAIN_10 -207 0x4040 //RX_FDEQ_GAIN_11 -208 0x5C58 //RX_FDEQ_GAIN_12 -209 0x5C60 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 -211 0x6060 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0402 //RX_FDEQ_BIN_3 -224 0x0504 //RX_FDEQ_BIN_4 -225 0x0209 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001A //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x4000 //RX_TDDRC_ALPHA_UP_1 -164 0x4000 //RX_TDDRC_ALPHA_UP_2 -165 0x4000 //RX_TDDRC_ALPHA_UP_3 -166 0x4000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0001 //RX_TDDRC_THRD_0 -270 0x0002 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x6000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x4000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x03C3 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4870 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x485C //RX_FDEQ_GAIN_7 -204 0x5C60 //RX_FDEQ_GAIN_8 -205 0x685C //RX_FDEQ_GAIN_9 -206 0x5640 //RX_FDEQ_GAIN_10 -207 0x4040 //RX_FDEQ_GAIN_11 -208 0x5C58 //RX_FDEQ_GAIN_12 -209 0x5C60 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 -211 0x6060 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0402 //RX_FDEQ_BIN_3 -224 0x0504 //RX_FDEQ_BIN_4 -225 0x0209 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0025 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x4000 //RX_TDDRC_ALPHA_UP_1 -164 0x4000 //RX_TDDRC_ALPHA_UP_2 -165 0x4000 //RX_TDDRC_ALPHA_UP_3 -166 0x4000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0001 //RX_TDDRC_THRD_0 -270 0x0002 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x6000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x4000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x03C3 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4870 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x485C //RX_FDEQ_GAIN_7 -204 0x5C60 //RX_FDEQ_GAIN_8 -205 0x685C //RX_FDEQ_GAIN_9 -206 0x5640 //RX_FDEQ_GAIN_10 -207 0x4040 //RX_FDEQ_GAIN_11 -208 0x5C58 //RX_FDEQ_GAIN_12 -209 0x5C60 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 -211 0x6060 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0402 //RX_FDEQ_BIN_3 -224 0x0504 //RX_FDEQ_BIN_4 -225 0x0209 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0034 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x4000 //RX_TDDRC_ALPHA_UP_1 -164 0x4000 //RX_TDDRC_ALPHA_UP_2 -165 0x4000 //RX_TDDRC_ALPHA_UP_3 -166 0x4000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0001 //RX_TDDRC_THRD_0 -270 0x0002 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x6000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x4000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x03C3 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4870 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x485C //RX_FDEQ_GAIN_7 -204 0x5C60 //RX_FDEQ_GAIN_8 -205 0x685C //RX_FDEQ_GAIN_9 -206 0x5640 //RX_FDEQ_GAIN_10 -207 0x4040 //RX_FDEQ_GAIN_11 -208 0x5C58 //RX_FDEQ_GAIN_12 -209 0x5C60 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 -211 0x6060 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0402 //RX_FDEQ_BIN_3 -224 0x0504 //RX_FDEQ_BIN_4 -225 0x0209 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x004D //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x4000 //RX_TDDRC_ALPHA_UP_1 -164 0x4000 //RX_TDDRC_ALPHA_UP_2 -165 0x4000 //RX_TDDRC_ALPHA_UP_3 -166 0x4000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0001 //RX_TDDRC_THRD_0 -270 0x0002 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x6000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x4000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x03C3 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4870 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x485C //RX_FDEQ_GAIN_7 -204 0x5C60 //RX_FDEQ_GAIN_8 -205 0x685C //RX_FDEQ_GAIN_9 -206 0x5640 //RX_FDEQ_GAIN_10 -207 0x4040 //RX_FDEQ_GAIN_11 -208 0x5C58 //RX_FDEQ_GAIN_12 -209 0x5C60 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 -211 0x6060 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0402 //RX_FDEQ_BIN_3 -224 0x0504 //RX_FDEQ_BIN_4 -225 0x0209 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0074 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x4000 //RX_TDDRC_ALPHA_UP_1 -164 0x4000 //RX_TDDRC_ALPHA_UP_2 -165 0x4000 //RX_TDDRC_ALPHA_UP_3 -166 0x4000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0001 //RX_TDDRC_THRD_0 -270 0x0002 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x6000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x4000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x03C3 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4870 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x485C //RX_FDEQ_GAIN_7 -204 0x5C60 //RX_FDEQ_GAIN_8 -205 0x685C //RX_FDEQ_GAIN_9 -206 0x5640 //RX_FDEQ_GAIN_10 -207 0x4040 //RX_FDEQ_GAIN_11 -208 0x5C58 //RX_FDEQ_GAIN_12 -209 0x5C60 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 -211 0x6060 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0402 //RX_FDEQ_BIN_3 -224 0x0504 //RX_FDEQ_BIN_4 -225 0x0209 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSFREE-HANDFREE-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0073 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009C //TX_DIST2REF1 -22 0x0019 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x053D //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x5000 //TX_THR_PITCH_DET_0 -131 0x4800 //TX_THR_PITCH_DET_1 -132 0x4000 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0100 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7A00 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 -153 0x0200 //TX_MIN_EQ_RE_EST_1 -154 0x0200 //TX_MIN_EQ_RE_EST_2 -155 0x0200 //TX_MIN_EQ_RE_EST_3 -156 0x0200 //TX_MIN_EQ_RE_EST_4 -157 0x0200 //TX_MIN_EQ_RE_EST_5 -158 0x0200 //TX_MIN_EQ_RE_EST_6 -159 0x1800 //TX_MIN_EQ_RE_EST_7 -160 0x1800 //TX_MIN_EQ_RE_EST_8 -161 0x3000 //TX_MIN_EQ_RE_EST_9 -162 0x4000 //TX_MIN_EQ_RE_EST_10 -163 0x6000 //TX_MIN_EQ_RE_EST_11 -164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x2000 //TX_LAMBDA_RE_EST -166 0x0000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT -168 0x2000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x0200 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7148 //TX_DTD_THR1_0 -198 0x7148 //TX_DTD_THR1_1 -199 0x7148 //TX_DTD_THR1_2 -200 0x5DC0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x157C //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x1000 //TX_ADPT_STRICT_L -222 0x1000 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF900 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x01A0 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x7F00 //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0800 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0017 //TX_NS_LVL_CTRL_1 -283 0x0015 //TX_NS_LVL_CTRL_2 -284 0x0012 //TX_NS_LVL_CTRL_3 -285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x0018 //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 -291 0x0018 //TX_MIN_GAIN_S_2 -292 0x0018 //TX_MIN_GAIN_S_3 -293 0x0018 //TX_MIN_GAIN_S_4 -294 0x0018 //TX_MIN_GAIN_S_5 -295 0x0018 //TX_MIN_GAIN_S_6 -296 0x0018 //TX_MIN_GAIN_S_7 -297 0x4000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x1000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x2400 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x7FFF //TX_A_POST_FILT_S_0 -315 0x7FFF //TX_A_POST_FILT_S_1 -316 0x7FFF //TX_A_POST_FILT_S_2 -317 0x7FFF //TX_A_POST_FILT_S_3 -318 0x7FFF //TX_A_POST_FILT_S_4 -319 0x7FFF //TX_A_POST_FILT_S_5 -320 0x7FFF //TX_A_POST_FILT_S_6 -321 0x7FFF //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x3000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E00 //TX_LAMBDA_PFILT -339 0x7E00 //TX_LAMBDA_PFILT_S_0 -340 0x7E00 //TX_LAMBDA_PFILT_S_1 -341 0x7E00 //TX_LAMBDA_PFILT_S_2 -342 0x7E00 //TX_LAMBDA_PFILT_S_3 -343 0x7E00 //TX_LAMBDA_PFILT_S_4 -344 0x7E00 //TX_LAMBDA_PFILT_S_5 -345 0x7E00 //TX_LAMBDA_PFILT_S_6 -346 0x7E00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x0FA0 //TX_DT_BINVAD_ENDF -358 0x0400 //TX_C_POST_FLT_DT -359 0x4000 //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x03ED //TX_NOISE_TH_2 -372 0x2EE0 //TX_NOISE_TH_3 -373 0x5528 //TX_NOISE_TH_4 -374 0x7FFF //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0FA0 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x1000 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x7000 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x000A //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x007A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x5000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x7FFF //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x3000 //TX_DEREVERB_LF_MU -515 0x34CD //TX_DEREVERB_HF_MU -516 0x0007 //TX_DEREVERB_DELAY -517 0x0004 //TX_DEREVERB_COEF_LEN -518 0x0003 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x3A98 //TX_GSC_RTOL_TH -522 0x3A98 //TX_GSC_RTOH_TH -523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0014 //TX_FDEQ_SUBNUM -567 0x5250 //TX_FDEQ_GAIN_0 -568 0x4C48 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4A43 //TX_FDEQ_GAIN_3 -571 0x374B //TX_FDEQ_GAIN_4 -572 0x3444 //TX_FDEQ_GAIN_5 -573 0x433C //TX_FDEQ_GAIN_6 -574 0x403C //TX_FDEQ_GAIN_7 -575 0x2627 //TX_FDEQ_GAIN_8 -576 0x2929 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0014 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4849 //TX_PREEQ_GAIN_MIC1_8 -675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4849 //TX_PREEQ_GAIN_MIC2_7 -723 0x4B4C //TX_PREEQ_GAIN_MIC2_8 -724 0x4D50 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0202 //TX_PREEQ_BIN_MIC2_0 -740 0x0203 //TX_PREEQ_BIN_MIC2_1 -741 0x0303 //TX_PREEQ_BIN_MIC2_2 -742 0x0304 //TX_PREEQ_BIN_MIC2_3 -743 0x0405 //TX_PREEQ_BIN_MIC2_4 -744 0x0506 //TX_PREEQ_BIN_MIC2_5 -745 0x0708 //TX_PREEQ_BIN_MIC2_6 -746 0x090A //TX_PREEQ_BIN_MIC2_7 -747 0x0B0C //TX_PREEQ_BIN_MIC2_8 -748 0x0D0E //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0065 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0065 //TX_MIC_CALIBRATION_2 -768 0x0065 //TX_MIC_CALIBRATION_3 -769 0x0044 //TX_MIC_PWR_BIAS_0 -770 0x0044 //TX_MIC_PWR_BIAS_1 -771 0x0044 //TX_MIC_PWR_BIAS_2 -772 0x0044 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x4000 //TX_TDDRC_ALPHA_UP_01 -784 0x4000 //TX_TDDRC_ALPHA_UP_02 -785 0x4000 //TX_TDDRC_ALPHA_UP_03 -786 0x4000 //TX_TDDRC_ALPHA_UP_04 -787 0x6000 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0004 //TX_TDDRC_THRD_0 -855 0x0010 //TX_TDDRC_THRD_1 -856 0x1800 //TX_TDDRC_THRD_2 -857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 -860 0x4000 //TX_TDDRC_ALPHA_UP_00 -861 0x6000 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0A00 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x206C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7652 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0014 //RX_FDEQ_SUBNUM -39 0x5252 //RX_FDEQ_GAIN_0 -40 0x4E4F //RX_FDEQ_GAIN_1 -41 0x4743 //RX_FDEQ_GAIN_2 -42 0x454C //RX_FDEQ_GAIN_3 -43 0x4C49 //RX_FDEQ_GAIN_4 -44 0x584A //RX_FDEQ_GAIN_5 -45 0x4642 //RX_FDEQ_GAIN_6 -46 0x4043 //RX_FDEQ_GAIN_7 -47 0x454A //RX_FDEQ_GAIN_8 -48 0x4C53 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0503 //RX_FDEQ_BIN_4 -68 0x0107 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x0060 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x0600 //RX_FDDRC_THRD_2_0 -95 0x0600 //RX_FDDRC_THRD_2_1 -96 0x0600 //RX_FDDRC_THRD_2_2 -97 0x0600 //RX_FDDRC_THRD_2_3 -98 0x0800 //RX_FDDRC_THRD_3_0 -99 0x0800 //RX_FDDRC_THRD_3_1 -100 0x0800 //RX_FDDRC_THRD_3_2 -101 0x0800 //RX_FDDRC_THRD_3_3 -102 0x0000 //RX_FDDRC_SLANT_0_0 -103 0x0000 //RX_FDDRC_SLANT_0_1 -104 0x0000 //RX_FDDRC_SLANT_0_2 -105 0x0000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0005 //RX_FILTINDX -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x5252 //RX_FDEQ_GAIN_0 -40 0x4E4F //RX_FDEQ_GAIN_1 -41 0x4743 //RX_FDEQ_GAIN_2 -42 0x454C //RX_FDEQ_GAIN_3 -43 0x4C49 //RX_FDEQ_GAIN_4 -44 0x584A //RX_FDEQ_GAIN_5 -45 0x4642 //RX_FDEQ_GAIN_6 -46 0x4043 //RX_FDEQ_GAIN_7 -47 0x454A //RX_FDEQ_GAIN_8 -48 0x4C53 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0503 //RX_FDEQ_BIN_4 -68 0x0107 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x0060 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x0600 //RX_FDDRC_THRD_2_0 -95 0x0600 //RX_FDDRC_THRD_2_1 -96 0x0600 //RX_FDDRC_THRD_2_2 -97 0x0600 //RX_FDDRC_THRD_2_3 -98 0x0800 //RX_FDDRC_THRD_3_0 -99 0x0800 //RX_FDDRC_THRD_3_1 -100 0x0800 //RX_FDDRC_THRD_3_2 -101 0x0800 //RX_FDDRC_THRD_3_3 -102 0x0000 //RX_FDDRC_SLANT_0_0 -103 0x0000 //RX_FDDRC_SLANT_0_1 -104 0x0000 //RX_FDDRC_SLANT_0_2 -105 0x0000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0015 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x5252 //RX_FDEQ_GAIN_0 -40 0x4E4F //RX_FDEQ_GAIN_1 -41 0x4743 //RX_FDEQ_GAIN_2 -42 0x454C //RX_FDEQ_GAIN_3 -43 0x4C49 //RX_FDEQ_GAIN_4 -44 0x584A //RX_FDEQ_GAIN_5 -45 0x4642 //RX_FDEQ_GAIN_6 -46 0x4043 //RX_FDEQ_GAIN_7 -47 0x454A //RX_FDEQ_GAIN_8 -48 0x4C53 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0503 //RX_FDEQ_BIN_4 -68 0x0107 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x0060 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x0600 //RX_FDDRC_THRD_2_0 -95 0x0600 //RX_FDDRC_THRD_2_1 -96 0x0600 //RX_FDDRC_THRD_2_2 -97 0x0600 //RX_FDDRC_THRD_2_3 -98 0x0800 //RX_FDDRC_THRD_3_0 -99 0x0800 //RX_FDDRC_THRD_3_1 -100 0x0800 //RX_FDDRC_THRD_3_2 -101 0x0800 //RX_FDDRC_THRD_3_3 -102 0x0000 //RX_FDDRC_SLANT_0_0 -103 0x0000 //RX_FDDRC_SLANT_0_1 -104 0x0000 //RX_FDDRC_SLANT_0_2 -105 0x0000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001E //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x5252 //RX_FDEQ_GAIN_0 -40 0x4E4F //RX_FDEQ_GAIN_1 -41 0x4743 //RX_FDEQ_GAIN_2 -42 0x454C //RX_FDEQ_GAIN_3 -43 0x4C49 //RX_FDEQ_GAIN_4 -44 0x584A //RX_FDEQ_GAIN_5 -45 0x4642 //RX_FDEQ_GAIN_6 -46 0x4043 //RX_FDEQ_GAIN_7 -47 0x454A //RX_FDEQ_GAIN_8 -48 0x4C53 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0503 //RX_FDEQ_BIN_4 -68 0x0107 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x0060 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x0600 //RX_FDDRC_THRD_2_0 -95 0x0600 //RX_FDDRC_THRD_2_1 -96 0x0600 //RX_FDDRC_THRD_2_2 -97 0x0600 //RX_FDDRC_THRD_2_3 -98 0x0800 //RX_FDDRC_THRD_3_0 -99 0x0800 //RX_FDDRC_THRD_3_1 -100 0x0800 //RX_FDDRC_THRD_3_2 -101 0x0800 //RX_FDDRC_THRD_3_3 -102 0x0000 //RX_FDDRC_SLANT_0_0 -103 0x0000 //RX_FDDRC_SLANT_0_1 -104 0x0000 //RX_FDDRC_SLANT_0_2 -105 0x0000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x002A //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x5252 //RX_FDEQ_GAIN_0 -40 0x4E4F //RX_FDEQ_GAIN_1 -41 0x4743 //RX_FDEQ_GAIN_2 -42 0x454C //RX_FDEQ_GAIN_3 -43 0x4C49 //RX_FDEQ_GAIN_4 -44 0x584A //RX_FDEQ_GAIN_5 -45 0x4642 //RX_FDEQ_GAIN_6 -46 0x4043 //RX_FDEQ_GAIN_7 -47 0x454A //RX_FDEQ_GAIN_8 -48 0x4C53 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0503 //RX_FDEQ_BIN_4 -68 0x0107 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x0060 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x0600 //RX_FDDRC_THRD_2_0 -95 0x0600 //RX_FDDRC_THRD_2_1 -96 0x0600 //RX_FDDRC_THRD_2_2 -97 0x0600 //RX_FDDRC_THRD_2_3 -98 0x0800 //RX_FDDRC_THRD_3_0 -99 0x0800 //RX_FDDRC_THRD_3_1 -100 0x0800 //RX_FDDRC_THRD_3_2 -101 0x0800 //RX_FDDRC_THRD_3_3 -102 0x0000 //RX_FDDRC_SLANT_0_0 -103 0x0000 //RX_FDDRC_SLANT_0_1 -104 0x0000 //RX_FDDRC_SLANT_0_2 -105 0x0000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x003C //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x5252 //RX_FDEQ_GAIN_0 -40 0x4E4F //RX_FDEQ_GAIN_1 -41 0x4743 //RX_FDEQ_GAIN_2 -42 0x454C //RX_FDEQ_GAIN_3 -43 0x4C49 //RX_FDEQ_GAIN_4 -44 0x584A //RX_FDEQ_GAIN_5 -45 0x4642 //RX_FDEQ_GAIN_6 -46 0x4043 //RX_FDEQ_GAIN_7 -47 0x454A //RX_FDEQ_GAIN_8 -48 0x4C53 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0503 //RX_FDEQ_BIN_4 -68 0x0107 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x0060 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x0600 //RX_FDDRC_THRD_2_0 -95 0x0600 //RX_FDDRC_THRD_2_1 -96 0x0600 //RX_FDDRC_THRD_2_2 -97 0x0600 //RX_FDDRC_THRD_2_3 -98 0x0800 //RX_FDDRC_THRD_3_0 -99 0x0800 //RX_FDDRC_THRD_3_1 -100 0x0800 //RX_FDDRC_THRD_3_2 -101 0x0800 //RX_FDDRC_THRD_3_3 -102 0x0000 //RX_FDDRC_SLANT_0_0 -103 0x0000 //RX_FDDRC_SLANT_0_1 -104 0x0000 //RX_FDDRC_SLANT_0_2 -105 0x0000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0058 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x5252 //RX_FDEQ_GAIN_0 -40 0x4E4F //RX_FDEQ_GAIN_1 -41 0x4743 //RX_FDEQ_GAIN_2 -42 0x454C //RX_FDEQ_GAIN_3 -43 0x4C49 //RX_FDEQ_GAIN_4 -44 0x584A //RX_FDEQ_GAIN_5 -45 0x4642 //RX_FDEQ_GAIN_6 -46 0x4043 //RX_FDEQ_GAIN_7 -47 0x454A //RX_FDEQ_GAIN_8 -48 0x4C53 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0503 //RX_FDEQ_BIN_4 -68 0x0107 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x0060 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x0600 //RX_FDDRC_THRD_2_0 -95 0x0600 //RX_FDDRC_THRD_2_1 -96 0x0600 //RX_FDDRC_THRD_2_2 -97 0x0600 //RX_FDDRC_THRD_2_3 -98 0x0800 //RX_FDDRC_THRD_3_0 -99 0x0800 //RX_FDDRC_THRD_3_1 -100 0x0800 //RX_FDDRC_THRD_3_2 -101 0x0800 //RX_FDDRC_THRD_3_3 -102 0x0000 //RX_FDDRC_SLANT_0_0 -103 0x0000 //RX_FDDRC_SLANT_0_1 -104 0x0000 //RX_FDDRC_SLANT_0_2 -105 0x0000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0082 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x5252 //RX_FDEQ_GAIN_0 -40 0x4E4F //RX_FDEQ_GAIN_1 -41 0x4743 //RX_FDEQ_GAIN_2 -42 0x454C //RX_FDEQ_GAIN_3 -43 0x4C49 //RX_FDEQ_GAIN_4 -44 0x584A //RX_FDEQ_GAIN_5 -45 0x4642 //RX_FDEQ_GAIN_6 -46 0x4043 //RX_FDEQ_GAIN_7 -47 0x454A //RX_FDEQ_GAIN_8 -48 0x4C53 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0503 //RX_FDEQ_BIN_4 -68 0x0107 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x0060 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x0600 //RX_FDDRC_THRD_2_0 -95 0x0600 //RX_FDDRC_THRD_2_1 -96 0x0600 //RX_FDDRC_THRD_2_2 -97 0x0600 //RX_FDDRC_THRD_2_3 -98 0x0800 //RX_FDDRC_THRD_3_0 -99 0x0800 //RX_FDDRC_THRD_3_1 -100 0x0800 //RX_FDDRC_THRD_3_2 -101 0x0800 //RX_FDDRC_THRD_3_3 -102 0x0000 //RX_FDDRC_SLANT_0_0 -103 0x0000 //RX_FDDRC_SLANT_0_1 -104 0x0000 //RX_FDDRC_SLANT_0_2 -105 0x0000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x027C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7652 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0014 //RX_FDEQ_SUBNUM -196 0x8080 //RX_FDEQ_GAIN_0 -197 0x8054 //RX_FDEQ_GAIN_1 -198 0x5050 //RX_FDEQ_GAIN_2 -199 0x5058 //RX_FDEQ_GAIN_3 -200 0x5C70 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x484C //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x485A //RX_FDEQ_GAIN_8 -205 0x5A58 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0604 //RX_FDEQ_BIN_4 -225 0x0406 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x0060 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x0600 //RX_FDDRC_THRD_2_0 -252 0x0600 //RX_FDDRC_THRD_2_1 -253 0x0600 //RX_FDDRC_THRD_2_2 -254 0x0600 //RX_FDDRC_THRD_2_3 -255 0x0800 //RX_FDDRC_THRD_3_0 -256 0x0800 //RX_FDDRC_THRD_3_1 -257 0x0800 //RX_FDDRC_THRD_3_2 -258 0x0800 //RX_FDDRC_THRD_3_3 -259 0x0000 //RX_FDDRC_SLANT_0_0 -260 0x0000 //RX_FDDRC_SLANT_0_1 -261 0x0000 //RX_FDDRC_SLANT_0_2 -262 0x0000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0005 //RX_FILTINDX -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0780 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0780 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x8080 //RX_FDEQ_GAIN_0 -197 0x8054 //RX_FDEQ_GAIN_1 -198 0x5050 //RX_FDEQ_GAIN_2 -199 0x5058 //RX_FDEQ_GAIN_3 -200 0x5C70 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x484C //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x485A //RX_FDEQ_GAIN_8 -205 0x5A58 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0604 //RX_FDEQ_BIN_4 -225 0x0406 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x0060 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x0600 //RX_FDDRC_THRD_2_0 -252 0x0600 //RX_FDDRC_THRD_2_1 -253 0x0600 //RX_FDDRC_THRD_2_2 -254 0x0600 //RX_FDDRC_THRD_2_3 -255 0x0800 //RX_FDDRC_THRD_3_0 -256 0x0800 //RX_FDDRC_THRD_3_1 -257 0x0800 //RX_FDDRC_THRD_3_2 -258 0x0800 //RX_FDDRC_THRD_3_3 -259 0x0000 //RX_FDDRC_SLANT_0_0 -260 0x0000 //RX_FDDRC_SLANT_0_1 -261 0x0000 //RX_FDDRC_SLANT_0_2 -262 0x0000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0015 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0780 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x8080 //RX_FDEQ_GAIN_0 -197 0x8054 //RX_FDEQ_GAIN_1 -198 0x5050 //RX_FDEQ_GAIN_2 -199 0x5058 //RX_FDEQ_GAIN_3 -200 0x5C70 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x484C //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x485A //RX_FDEQ_GAIN_8 -205 0x5A58 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0604 //RX_FDEQ_BIN_4 -225 0x0406 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x0060 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x0600 //RX_FDDRC_THRD_2_0 -252 0x0600 //RX_FDDRC_THRD_2_1 -253 0x0600 //RX_FDDRC_THRD_2_2 -254 0x0600 //RX_FDDRC_THRD_2_3 -255 0x0800 //RX_FDDRC_THRD_3_0 -256 0x0800 //RX_FDDRC_THRD_3_1 -257 0x0800 //RX_FDDRC_THRD_3_2 -258 0x0800 //RX_FDDRC_THRD_3_3 -259 0x0000 //RX_FDDRC_SLANT_0_0 -260 0x0000 //RX_FDDRC_SLANT_0_1 -261 0x0000 //RX_FDDRC_SLANT_0_2 -262 0x0000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001E //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0780 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x8080 //RX_FDEQ_GAIN_0 -197 0x8054 //RX_FDEQ_GAIN_1 -198 0x5050 //RX_FDEQ_GAIN_2 -199 0x5058 //RX_FDEQ_GAIN_3 -200 0x5C70 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x484C //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x485A //RX_FDEQ_GAIN_8 -205 0x5A58 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0604 //RX_FDEQ_BIN_4 -225 0x0406 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x0060 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x0600 //RX_FDDRC_THRD_2_0 -252 0x0600 //RX_FDDRC_THRD_2_1 -253 0x0600 //RX_FDDRC_THRD_2_2 -254 0x0600 //RX_FDDRC_THRD_2_3 -255 0x0800 //RX_FDDRC_THRD_3_0 -256 0x0800 //RX_FDDRC_THRD_3_1 -257 0x0800 //RX_FDDRC_THRD_3_2 -258 0x0800 //RX_FDDRC_THRD_3_3 -259 0x0000 //RX_FDDRC_SLANT_0_0 -260 0x0000 //RX_FDDRC_SLANT_0_1 -261 0x0000 //RX_FDDRC_SLANT_0_2 -262 0x0000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x002A //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0780 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x8080 //RX_FDEQ_GAIN_0 -197 0x8054 //RX_FDEQ_GAIN_1 -198 0x5050 //RX_FDEQ_GAIN_2 -199 0x5058 //RX_FDEQ_GAIN_3 -200 0x5C70 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x484C //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x485A //RX_FDEQ_GAIN_8 -205 0x5A58 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0604 //RX_FDEQ_BIN_4 -225 0x0406 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x0060 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x0600 //RX_FDDRC_THRD_2_0 -252 0x0600 //RX_FDDRC_THRD_2_1 -253 0x0600 //RX_FDDRC_THRD_2_2 -254 0x0600 //RX_FDDRC_THRD_2_3 -255 0x0800 //RX_FDDRC_THRD_3_0 -256 0x0800 //RX_FDDRC_THRD_3_1 -257 0x0800 //RX_FDDRC_THRD_3_2 -258 0x0800 //RX_FDDRC_THRD_3_3 -259 0x0000 //RX_FDDRC_SLANT_0_0 -260 0x0000 //RX_FDDRC_SLANT_0_1 -261 0x0000 //RX_FDDRC_SLANT_0_2 -262 0x0000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x003C //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0780 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x8080 //RX_FDEQ_GAIN_0 -197 0x8054 //RX_FDEQ_GAIN_1 -198 0x5050 //RX_FDEQ_GAIN_2 -199 0x5058 //RX_FDEQ_GAIN_3 -200 0x5C70 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x484C //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x485A //RX_FDEQ_GAIN_8 -205 0x5A58 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0604 //RX_FDEQ_BIN_4 -225 0x0406 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x0060 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x0600 //RX_FDDRC_THRD_2_0 -252 0x0600 //RX_FDDRC_THRD_2_1 -253 0x0600 //RX_FDDRC_THRD_2_2 -254 0x0600 //RX_FDDRC_THRD_2_3 -255 0x0800 //RX_FDDRC_THRD_3_0 -256 0x0800 //RX_FDDRC_THRD_3_1 -257 0x0800 //RX_FDDRC_THRD_3_2 -258 0x0800 //RX_FDDRC_THRD_3_3 -259 0x0000 //RX_FDDRC_SLANT_0_0 -260 0x0000 //RX_FDDRC_SLANT_0_1 -261 0x0000 //RX_FDDRC_SLANT_0_2 -262 0x0000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0058 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0780 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x8080 //RX_FDEQ_GAIN_0 -197 0x8054 //RX_FDEQ_GAIN_1 -198 0x5050 //RX_FDEQ_GAIN_2 -199 0x5058 //RX_FDEQ_GAIN_3 -200 0x5C70 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x484C //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x485A //RX_FDEQ_GAIN_8 -205 0x5A58 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0604 //RX_FDEQ_BIN_4 -225 0x0406 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x0060 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x0600 //RX_FDDRC_THRD_2_0 -252 0x0600 //RX_FDDRC_THRD_2_1 -253 0x0600 //RX_FDDRC_THRD_2_2 -254 0x0600 //RX_FDDRC_THRD_2_3 -255 0x0800 //RX_FDDRC_THRD_3_0 -256 0x0800 //RX_FDDRC_THRD_3_1 -257 0x0800 //RX_FDDRC_THRD_3_2 -258 0x0800 //RX_FDDRC_THRD_3_3 -259 0x0000 //RX_FDDRC_SLANT_0_0 -260 0x0000 //RX_FDDRC_SLANT_0_1 -261 0x0000 //RX_FDDRC_SLANT_0_2 -262 0x0000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0082 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0780 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x8080 //RX_FDEQ_GAIN_0 -197 0x8054 //RX_FDEQ_GAIN_1 -198 0x5050 //RX_FDEQ_GAIN_2 -199 0x5058 //RX_FDEQ_GAIN_3 -200 0x5C70 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x484C //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x485A //RX_FDEQ_GAIN_8 -205 0x5A58 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0604 //RX_FDEQ_BIN_4 -225 0x0406 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x0060 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x0600 //RX_FDDRC_THRD_2_0 -252 0x0600 //RX_FDDRC_THRD_2_1 -253 0x0600 //RX_FDDRC_THRD_2_2 -254 0x0600 //RX_FDDRC_THRD_2_3 -255 0x0800 //RX_FDDRC_THRD_3_0 -256 0x0800 //RX_FDDRC_THRD_3_1 -257 0x0800 //RX_FDDRC_THRD_3_2 -258 0x0800 //RX_FDDRC_THRD_3_3 -259 0x0000 //RX_FDDRC_SLANT_0_0 -260 0x0000 //RX_FDDRC_SLANT_0_1 -261 0x0000 //RX_FDDRC_SLANT_0_2 -262 0x0000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSFREE-HANDFREE-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009C //TX_DIST2REF1 -22 0x0019 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x053D //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0C00 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x5000 //TX_THR_PITCH_DET_0 -131 0x4800 //TX_THR_PITCH_DET_1 -132 0x4000 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0300 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6C00 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0200 //TX_MIN_EQ_RE_EST_2 -155 0x0200 //TX_MIN_EQ_RE_EST_3 -156 0x0200 //TX_MIN_EQ_RE_EST_4 -157 0x0200 //TX_MIN_EQ_RE_EST_5 -158 0x0200 //TX_MIN_EQ_RE_EST_6 -159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x1000 //TX_MIN_EQ_RE_EST_8 -161 0x1000 //TX_MIN_EQ_RE_EST_9 -162 0x1000 //TX_MIN_EQ_RE_EST_10 -163 0x1000 //TX_MIN_EQ_RE_EST_11 -164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x4000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT -168 0x5000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x5000 //TX_DTD_THR2_0 -205 0x5000 //TX_DTD_THR2_1 -206 0x5000 //TX_DTD_THR2_2 -207 0x5000 //TX_DTD_THR2_3 -208 0x5000 //TX_DTD_THR2_4 -209 0x5000 //TX_DTD_THR2_5 -210 0x5000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x07D0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x03E8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x0578 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x0001 //TX_RATIO_DT_L0_TH -228 0x7FFF //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH -235 0x7FFF //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFB00 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0018 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x50C0 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x4C00 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x4000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7C00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7A00 //TX_LAMBDA_PFILT_S_2 -342 0x7C00 //TX_LAMBDA_PFILT_S_3 -343 0x7C00 //TX_LAMBDA_PFILT_S_4 -344 0x7C00 //TX_LAMBDA_PFILT_S_5 -345 0x7C00 //TX_LAMBDA_PFILT_S_6 -346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0800 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0140 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0032 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x017E //TX_NOISE_TH_1 -371 0x0230 //TX_NOISE_TH_2 -372 0x3492 //TX_NOISE_TH_3 -373 0x4E20 //TX_NOISE_TH_4 -374 0x55B8 //TX_NOISE_TH_5 -375 0x49E6 //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0F0A //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x7999 //TX_RATIODTL_CUT_TH -383 0x0119 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x7FFF //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x4000 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x4000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x3000 //TX_DEREVERB_LF_MU -515 0x34CD //TX_DEREVERB_HF_MU -516 0x0007 //TX_DEREVERB_DELAY -517 0x0004 //TX_DEREVERB_COEF_LEN -518 0x0003 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x3A98 //TX_GSC_RTOL_TH -522 0x3A98 //TX_GSC_RTOH_TH -523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x5050 //TX_FDEQ_GAIN_0 -568 0x544B //TX_FDEQ_GAIN_1 -569 0x4B4B //TX_FDEQ_GAIN_2 -570 0x4B48 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4850 //TX_FDEQ_GAIN_5 -573 0x5458 //TX_FDEQ_GAIN_6 -574 0x5A4C //TX_FDEQ_GAIN_7 -575 0x464C //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x393C //TX_FDEQ_GAIN_10 -578 0x3C3C //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0F10 //TX_FDEQ_BIN_10 -602 0x1011 //TX_FDEQ_BIN_11 -603 0x1112 //TX_FDEQ_BIN_12 -604 0x120B //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 -651 0x0F10 //TX_PREEQ_BIN_MIC0_10 -652 0x1011 //TX_PREEQ_BIN_MIC0_11 -653 0x1112 //TX_PREEQ_BIN_MIC0_12 -654 0x120B //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x494C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x494A //TX_PREEQ_GAIN_MIC2_4 -720 0x4B4C //TX_PREEQ_GAIN_MIC2_5 -721 0x4D4D //TX_PREEQ_GAIN_MIC2_6 -722 0x4E4F //TX_PREEQ_GAIN_MIC2_7 -723 0x4F50 //TX_PREEQ_GAIN_MIC2_8 -724 0x5051 //TX_PREEQ_GAIN_MIC2_9 -725 0x5252 //TX_PREEQ_GAIN_MIC2_10 -726 0x5253 //TX_PREEQ_GAIN_MIC2_11 -727 0x5353 //TX_PREEQ_GAIN_MIC2_12 -728 0x5454 //TX_PREEQ_GAIN_MIC2_13 -729 0x5455 //TX_PREEQ_GAIN_MIC2_14 -730 0x5657 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0808 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0800 //TX_TDDRC_ALPHA_UP_01 -784 0x0800 //TX_TDDRC_ALPHA_UP_02 -785 0x0800 //TX_TDDRC_ALPHA_UP_03 -786 0x0800 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 -856 0x1800 //TX_TDDRC_THRD_2 -857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 -860 0x0800 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0C97 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x206C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0001 //RX_SAMPLINGFREQ_SIG -3 0x0001 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7B02 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4844 //RX_FDEQ_GAIN_1 -41 0x3E3B //RX_FDEQ_GAIN_2 -42 0x4143 //RX_FDEQ_GAIN_3 -43 0x4348 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4E56 //RX_FDEQ_GAIN_11 -51 0x595C //RX_FDEQ_GAIN_12 -52 0x5959 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0284 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0284 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4844 //RX_FDEQ_GAIN_1 -41 0x3E3B //RX_FDEQ_GAIN_2 -42 0x4143 //RX_FDEQ_GAIN_3 -43 0x4348 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4E56 //RX_FDEQ_GAIN_11 -51 0x595C //RX_FDEQ_GAIN_12 -52 0x5959 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0011 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0284 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4844 //RX_FDEQ_GAIN_1 -41 0x3E3B //RX_FDEQ_GAIN_2 -42 0x4143 //RX_FDEQ_GAIN_3 -43 0x4348 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4E56 //RX_FDEQ_GAIN_11 -51 0x595C //RX_FDEQ_GAIN_12 -52 0x5959 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0019 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0284 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4844 //RX_FDEQ_GAIN_1 -41 0x3E3B //RX_FDEQ_GAIN_2 -42 0x4143 //RX_FDEQ_GAIN_3 -43 0x4348 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4E56 //RX_FDEQ_GAIN_11 -51 0x595C //RX_FDEQ_GAIN_12 -52 0x5959 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0024 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0284 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4844 //RX_FDEQ_GAIN_1 -41 0x3E3B //RX_FDEQ_GAIN_2 -42 0x4143 //RX_FDEQ_GAIN_3 -43 0x4348 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4E56 //RX_FDEQ_GAIN_11 -51 0x595C //RX_FDEQ_GAIN_12 -52 0x5959 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0033 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0284 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4844 //RX_FDEQ_GAIN_1 -41 0x3E3B //RX_FDEQ_GAIN_2 -42 0x4143 //RX_FDEQ_GAIN_3 -43 0x4348 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4E56 //RX_FDEQ_GAIN_11 -51 0x595C //RX_FDEQ_GAIN_12 -52 0x5959 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0049 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0284 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4844 //RX_FDEQ_GAIN_1 -41 0x3E3B //RX_FDEQ_GAIN_2 -42 0x4143 //RX_FDEQ_GAIN_3 -43 0x4348 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4E56 //RX_FDEQ_GAIN_11 -51 0x595C //RX_FDEQ_GAIN_12 -52 0x5959 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0074 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0284 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4844 //RX_FDEQ_GAIN_1 -41 0x3E3B //RX_FDEQ_GAIN_2 -42 0x4143 //RX_FDEQ_GAIN_3 -43 0x4348 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4E56 //RX_FDEQ_GAIN_11 -51 0x595C //RX_FDEQ_GAIN_12 -52 0x5959 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x027C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0001 //RX_SAMPLINGFREQ_SIG -160 0x0001 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7B02 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x001C //RX_FDEQ_SUBNUM -196 0x6868 //RX_FDEQ_GAIN_0 -197 0x6858 //RX_FDEQ_GAIN_1 -198 0x5858 //RX_FDEQ_GAIN_2 -199 0x5858 //RX_FDEQ_GAIN_3 -200 0x5C5C //RX_FDEQ_GAIN_4 -201 0x5C54 //RX_FDEQ_GAIN_5 -202 0x544C //RX_FDEQ_GAIN_6 -203 0x4A48 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x6068 //RX_FDEQ_GAIN_9 -206 0x6C6C //RX_FDEQ_GAIN_10 -207 0x6C68 //RX_FDEQ_GAIN_11 -208 0x5A5A //RX_FDEQ_GAIN_12 -209 0x5A5C //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0204 //RX_FDEQ_BIN_5 -226 0x0A0A //RX_FDEQ_BIN_6 -227 0x0A0A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1C00 //RX_TDDRC_THRD_2 -272 0x1C00 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0715 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0011 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1C00 //RX_TDDRC_THRD_2 -272 0x1C00 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0715 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x6868 //RX_FDEQ_GAIN_0 -197 0x6858 //RX_FDEQ_GAIN_1 -198 0x5858 //RX_FDEQ_GAIN_2 -199 0x5858 //RX_FDEQ_GAIN_3 -200 0x5C5C //RX_FDEQ_GAIN_4 -201 0x5C54 //RX_FDEQ_GAIN_5 -202 0x544C //RX_FDEQ_GAIN_6 -203 0x4A48 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x6068 //RX_FDEQ_GAIN_9 -206 0x6C6C //RX_FDEQ_GAIN_10 -207 0x6C68 //RX_FDEQ_GAIN_11 -208 0x5A5A //RX_FDEQ_GAIN_12 -209 0x5A5C //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0204 //RX_FDEQ_BIN_5 -226 0x0A0A //RX_FDEQ_BIN_6 -227 0x0A0A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0011 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1C00 //RX_TDDRC_THRD_2 -272 0x1C00 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0715 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x6868 //RX_FDEQ_GAIN_0 -197 0x6858 //RX_FDEQ_GAIN_1 -198 0x5858 //RX_FDEQ_GAIN_2 -199 0x5858 //RX_FDEQ_GAIN_3 -200 0x5C5C //RX_FDEQ_GAIN_4 -201 0x5C54 //RX_FDEQ_GAIN_5 -202 0x544C //RX_FDEQ_GAIN_6 -203 0x4A48 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x6068 //RX_FDEQ_GAIN_9 -206 0x6C6C //RX_FDEQ_GAIN_10 -207 0x6C68 //RX_FDEQ_GAIN_11 -208 0x5A5A //RX_FDEQ_GAIN_12 -209 0x5A5C //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0204 //RX_FDEQ_BIN_5 -226 0x0A0A //RX_FDEQ_BIN_6 -227 0x0A0A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0019 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1C00 //RX_TDDRC_THRD_2 -272 0x1C00 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0715 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x6868 //RX_FDEQ_GAIN_0 -197 0x6858 //RX_FDEQ_GAIN_1 -198 0x5858 //RX_FDEQ_GAIN_2 -199 0x5858 //RX_FDEQ_GAIN_3 -200 0x5C5C //RX_FDEQ_GAIN_4 -201 0x5C54 //RX_FDEQ_GAIN_5 -202 0x544C //RX_FDEQ_GAIN_6 -203 0x4A48 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x6068 //RX_FDEQ_GAIN_9 -206 0x6C6C //RX_FDEQ_GAIN_10 -207 0x6C68 //RX_FDEQ_GAIN_11 -208 0x5A5A //RX_FDEQ_GAIN_12 -209 0x5A5C //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0204 //RX_FDEQ_BIN_5 -226 0x0A0A //RX_FDEQ_BIN_6 -227 0x0A0A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0024 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1C00 //RX_TDDRC_THRD_2 -272 0x1C00 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0715 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x6868 //RX_FDEQ_GAIN_0 -197 0x6858 //RX_FDEQ_GAIN_1 -198 0x5858 //RX_FDEQ_GAIN_2 -199 0x5858 //RX_FDEQ_GAIN_3 -200 0x5C5C //RX_FDEQ_GAIN_4 -201 0x5C54 //RX_FDEQ_GAIN_5 -202 0x544C //RX_FDEQ_GAIN_6 -203 0x4A48 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x6068 //RX_FDEQ_GAIN_9 -206 0x6C6C //RX_FDEQ_GAIN_10 -207 0x6C68 //RX_FDEQ_GAIN_11 -208 0x5A5A //RX_FDEQ_GAIN_12 -209 0x5A5C //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0204 //RX_FDEQ_BIN_5 -226 0x0A0A //RX_FDEQ_BIN_6 -227 0x0A0A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0033 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1C00 //RX_TDDRC_THRD_2 -272 0x1C00 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0715 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x6868 //RX_FDEQ_GAIN_0 -197 0x6858 //RX_FDEQ_GAIN_1 -198 0x5858 //RX_FDEQ_GAIN_2 -199 0x5858 //RX_FDEQ_GAIN_3 -200 0x5C5C //RX_FDEQ_GAIN_4 -201 0x8854 //RX_FDEQ_GAIN_5 -202 0x5448 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x6068 //RX_FDEQ_GAIN_9 -206 0x7070 //RX_FDEQ_GAIN_10 -207 0x8070 //RX_FDEQ_GAIN_11 -208 0x6060 //RX_FDEQ_GAIN_12 -209 0x7070 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0204 //RX_FDEQ_BIN_5 -226 0x0A0A //RX_FDEQ_BIN_6 -227 0x0A0A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0049 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1C00 //RX_TDDRC_THRD_2 -272 0x1C00 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0715 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x6868 //RX_FDEQ_GAIN_0 -197 0x6858 //RX_FDEQ_GAIN_1 -198 0x5858 //RX_FDEQ_GAIN_2 -199 0x5858 //RX_FDEQ_GAIN_3 -200 0x5C5C //RX_FDEQ_GAIN_4 -201 0x8854 //RX_FDEQ_GAIN_5 -202 0x5448 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x6068 //RX_FDEQ_GAIN_9 -206 0x7070 //RX_FDEQ_GAIN_10 -207 0x8070 //RX_FDEQ_GAIN_11 -208 0x6060 //RX_FDEQ_GAIN_12 -209 0x7070 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0204 //RX_FDEQ_BIN_5 -226 0x0A0A //RX_FDEQ_BIN_6 -227 0x0A0A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0074 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1C00 //RX_TDDRC_THRD_2 -272 0x1C00 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0715 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x6868 //RX_FDEQ_GAIN_0 -197 0x6864 //RX_FDEQ_GAIN_1 -198 0x7070 //RX_FDEQ_GAIN_2 -199 0x6058 //RX_FDEQ_GAIN_3 -200 0x5C5C //RX_FDEQ_GAIN_4 -201 0x8854 //RX_FDEQ_GAIN_5 -202 0x5448 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x6068 //RX_FDEQ_GAIN_9 -206 0x7070 //RX_FDEQ_GAIN_10 -207 0x8070 //RX_FDEQ_GAIN_11 -208 0x6060 //RX_FDEQ_GAIN_12 -209 0x7070 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0204 //RX_FDEQ_BIN_5 -226 0x0A0A //RX_FDEQ_BIN_6 -227 0x0A0A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSFREE-HANDFREE-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0073 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +2 0x00FB //TX_PATCH_REG +3 0x6F74 //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -13379,7 +10810,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009C //TX_DIST2REF1 +21 0x0096 //TX_DIST2REF1 22 0x0019 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -13388,9 +10819,9 @@ 27 0x1000 //TX_PGA_0 28 0x1000 //TX_PGA_1 29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -13496,11 +10927,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -13508,28 +10939,28 @@ 147 0x0400 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7600 //TX_EAD_THR +150 0x7A00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x2000 //TX_MIN_EQ_RE_EST_0 -153 0x0600 //TX_MIN_EQ_RE_EST_1 -154 0x3000 //TX_MIN_EQ_RE_EST_2 -155 0x3000 //TX_MIN_EQ_RE_EST_3 -156 0x3000 //TX_MIN_EQ_RE_EST_4 -157 0x3000 //TX_MIN_EQ_RE_EST_5 -158 0x3000 //TX_MIN_EQ_RE_EST_6 +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x7800 //TX_MIN_EQ_RE_EST_8 -161 0x7800 //TX_MIN_EQ_RE_EST_9 -162 0x7800 //TX_MIN_EQ_RE_EST_10 -163 0x7800 //TX_MIN_EQ_RE_EST_11 -164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x3000 //TX_LAMBDA_CB_NLE +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x6000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N +169 0x0260 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0100 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -13555,9 +10986,9 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x7FF0 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 +197 0x7530 //TX_DTD_THR1_0 +198 0x7530 //TX_DTD_THR1_1 +199 0x6978 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 @@ -13571,8 +11002,8 @@ 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x36B0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR +213 0x0FA0 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO @@ -13581,18 +11012,18 @@ 220 0x7FFF //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x5014 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x7FFF //TX_B_POST_FILT_ECHO_L +225 0x2328 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x6000 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x2328 //TX_RATIO_DT_L0_TH_HIGH +234 0x2710 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -13602,19 +11033,19 @@ 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFA00 //TX_THR_SN_EST_3 +244 0xFD00 //TX_THR_SN_EST_2 +245 0xFC00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0000 //TX_DELTA_THR_SN_EST_3 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0100 //TX_DELTA_THR_SN_EST_6 +256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -13632,20 +11063,20 @@ 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x2000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x003C //TX_NS_LVL_CTRL_1 -283 0x0024 //TX_NS_LVL_CTRL_2 -284 0x003C //TX_NS_LVL_CTRL_3 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x000C //TX_NS_LVL_CTRL_2 +284 0x001A //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x003C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x0020 //TX_MIN_GAIN_S_0 290 0x0020 //TX_MIN_GAIN_S_1 @@ -13655,16 +11086,16 @@ 294 0x0020 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 296 0x0020 //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP +297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 +301 0x2000 //TX_SNRI_SUP_1 +302 0x3000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x2000 //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -13673,20 +11104,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7FFF //TX_A_POST_FILT_S_0 -315 0x7FFF //TX_A_POST_FILT_S_1 -316 0x7FFF //TX_A_POST_FILT_S_2 -317 0x7FFF //TX_A_POST_FILT_S_3 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 318 0x7FFF //TX_A_POST_FILT_S_4 319 0x7FFF //TX_A_POST_FILT_S_5 -320 0x7FFF //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x6000 //TX_B_POST_FILT_1 -324 0x6000 //TX_B_POST_FILT_2 +324 0x7000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 +328 0x6000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -13697,7 +11128,7 @@ 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7F00 //TX_LAMBDA_PFILT -339 0x7F00 //TX_LAMBDA_PFILT_S_0 +339 0x7400 //TX_LAMBDA_PFILT_S_0 340 0x7F00 //TX_LAMBDA_PFILT_S_1 341 0x7F00 //TX_LAMBDA_PFILT_S_2 342 0x7F00 //TX_LAMBDA_PFILT_S_3 @@ -13705,8 +11136,8 @@ 344 0x7F00 //TX_LAMBDA_PFILT_S_5 345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7F00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER +347 0x01F4 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG @@ -13714,9 +11145,9 @@ 353 0x0040 //TX_DT_BINVAD_TH_0 354 0x0040 //TX_DT_BINVAD_TH_1 355 0x0100 //TX_DT_BINVAD_TH_2 -356 0x0100 //TX_DT_BINVAD_TH_3 +356 0x2000 //TX_DT_BINVAD_TH_3 357 0x36B0 //TX_DT_BINVAD_ENDF -358 0x0200 //TX_C_POST_FLT_DT +358 0x1000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0140 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG @@ -13728,11 +11159,11 @@ 367 0x0050 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 +370 0x0FA0 //TX_NOISE_TH_1 371 0x01F4 //TX_NOISE_TH_2 -372 0x36B0 //TX_NOISE_TH_3 +372 0x300C //TX_NOISE_TH_3 373 0x2710 //TX_NOISE_TH_4 -374 0x2CEC //TX_NOISE_TH_5 +374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 @@ -13755,11 +11186,11 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0005 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST @@ -13767,8 +11198,8 @@ 406 0x0050 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x4000 //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL +409 0x0200 //TX_METAL_RTO_THR +410 0x07D0 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 @@ -13882,10 +11313,10 @@ 521 0x3A98 //TX_GSC_RTOL_TH 522 0x3A98 //TX_GSC_RTOH_TH 523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -13903,44 +11334,44 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 -571 0x4B4B //TX_FDEQ_GAIN_4 -572 0x4B4E //TX_FDEQ_GAIN_5 -573 0x4E5E //TX_FDEQ_GAIN_6 -574 0x584E //TX_FDEQ_GAIN_7 -575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x4E45 //TX_FDEQ_GAIN_9 -577 0x494A //TX_FDEQ_GAIN_10 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E58 //TX_FDEQ_GAIN_6 +574 0x565E //TX_FDEQ_GAIN_7 +575 0x484E //TX_FDEQ_GAIN_8 +576 0x4E4C //TX_FDEQ_GAIN_9 +577 0x4A4A //TX_FDEQ_GAIN_10 578 0x534D //TX_FDEQ_GAIN_11 -579 0x5C5C //TX_FDEQ_GAIN_12 -580 0x5F77 //TX_FDEQ_GAIN_13 -581 0x788F //TX_FDEQ_GAIN_14 -582 0x929A //TX_FDEQ_GAIN_15 +579 0x6050 //TX_FDEQ_GAIN_12 +580 0x585C //TX_FDEQ_GAIN_13 +581 0x5C70 //TX_FDEQ_GAIN_14 +582 0x7880 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -14031,16 +11462,16 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x494A //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4B //TX_PREEQ_GAIN_MIC1_10 -677 0x4B48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4D4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4A48 //TX_PREEQ_GAIN_MIC1_13 -680 0x4840 //TX_PREEQ_GAIN_MIC1_14 -681 0x3434 //TX_PREEQ_GAIN_MIC1_15 -682 0x3C48 //TX_PREEQ_GAIN_MIC1_16 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -14079,16 +11510,16 @@ 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x484A //TX_PREEQ_GAIN_MIC2_6 -722 0x4B4D //TX_PREEQ_GAIN_MIC2_7 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 724 0x5051 //TX_PREEQ_GAIN_MIC2_9 -725 0x5253 //TX_PREEQ_GAIN_MIC2_10 -726 0x5456 //TX_PREEQ_GAIN_MIC2_11 -727 0x5251 //TX_PREEQ_GAIN_MIC2_12 -728 0x4F48 //TX_PREEQ_GAIN_MIC2_13 -729 0x423C //TX_PREEQ_GAIN_MIC2_14 -730 0x3C48 //TX_PREEQ_GAIN_MIC2_15 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 @@ -14128,12 +11559,12 @@ 767 0x0050 //TX_MIC_CALIBRATION_2 768 0x0050 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 +770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 -775 0x0000 //TX_GAIN_LIMIT_2 +775 0x000F //TX_GAIN_LIMIT_2 776 0x0000 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP @@ -14174,19 +11605,19 @@ 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -14224,7 +11655,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0E21 //TX_TDDRC_DRC_GAIN +866 0x13F4 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -14247,88 +11678,114 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK +891 0x6000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02F0 //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME +903 0x0009 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +908 0x7FD0 //TX_MICMUTE_EAD_THR +909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +911 0x7DFA //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 +913 0x7FDA //TX_DTD_THR1_MICMUTE_2 +914 0x7EF4 //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N +922 0x3E80 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x3E80 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x0014 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x3BF6 //TX_TFMASKM4_2_DT_THR +945 0x2FA8 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x206C //RX_RECVFUNC_MODE_0 +0 0x247C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA @@ -14343,39 +11800,39 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5555 //RX_FDEQ_GAIN_9 -49 0x5052 //RX_FDEQ_GAIN_10 -50 0x5453 //RX_FDEQ_GAIN_11 -51 0x514E //RX_FDEQ_GAIN_12 -52 0x4F59 //RX_FDEQ_GAIN_13 -53 0x6C76 //RX_FDEQ_GAIN_14 -54 0x787B //RX_FDEQ_GAIN_15 +39 0x847C //RX_FDEQ_GAIN_0 +40 0x5A56 //RX_FDEQ_GAIN_1 +41 0x6266 //RX_FDEQ_GAIN_2 +42 0x6E7A //RX_FDEQ_GAIN_3 +43 0x8678 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x706E //RX_FDEQ_GAIN_6 +46 0x6C64 //RX_FDEQ_GAIN_7 +47 0x5C6A //RX_FDEQ_GAIN_8 +48 0x6268 //RX_FDEQ_GAIN_9 +49 0x6462 //RX_FDEQ_GAIN_10 +50 0x646E //RX_FDEQ_GAIN_11 +51 0x6860 //RX_FDEQ_GAIN_12 +52 0x646A //RX_FDEQ_GAIN_13 +53 0x7478 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -14384,22 +11841,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0105 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -14433,24 +11890,24 @@ 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x0CE0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x03FC //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL +126 0x13E0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x1000 //RX_MAX_G_FP +129 0x0058 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -14480,45 +11937,45 @@ 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5555 //RX_FDEQ_GAIN_9 -49 0x5052 //RX_FDEQ_GAIN_10 -50 0x5453 //RX_FDEQ_GAIN_11 -51 0x514E //RX_FDEQ_GAIN_12 -52 0x4F59 //RX_FDEQ_GAIN_13 -53 0x6C76 //RX_FDEQ_GAIN_14 -54 0x787B //RX_FDEQ_GAIN_15 +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -14527,22 +11984,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -14575,49 +12032,49 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL +129 0x0056 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5555 //RX_FDEQ_GAIN_9 -49 0x5052 //RX_FDEQ_GAIN_10 -50 0x5453 //RX_FDEQ_GAIN_11 -51 0x514E //RX_FDEQ_GAIN_12 -52 0x4F59 //RX_FDEQ_GAIN_13 -53 0x6C76 //RX_FDEQ_GAIN_14 -54 0x787B //RX_FDEQ_GAIN_15 +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -14626,22 +12083,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -14674,49 +12131,49 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001D //RX_SPK_VOL +129 0x007D //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5555 //RX_FDEQ_GAIN_9 -49 0x5052 //RX_FDEQ_GAIN_10 -50 0x5453 //RX_FDEQ_GAIN_11 -51 0x514E //RX_FDEQ_GAIN_12 -52 0x4F59 //RX_FDEQ_GAIN_13 -53 0x6C76 //RX_FDEQ_GAIN_14 -54 0x787B //RX_FDEQ_GAIN_15 +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -14725,22 +12182,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -14773,49 +12230,49 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0029 //RX_SPK_VOL +129 0x00B5 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5555 //RX_FDEQ_GAIN_9 -49 0x5052 //RX_FDEQ_GAIN_10 -50 0x5453 //RX_FDEQ_GAIN_11 -51 0x514E //RX_FDEQ_GAIN_12 -52 0x4F59 //RX_FDEQ_GAIN_13 -53 0x6C76 //RX_FDEQ_GAIN_14 -54 0x787B //RX_FDEQ_GAIN_15 +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -14824,22 +12281,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -14872,49 +12329,49 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0039 //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 +112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x016A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5555 //RX_FDEQ_GAIN_9 -49 0x5052 //RX_FDEQ_GAIN_10 -50 0x5453 //RX_FDEQ_GAIN_11 -51 0x514E //RX_FDEQ_GAIN_12 -52 0x4F59 //RX_FDEQ_GAIN_13 -53 0x6C76 //RX_FDEQ_GAIN_14 -54 0x787B //RX_FDEQ_GAIN_15 +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -14923,22 +12380,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -14971,49 +12428,49 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005F //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 +112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x022A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5555 //RX_FDEQ_GAIN_9 -49 0x5052 //RX_FDEQ_GAIN_10 -50 0x5453 //RX_FDEQ_GAIN_11 -51 0x514E //RX_FDEQ_GAIN_12 -52 0x4F59 //RX_FDEQ_GAIN_13 -53 0x6C76 //RX_FDEQ_GAIN_14 -54 0x787B //RX_FDEQ_GAIN_15 +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x8586 //RX_FDEQ_GAIN_4 +44 0x8682 //RX_FDEQ_GAIN_5 +45 0x7459 //RX_FDEQ_GAIN_6 +46 0x4B4A //RX_FDEQ_GAIN_7 +47 0x4C58 //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x5A48 //RX_FDEQ_GAIN_10 +50 0x487C //RX_FDEQ_GAIN_11 +51 0x685A //RX_FDEQ_GAIN_12 +52 0x5A60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x9090 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -15022,22 +12479,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -15070,49 +12527,49 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x008E //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x038C //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5555 //RX_FDEQ_GAIN_9 -49 0x5052 //RX_FDEQ_GAIN_10 -50 0x5453 //RX_FDEQ_GAIN_11 -51 0x514E //RX_FDEQ_GAIN_12 -52 0x4F59 //RX_FDEQ_GAIN_13 -53 0x6C76 //RX_FDEQ_GAIN_14 -54 0x787B //RX_FDEQ_GAIN_15 +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x8586 //RX_FDEQ_GAIN_4 +44 0x8682 //RX_FDEQ_GAIN_5 +45 0x7459 //RX_FDEQ_GAIN_6 +46 0x4B4A //RX_FDEQ_GAIN_7 +47 0x4C58 //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x5A48 //RX_FDEQ_GAIN_10 +50 0x487C //RX_FDEQ_GAIN_11 +51 0x685A //RX_FDEQ_GAIN_12 +52 0x5A60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x9090 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -15121,22 +12578,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -15172,14 +12629,14 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x027C //RX_RECVFUNC_MODE_0 +157 0x247C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA @@ -15194,39 +12651,39 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST -181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x847C //RX_FDEQ_GAIN_0 +197 0x5A56 //RX_FDEQ_GAIN_1 +198 0x6266 //RX_FDEQ_GAIN_2 +199 0x6E7A //RX_FDEQ_GAIN_3 +200 0x8678 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x706E //RX_FDEQ_GAIN_6 +203 0x6C64 //RX_FDEQ_GAIN_7 +204 0x5C6A //RX_FDEQ_GAIN_8 +205 0x6268 //RX_FDEQ_GAIN_9 +206 0x6462 //RX_FDEQ_GAIN_10 +207 0x646E //RX_FDEQ_GAIN_11 +208 0x6860 //RX_FDEQ_GAIN_12 +209 0x646A //RX_FDEQ_GAIN_13 +210 0x7478 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -15235,22 +12692,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0105 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -15284,24 +12741,24 @@ 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x0CE0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x03FC //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0014 //RX_SPK_VOL +283 0x13E0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x1000 //RX_MAX_G_FP +286 0x0058 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH @@ -15331,45 +12788,45 @@ 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -15378,22 +12835,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -15426,49 +12883,49 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0014 //RX_SPK_VOL +286 0x0056 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -15477,22 +12934,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -15525,49 +12982,49 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001D //RX_SPK_VOL +286 0x007D //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -15576,22 +13033,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -15624,49 +13081,49 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0029 //RX_SPK_VOL +286 0x00B5 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -15675,22 +13132,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -15723,49 +13180,49 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0039 //RX_SPK_VOL +286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 +269 0x0000 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x016A //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x5454 //RX_FDEQ_GAIN_4 -201 0x7C54 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -15774,22 +13231,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -15822,49 +13279,49 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005F //RX_SPK_VOL +286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 +269 0x0000 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x022A //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x5454 //RX_FDEQ_GAIN_4 -201 0x7C54 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x8586 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7459 //RX_FDEQ_GAIN_6 +203 0x4B4A //RX_FDEQ_GAIN_7 +204 0x4C58 //RX_FDEQ_GAIN_8 +205 0x4C4C //RX_FDEQ_GAIN_9 +206 0x5A48 //RX_FDEQ_GAIN_10 +207 0x487C //RX_FDEQ_GAIN_11 +208 0x685A //RX_FDEQ_GAIN_12 +209 0x5A60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x9090 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -15873,22 +13330,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -15921,49 +13378,49 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x008E //RX_SPK_VOL +286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +270 0x0006 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x038C //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x5454 //RX_FDEQ_GAIN_4 -201 0x7C54 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x8586 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7459 //RX_FDEQ_GAIN_6 +203 0x4B4A //RX_FDEQ_GAIN_7 +204 0x4C58 //RX_FDEQ_GAIN_8 +205 0x4C4C //RX_FDEQ_GAIN_9 +206 0x5A48 //RX_FDEQ_GAIN_10 +207 0x487C //RX_FDEQ_GAIN_11 +208 0x685A //RX_FDEQ_GAIN_12 +209 0x5A60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x9090 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -15972,22 +13429,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -16023,17 +13480,16 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSFREE-HANDFREE-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM1-FB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x4B7C //TX_SENDFUNC_MODE_0 +3 0x6B74 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -16049,7 +13505,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x0096 //TX_DIST2REF1 22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -16058,9 +13514,9 @@ 27 0x0A19 //TX_PGA_0 28 0x0A19 //TX_PGA_1 29 0x0A19 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -16166,11 +13622,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -16425,7 +13881,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -16552,10 +14008,10 @@ 521 0x3A98 //TX_GSC_RTOL_TH 522 0x3A98 //TX_GSC_RTOH_TH 523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -16573,26 +14029,26 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -16700,15 +14156,15 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4645 //TX_PREEQ_GAIN_MIC1_6 -673 0x4442 //TX_PREEQ_GAIN_MIC1_7 -674 0x4140 //TX_PREEQ_GAIN_MIC1_8 -675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 -676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 -677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 -678 0x3938 //TX_PREEQ_GAIN_MIC1_12 -679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 -680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 @@ -16718,23 +14174,23 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0809 //TX_PREEQ_BIN_MIC1_7 -698 0x0A0A //TX_PREEQ_BIN_MIC1_8 -699 0x0C10 //TX_PREEQ_BIN_MIC1_9 -700 0x1013 //TX_PREEQ_BIN_MIC1_10 -701 0x1414 //TX_PREEQ_BIN_MIC1_11 -702 0x261E //TX_PREEQ_BIN_MIC1_12 -703 0x1E14 //TX_PREEQ_BIN_MIC1_13 -704 0x1414 //TX_PREEQ_BIN_MIC1_14 -705 0x2814 //TX_PREEQ_BIN_MIC1_15 -706 0x4000 //TX_PREEQ_BIN_MIC1_16 +690 0x1812 //TX_PREEQ_BIN_MIC1_0 +691 0x0A0A //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x080A //TX_PREEQ_BIN_MIC1_3 +694 0x0B09 //TX_PREEQ_BIN_MIC1_4 +695 0x0A06 //TX_PREEQ_BIN_MIC1_5 +696 0x0606 //TX_PREEQ_BIN_MIC1_6 +697 0x0605 //TX_PREEQ_BIN_MIC1_7 +698 0x050A //TX_PREEQ_BIN_MIC1_8 +699 0x1505 //TX_PREEQ_BIN_MIC1_9 +700 0x0506 //TX_PREEQ_BIN_MIC1_10 +701 0x0615 //TX_PREEQ_BIN_MIC1_11 +702 0x1516 //TX_PREEQ_BIN_MIC1_12 +703 0x2021 //TX_PREEQ_BIN_MIC1_13 +704 0x2021 //TX_PREEQ_BIN_MIC1_14 +705 0x2021 //TX_PREEQ_BIN_MIC1_15 +706 0x0800 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -16851,12 +14307,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -16934,7 +14390,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -16961,35 +14417,61 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX 0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -17016,8 +14498,8 @@ 22 0x0014 //RX_NS_LVL_CTRL 23 0xF400 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +25 0x00C8 //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -17842,163 +15324,163 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x006C //_ -158 0x0000 //_ -159 0x0004 //_ -160 0x0004 //_ -161 0x000A //_ -162 0x0000 //_ -163 0x4000 //_ -164 0x4000 //_ -165 0x4000 //_ -166 0x4000 //_ -167 0x065B //_ -168 0x7E56 //_ -169 0x4000 //_ -170 0x7800 //_ -171 0x7000 //_ -172 0x6000 //_ -173 0x0008 //_ -174 0x0003 //_ -175 0x0100 //_ -176 0x0020 //_ -177 0x0400 //_ -178 0x000C //_ -179 0x0014 //_ -180 0xF400 //_ -181 0x7E00 //_ -182 0x000A //_ -183 0x0190 //_ -184 0x7EB8 //_ -185 0x7EB8 //_ -186 0x7EB8 //_ -187 0x0002 //_ -188 0x0800 //_ -189 0x7EB8 //_ -190 0x7FFF //_ -191 0x0800 //_ -192 0x199A //_ -193 0x0000 //_ -194 0x4000 //_ -195 0x0020 //_ -196 0x4848 //_ -197 0x4848 //_ -198 0x4848 //_ -199 0x4870 //_ -200 0x4848 //_ -201 0x4848 //_ -202 0x4850 //_ -203 0x485C //_ -204 0x5C60 //_ -205 0x685C //_ -206 0x5640 //_ -207 0x4040 //_ -208 0x5C58 //_ -209 0x5C60 //_ -210 0x6060 //_ -211 0x6060 //_ -212 0x4848 //_ -213 0x4848 //_ -214 0x4848 //_ -215 0x4848 //_ -216 0x4848 //_ -217 0x4848 //_ -218 0x4848 //_ -219 0x4848 //_ -220 0x0202 //_ -221 0x0203 //_ -222 0x0303 //_ -223 0x0402 //_ -224 0x0504 //_ -225 0x0209 //_ -226 0x0808 //_ -227 0x090A //_ -228 0x0B0C //_ -229 0x0D0E //_ -230 0x1013 //_ -231 0x1719 //_ -232 0x1B1E //_ -233 0x1E1E //_ -234 0x1E28 //_ -235 0x282C //_ -236 0x0000 //_ -237 0x0000 //_ -238 0x0000 //_ -239 0x0000 //_ -240 0x0000 //_ -241 0x0000 //_ -242 0x0000 //_ -243 0x0000 //_ -244 0x4000 //_ -245 0x0320 //_ -246 0x0018 //_ -247 0x0030 //_ -248 0x0050 //_ -249 0x0080 //_ -250 0x0004 //_ -251 0x5000 //_ -252 0x5000 //_ -253 0x2000 //_ -254 0x5000 //_ -255 0x6400 //_ -256 0x6400 //_ -257 0x2000 //_ -258 0x5000 //_ -259 0x4000 //_ -260 0x4000 //_ -261 0x4000 //_ -262 0x4000 //_ -263 0x7FFF //_ -264 0x7FFF //_ -265 0x7FFF //_ -266 0x7FFF //_ -267 0x0000 //_ -268 0x0002 //_ -269 0x0001 //_ -270 0x0002 //_ -271 0x1800 //_ -272 0x1800 //_ -273 0x6000 //_ -274 0x6E00 //_ -275 0x4000 //_ -276 0x7EB8 //_ -277 0x0000 //_ -278 0x199A //_ -279 0x0001 //_ -280 0x0CCD //_ -281 0x03C3 //_ -282 0x7C00 //_ -283 0x2000 //_ -284 0x2000 //_ -285 0x0080 //_ -286 0x0012 //_ -287 0x0000 //_ -288 0x0000 //_ -289 0x3000 //_ -290 0x3000 //_ -291 0x1800 //_ -292 0x1000 //_ -293 0x04CD //_ -294 0x0F33 //_ -295 0x7333 //_ -296 0x199A //_ -297 0x7333 //_ -298 0x0004 //_ -299 0x6CCD //_ -300 0x799A //_ -301 0x001E //_ -302 0x3000 //_ -303 0x3200 //_ -304 0x2000 //_ -305 0x2000 //_ -306 0x2000 //_ -307 0x2000 //_ -308 0x2000 //_ -309 0x2000 //_ -310 0x2000 //_ -311 0x0000 //_ -312 0x0000 //_ -313 0x0000 //_ +157 0x006C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x065B //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x00C8 //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x4000 //RX_TDDRC_ALPHA_UP_1 164 0x4000 //RX_TDDRC_ALPHA_UP_2 @@ -18693,3 +16175,13478 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 +#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM2-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6F7C //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x6000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0260 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0100 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7530 //TX_DTD_THR1_0 +198 0x7530 //TX_DTD_THR1_1 +199 0x6978 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0FA0 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x2328 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x6000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x2710 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFD00 //TX_THR_SN_EST_2 +245 0xFC00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x000C //TX_NS_LVL_CTRL_2 +284 0x001A //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x001A //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x7FFF //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x0000 //TX_A_POST_FILT_0 +313 0x0000 //TX_A_POST_FILT_1 +314 0x0000 //TX_A_POST_FILT_S_0 +315 0x0000 //TX_A_POST_FILT_S_1 +316 0x0000 //TX_A_POST_FILT_S_2 +317 0x0000 //TX_A_POST_FILT_S_3 +318 0x0000 //TX_A_POST_FILT_S_4 +319 0x0000 //TX_A_POST_FILT_S_5 +320 0x0000 //TX_A_POST_FILT_S_6 +321 0x0000 //TX_A_POST_FILT_S_7 +322 0x0000 //TX_B_POST_FILT_0 +323 0x0000 //TX_B_POST_FILT_1 +324 0x0000 //TX_B_POST_FILT_2 +325 0x0000 //TX_B_POST_FILT_3 +326 0x0000 //TX_B_POST_FILT_4 +327 0x0000 //TX_B_POST_FILT_5 +328 0x0000 //TX_B_POST_FILT_6 +329 0x0000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7400 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x01F4 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x2000 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0FA0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x300C //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0005 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0200 //TX_METAL_RTO_THR +410 0x07D0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E58 //TX_FDEQ_GAIN_6 +574 0x565E //TX_FDEQ_GAIN_7 +575 0x484E //TX_FDEQ_GAIN_8 +576 0x4E4C //TX_FDEQ_GAIN_9 +577 0x4A4A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x6050 //TX_FDEQ_GAIN_12 +580 0x585C //TX_FDEQ_GAIN_13 +581 0x5C70 //TX_FDEQ_GAIN_14 +582 0x7880 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1000 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x13F4 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0x8000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x6000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02F0 //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0009 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7FD0 //TX_MICMUTE_EAD_THR +909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7DFA //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 +913 0x7FDA //TX_DTD_THR1_MICMUTE_2 +914 0x7EF4 //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x3E80 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x3E80 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x0014 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x3BF6 //TX_TFMASKM4_2_DT_THR +945 0x2FA8 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x247C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x847C //RX_FDEQ_GAIN_0 +40 0x5A56 //RX_FDEQ_GAIN_1 +41 0x6266 //RX_FDEQ_GAIN_2 +42 0x6E7A //RX_FDEQ_GAIN_3 +43 0x8678 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x706E //RX_FDEQ_GAIN_6 +46 0x6C64 //RX_FDEQ_GAIN_7 +47 0x5C6A //RX_FDEQ_GAIN_8 +48 0x6268 //RX_FDEQ_GAIN_9 +49 0x6462 //RX_FDEQ_GAIN_10 +50 0x646E //RX_FDEQ_GAIN_11 +51 0x6860 //RX_FDEQ_GAIN_12 +52 0x646A //RX_FDEQ_GAIN_13 +53 0x7478 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0105 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x0CE0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03FC //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x1000 //RX_MAX_G_FP +129 0x0058 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0056 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x007D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00B5 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x016A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x022A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x8586 //RX_FDEQ_GAIN_4 +44 0x8682 //RX_FDEQ_GAIN_5 +45 0x7459 //RX_FDEQ_GAIN_6 +46 0x4B4A //RX_FDEQ_GAIN_7 +47 0x4C58 //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x5A48 //RX_FDEQ_GAIN_10 +50 0x487C //RX_FDEQ_GAIN_11 +51 0x685A //RX_FDEQ_GAIN_12 +52 0x5A60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x9090 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x038C //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x8586 //RX_FDEQ_GAIN_4 +44 0x8682 //RX_FDEQ_GAIN_5 +45 0x7459 //RX_FDEQ_GAIN_6 +46 0x4B4A //RX_FDEQ_GAIN_7 +47 0x4C58 //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x5A48 //RX_FDEQ_GAIN_10 +50 0x487C //RX_FDEQ_GAIN_11 +51 0x685A //RX_FDEQ_GAIN_12 +52 0x5A60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x9090 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x247C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x847C //RX_FDEQ_GAIN_0 +197 0x5A56 //RX_FDEQ_GAIN_1 +198 0x6266 //RX_FDEQ_GAIN_2 +199 0x6E7A //RX_FDEQ_GAIN_3 +200 0x8678 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x706E //RX_FDEQ_GAIN_6 +203 0x6C64 //RX_FDEQ_GAIN_7 +204 0x5C6A //RX_FDEQ_GAIN_8 +205 0x6268 //RX_FDEQ_GAIN_9 +206 0x6462 //RX_FDEQ_GAIN_10 +207 0x646E //RX_FDEQ_GAIN_11 +208 0x6860 //RX_FDEQ_GAIN_12 +209 0x646A //RX_FDEQ_GAIN_13 +210 0x7478 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0105 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x0CE0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03FC //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x1000 //RX_MAX_G_FP +286 0x0058 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0056 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x007D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x00B5 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x016A //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x022A //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x8586 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7459 //RX_FDEQ_GAIN_6 +203 0x4B4A //RX_FDEQ_GAIN_7 +204 0x4C58 //RX_FDEQ_GAIN_8 +205 0x4C4C //RX_FDEQ_GAIN_9 +206 0x5A48 //RX_FDEQ_GAIN_10 +207 0x487C //RX_FDEQ_GAIN_11 +208 0x685A //RX_FDEQ_GAIN_12 +209 0x5A60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x9090 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0006 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x038C //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x8586 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7459 //RX_FDEQ_GAIN_6 +203 0x4B4A //RX_FDEQ_GAIN_7 +204 0x4C58 //RX_FDEQ_GAIN_8 +205 0x4C4C //RX_FDEQ_GAIN_9 +206 0x5A48 //RX_FDEQ_GAIN_10 +207 0x487C //RX_FDEQ_GAIN_11 +208 0x685A //RX_FDEQ_GAIN_12 +209 0x5A60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x9090 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM2-FB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6B5C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0A19 //TX_PGA_0 +28 0x0A19 //TX_PGA_1 +29 0x0A19 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0063 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x5048 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x5B5B //TX_FDEQ_GAIN_10 +578 0x737B //TX_FDEQ_GAIN_11 +579 0x7B9A //TX_FDEQ_GAIN_12 +580 0x9AC4 //TX_FDEQ_GAIN_13 +581 0xC4C4 //TX_FDEQ_GAIN_14 +582 0xC4C4 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x1812 //TX_PREEQ_BIN_MIC1_0 +691 0x0A0A //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x080A //TX_PREEQ_BIN_MIC1_3 +694 0x0B09 //TX_PREEQ_BIN_MIC1_4 +695 0x0A06 //TX_PREEQ_BIN_MIC1_5 +696 0x0606 //TX_PREEQ_BIN_MIC1_6 +697 0x0605 //TX_PREEQ_BIN_MIC1_7 +698 0x050A //TX_PREEQ_BIN_MIC1_8 +699 0x1505 //TX_PREEQ_BIN_MIC1_9 +700 0x0506 //TX_PREEQ_BIN_MIC1_10 +701 0x0615 //TX_PREEQ_BIN_MIC1_11 +702 0x1516 //TX_PREEQ_BIN_MIC1_12 +703 0x2021 //TX_PREEQ_BIN_MIC1_13 +704 0x2021 //TX_PREEQ_BIN_MIC1_14 +705 0x2021 //TX_PREEQ_BIN_MIC1_15 +706 0x0800 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0004 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0FDA //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +10 0x065B //RX_PGA +11 0x7E56 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF400 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x00C8 //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0025 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0034 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0074 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x065B //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x00C8 //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-RESERVE1-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6F54 //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x6000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0260 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0100 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7530 //TX_DTD_THR1_0 +198 0x7530 //TX_DTD_THR1_1 +199 0x6978 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0FA0 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x2328 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x6000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x2710 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFD00 //TX_THR_SN_EST_2 +245 0xFC00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x000C //TX_NS_LVL_CTRL_2 +284 0x001A //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x001A //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x4000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x2000 //TX_SNRI_SUP_1 +302 0x3000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x2000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x7000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7400 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x01F4 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x2000 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0FA0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x300C //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0005 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0200 //TX_METAL_RTO_THR +410 0x07D0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E58 //TX_FDEQ_GAIN_6 +574 0x565E //TX_FDEQ_GAIN_7 +575 0x484E //TX_FDEQ_GAIN_8 +576 0x4E4C //TX_FDEQ_GAIN_9 +577 0x4A4A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x6050 //TX_FDEQ_GAIN_12 +580 0x585C //TX_FDEQ_GAIN_13 +581 0x5C70 //TX_FDEQ_GAIN_14 +582 0x7880 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1000 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x13F4 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0x8000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x6000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02F0 //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0009 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7FD0 //TX_MICMUTE_EAD_THR +909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7DFA //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 +913 0x7FDA //TX_DTD_THR1_MICMUTE_2 +914 0x7EF4 //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x3E80 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x3E80 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x0014 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x3BF6 //TX_TFMASKM4_2_DT_THR +945 0x2FA8 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x247C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x847C //RX_FDEQ_GAIN_0 +40 0x5A56 //RX_FDEQ_GAIN_1 +41 0x6266 //RX_FDEQ_GAIN_2 +42 0x6E7A //RX_FDEQ_GAIN_3 +43 0x8678 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x706E //RX_FDEQ_GAIN_6 +46 0x6C64 //RX_FDEQ_GAIN_7 +47 0x5C6A //RX_FDEQ_GAIN_8 +48 0x6268 //RX_FDEQ_GAIN_9 +49 0x6462 //RX_FDEQ_GAIN_10 +50 0x646E //RX_FDEQ_GAIN_11 +51 0x6860 //RX_FDEQ_GAIN_12 +52 0x646A //RX_FDEQ_GAIN_13 +53 0x7478 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0105 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x0CE0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03FC //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x1000 //RX_MAX_G_FP +129 0x0058 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0056 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x007D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00B5 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x016A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x022A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x8586 //RX_FDEQ_GAIN_4 +44 0x8682 //RX_FDEQ_GAIN_5 +45 0x7459 //RX_FDEQ_GAIN_6 +46 0x4B4A //RX_FDEQ_GAIN_7 +47 0x4C58 //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x5A48 //RX_FDEQ_GAIN_10 +50 0x487C //RX_FDEQ_GAIN_11 +51 0x685A //RX_FDEQ_GAIN_12 +52 0x5A60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x9090 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x038C //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x8586 //RX_FDEQ_GAIN_4 +44 0x8682 //RX_FDEQ_GAIN_5 +45 0x7459 //RX_FDEQ_GAIN_6 +46 0x4B4A //RX_FDEQ_GAIN_7 +47 0x4C58 //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x5A48 //RX_FDEQ_GAIN_10 +50 0x487C //RX_FDEQ_GAIN_11 +51 0x685A //RX_FDEQ_GAIN_12 +52 0x5A60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x9090 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x247C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x847C //RX_FDEQ_GAIN_0 +197 0x5A56 //RX_FDEQ_GAIN_1 +198 0x6266 //RX_FDEQ_GAIN_2 +199 0x6E7A //RX_FDEQ_GAIN_3 +200 0x8678 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x706E //RX_FDEQ_GAIN_6 +203 0x6C64 //RX_FDEQ_GAIN_7 +204 0x5C6A //RX_FDEQ_GAIN_8 +205 0x6268 //RX_FDEQ_GAIN_9 +206 0x6462 //RX_FDEQ_GAIN_10 +207 0x646E //RX_FDEQ_GAIN_11 +208 0x6860 //RX_FDEQ_GAIN_12 +209 0x646A //RX_FDEQ_GAIN_13 +210 0x7478 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0105 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x0CE0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03FC //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x1000 //RX_MAX_G_FP +286 0x0058 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0056 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x007D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x00B5 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x016A //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x022A //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x8586 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7459 //RX_FDEQ_GAIN_6 +203 0x4B4A //RX_FDEQ_GAIN_7 +204 0x4C58 //RX_FDEQ_GAIN_8 +205 0x4C4C //RX_FDEQ_GAIN_9 +206 0x5A48 //RX_FDEQ_GAIN_10 +207 0x487C //RX_FDEQ_GAIN_11 +208 0x685A //RX_FDEQ_GAIN_12 +209 0x5A60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x9090 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0006 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x038C //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x8586 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7459 //RX_FDEQ_GAIN_6 +203 0x4B4A //RX_FDEQ_GAIN_7 +204 0x4C58 //RX_FDEQ_GAIN_8 +205 0x4C4C //RX_FDEQ_GAIN_9 +206 0x5A48 //RX_FDEQ_GAIN_10 +207 0x487C //RX_FDEQ_GAIN_11 +208 0x685A //RX_FDEQ_GAIN_12 +209 0x5A60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x9090 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-RESERVE1-FB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6B54 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0A19 //TX_PGA_0 +28 0x0A19 //TX_PGA_1 +29 0x0A19 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0063 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x5048 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x5B5B //TX_FDEQ_GAIN_10 +578 0x737B //TX_FDEQ_GAIN_11 +579 0x7B9A //TX_FDEQ_GAIN_12 +580 0x9AC4 //TX_FDEQ_GAIN_13 +581 0xC4C4 //TX_FDEQ_GAIN_14 +582 0xC4C4 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x484B //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x484C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4C //TX_PREEQ_GAIN_MIC0_11 +629 0x4038 //TX_PREEQ_GAIN_MIC0_12 +630 0x3838 //TX_PREEQ_GAIN_MIC0_13 +631 0x4840 //TX_PREEQ_GAIN_MIC0_14 +632 0x3848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x1812 //TX_PREEQ_BIN_MIC1_0 +691 0x0A0A //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x080A //TX_PREEQ_BIN_MIC1_3 +694 0x0B09 //TX_PREEQ_BIN_MIC1_4 +695 0x0A06 //TX_PREEQ_BIN_MIC1_5 +696 0x0606 //TX_PREEQ_BIN_MIC1_6 +697 0x0605 //TX_PREEQ_BIN_MIC1_7 +698 0x050A //TX_PREEQ_BIN_MIC1_8 +699 0x1505 //TX_PREEQ_BIN_MIC1_9 +700 0x0506 //TX_PREEQ_BIN_MIC1_10 +701 0x0615 //TX_PREEQ_BIN_MIC1_11 +702 0x1516 //TX_PREEQ_BIN_MIC1_12 +703 0x2021 //TX_PREEQ_BIN_MIC1_13 +704 0x2021 //TX_PREEQ_BIN_MIC1_14 +705 0x2021 //TX_PREEQ_BIN_MIC1_15 +706 0x0800 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0004 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0FDA //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +10 0x065B //RX_PGA +11 0x7E56 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF400 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x00C8 //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0025 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0034 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0074 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x065B //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x00C8 //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-RESERVE2-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6F7D //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x6000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0260 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0160 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF3 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x6CCC //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0FA0 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x0578 //TX_RATIO_DT_L_TH_HIGH +226 0x5528 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x6000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0190 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFD00 //TX_THR_SN_EST_2 +245 0xFC00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x000C //TX_NS_LVL_CTRL_2 +284 0x001A //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x001A //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x4000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x2000 //TX_SNRI_SUP_1 +302 0x3000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x2000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x7000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7400 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x01F4 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x2000 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0FA0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x300C //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0005 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0200 //TX_METAL_RTO_THR +410 0x07D0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E58 //TX_FDEQ_GAIN_6 +574 0x565E //TX_FDEQ_GAIN_7 +575 0x484E //TX_FDEQ_GAIN_8 +576 0x4E4C //TX_FDEQ_GAIN_9 +577 0x4A4A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x6050 //TX_FDEQ_GAIN_12 +580 0x585C //TX_FDEQ_GAIN_13 +581 0x5C70 //TX_FDEQ_GAIN_14 +582 0x7880 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0018 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x27D0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0x8000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x6000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02F0 //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0009 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7FD0 //TX_MICMUTE_EAD_THR +909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7DFA //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 +913 0x7FDA //TX_DTD_THR1_MICMUTE_2 +914 0x7EF4 //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x3E80 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x3E80 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x0014 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x36B0 //TX_TFMASKM4_2_DT_THR +945 0x6590 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x047C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x847C //RX_FDEQ_GAIN_0 +40 0x5A56 //RX_FDEQ_GAIN_1 +41 0x6266 //RX_FDEQ_GAIN_2 +42 0x6E7A //RX_FDEQ_GAIN_3 +43 0x8678 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x706E //RX_FDEQ_GAIN_6 +46 0x6C64 //RX_FDEQ_GAIN_7 +47 0x5C6A //RX_FDEQ_GAIN_8 +48 0x6268 //RX_FDEQ_GAIN_9 +49 0x6462 //RX_FDEQ_GAIN_10 +50 0x646E //RX_FDEQ_GAIN_11 +51 0x6860 //RX_FDEQ_GAIN_12 +52 0x646A //RX_FDEQ_GAIN_13 +53 0x7478 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0105 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x0CE0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03FC //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x1000 //RX_MAX_G_FP +129 0x0058 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0056 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x007D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00B5 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x016A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x022A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x8586 //RX_FDEQ_GAIN_4 +44 0x8682 //RX_FDEQ_GAIN_5 +45 0x7459 //RX_FDEQ_GAIN_6 +46 0x4B4A //RX_FDEQ_GAIN_7 +47 0x4C58 //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x5A48 //RX_FDEQ_GAIN_10 +50 0x487C //RX_FDEQ_GAIN_11 +51 0x685A //RX_FDEQ_GAIN_12 +52 0x5A60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x9090 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x038C //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x8586 //RX_FDEQ_GAIN_4 +44 0x8682 //RX_FDEQ_GAIN_5 +45 0x7459 //RX_FDEQ_GAIN_6 +46 0x4B4A //RX_FDEQ_GAIN_7 +47 0x4C58 //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x5A48 //RX_FDEQ_GAIN_10 +50 0x487C //RX_FDEQ_GAIN_11 +51 0x685A //RX_FDEQ_GAIN_12 +52 0x5A60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x9090 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x047C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x847C //RX_FDEQ_GAIN_0 +197 0x5A56 //RX_FDEQ_GAIN_1 +198 0x6266 //RX_FDEQ_GAIN_2 +199 0x6E7A //RX_FDEQ_GAIN_3 +200 0x8678 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x706E //RX_FDEQ_GAIN_6 +203 0x6C64 //RX_FDEQ_GAIN_7 +204 0x5C6A //RX_FDEQ_GAIN_8 +205 0x6268 //RX_FDEQ_GAIN_9 +206 0x6462 //RX_FDEQ_GAIN_10 +207 0x646E //RX_FDEQ_GAIN_11 +208 0x6860 //RX_FDEQ_GAIN_12 +209 0x646A //RX_FDEQ_GAIN_13 +210 0x7478 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0105 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x0CE0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03FC //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x1000 //RX_MAX_G_FP +286 0x0058 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0056 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x007D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x00B5 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x016A //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x022A //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x8586 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7459 //RX_FDEQ_GAIN_6 +203 0x4B4A //RX_FDEQ_GAIN_7 +204 0x4C58 //RX_FDEQ_GAIN_8 +205 0x4C4C //RX_FDEQ_GAIN_9 +206 0x5A48 //RX_FDEQ_GAIN_10 +207 0x487C //RX_FDEQ_GAIN_11 +208 0x685A //RX_FDEQ_GAIN_12 +209 0x5A60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x9090 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0006 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x038C //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x8586 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7459 //RX_FDEQ_GAIN_6 +203 0x4B4A //RX_FDEQ_GAIN_7 +204 0x4C58 //RX_FDEQ_GAIN_8 +205 0x4C4C //RX_FDEQ_GAIN_9 +206 0x5A48 //RX_FDEQ_GAIN_10 +207 0x487C //RX_FDEQ_GAIN_11 +208 0x685A //RX_FDEQ_GAIN_12 +209 0x5A60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x9090 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + diff --git a/audio/tegu/tuning/fortemedia/HEADSET.dat b/audio/tegu/tuning/fortemedia/HEADSET.dat index 22e3e3050da078c91a7c82edae51e90dcc2989e8..78df6fc747091239fd7c81ae7624ad1eded89716 100644 GIT binary patch delta 34391 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a/audio/tegu/tuning/fortemedia/HEADSET.mods b/audio/tegu/tuning/fortemedia/HEADSET.mods index ac10ce5..a3999d0 100644 --- a/audio/tegu/tuning/fortemedia/HEADSET.mods +++ b/audio/tegu/tuning/fortemedia/HEADSET.mods @@ -1,17 +1,18 @@ #PLATFORM_NAME gChip +#SINGLE_API_VER 1.4.2 #EXPORT_FLAG HEADSET -#SINGLE_API_VER 1.2.0 -#SAVE_TIME 2022-02-11 16:30:04 +#PARAM_MODE FULL +#SAVE_MODE 3 +#SAVE_TIME 2024-02-22 17:40:34 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB -#PARAM_MODE FULL #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 +3 0x2F68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG @@ -38,9 +39,9 @@ 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -146,11 +147,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -290,7 +291,7 @@ 279 0x0400 //TX_B_POST_FLT_0 280 0x0400 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 +282 0x0020 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 284 0x0014 //TX_NS_LVL_CTRL_3 285 0x0010 //TX_NS_LVL_CTRL_4 @@ -298,19 +299,19 @@ 287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000D //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0012 //TX_MIN_GAIN_S_2 +290 0x0008 //TX_MIN_GAIN_S_1 +291 0x000D //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 293 0x000D //TX_MIN_GAIN_S_4 294 0x000D //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x000D //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP +297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x5000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 +302 0x7000 //TX_SNRI_SUP_2 303 0x6000 //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 @@ -323,7 +324,7 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 +315 0x2000 //TX_A_POST_FILT_S_1 316 0x7000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 @@ -331,7 +332,7 @@ 320 0x7FFF //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 +323 0x1800 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 @@ -348,8 +349,8 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x6000 //TX_LAMBDA_PFILT_S_2 +340 0x7000 //TX_LAMBDA_PFILT_S_1 +341 0x7000 //TX_LAMBDA_PFILT_S_2 342 0x7C29 //TX_LAMBDA_PFILT_S_3 343 0x7C29 //TX_LAMBDA_PFILT_S_4 344 0x7C29 //TX_LAMBDA_PFILT_S_5 @@ -375,7 +376,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x003B //TX_NOISE_TH_0 +367 0x0028 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x0900 //TX_NOISE_TH_1 @@ -405,7 +406,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -414,9 +415,9 @@ 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0032 //TX_MINENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS +408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH @@ -532,10 +533,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -553,26 +554,26 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -779,12 +780,12 @@ 768 0x0065 //TX_MIC_CALIBRATION_3 769 0x0044 //TX_MIC_PWR_BIAS_0 770 0x0044 //TX_MIC_PWR_BIAS_1 -771 0x0044 //TX_MIC_PWR_BIAS_2 -772 0x0044 //TX_MIC_PWR_BIAS_3 -773 0x000B //TX_GAIN_LIMIT_0 -774 0x000B //TX_GAIN_LIMIT_1 -775 0x000B //TX_GAIN_LIMIT_2 -776 0x000B //TX_GAIN_LIMIT_3 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0000 //TX_GAIN_LIMIT_1 +775 0x0007 //TX_GAIN_LIMIT_2 +776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -831,12 +832,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -914,7 +915,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -941,37 +942,63 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x242C //RX_RECVFUNC_MODE_0 +0 0xA43C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -993,11 +1020,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -1015,11 +1042,11 @@ 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 +44 0x4748 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4040 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -1043,7 +1070,7 @@ 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 +72 0x0D0E //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 @@ -1162,7 +1189,7 @@ 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4040 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -1186,7 +1213,7 @@ 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 +72 0x0D0E //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 @@ -1225,7 +1252,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0009 //RX_SPK_VOL +129 0x000A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -1261,7 +1288,7 @@ 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4040 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -1285,7 +1312,7 @@ 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 +72 0x0D0E //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 @@ -1324,7 +1351,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000F //RX_SPK_VOL +129 0x0010 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -1360,7 +1387,7 @@ 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4040 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -1384,7 +1411,7 @@ 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 +72 0x0D0E //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 @@ -1423,7 +1450,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0019 //RX_SPK_VOL +129 0x001A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -1459,7 +1486,7 @@ 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4040 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -1483,7 +1510,7 @@ 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 +72 0x0D0E //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 @@ -1522,7 +1549,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x002B //RX_SPK_VOL +129 0x002C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -1558,7 +1585,7 @@ 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4040 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -1582,7 +1609,7 @@ 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 +72 0x0D0E //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 @@ -1621,7 +1648,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0048 //RX_SPK_VOL +129 0x0049 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -1657,7 +1684,7 @@ 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4040 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -1681,7 +1708,7 @@ 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 +72 0x0D0E //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 @@ -1720,7 +1747,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x007A //RX_SPK_VOL +129 0x007C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -1756,7 +1783,7 @@ 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4040 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -1780,7 +1807,7 @@ 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 +72 0x0D0E //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 @@ -1822,7 +1849,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x242C //RX_RECVFUNC_MODE_0 +157 0xA43C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC @@ -1844,11 +1871,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -1866,11 +1893,11 @@ 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 +201 0x4748 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4040 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -1894,7 +1921,7 @@ 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 +229 0x0D0E //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 @@ -2013,7 +2040,7 @@ 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4040 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -2037,7 +2064,7 @@ 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 +229 0x0D0E //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 @@ -2076,7 +2103,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0009 //RX_SPK_VOL +286 0x000A //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -2112,7 +2139,7 @@ 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4040 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -2136,7 +2163,7 @@ 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 +229 0x0D0E //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 @@ -2175,7 +2202,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000F //RX_SPK_VOL +286 0x0010 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -2211,7 +2238,7 @@ 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4040 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -2235,7 +2262,7 @@ 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 +229 0x0D0E //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 @@ -2274,7 +2301,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0019 //RX_SPK_VOL +286 0x001A //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -2310,7 +2337,7 @@ 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4040 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -2334,7 +2361,7 @@ 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 +229 0x0D0E //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 @@ -2373,7 +2400,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x002B //RX_SPK_VOL +286 0x002C //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -2409,7 +2436,7 @@ 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4040 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -2433,7 +2460,7 @@ 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 +229 0x0D0E //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 @@ -2472,7 +2499,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0048 //RX_SPK_VOL +286 0x0049 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -2508,7 +2535,7 @@ 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4040 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -2532,7 +2559,7 @@ 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 +229 0x0D0E //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 @@ -2571,7 +2598,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x007A //RX_SPK_VOL +286 0x007C //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -2607,7 +2634,7 @@ 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4040 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -2631,7 +2658,7 @@ 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 +229 0x0D0E //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 @@ -2674,14 +2701,13 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-WB -#PARAM_MODE FULL #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 +3 0x2F68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG @@ -2708,9 +2734,9 @@ 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -2816,11 +2842,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -2921,7 +2947,7 @@ 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 +243 0xF400 //TX_THR_SN_EST_1 244 0xF700 //TX_THR_SN_EST_2 245 0xFC00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 @@ -2931,7 +2957,7 @@ 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0100 //TX_DELTA_THR_SN_EST_6 @@ -2960,28 +2986,28 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 +282 0x001C //TX_NS_LVL_CTRL_1 283 0x001C //TX_NS_LVL_CTRL_2 -284 0x0012 //TX_NS_LVL_CTRL_3 +284 0x0020 //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x0018 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 +290 0x0004 //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x0009 //TX_MIN_GAIN_S_3 +292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP +297 0x6000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x3000 //TX_SNRI_SUP_1 302 0x2000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 +303 0x5000 //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 @@ -2993,7 +3019,7 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x2000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 @@ -3001,9 +3027,9 @@ 320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x3000 //TX_B_POST_FILT_1 324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -3026,7 +3052,7 @@ 345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER +348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0800 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG @@ -3045,13 +3071,13 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0102 //TX_NOISE_TH_0 +367 0x0096 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x0900 //TX_NOISE_TH_1 371 0x009B //TX_NOISE_TH_2 -372 0x4149 //TX_NOISE_TH_3 -373 0x0331 //TX_NOISE_TH_4 +372 0x36B0 //TX_NOISE_TH_3 +373 0x03C0 //TX_NOISE_TH_4 374 0x542C //TX_NOISE_TH_5 375 0x55E5 //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 @@ -3075,7 +3101,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -3084,7 +3110,7 @@ 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x00DC //TX_MINENOISE_MIC0_TH +406 0x0006 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -3202,10 +3228,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -3223,26 +3249,26 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x001C //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -3449,12 +3475,12 @@ 768 0x0062 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 +771 0x0048 //TX_MIC_PWR_BIAS_2 +772 0x0048 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0000 //TX_GAIN_LIMIT_1 +775 0x0003 //TX_GAIN_LIMIT_2 +776 0x0003 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -3501,12 +3527,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -3584,7 +3610,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -3611,37 +3637,63 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x242C //RX_RECVFUNC_MODE_0 +0 0xA43C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -3663,11 +3715,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -3832,10 +3884,10 @@ 45 0x484B //RX_FDEQ_GAIN_6 46 0x4B48 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4846 //RX_FDEQ_GAIN_10 50 0x403F //RX_FDEQ_GAIN_11 -51 0x3F40 //RX_FDEQ_GAIN_12 +51 0x3F3F //RX_FDEQ_GAIN_12 52 0x4248 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -3895,7 +3947,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000A //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -3931,10 +3983,10 @@ 45 0x484B //RX_FDEQ_GAIN_6 46 0x4B48 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4846 //RX_FDEQ_GAIN_10 50 0x403F //RX_FDEQ_GAIN_11 -51 0x3F40 //RX_FDEQ_GAIN_12 +51 0x3F3F //RX_FDEQ_GAIN_12 52 0x4248 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -3994,7 +4046,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0011 //RX_SPK_VOL +129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -4030,10 +4082,10 @@ 45 0x484B //RX_FDEQ_GAIN_6 46 0x4B48 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4846 //RX_FDEQ_GAIN_10 50 0x403F //RX_FDEQ_GAIN_11 -51 0x3F40 //RX_FDEQ_GAIN_12 +51 0x3F3F //RX_FDEQ_GAIN_12 52 0x4248 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -4093,7 +4145,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001D //RX_SPK_VOL +129 0x001E //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -4129,10 +4181,10 @@ 45 0x484B //RX_FDEQ_GAIN_6 46 0x4B48 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4846 //RX_FDEQ_GAIN_10 50 0x403F //RX_FDEQ_GAIN_11 -51 0x3F40 //RX_FDEQ_GAIN_12 +51 0x3F3F //RX_FDEQ_GAIN_12 52 0x4248 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -4192,7 +4244,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0030 //RX_SPK_VOL +129 0x0031 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -4228,10 +4280,10 @@ 45 0x484B //RX_FDEQ_GAIN_6 46 0x4B48 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4846 //RX_FDEQ_GAIN_10 50 0x403F //RX_FDEQ_GAIN_11 -51 0x3F40 //RX_FDEQ_GAIN_12 +51 0x3F3F //RX_FDEQ_GAIN_12 52 0x4248 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -4291,7 +4343,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0050 //RX_SPK_VOL +129 0x0052 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -4327,10 +4379,10 @@ 45 0x484B //RX_FDEQ_GAIN_6 46 0x4B48 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4846 //RX_FDEQ_GAIN_10 50 0x403F //RX_FDEQ_GAIN_11 -51 0x3F40 //RX_FDEQ_GAIN_12 +51 0x3F3F //RX_FDEQ_GAIN_12 52 0x4248 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -4390,7 +4442,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0087 //RX_SPK_VOL +129 0x008B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -4426,10 +4478,10 @@ 45 0x484B //RX_FDEQ_GAIN_6 46 0x4B48 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4846 //RX_FDEQ_GAIN_10 50 0x403F //RX_FDEQ_GAIN_11 -51 0x3F40 //RX_FDEQ_GAIN_12 +51 0x3F3F //RX_FDEQ_GAIN_12 52 0x4248 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -4492,7 +4544,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x242C //RX_RECVFUNC_MODE_0 +157 0xA43C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0001 //RX_SAMPLINGFREQ_SIG 160 0x0001 //RX_SAMPLINGFREQ_PROC @@ -4514,11 +4566,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -4683,10 +4735,10 @@ 202 0x484B //RX_FDEQ_GAIN_6 203 0x4B48 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4846 //RX_FDEQ_GAIN_10 207 0x403F //RX_FDEQ_GAIN_11 -208 0x3F40 //RX_FDEQ_GAIN_12 +208 0x3F3F //RX_FDEQ_GAIN_12 209 0x4248 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 @@ -4782,10 +4834,10 @@ 202 0x484B //RX_FDEQ_GAIN_6 203 0x4B48 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4846 //RX_FDEQ_GAIN_10 207 0x403F //RX_FDEQ_GAIN_11 -208 0x3F40 //RX_FDEQ_GAIN_12 +208 0x3F3F //RX_FDEQ_GAIN_12 209 0x4248 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 @@ -4845,7 +4897,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0011 //RX_SPK_VOL +286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -4881,10 +4933,10 @@ 202 0x484B //RX_FDEQ_GAIN_6 203 0x4B48 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4846 //RX_FDEQ_GAIN_10 207 0x403F //RX_FDEQ_GAIN_11 -208 0x3F40 //RX_FDEQ_GAIN_12 +208 0x3F3F //RX_FDEQ_GAIN_12 209 0x4248 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 @@ -4944,7 +4996,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001D //RX_SPK_VOL +286 0x001E //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -4980,10 +5032,10 @@ 202 0x484B //RX_FDEQ_GAIN_6 203 0x4B48 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4846 //RX_FDEQ_GAIN_10 207 0x403F //RX_FDEQ_GAIN_11 -208 0x3F40 //RX_FDEQ_GAIN_12 +208 0x3F3F //RX_FDEQ_GAIN_12 209 0x4248 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 @@ -5043,7 +5095,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0030 //RX_SPK_VOL +286 0x0031 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -5079,10 +5131,10 @@ 202 0x484B //RX_FDEQ_GAIN_6 203 0x4B48 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4846 //RX_FDEQ_GAIN_10 207 0x403F //RX_FDEQ_GAIN_11 -208 0x3F40 //RX_FDEQ_GAIN_12 +208 0x3F3F //RX_FDEQ_GAIN_12 209 0x4248 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 @@ -5142,7 +5194,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0050 //RX_SPK_VOL +286 0x0052 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -5178,10 +5230,10 @@ 202 0x484B //RX_FDEQ_GAIN_6 203 0x4B48 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4846 //RX_FDEQ_GAIN_10 207 0x403F //RX_FDEQ_GAIN_11 -208 0x3F40 //RX_FDEQ_GAIN_12 +208 0x3F3F //RX_FDEQ_GAIN_12 209 0x4248 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 @@ -5241,7 +5293,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0087 //RX_SPK_VOL +286 0x008B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -5277,10 +5329,10 @@ 202 0x484B //RX_FDEQ_GAIN_6 203 0x4B48 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4846 //RX_FDEQ_GAIN_10 207 0x403F //RX_FDEQ_GAIN_11 -208 0x3F40 //RX_FDEQ_GAIN_12 +208 0x3F3F //RX_FDEQ_GAIN_12 209 0x4248 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 @@ -5344,14 +5396,13 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-SWB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x6B68 //TX_SENDFUNC_MODE_0 +3 0x6F68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG @@ -5378,9 +5429,9 @@ 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -5486,11 +5537,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -5545,9 +5596,9 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x7D00 //TX_DTD_THR1_0 +197 0x6590 //TX_DTD_THR1_0 198 0x7D00 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 +199 0x6590 //TX_DTD_THR1_2 200 0x7FFF //TX_DTD_THR1_3 201 0x7FFF //TX_DTD_THR1_4 202 0x7FFF //TX_DTD_THR1_5 @@ -5601,7 +5652,7 @@ 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0100 //TX_DELTA_THR_SN_EST_6 @@ -5632,10 +5683,10 @@ 281 0x000F //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0018 //TX_NS_LVL_CTRL_2 -284 0x0012 //TX_NS_LVL_CTRL_3 +284 0x0018 //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 -287 0x0018 //TX_NS_LVL_CTRL_6 +287 0x001C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000F //TX_MIN_GAIN_S_1 @@ -5645,16 +5696,16 @@ 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP +297 0x6000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x5000 //TX_SNRI_SUP_1 302 0x5000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x3000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x000E //TX_G_LFNS @@ -5671,9 +5722,9 @@ 320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 +325 0x3000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -5715,13 +5766,13 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0383 //TX_NOISE_TH_0 +367 0x00FA //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 +370 0x0C80 //TX_NOISE_TH_1 371 0x00C8 //TX_NOISE_TH_2 -372 0x2904 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 +372 0x2EE0 //TX_NOISE_TH_3 +373 0x07D0 //TX_NOISE_TH_4 374 0x157C //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 @@ -5745,7 +5796,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -5754,7 +5805,7 @@ 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x02F3 //TX_MINENOISE_MIC0_TH +406 0x0064 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -5872,10 +5923,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -5893,26 +5944,26 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -6118,13 +6169,13 @@ 767 0x0062 //TX_MIC_CALIBRATION_2 768 0x0062 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 +770 0x0050 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0002 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -6171,12 +6222,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -6254,7 +6305,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -6281,37 +6332,63 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x242C //RX_RECVFUNC_MODE_0 +0 0xA43C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -6333,11 +6410,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -6437,7 +6514,7 @@ 123 0x0CCD //RX_TDDRC_SMT_W 124 0x023E //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x280A //RX_TPKA_FP +126 0x0D90 //RX_TPKA_FP 127 0x032D //RX_MIN_G_FP 128 0x0A00 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL @@ -6491,7 +6568,7 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0214 //RX_TDDRC_DRC_GAIN +124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 @@ -6590,7 +6667,7 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0214 //RX_TDDRC_DRC_GAIN +124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 @@ -6689,7 +6766,7 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0214 //RX_TDDRC_DRC_GAIN +124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 @@ -6763,7 +6840,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001C //RX_SPK_VOL +129 0x001D //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x5000 //RX_TDDRC_ALPHA_UP_1 @@ -6788,7 +6865,7 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0214 //RX_TDDRC_DRC_GAIN +124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 @@ -6862,7 +6939,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x002F //RX_SPK_VOL +129 0x0030 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x5000 //RX_TDDRC_ALPHA_UP_1 @@ -6887,7 +6964,7 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0214 //RX_TDDRC_DRC_GAIN +124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 @@ -6961,7 +7038,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x004F //RX_SPK_VOL +129 0x0050 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x5000 //RX_TDDRC_ALPHA_UP_1 @@ -6986,7 +7063,7 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0214 //RX_TDDRC_DRC_GAIN +124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 @@ -7060,7 +7137,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0086 //RX_SPK_VOL +129 0x0089 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x5000 //RX_TDDRC_ALPHA_UP_1 @@ -7085,7 +7162,7 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0214 //RX_TDDRC_DRC_GAIN +124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 @@ -7162,7 +7239,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x242C //RX_RECVFUNC_MODE_0 +157 0xA43C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC @@ -7184,11 +7261,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -7288,7 +7365,7 @@ 280 0x0CCD //RX_TDDRC_SMT_W 281 0x023E //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x280A //RX_TPKA_FP +283 0x0D90 //RX_TPKA_FP 284 0x032D //RX_MIN_G_FP 285 0x0A00 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL @@ -7342,7 +7419,7 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0214 //RX_TDDRC_DRC_GAIN +281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 @@ -7441,7 +7518,7 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0214 //RX_TDDRC_DRC_GAIN +281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 @@ -7540,7 +7617,7 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0214 //RX_TDDRC_DRC_GAIN +281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 @@ -7614,7 +7691,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001C //RX_SPK_VOL +286 0x001D //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x5000 //RX_TDDRC_ALPHA_UP_1 @@ -7639,7 +7716,7 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0214 //RX_TDDRC_DRC_GAIN +281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 @@ -7713,7 +7790,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x002F //RX_SPK_VOL +286 0x0030 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x5000 //RX_TDDRC_ALPHA_UP_1 @@ -7738,7 +7815,7 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0214 //RX_TDDRC_DRC_GAIN +281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 @@ -7812,7 +7889,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x004F //RX_SPK_VOL +286 0x0050 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x5000 //RX_TDDRC_ALPHA_UP_1 @@ -7837,7 +7914,7 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0214 //RX_TDDRC_DRC_GAIN +281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 @@ -7911,7 +7988,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0086 //RX_SPK_VOL +286 0x0089 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x5000 //RX_TDDRC_ALPHA_UP_1 @@ -7936,7 +8013,7 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0214 //RX_TDDRC_DRC_GAIN +281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 @@ -8014,7 +8091,6 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-FB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX @@ -8048,9 +8124,9 @@ 27 0x0B4C //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -8140,7 +8216,7 @@ 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD +122 0x0015 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK @@ -8156,11 +8232,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -8415,7 +8491,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -8542,10 +8618,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -8563,26 +8639,26 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -8841,12 +8917,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -8924,7 +9000,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -8951,35 +9027,61 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX 0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -9003,11 +9105,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0500 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000A //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF600 //RX_THR_SN_EST -24 0x7000 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -9854,11 +9956,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0500 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x000A //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0xF600 //RX_THR_SN_EST -181 0x7000 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -10683,19 +10785,18 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB -#PARAM_MODE Full +#CASE_NAME HEADSET-USB_BLACKBIRD-RESERVE2-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 +1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 +3 0x6F68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT @@ -10717,10 +10818,10 @@ 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 -29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -10816,6 +10917,2701 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6D60 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x6590 //TX_DTD_THR1_0 +198 0x7D00 //TX_DTD_THR1_1 +199 0x6590 //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xFA00 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xF700 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x0009 //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x5000 //TX_SNRI_SUP_1 +302 0x5000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x3000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x3000 //TX_B_POST_FILT_2 +325 0x3000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7000 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x00FA //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0C80 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x2EE0 //TX_NOISE_TH_3 +373 0x07D0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0064 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4040 //TX_FDEQ_GAIN_6 +574 0x4040 //TX_FDEQ_GAIN_7 +575 0x4040 //TX_FDEQ_GAIN_8 +576 0x3838 //TX_FDEQ_GAIN_9 +577 0x3838 //TX_FDEQ_GAIN_10 +578 0x3828 //TX_FDEQ_GAIN_11 +579 0x2828 //TX_FDEQ_GAIN_12 +580 0x2828 //TX_FDEQ_GAIN_13 +581 0x1C1C //TX_FDEQ_GAIN_14 +582 0x1C1C //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x284A //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0050 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0002 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0020 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0x8000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x803C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E52 //RX_FDEQ_GAIN_0 +40 0x5252 //RX_FDEQ_GAIN_1 +41 0x5252 //RX_FDEQ_GAIN_2 +42 0x5250 //RX_FDEQ_GAIN_3 +43 0x4C46 //RX_FDEQ_GAIN_4 +44 0x4748 //RX_FDEQ_GAIN_5 +45 0x5768 //RX_FDEQ_GAIN_6 +46 0x6162 //RX_FDEQ_GAIN_7 +47 0x5252 //RX_FDEQ_GAIN_8 +48 0x5256 //RX_FDEQ_GAIN_9 +49 0x5248 //RX_FDEQ_GAIN_10 +50 0x3434 //RX_FDEQ_GAIN_11 +51 0x3436 //RX_FDEQ_GAIN_12 +52 0x2A18 //RX_FDEQ_GAIN_13 +53 0x1830 //RX_FDEQ_GAIN_14 +54 0x3648 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x284A //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x023E //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x0D90 //RX_TPKA_FP +127 0x032D //RX_MIN_G_FP +128 0x0A00 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7220 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04CA //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6270 //RX_FDEQ_GAIN_0 +40 0x7A70 //RX_FDEQ_GAIN_1 +41 0x7270 //RX_FDEQ_GAIN_2 +42 0x6A70 //RX_FDEQ_GAIN_3 +43 0x645A //RX_FDEQ_GAIN_4 +44 0x5A5E //RX_FDEQ_GAIN_5 +45 0x6E72 //RX_FDEQ_GAIN_6 +46 0x7268 //RX_FDEQ_GAIN_7 +47 0x665A //RX_FDEQ_GAIN_8 +48 0x5A5A //RX_FDEQ_GAIN_9 +49 0x5A64 //RX_FDEQ_GAIN_10 +50 0x6448 //RX_FDEQ_GAIN_11 +51 0x4949 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x284A //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7220 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04CA //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6270 //RX_FDEQ_GAIN_0 +40 0x7A70 //RX_FDEQ_GAIN_1 +41 0x7270 //RX_FDEQ_GAIN_2 +42 0x6A70 //RX_FDEQ_GAIN_3 +43 0x645A //RX_FDEQ_GAIN_4 +44 0x5A5E //RX_FDEQ_GAIN_5 +45 0x6E72 //RX_FDEQ_GAIN_6 +46 0x7268 //RX_FDEQ_GAIN_7 +47 0x665A //RX_FDEQ_GAIN_8 +48 0x5A5A //RX_FDEQ_GAIN_9 +49 0x5A64 //RX_FDEQ_GAIN_10 +50 0x6448 //RX_FDEQ_GAIN_11 +51 0x4949 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x284A //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0011 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7220 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04CA //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6270 //RX_FDEQ_GAIN_0 +40 0x7A70 //RX_FDEQ_GAIN_1 +41 0x7270 //RX_FDEQ_GAIN_2 +42 0x6A70 //RX_FDEQ_GAIN_3 +43 0x645A //RX_FDEQ_GAIN_4 +44 0x5A5E //RX_FDEQ_GAIN_5 +45 0x6E72 //RX_FDEQ_GAIN_6 +46 0x7268 //RX_FDEQ_GAIN_7 +47 0x665A //RX_FDEQ_GAIN_8 +48 0x5A5A //RX_FDEQ_GAIN_9 +49 0x5A64 //RX_FDEQ_GAIN_10 +50 0x6448 //RX_FDEQ_GAIN_11 +51 0x4949 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x284A //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7220 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04CA //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6270 //RX_FDEQ_GAIN_0 +40 0x7A70 //RX_FDEQ_GAIN_1 +41 0x7270 //RX_FDEQ_GAIN_2 +42 0x6A70 //RX_FDEQ_GAIN_3 +43 0x645A //RX_FDEQ_GAIN_4 +44 0x5A5E //RX_FDEQ_GAIN_5 +45 0x6E72 //RX_FDEQ_GAIN_6 +46 0x7268 //RX_FDEQ_GAIN_7 +47 0x665A //RX_FDEQ_GAIN_8 +48 0x5A5A //RX_FDEQ_GAIN_9 +49 0x5A64 //RX_FDEQ_GAIN_10 +50 0x6448 //RX_FDEQ_GAIN_11 +51 0x4949 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x284A //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0030 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7220 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04CA //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6270 //RX_FDEQ_GAIN_0 +40 0x7A70 //RX_FDEQ_GAIN_1 +41 0x7270 //RX_FDEQ_GAIN_2 +42 0x6A70 //RX_FDEQ_GAIN_3 +43 0x645A //RX_FDEQ_GAIN_4 +44 0x5A5E //RX_FDEQ_GAIN_5 +45 0x6E72 //RX_FDEQ_GAIN_6 +46 0x7268 //RX_FDEQ_GAIN_7 +47 0x665A //RX_FDEQ_GAIN_8 +48 0x5A5A //RX_FDEQ_GAIN_9 +49 0x5A64 //RX_FDEQ_GAIN_10 +50 0x6448 //RX_FDEQ_GAIN_11 +51 0x4949 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x284A //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0050 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7220 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04CA //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6270 //RX_FDEQ_GAIN_0 +40 0x7A70 //RX_FDEQ_GAIN_1 +41 0x7270 //RX_FDEQ_GAIN_2 +42 0x6A70 //RX_FDEQ_GAIN_3 +43 0x645A //RX_FDEQ_GAIN_4 +44 0x5A5E //RX_FDEQ_GAIN_5 +45 0x6E72 //RX_FDEQ_GAIN_6 +46 0x7268 //RX_FDEQ_GAIN_7 +47 0x665A //RX_FDEQ_GAIN_8 +48 0x5A5A //RX_FDEQ_GAIN_9 +49 0x5A64 //RX_FDEQ_GAIN_10 +50 0x6448 //RX_FDEQ_GAIN_11 +51 0x4949 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x284A //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0089 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7220 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04CA //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6270 //RX_FDEQ_GAIN_0 +40 0x7A70 //RX_FDEQ_GAIN_1 +41 0x7270 //RX_FDEQ_GAIN_2 +42 0x6A70 //RX_FDEQ_GAIN_3 +43 0x645A //RX_FDEQ_GAIN_4 +44 0x5A5E //RX_FDEQ_GAIN_5 +45 0x6E72 //RX_FDEQ_GAIN_6 +46 0x7268 //RX_FDEQ_GAIN_7 +47 0x665A //RX_FDEQ_GAIN_8 +48 0x5A5A //RX_FDEQ_GAIN_9 +49 0x5A64 //RX_FDEQ_GAIN_10 +50 0x6448 //RX_FDEQ_GAIN_11 +51 0x4949 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x284A //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x803C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E52 //RX_FDEQ_GAIN_0 +197 0x5252 //RX_FDEQ_GAIN_1 +198 0x5252 //RX_FDEQ_GAIN_2 +199 0x5250 //RX_FDEQ_GAIN_3 +200 0x4C46 //RX_FDEQ_GAIN_4 +201 0x4748 //RX_FDEQ_GAIN_5 +202 0x5768 //RX_FDEQ_GAIN_6 +203 0x6162 //RX_FDEQ_GAIN_7 +204 0x5252 //RX_FDEQ_GAIN_8 +205 0x5256 //RX_FDEQ_GAIN_9 +206 0x5248 //RX_FDEQ_GAIN_10 +207 0x3434 //RX_FDEQ_GAIN_11 +208 0x3436 //RX_FDEQ_GAIN_12 +209 0x2A18 //RX_FDEQ_GAIN_13 +210 0x1830 //RX_FDEQ_GAIN_14 +211 0x3648 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x023E //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x0D90 //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04CA //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04CA //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04CA //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04CA //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0030 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04CA //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0050 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04CA //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0089 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04CA //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B28 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N 128 0x7646 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x7CCC //TX_THR_PITCH_DET_0 @@ -10826,11 +13622,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -11085,7 +13881,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -11212,10 +14008,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -11233,26 +14029,26 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM 567 0x6048 //TX_FDEQ_GAIN_0 @@ -11262,9 +14058,9 @@ 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4844 //TX_FDEQ_GAIN_6 -574 0x4444 //TX_FDEQ_GAIN_7 -575 0x4040 //TX_FDEQ_GAIN_8 -576 0x3C3C //TX_FDEQ_GAIN_9 +574 0x4242 //TX_FDEQ_GAIN_7 +575 0x3C34 //TX_FDEQ_GAIN_8 +576 0x343A //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 @@ -11511,12 +14307,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -11554,7 +14350,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN +866 0x0650 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -11594,7 +14390,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -11621,37 +14417,63 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x202C //RX_RECVFUNC_MODE_0 +0 0xA020 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -11673,11 +14495,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -11839,10 +14661,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -11938,10 +14760,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -12037,10 +14859,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -12136,10 +14958,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -12235,10 +15057,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -12334,10 +15156,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -12433,10 +15255,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -12502,7 +15324,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 +157 0xA020 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC @@ -12524,11 +15346,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -12690,10 +15512,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -12789,10 +15611,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -12888,10 +15710,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -12987,10 +15809,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -13086,10 +15908,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -13185,10 +16007,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -13284,10 +16106,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -13354,14 +16176,13 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-WB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 +3 0x2B28 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG @@ -13388,9 +16209,9 @@ 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -13480,7 +16301,7 @@ 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD +122 0x0015 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK @@ -13496,11 +16317,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -13755,7 +16576,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -13882,10 +16703,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -13903,29 +16724,29 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x001C //TX_FDEQ_SUBNUM -567 0x5850 //TX_FDEQ_GAIN_0 +567 0x6056 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 @@ -14181,12 +17002,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -14224,7 +17045,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN +866 0x0619 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -14264,7 +17085,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -14291,37 +17112,63 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x202C //RX_RECVFUNC_MODE_0 +0 0xA024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -14343,11 +17190,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -15172,7 +18019,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 +157 0xA024 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0001 //RX_SAMPLINGFREQ_SIG 160 0x0001 //RX_SAMPLINGFREQ_PROC @@ -15194,11 +18041,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -16024,14 +18871,13 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-SWB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 +3 0x2B28 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG @@ -16058,9 +18904,9 @@ 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -16150,7 +18996,7 @@ 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD +122 0x0015 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK @@ -16166,11 +19012,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -16425,7 +19271,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -16552,10 +19398,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -16573,26 +19419,26 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -16851,12 +19697,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -16934,7 +19780,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -16961,37 +19807,63 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x202C //RX_RECVFUNC_MODE_0 +0 0xA020 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -17013,11 +19885,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -17842,7 +20714,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 +157 0xA020 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC @@ -17864,11 +20736,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -18694,14 +21566,13 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-FB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 2 0x0020 //TX_PATCH_REG -3 0x6B6A //TX_SENDFUNC_MODE_0 +3 0x6B2A //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG @@ -18728,9 +21599,9 @@ 27 0x0B4C //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -18820,7 +21691,7 @@ 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD +122 0x0015 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK @@ -18836,11 +21707,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -19095,7 +21966,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -19222,10 +22093,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -19243,26 +22114,26 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -19521,12 +22392,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -19604,7 +22475,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -19631,37 +22502,63 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x202C //RX_RECVFUNC_MODE_0 +0 0xA020 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -19683,11 +22580,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0500 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000A //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF600 //RX_THR_SN_EST -24 0x7000 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -20512,7 +23409,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 +157 0xA020 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0004 //RX_SAMPLINGFREQ_SIG 160 0x0004 //RX_SAMPLINGFREQ_PROC @@ -20534,2681 +23431,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0500 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x000A //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0xF600 //RX_THR_SN_EST -181 0x7000 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-NB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7646 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x7CCC //TX_THR_PITCH_DET_0 -131 0x7000 //TX_THR_PITCH_DET_1 -132 0x6333 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0010 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x1000 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x2000 //TX_C_POST_FLT -168 0x2000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x0064 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x5000 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7F00 //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x2000 //TX_DTD_THR2_0 -205 0x2000 //TX_DTD_THR2_1 -206 0x2000 //TX_DTD_THR2_2 -207 0x2000 //TX_DTD_THR2_3 -208 0x2000 //TX_DTD_THR2_4 -209 0x2000 //TX_DTD_THR2_5 -210 0x2000 //TX_DTD_THR2_6 -211 0x4100 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x03E8 //TX_DT_CUT_K -214 0x1000 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0010 //TX_EPD_OFFSET_00 -233 0x0010 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFA00 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xFA00 //TX_THR_SN_EST_6 -249 0xFA00 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 -252 0x0000 //TX_DELTA_THR_SN_EST_2 -253 0x0000 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0000 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0000 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x0400 //TX_B_POST_FLT_0 -280 0x0400 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0010 //TX_NS_LVL_CTRL_1 -283 0x0010 //TX_NS_LVL_CTRL_2 -284 0x0010 //TX_NS_LVL_CTRL_3 -285 0x0010 //TX_NS_LVL_CTRL_4 -286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 -288 0x0010 //TX_NS_LVL_CTRL_7 -289 0x000D //TX_MIN_GAIN_S_0 -290 0x000D //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x000D //TX_MIN_GAIN_S_3 -293 0x000D //TX_MIN_GAIN_S_4 -294 0x000D //TX_MIN_GAIN_S_5 -295 0x000D //TX_MIN_GAIN_S_6 -296 0x000D //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0014 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x4000 //TX_A_POST_FILT_S_7 -322 0x0400 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x0400 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E14 //TX_LAMBDA_PFILT -339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7C29 //TX_LAMBDA_PFILT_S_2 -342 0x7C29 //TX_LAMBDA_PFILT_S_3 -343 0x7C29 //TX_LAMBDA_PFILT_S_4 -344 0x7C29 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 -346 0x7C29 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x0FA0 //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x003B //TX_NOISE_TH_0 -368 0x1B58 //TX_NOISE_TH_0_2 -369 0x2134 //TX_NOISE_TH_0_3 -370 0x02BC //TX_NOISE_TH_1 -371 0x1F40 //TX_NOISE_TH_2 -372 0x4650 //TX_NOISE_TH_3 -373 0x7148 //TX_NOISE_TH_4 -374 0x044C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x0000 //TX_NOISE_TH_5_4 -378 0x0032 //TX_NOISE_TH_6 -379 0x00C8 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN -385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x00A5 //TX_OUT_ENER_S_TH_NOISY -387 0x0029 //TX_OUT_ENER_TH_NOISE -388 0x00CE //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0032 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x7FFF //TX_NOISEDET_BOOST_TH -412 0x0000 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0280 //TX_N_HOLD_HS -416 0x006E //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2400 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x2000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0064 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x003C //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x2A3D //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0014 //TX_FDEQ_SUBNUM -567 0x6048 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4844 //TX_FDEQ_GAIN_6 -574 0x4444 //TX_FDEQ_GAIN_7 -575 0x4040 //TX_FDEQ_GAIN_8 -576 0x3C3C //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0401 //TX_FDEQ_BIN_0 -592 0x0103 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0010 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0802 //TX_PREEQ_BIN_MIC0_7 -649 0x0000 //TX_PREEQ_BIN_MIC0_8 -650 0x0000 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0010 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0802 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0010 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0802 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0065 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0065 //TX_MIC_CALIBRATION_2 -768 0x0065 //TX_MIC_CALIBRATION_3 -769 0x0044 //TX_MIC_PWR_BIAS_0 -770 0x0044 //TX_MIC_PWR_BIAS_1 -771 0x0044 //TX_MIC_PWR_BIAS_2 -772 0x0044 //TX_MIC_PWR_BIAS_3 -773 0x000B //TX_GAIN_LIMIT_0 -774 0x000B //TX_GAIN_LIMIT_1 -775 0x000B //TX_GAIN_LIMIT_2 -776 0x000B //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0001 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0xF800 //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x202C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -23220,7 +23447,7 @@ 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA -195 0x0014 //RX_FDEQ_SUBNUM +195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 @@ -23247,20 +23474,20 @@ 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -23296,17 +23523,17 @@ 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN +281 0x0240 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP @@ -23340,10 +23567,10 @@ 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -23352,18 +23579,18 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 @@ -23390,20 +23617,20 @@ 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -23439,10 +23666,10 @@ 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -23451,18 +23678,18 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 @@ -23489,20 +23716,20 @@ 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -23538,10 +23765,10 @@ 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -23550,18 +23777,18 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 @@ -23588,20 +23815,20 @@ 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -23637,10 +23864,10 @@ 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -23649,18 +23876,18 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 @@ -23687,20 +23914,20 @@ 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -23736,10 +23963,10 @@ 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -23748,18 +23975,18 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 @@ -23786,20 +24013,20 @@ 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -23835,10 +24062,10 @@ 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -23847,18 +24074,18 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 @@ -23885,20 +24112,20 @@ 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -23934,10 +24161,10 @@ 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -23946,18 +24173,18 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 @@ -23984,20 +24211,20 @@ 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -24033,2685 +24260,14 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-WB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7D83 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0019 //TX_EPD_OFFSET_00 -233 0x0019 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0102 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x00F8 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x00DC //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x0000 //TX_NS_FP_K_METAL -411 0x7FFF //TX_NOISEDET_BOOST_TH -412 0x0000 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x5850 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0302 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D07 //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1119 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0808 //TX_PREEQ_BIN_MIC0_7 -649 0x0808 //TX_PREEQ_BIN_MIC0_8 -650 0x0808 //TX_PREEQ_BIN_MIC0_9 -651 0x0808 //TX_PREEQ_BIN_MIC0_10 -652 0x0808 //TX_PREEQ_BIN_MIC0_11 -653 0x0808 //TX_PREEQ_BIN_MIC0_12 -654 0x0808 //TX_PREEQ_BIN_MIC0_13 -655 0x0808 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0808 //TX_PREEQ_BIN_MIC1_7 -698 0x0808 //TX_PREEQ_BIN_MIC1_8 -699 0x0808 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0808 //TX_PREEQ_BIN_MIC1_11 -702 0x0808 //TX_PREEQ_BIN_MIC1_12 -703 0x0808 //TX_PREEQ_BIN_MIC1_13 -704 0x0808 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0001 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x202C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0001 //RX_SAMPLINGFREQ_SIG -3 0x0001 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0001 //RX_SAMPLINGFREQ_SIG -160 0x0001 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-SWB -#PARAM_MODE Full +#CASE_NAME HEADSET-GOOGLE_CONDOR-RESERVE2-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 +3 0x2B28 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG @@ -26738,9 +24294,9 @@ 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -26830,7 +24386,7 @@ 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD +122 0x0015 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK @@ -26846,11 +24402,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -27105,7 +24661,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -27232,10 +24788,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -27253,26 +24809,26 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -27531,12 +25087,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -27614,7 +25170,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -27641,37 +25197,63 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x202C //RX_RECVFUNC_MODE_0 +0 0x8020 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -27693,11 +25275,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -28522,7 +26104,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 +157 0x8020 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC @@ -28544,11 +26126,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -29373,2686 +26955,15 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-FB -#PARAM_MODE Full -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0009 //TX_OPERATION_MODE_1 -2 0x0020 //TX_PATCH_REG -3 0x6B6A //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B4C //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0200 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x61A8 //TX_EAD_THR -151 0x0400 //TX_THR_RE_EST -152 0x3000 //TX_MIN_EQ_RE_EST_0 -153 0x3000 //TX_MIN_EQ_RE_EST_1 -154 0x4000 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x6000 //TX_MIN_EQ_RE_EST_6 -159 0x6000 //TX_MIN_EQ_RE_EST_7 -160 0x6000 //TX_MIN_EQ_RE_EST_8 -161 0x6000 //TX_MIN_EQ_RE_EST_9 -162 0x4000 //TX_MIN_EQ_RE_EST_10 -163 0x4000 //TX_MIN_EQ_RE_EST_11 -164 0x4000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x4000 //TX_LAMBDA_CB_NLE -167 0x3000 //TX_C_POST_FLT -168 0x7FFF //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x0800 //TX_DTD_THR1_0 -198 0x0800 //TX_DTD_THR1_1 -199 0x0800 //TX_DTD_THR1_2 -200 0x0800 //TX_DTD_THR1_3 -201 0x0800 //TX_DTD_THR1_4 -202 0x0800 //TX_DTD_THR1_5 -203 0x0800 //TX_DTD_THR1_6 -204 0x0800 //TX_DTD_THR2_0 -205 0x0800 //TX_DTD_THR2_1 -206 0x0800 //TX_DTD_THR2_2 -207 0x0800 //TX_DTD_THR2_3 -208 0x0800 //TX_DTD_THR2_4 -209 0x0100 //TX_DTD_THR2_5 -210 0x0100 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x03E8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00C0 //TX_EPD_OFFSET_00 -233 0x00C0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF700 //TX_THR_SN_EST_0 -243 0xFB00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF700 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xF600 //TX_THR_SN_EST_5 -248 0xF600 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0400 //TX_DELTA_THR_SN_EST_1 -252 0x0300 //TX_DELTA_THR_SN_EST_2 -253 0x0600 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x2000 //TX_B_POST_FLT_1 -281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0019 //TX_NS_LVL_CTRL_3 -285 0x0010 //TX_NS_LVL_CTRL_4 -286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0019 //TX_NS_LVL_CTRL_6 -288 0x0010 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000F //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0011 //TX_MIN_GAIN_S_6 -296 0x000C //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7000 //TX_SNRI_SUP_0 -301 0x7000 //TX_SNRI_SUP_1 -302 0x7000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x6000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0016 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x6000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x6000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x4000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7CCD //TX_LAMBDA_PFILT_S_0 -340 0x7CCD //TX_LAMBDA_PFILT_S_1 -341 0x7CCD //TX_LAMBDA_PFILT_S_2 -342 0x7CCD //TX_LAMBDA_PFILT_S_3 -343 0x7CCD //TX_LAMBDA_PFILT_S_4 -344 0x7CCD //TX_LAMBDA_PFILT_S_5 -345 0x7CCD //TX_LAMBDA_PFILT_S_6 -346 0x7CCD //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0500 //TX_A_PEPPER -349 0x1600 //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x04E8 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x02A6 //TX_NOISE_TH_1 -371 0x04B0 //TX_NOISE_TH_2 -372 0x3194 //TX_NOISE_TH_3 -373 0x0960 //TX_NOISE_TH_4 -374 0x5555 //TX_NOISE_TH_5 -375 0x3FF4 //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x0000 //TX_NOISE_TH_5_4 -378 0x02BC //TX_NOISE_TH_6 -379 0x02BC //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x1482 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x04E7 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2011 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0001 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x07F2 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x202C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7B02 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0500 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x000A //RX_NS_LVL_CTRL -23 0xF600 //RX_THR_SN_EST -24 0x7000 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0004 //RX_SAMPLINGFREQ_SIG -160 0x0004 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7B02 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0500 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x000A //RX_NS_LVL_CTRL -180 0xF600 //RX_THR_SN_EST -181 0x7000 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-NB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x6F7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6FFD //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC @@ -32069,18 +26980,18 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0010 //TX_DIST2REF_02 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -32089,8 +27000,8 @@ 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 43 0x0001 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 @@ -32176,7 +27087,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7646 //TX_A_HP +128 0x7652 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -32186,11 +27097,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -32198,28 +27109,28 @@ 147 0x0100 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7500 //TX_EAD_THR +150 0x7B00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 -153 0x0200 //TX_MIN_EQ_RE_EST_1 -154 0x0200 //TX_MIN_EQ_RE_EST_2 -155 0x0200 //TX_MIN_EQ_RE_EST_3 -156 0x0200 //TX_MIN_EQ_RE_EST_4 -157 0x0200 //TX_MIN_EQ_RE_EST_5 -158 0x0200 //TX_MIN_EQ_RE_EST_6 -159 0x1800 //TX_MIN_EQ_RE_EST_7 -160 0x1800 //TX_MIN_EQ_RE_EST_8 +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x2000 //TX_MIN_EQ_RE_EST_3 +156 0x2000 //TX_MIN_EQ_RE_EST_4 +157 0x2000 //TX_MIN_EQ_RE_EST_5 +158 0x2000 //TX_MIN_EQ_RE_EST_6 +159 0x2000 //TX_MIN_EQ_RE_EST_7 +160 0x2000 //TX_MIN_EQ_RE_EST_8 161 0x3000 //TX_MIN_EQ_RE_EST_9 162 0x4000 //TX_MIN_EQ_RE_EST_10 163 0x6000 //TX_MIN_EQ_RE_EST_11 164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x2000 //TX_LAMBDA_RE_EST +165 0x6000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE -167 0x4000 //TX_C_POST_FLT +167 0x2000 //TX_C_POST_FLT 168 0x2000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0008 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -32245,14 +27156,14 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x7FF0 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 +197 0x7FEE //TX_DTD_THR1_0 +198 0x7FEE //TX_DTD_THR1_1 199 0x7FF0 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 +200 0x7EF4 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x7E00 //TX_DTD_THR2_0 +204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 @@ -32261,7 +27172,7 @@ 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x1F40 //TX_DT_CUT_K +213 0x0FA0 //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH @@ -32271,18 +27182,18 @@ 220 0x0000 //TX_DTD_MIC_BLK 221 0x1000 //TX_ADPT_STRICT_L 222 0x1000 //TX_ADPT_STRICT_H -223 0x0001 //TX_RATIO_DT_L_TH_LOW +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x0640 //TX_RATIO_DT_L_TH_HIGH +225 0x157C //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x0001 //TX_RATIO_DT_L0_TH -228 0x7FFF //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H +228 0x1000 //TX_B_POST_FILT_ECHO_L +229 0x1000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x05DC //TX_RATIO_DT_L0_TH_HIGH +234 0x0BB8 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -32290,10 +27201,10 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 +242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF900 //TX_THR_SN_EST_3 +244 0xF200 //TX_THR_SN_EST_2 +245 0xF200 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 @@ -32301,7 +27212,7 @@ 250 0x0050 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0080 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x01A0 //TX_DELTA_THR_SN_EST_6 @@ -32315,12 +27226,12 @@ 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T +267 0x0018 //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x7F00 //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH +272 0x0800 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L @@ -32330,7 +27241,7 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0012 //TX_NS_LVL_CTRL_1 +282 0x0020 //TX_NS_LVL_CTRL_1 283 0x0015 //TX_NS_LVL_CTRL_2 284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 @@ -32338,20 +27249,20 @@ 287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 -290 0x000D //TX_MIN_GAIN_S_1 +290 0x0004 //TX_MIN_GAIN_S_1 291 0x000F //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000F //TX_MIN_GAIN_S_4 294 0x0010 //TX_MIN_GAIN_S_5 295 0x000F //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 -297 0x4000 //TX_NMOS_SUP +297 0x2000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x3000 //TX_SNRI_SUP_1 +301 0x4000 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 -303 0x2400 //TX_SNRI_SUP_3 +303 0x6000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 @@ -32363,17 +27274,17 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x2000 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x2000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 318 0x3000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 +323 0x7000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 326 0x3000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -32387,8 +27298,8 @@ 336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT -339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 +339 0x7000 //TX_LAMBDA_PFILT_S_0 +340 0x7400 //TX_LAMBDA_PFILT_S_1 341 0x7900 //TX_LAMBDA_PFILT_S_2 342 0x7000 //TX_LAMBDA_PFILT_S_3 343 0x7D00 //TX_LAMBDA_PFILT_S_4 @@ -32402,32 +27313,32 @@ 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0100 //TX_DT_BINVAD_TH_1 -355 0x0100 //TX_DT_BINVAD_TH_2 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x0FA0 //TX_DT_BINVAD_ENDF -358 0x7000 //TX_C_POST_FLT_DT +358 0x0080 //TX_C_POST_FLT_DT 359 0x4000 //TX_NS_B_POST_FLT_LESSCUT -360 0x01B0 //TX_DT_BOOST +360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x003B //TX_NOISE_TH_0 +367 0x0023 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x03ED //TX_NOISE_TH_2 -372 0x2EE0 //TX_NOISE_TH_3 -373 0x5528 //TX_NOISE_TH_4 +372 0x2CEC //TX_NOISE_TH_3 +373 0x4268 //TX_NOISE_TH_4 374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 -379 0x00C8 //TX_MINENOISE_TH +379 0x000A //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH @@ -32440,12 +27351,12 @@ 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH +392 0x7000 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -32454,7 +27365,7 @@ 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0032 //TX_MINENOISE_MIC0_TH +406 0x000A //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -32557,25 +27468,25 @@ 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC +509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -32593,38 +27504,38 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM -567 0x5050 //TX_FDEQ_GAIN_0 -568 0x5048 //TX_FDEQ_GAIN_1 +567 0x5250 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 -570 0x483C //TX_FDEQ_GAIN_3 -571 0x3034 //TX_FDEQ_GAIN_4 -572 0x3048 //TX_FDEQ_GAIN_5 -573 0x4840 //TX_FDEQ_GAIN_6 -574 0x403C //TX_FDEQ_GAIN_7 -575 0x262C //TX_FDEQ_GAIN_8 -576 0x3A3C //TX_FDEQ_GAIN_9 +570 0x4A43 //TX_FDEQ_GAIN_3 +571 0x374B //TX_FDEQ_GAIN_4 +572 0x3444 //TX_FDEQ_GAIN_5 +573 0x433C //TX_FDEQ_GAIN_6 +574 0x3A37 //TX_FDEQ_GAIN_7 +575 0x2A2A //TX_FDEQ_GAIN_8 +576 0x303C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 @@ -32673,8 +27584,8 @@ 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4A4C //TX_PREEQ_GAIN_MIC0_8 -626 0x4E50 //TX_PREEQ_GAIN_MIC0_9 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -32721,9 +27632,9 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4846 //TX_PREEQ_GAIN_MIC1_7 -674 0x4544 //TX_PREEQ_GAIN_MIC1_8 -675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +673 0x4A4A //TX_PREEQ_GAIN_MIC1_7 +674 0x4B4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4D4E //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -32769,10 +27680,10 @@ 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +721 0x484A //TX_PREEQ_GAIN_MIC2_6 +722 0x4B4B //TX_PREEQ_GAIN_MIC2_7 +723 0x4B4C //TX_PREEQ_GAIN_MIC2_8 +724 0x4D50 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 @@ -32787,16 +27698,16 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0000 //TX_PREEQ_BIN_MIC2_0 -740 0x0000 //TX_PREEQ_BIN_MIC2_1 -741 0x0000 //TX_PREEQ_BIN_MIC2_2 -742 0x0000 //TX_PREEQ_BIN_MIC2_3 -743 0x0000 //TX_PREEQ_BIN_MIC2_4 -744 0x0000 //TX_PREEQ_BIN_MIC2_5 -745 0x0000 //TX_PREEQ_BIN_MIC2_6 -746 0x0000 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0708 //TX_PREEQ_BIN_MIC2_6 +746 0x090A //TX_PREEQ_BIN_MIC2_7 +747 0x0B0C //TX_PREEQ_BIN_MIC2_8 +748 0x0D0E //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 @@ -32821,7 +27732,7 @@ 770 0x0044 //TX_MIC_PWR_BIAS_1 771 0x0044 //TX_MIC_PWR_BIAS_2 772 0x0044 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 +773 0x0000 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 @@ -32839,7 +27750,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -32864,23 +27775,23 @@ 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP +830 0x0130 //TX_TPKA_FP +831 0x0400 //TX_MIN_G_FP +832 0x0800 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH @@ -32902,8 +27813,8 @@ 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX -854 0x0004 //TX_TDDRC_THRD_0 -855 0x0010 //TX_TDDRC_THRD_1 +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0018 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 858 0x7FFF //TX_TDDRC_SLANT_0 @@ -32914,7 +27825,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0A00 //TX_TDDRC_DRC_GAIN +866 0x1C2F //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -32924,7 +27835,7 @@ 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK +876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 @@ -32946,72 +27857,98 @@ 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0300 //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME +903 0x0009 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +908 0x7F00 //TX_MICMUTE_EAD_THR +909 0x4000 //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 +911 0x7F44 //TX_DTD_THR1_MICMUTE_0 +912 0x7EF4 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N +922 0x0FA0 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x000F //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x3BF6 //TX_TFMASKM4_2_DT_THR +945 0x7F26 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x202C //RX_RECVFUNC_MODE_0 +0 0xA020 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -33033,11 +27970,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -33199,10 +28136,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -33298,10 +28235,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -33397,10 +28334,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -33496,10 +28433,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -33595,10 +28532,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -33694,10 +28631,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -33793,10 +28730,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -33862,7 +28799,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 +157 0xA020 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC @@ -33884,11 +28821,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -34050,10 +28987,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -34149,10 +29086,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -34248,10 +29185,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -34347,10 +29284,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -34446,10 +29383,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -34545,10 +29482,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -34644,10 +29581,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -34714,15 +29651,14 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-WB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x6F7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6FFD //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC @@ -34739,18 +29675,18 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0010 //TX_DIST2REF_02 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -34759,8 +29695,8 @@ 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 43 0x0001 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 @@ -34831,8 +29767,8 @@ 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC -113 0x0004 //TX_MAINMIC_BLKFACTOR -114 0x0004 //TX_REFMIC_BLKFACTOR +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN @@ -34856,11 +29792,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -34868,10 +29804,10 @@ 147 0x0300 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6800 //TX_EAD_THR +150 0x6C00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x3000 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 154 0x0200 //TX_MIN_EQ_RE_EST_2 155 0x0200 //TX_MIN_EQ_RE_EST_3 156 0x0200 //TX_MIN_EQ_RE_EST_4 @@ -34882,14 +29818,14 @@ 161 0x1000 //TX_MIN_EQ_RE_EST_9 162 0x1000 //TX_MIN_EQ_RE_EST_10 163 0x1000 //TX_MIN_EQ_RE_EST_11 -164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x1B00 //TX_LAMBDA_RE_EST +164 0x6000 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x5000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N +169 0x02A0 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x0020 //TX_DT2_HOLD_N +171 0x0088 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -34915,15 +29851,15 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x76D0 //TX_DTD_THR1_0 -198 0x76D0 //TX_DTD_THR1_1 -199 0x76D0 //TX_DTD_THR1_2 +197 0x7FF8 //TX_DTD_THR1_0 +198 0x7FF8 //TX_DTD_THR1_1 +199 0x7FEE //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x7E00 //TX_DTD_THR2_0 -205 0x7E00 //TX_DTD_THR2_1 +204 0x5000 //TX_DTD_THR2_0 +205 0x5000 //TX_DTD_THR2_1 206 0x5000 //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 @@ -34931,8 +29867,8 @@ 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x03E8 //TX_DT_CUT_K -214 0x0010 //TX_DT_CUT_THR +213 0x1F40 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO @@ -34941,18 +29877,18 @@ 220 0x0000 //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x044C //TX_RATIO_DT_L_TH_HIGH -226 0x7800 //TX_RATIO_DT_H_TH_HIGH +225 0x1194 //TX_RATIO_DT_L_TH_HIGH +226 0x4A38 //TX_RATIO_DT_H_TH_HIGH 227 0x0001 //TX_RATIO_DT_L0_TH -228 0x7FFF //TX_B_POST_FILT_ECHO_L +228 0x4000 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH +234 0x07D0 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -34960,10 +29896,10 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 +242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFB00 //TX_THR_SN_EST_3 +244 0xF400 //TX_THR_SN_EST_2 +245 0xFC00 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 @@ -34971,7 +29907,7 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 @@ -35001,30 +29937,30 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0018 //TX_NS_LVL_CTRL_2 +283 0x0014 //TX_NS_LVL_CTRL_2 284 0x0016 //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 +290 0x0020 //TX_MIN_GAIN_S_1 291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 +292 0x0018 //TX_MIN_GAIN_S_3 293 0x0010 //TX_MIN_GAIN_S_4 294 0x0010 //TX_MIN_GAIN_S_5 295 0x0010 //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP +297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 +301 0x2000 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 +303 0x2000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x50C0 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x2000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -35035,15 +29971,15 @@ 314 0x5000 //TX_A_POST_FILT_S_0 315 0x4C00 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 +317 0x7FFF //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x4000 //TX_B_POST_FILT_3 +323 0x4000 //TX_B_POST_FILT_1 +324 0x7FFF //TX_B_POST_FILT_2 +325 0x7FFF //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -35058,9 +29994,9 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7A00 //TX_LAMBDA_PFILT_S_2 -342 0x7C00 //TX_LAMBDA_PFILT_S_3 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -35071,12 +30007,12 @@ 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0800 //TX_C_POST_FLT_DT +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x2000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0140 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG @@ -35085,23 +30021,23 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0102 //TX_NOISE_TH_0 +367 0x001E //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 -370 0x017E //TX_NOISE_TH_1 -371 0x0230 //TX_NOISE_TH_2 -372 0x3492 //TX_NOISE_TH_3 -373 0x4E20 //TX_NOISE_TH_4 -374 0x55B8 //TX_NOISE_TH_5 -375 0x49E6 //TX_NOISE_TH_5_2 +370 0x0320 //TX_NOISE_TH_1 +371 0x0384 //TX_NOISE_TH_2 +372 0x2904 //TX_NOISE_TH_3 +373 0x3E80 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 376 0x0001 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 -379 0x00F8 //TX_MINENOISE_TH +379 0x0033 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -35110,25 +30046,25 @@ 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH +392 0x7FFF //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG +401 0x0005 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x00DC //TX_MINENOISE_MIC0_TH +406 0x001E //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL +409 0x0400 //TX_METAL_RTO_THR +410 0x07D0 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 @@ -35227,25 +30163,25 @@ 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC +509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -35263,42 +30199,42 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM -567 0x5454 //TX_FDEQ_GAIN_0 -568 0x5448 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4850 //TX_FDEQ_GAIN_5 -573 0x5050 //TX_FDEQ_GAIN_6 -574 0x5448 //TX_FDEQ_GAIN_7 -575 0x464C //TX_FDEQ_GAIN_8 -576 0x5050 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 +567 0x5048 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4A4F //TX_FDEQ_GAIN_2 +570 0x4E48 //TX_FDEQ_GAIN_3 +571 0x4444 //TX_FDEQ_GAIN_4 +572 0x444B //TX_FDEQ_GAIN_5 +573 0x5152 //TX_FDEQ_GAIN_6 +574 0x584F //TX_FDEQ_GAIN_7 +575 0x4950 //TX_FDEQ_GAIN_8 +576 0x4C48 //TX_FDEQ_GAIN_9 +577 0x3D40 //TX_FDEQ_GAIN_10 +578 0x4240 //TX_FDEQ_GAIN_11 +579 0x4C4C //TX_FDEQ_GAIN_12 +580 0x4C4C //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 @@ -35343,12 +30279,12 @@ 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x484A //TX_PREEQ_GAIN_MIC0_8 -626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 -627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 -628 0x4A48 //TX_PREEQ_GAIN_MIC0_11 -629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 -630 0x4C4C //TX_PREEQ_GAIN_MIC0_13 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 @@ -35391,13 +30327,13 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4846 //TX_PREEQ_GAIN_MIC1_7 -674 0x4544 //TX_PREEQ_GAIN_MIC1_8 -675 0x4241 //TX_PREEQ_GAIN_MIC1_9 -676 0x403E //TX_PREEQ_GAIN_MIC1_10 -677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 -678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +673 0x484A //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4C4E //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5454 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 @@ -35417,11 +30353,11 @@ 696 0x0708 //TX_PREEQ_BIN_MIC1_6 697 0x090A //TX_PREEQ_BIN_MIC1_7 698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0F10 //TX_PREEQ_BIN_MIC1_9 -700 0x1011 //TX_PREEQ_BIN_MIC1_10 -701 0x1112 //TX_PREEQ_BIN_MIC1_11 -702 0x1208 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1112 //TX_PREEQ_BIN_MIC1_12 +703 0x120B //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 @@ -35436,19 +30372,19 @@ 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +718 0x484A //TX_PREEQ_GAIN_MIC2_3 +719 0x4B4A //TX_PREEQ_GAIN_MIC2_4 +720 0x4B4C //TX_PREEQ_GAIN_MIC2_5 +721 0x4C4D //TX_PREEQ_GAIN_MIC2_6 +722 0x4F50 //TX_PREEQ_GAIN_MIC2_7 +723 0x5050 //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5252 //TX_PREEQ_GAIN_MIC2_10 +726 0x5253 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x5454 //TX_PREEQ_GAIN_MIC2_13 +729 0x5455 //TX_PREEQ_GAIN_MIC2_14 +730 0x5555 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 @@ -35472,7 +30408,7 @@ 751 0x0808 //TX_PREEQ_BIN_MIC2_12 752 0x0808 //TX_PREEQ_BIN_MIC2_13 753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 +754 0x0808 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 @@ -35491,8 +30427,8 @@ 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0009 //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN @@ -35509,7 +30445,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -35534,23 +30470,23 @@ 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP +830 0x0100 //TX_TPKA_FP +831 0x0400 //TX_MIN_G_FP +832 0x0800 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH @@ -35572,19 +30508,19 @@ 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0018 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 858 0x7FFF //TX_TDDRC_SLANT_0 859 0x7FFF //TX_TDDRC_SLANT_1 -860 0x0800 //TX_TDDRC_ALPHA_UP_00 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0C97 //TX_TDDRC_DRC_GAIN +866 0x20C6 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -35616,72 +30552,98 @@ 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02EE //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME +903 0x0009 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +908 0x7FF6 //TX_MICMUTE_EAD_THR +909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 +911 0x7FFF //TX_DTD_THR1_MICMUTE_0 +912 0x7FDF //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +914 0x7918 //TX_DTD_THR1_MICMUTE_3 +915 0x7000 //TX_DTD_THR2_MICMUTE_0 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N +922 0x1F40 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x1F40 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x000F //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x3C0A //TX_TFMASKM4_2_DT_THR +945 0x2710 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x202C //RX_RECVFUNC_MODE_0 +0 0xA020 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -35703,11 +30665,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -36532,7 +31494,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 +157 0xA020 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0001 //RX_SAMPLINGFREQ_SIG 160 0x0001 //RX_SAMPLINGFREQ_PROC @@ -36554,11 +31516,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -37384,15 +32346,14 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-SWB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x6F7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6FFD //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC @@ -37409,18 +32370,18 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0010 //TX_DIST2REF_02 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -37429,8 +32390,8 @@ 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 43 0x0001 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 @@ -37516,7 +32477,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7D83 //TX_A_HP +128 0x7B02 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -37526,11 +32487,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -37538,28 +32499,28 @@ 147 0x0400 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7600 //TX_EAD_THR +150 0x7A00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x2000 //TX_MIN_EQ_RE_EST_0 -153 0x0600 //TX_MIN_EQ_RE_EST_1 -154 0x3000 //TX_MIN_EQ_RE_EST_2 -155 0x3000 //TX_MIN_EQ_RE_EST_3 -156 0x3000 //TX_MIN_EQ_RE_EST_4 -157 0x3000 //TX_MIN_EQ_RE_EST_5 -158 0x3000 //TX_MIN_EQ_RE_EST_6 +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x7800 //TX_MIN_EQ_RE_EST_8 -161 0x7800 //TX_MIN_EQ_RE_EST_9 -162 0x7800 //TX_MIN_EQ_RE_EST_10 -163 0x7800 //TX_MIN_EQ_RE_EST_11 -164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x0880 //TX_LAMBDA_RE_EST +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x6000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST 166 0x7FFF //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N +169 0x0260 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0160 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -37586,23 +32547,23 @@ 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7FF0 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 +198 0x7FF3 //TX_DTD_THR1_1 199 0x7FF0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 204 0x7E00 //TX_DTD_THR2_0 -205 0x7E00 //TX_DTD_THR2_1 -206 0x5000 //TX_DTD_THR2_2 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 209 0x5000 //TX_DTD_THR2_5 210 0x5000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 +211 0x6CCC //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x36B0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR +213 0x0FA0 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO @@ -37611,18 +32572,18 @@ 220 0x7FFF //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x733C //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x7FFF //TX_B_POST_FILT_ECHO_L +225 0x0578 //TX_RATIO_DT_L_TH_HIGH +226 0x5528 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x6000 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x3A98 //TX_RATIO_DT_L0_TH_HIGH +234 0x0190 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -37630,21 +32591,21 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 +242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFA00 //TX_THR_SN_EST_3 +244 0xFD00 //TX_THR_SN_EST_2 +245 0xFC00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0000 //TX_DELTA_THR_SN_EST_3 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0100 //TX_DELTA_THR_SN_EST_6 +256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -37662,61 +32623,61 @@ 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x2000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x003C //TX_NS_LVL_CTRL_1 -283 0x0024 //TX_NS_LVL_CTRL_2 -284 0x003C //TX_NS_LVL_CTRL_3 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x000C //TX_NS_LVL_CTRL_2 +284 0x001A //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x003C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x1400 //TX_SNRI_SUP_1 -302 0x1400 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 +301 0x2000 //TX_SNRI_SUP_1 +302 0x3000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x50C0 //TX_SNRI_SUP_5 -306 0x1400 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 +305 0x4000 //TX_SNRI_SUP_5 +306 0x2000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x4C00 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 317 0x6000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x7C00 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x6000 //TX_B_POST_FILT_1 -324 0x6000 //TX_B_POST_FILT_2 +324 0x7000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 +328 0x6000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -37726,17 +32687,17 @@ 335 0x6000 //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7D00 //TX_LAMBDA_PFILT_S_1 -341 0x7D00 //TX_LAMBDA_PFILT_S_2 -342 0x7D00 //TX_LAMBDA_PFILT_S_3 -343 0x7D00 //TX_LAMBDA_PFILT_S_4 -344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 -346 0x7D00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7400 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x01F4 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG @@ -37744,9 +32705,9 @@ 353 0x0040 //TX_DT_BINVAD_TH_0 354 0x0040 //TX_DT_BINVAD_TH_1 355 0x0100 //TX_DT_BINVAD_TH_2 -356 0x0100 //TX_DT_BINVAD_TH_3 +356 0x2000 //TX_DT_BINVAD_TH_3 357 0x36B0 //TX_DT_BINVAD_ENDF -358 0x0200 //TX_C_POST_FLT_DT +358 0x1000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0140 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG @@ -37755,23 +32716,23 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0383 //TX_NOISE_TH_0 +367 0x0050 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 +370 0x0FA0 //TX_NOISE_TH_1 371 0x01F4 //TX_NOISE_TH_2 -372 0x36B0 //TX_NOISE_TH_3 +372 0x300C //TX_NOISE_TH_3 373 0x2710 //TX_NOISE_TH_4 -374 0x2CEC //TX_NOISE_TH_5 +374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 -379 0x044C //TX_MINENOISE_TH +379 0x0050 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 +383 0x07D0 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -37785,20 +32746,20 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG +401 0x0005 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x02F3 //TX_MINENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x4000 //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL +409 0x0200 //TX_METAL_RTO_THR +410 0x07D0 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 @@ -37897,25 +32858,25 @@ 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC +509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -37933,44 +32894,44 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM -567 0x5450 //TX_FDEQ_GAIN_0 -568 0x4C48 //TX_FDEQ_GAIN_1 +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 +571 0x4B48 //TX_FDEQ_GAIN_4 572 0x484E //TX_FDEQ_GAIN_5 -573 0x4E5E //TX_FDEQ_GAIN_6 -574 0x584E //TX_FDEQ_GAIN_7 -575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x564E //TX_FDEQ_GAIN_9 -577 0x5058 //TX_FDEQ_GAIN_10 -578 0x625C //TX_FDEQ_GAIN_11 -579 0x6C6C //TX_FDEQ_GAIN_12 -580 0x7086 //TX_FDEQ_GAIN_13 -581 0x869C //TX_FDEQ_GAIN_14 -582 0xB0B0 //TX_FDEQ_GAIN_15 +573 0x4E58 //TX_FDEQ_GAIN_6 +574 0x565E //TX_FDEQ_GAIN_7 +575 0x484E //TX_FDEQ_GAIN_8 +576 0x4E4C //TX_FDEQ_GAIN_9 +577 0x4A4A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x6050 //TX_FDEQ_GAIN_12 +580 0x585C //TX_FDEQ_GAIN_13 +581 0x5C70 //TX_FDEQ_GAIN_14 +582 0x7880 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -37994,7 +32955,7 @@ 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 -606 0x284A //TX_FDEQ_BIN_15 +606 0x282C //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 @@ -38004,7 +32965,7 @@ 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 @@ -38013,14 +32974,14 @@ 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x494A //TX_PREEQ_GAIN_MIC0_8 -626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 -627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 -628 0x484B //TX_PREEQ_GAIN_MIC0_11 -629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 -630 0x4B48 //TX_PREEQ_GAIN_MIC0_13 -631 0x3838 //TX_PREEQ_GAIN_MIC0_14 -632 0x3835 //TX_PREEQ_GAIN_MIC0_15 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -38035,17 +32996,17 @@ 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1719 //TX_PREEQ_BIN_MIC0_11 -653 0x1B1E //TX_PREEQ_BIN_MIC0_12 -654 0x1E1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x282C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -38053,7 +33014,7 @@ 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 @@ -38061,16 +33022,16 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4846 //TX_PREEQ_GAIN_MIC1_7 -674 0x4544 //TX_PREEQ_GAIN_MIC1_8 -675 0x4241 //TX_PREEQ_GAIN_MIC1_9 -676 0x403E //TX_PREEQ_GAIN_MIC1_10 -677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 -678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 -679 0x3C39 //TX_PREEQ_GAIN_MIC1_13 -680 0x3838 //TX_PREEQ_GAIN_MIC1_14 -681 0x3A3C //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -38084,17 +33045,17 @@ 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 700 0x1013 //TX_PREEQ_BIN_MIC1_10 -701 0x1719 //TX_PREEQ_BIN_MIC1_11 -702 0x1B1E //TX_PREEQ_BIN_MIC1_12 -703 0x1E1E //TX_PREEQ_BIN_MIC1_13 -704 0x1E28 //TX_PREEQ_BIN_MIC1_14 -705 0x282C //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -38109,16 +33070,16 @@ 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 @@ -38127,22 +33088,22 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0xF200 //TX_PREEQ_BIN_MIC2_15 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 @@ -38158,12 +33119,12 @@ 767 0x0050 //TX_MIC_CALIBRATION_2 768 0x0050 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 +770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 -775 0x0000 //TX_GAIN_LIMIT_2 +775 0x000F //TX_GAIN_LIMIT_2 776 0x0000 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP @@ -38179,7 +33140,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -38204,23 +33165,23 @@ 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP +830 0x0100 //TX_TPKA_FP +831 0x0400 //TX_MIN_G_FP +832 0x0800 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH @@ -38242,8 +33203,8 @@ 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX -854 0x0003 //TX_TDDRC_THRD_0 -855 0x0004 //TX_TDDRC_THRD_1 +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0018 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 858 0x7FFF //TX_TDDRC_SLANT_0 @@ -38254,7 +33215,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0E21 //TX_TDDRC_DRC_GAIN +866 0x237B //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -38279,79 +33240,105 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK +891 0x6000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02F0 //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME +903 0x0009 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +908 0x7FD0 //TX_MICMUTE_EAD_THR +909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +911 0x7DFA //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 +913 0x7FDA //TX_DTD_THR1_MICMUTE_2 +914 0x7EF4 //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N +922 0x3E80 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x3E80 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x0014 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x36B0 //TX_TFMASKM4_2_DT_THR +945 0x6590 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x202C //RX_RECVFUNC_MODE_0 +0 0xA020 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -38373,11 +33360,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -39202,7 +34189,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 +157 0xA020 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC @@ -39224,11 +34211,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -40054,16 +35041,15 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-FB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x6B7C //TX_SENDFUNC_MODE_0 +3 0x4B7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC +5 0x0003 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -40079,18 +35065,18 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0010 //TX_DIST2REF_02 +21 0x00A4 //TX_DIST2REF1 +22 0x0017 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +27 0x0FF7 //TX_PGA_0 +28 0x0FF7 //TX_PGA_1 +29 0x0FF7 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -40196,11 +35182,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -40223,7 +35209,7 @@ 162 0x7FFF //TX_MIN_EQ_RE_EST_10 163 0x7FFF //TX_MIN_EQ_RE_EST_11 164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x0700 //TX_LAMBDA_RE_EST +165 0x4000 //TX_LAMBDA_RE_EST 166 0x0CCD //TX_LAMBDA_CB_NLE 167 0x2000 //TX_C_POST_FLT 168 0x7FFF //TX_GAIN_NP @@ -40283,16 +35269,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1194 //TX_RATIO_DT_L_TH_HIGH +225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x7FFF //TX_B_POST_FILT_ECHO_L +228 0x2000 //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0063 //TX_EPD_OFFSET_00 +232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x0A28 //TX_RATIO_DT_L0_TH_HIGH +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -40300,7 +35286,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF700 //TX_THR_SN_EST_0 +242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -40405,14 +35391,14 @@ 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0180 //TX_K_PEPPER +347 0x0000 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x2000 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 355 0x0200 //TX_DT_BINVAD_TH_2 356 0x0200 //TX_DT_BINVAD_TH_3 357 0x1F40 //TX_DT_BINVAD_ENDF @@ -40425,7 +35411,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x04E8 //TX_NOISE_TH_0 +367 0x0050 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -40437,11 +35423,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 -379 0x02BC //TX_MINENOISE_TH +379 0x0033 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x1482 //TX_DT_CUT_K1 +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -40455,16 +35441,16 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG +401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x04E7 //TX_MINENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -40572,20 +35558,20 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -40603,44 +35589,44 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 -570 0x484C //TX_FDEQ_GAIN_3 -571 0x4C4C //TX_FDEQ_GAIN_4 -572 0x544C //TX_FDEQ_GAIN_5 -573 0x5454 //TX_FDEQ_GAIN_6 -574 0x5454 //TX_FDEQ_GAIN_7 -575 0x585A //TX_FDEQ_GAIN_8 -576 0x5C5C //TX_FDEQ_GAIN_9 -577 0x6068 //TX_FDEQ_GAIN_10 -578 0x8894 //TX_FDEQ_GAIN_11 -579 0x94B4 //TX_FDEQ_GAIN_12 -580 0xB4C7 //TX_FDEQ_GAIN_13 -581 0xC7C6 //TX_FDEQ_GAIN_14 -582 0xC6C6 //TX_FDEQ_GAIN_15 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4853 //TX_FDEQ_GAIN_9 +577 0x5450 //TX_FDEQ_GAIN_10 +578 0x7465 //TX_FDEQ_GAIN_11 +579 0x807F //TX_FDEQ_GAIN_12 +580 0x82C4 //TX_FDEQ_GAIN_13 +581 0xC4C4 //TX_FDEQ_GAIN_14 +582 0xC4C4 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -40674,24 +35660,24 @@ 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4849 //TX_PREEQ_GAIN_MIC0_6 -624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 -626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 -627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 -628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 -629 0x4838 //TX_PREEQ_GAIN_MIC0_12 -630 0x3858 //TX_PREEQ_GAIN_MIC0_13 -631 0x7060 //TX_PREEQ_GAIN_MIC0_14 -632 0x9870 //TX_PREEQ_GAIN_MIC0_15 -633 0x5848 //TX_PREEQ_GAIN_MIC0_16 +623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 +624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 +625 0x5456 //TX_PREEQ_GAIN_MIC0_8 +626 0x585C //TX_PREEQ_GAIN_MIC0_9 +627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 +628 0x7478 //TX_PREEQ_GAIN_MIC0_11 +629 0x705C //TX_PREEQ_GAIN_MIC0_12 +630 0x4838 //TX_PREEQ_GAIN_MIC0_13 +631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 @@ -40705,17 +35691,17 @@ 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x0909 //TX_PREEQ_BIN_MIC0_7 +649 0x090B //TX_PREEQ_BIN_MIC0_8 650 0x0C10 //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x4000 //TX_PREEQ_BIN_MIC0_16 +653 0x1414 //TX_PREEQ_BIN_MIC0_12 +654 0x1C1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x462C //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -40730,15 +35716,15 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4645 //TX_PREEQ_GAIN_MIC1_6 -673 0x4442 //TX_PREEQ_GAIN_MIC1_7 -674 0x4140 //TX_PREEQ_GAIN_MIC1_8 -675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 -676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 -677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 -678 0x3938 //TX_PREEQ_GAIN_MIC1_12 -679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 -680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 @@ -40748,23 +35734,23 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0809 //TX_PREEQ_BIN_MIC1_7 -698 0x0A0A //TX_PREEQ_BIN_MIC1_8 -699 0x0C10 //TX_PREEQ_BIN_MIC1_9 -700 0x1013 //TX_PREEQ_BIN_MIC1_10 -701 0x1414 //TX_PREEQ_BIN_MIC1_11 -702 0x261E //TX_PREEQ_BIN_MIC1_12 -703 0x1E14 //TX_PREEQ_BIN_MIC1_13 -704 0x1414 //TX_PREEQ_BIN_MIC1_14 -705 0x2814 //TX_PREEQ_BIN_MIC1_15 -706 0x4000 //TX_PREEQ_BIN_MIC1_16 +690 0x1812 //TX_PREEQ_BIN_MIC1_0 +691 0x0A0A //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x080A //TX_PREEQ_BIN_MIC1_3 +694 0x0B09 //TX_PREEQ_BIN_MIC1_4 +695 0x0A06 //TX_PREEQ_BIN_MIC1_5 +696 0x0606 //TX_PREEQ_BIN_MIC1_6 +697 0x0605 //TX_PREEQ_BIN_MIC1_7 +698 0x050A //TX_PREEQ_BIN_MIC1_8 +699 0x1505 //TX_PREEQ_BIN_MIC1_9 +700 0x0506 //TX_PREEQ_BIN_MIC1_10 +701 0x0615 //TX_PREEQ_BIN_MIC1_11 +702 0x1516 //TX_PREEQ_BIN_MIC1_12 +703 0x2021 //TX_PREEQ_BIN_MIC1_13 +704 0x2021 //TX_PREEQ_BIN_MIC1_14 +705 0x2021 //TX_PREEQ_BIN_MIC1_15 +706 0x0800 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -40849,7 +35835,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -40881,12 +35867,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -40911,20 +35897,20 @@ 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX +853 0x0004 //TX_FILTINDX 854 0x0004 //TX_TDDRC_THRD_0 855 0x0016 //TX_TDDRC_THRD_1 -856 0x1800 //TX_TDDRC_THRD_2 -857 0x1800 //TX_TDDRC_THRD_3 -858 0x7FFF //TX_TDDRC_SLANT_0 -859 0x7FFF //TX_TDDRC_SLANT_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 860 0x0C00 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0B39 //TX_TDDRC_DRC_GAIN +866 0x0A98 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -40949,7 +35935,7 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7000 //TX_A_LESSCUT_RTO_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL @@ -40964,7 +35950,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -40991,37 +35977,63 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x202C //RX_RECVFUNC_MODE_0 +0 0xA020 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -41043,11 +36055,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0500 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000A //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF600 //RX_THR_SN_EST -24 0x7000 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -41872,7 +36884,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 +157 0xA020 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0004 //RX_SAMPLINGFREQ_SIG 160 0x0004 //RX_SAMPLINGFREQ_PROC @@ -41894,11 +36906,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0500 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x000A //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0xF600 //RX_THR_SN_EST -181 0x7000 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -42723,15 +37735,2709 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 +#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-RESERVE2-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6F7D //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x6000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0260 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0160 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF3 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x6CCC //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0FA0 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x0578 //TX_RATIO_DT_L_TH_HIGH +226 0x5528 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x6000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0190 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFD00 //TX_THR_SN_EST_2 +245 0xFC00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x000C //TX_NS_LVL_CTRL_2 +284 0x001A //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x001A //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x4000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x2000 //TX_SNRI_SUP_1 +302 0x3000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x2000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x7000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7400 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x01F4 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x2000 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0FA0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x300C //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0005 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0200 //TX_METAL_RTO_THR +410 0x07D0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E58 //TX_FDEQ_GAIN_6 +574 0x565E //TX_FDEQ_GAIN_7 +575 0x484E //TX_FDEQ_GAIN_8 +576 0x4E4C //TX_FDEQ_GAIN_9 +577 0x4A4A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x6050 //TX_FDEQ_GAIN_12 +580 0x585C //TX_FDEQ_GAIN_13 +581 0x5C70 //TX_FDEQ_GAIN_14 +582 0x7880 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0018 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x27D0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0x8000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x6000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02F0 //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0009 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7FD0 //TX_MICMUTE_EAD_THR +909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7DFA //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 +913 0x7FDA //TX_DTD_THR1_MICMUTE_2 +914 0x7EF4 //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x3E80 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x3E80 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x0014 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x36B0 //TX_TFMASKM4_2_DT_THR +945 0x6590 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x8020 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x8020 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-NB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 +3 0x2B28 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG @@ -42758,9 +40464,9 @@ 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -42850,7 +40556,7 @@ 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD +122 0x0015 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK @@ -42866,11 +40572,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -43125,7 +40831,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -43252,10 +40958,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -43273,38 +40979,38 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 +567 0x6048 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 +573 0x4844 //TX_FDEQ_GAIN_6 +574 0x4242 //TX_FDEQ_GAIN_7 +575 0x3C34 //TX_FDEQ_GAIN_8 +576 0x343A //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 @@ -43319,8 +41025,8 @@ 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 +591 0x0401 //TX_FDEQ_BIN_0 +592 0x0103 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 @@ -43328,7 +41034,7 @@ 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D08 //TX_FDEQ_BIN_9 +600 0x0D0E //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -43551,12 +41257,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -43594,7 +41300,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN +866 0x0650 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -43634,7 +41340,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -43661,37 +41367,63 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x2024 //RX_RECVFUNC_MODE_0 +0 0xA024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -43713,11 +41445,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -43805,8 +41537,8 @@ 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 -114 0x2030 //RX_TDDRC_THRD_2 -115 0x2030 //RX_TDDRC_THRD_3 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 @@ -43815,12 +41547,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN +124 0x0200 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP -129 0x000C //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -43861,8 +41593,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 -114 0x2030 //RX_TDDRC_THRD_2 -115 0x2030 //RX_TDDRC_THRD_3 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 @@ -43879,10 +41611,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -43945,7 +41677,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000C //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -43960,8 +41692,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 -114 0x2030 //RX_TDDRC_THRD_2 -115 0x2030 //RX_TDDRC_THRD_3 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 @@ -43978,10 +41710,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -44044,7 +41776,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL +129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -44059,8 +41791,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 -114 0x2030 //RX_TDDRC_THRD_2 -115 0x2030 //RX_TDDRC_THRD_3 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 @@ -44077,10 +41809,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -44143,7 +41875,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0021 //RX_SPK_VOL +129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -44158,8 +41890,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 -114 0x2030 //RX_TDDRC_THRD_2 -115 0x2030 //RX_TDDRC_THRD_3 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 @@ -44176,10 +41908,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -44242,7 +41974,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0037 //RX_SPK_VOL +129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -44257,8 +41989,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 -114 0x2030 //RX_TDDRC_THRD_2 -115 0x2030 //RX_TDDRC_THRD_3 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 @@ -44275,10 +42007,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -44356,8 +42088,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 -114 0x2030 //RX_TDDRC_THRD_2 -115 0x2030 //RX_TDDRC_THRD_3 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 @@ -44374,10 +42106,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -44455,8 +42187,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 -114 0x2030 //RX_TDDRC_THRD_2 -115 0x2030 //RX_TDDRC_THRD_3 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 @@ -44473,10 +42205,10 @@ 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 +48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -44542,7 +42274,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x2024 //RX_RECVFUNC_MODE_0 +157 0xA024 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC @@ -44564,11 +42296,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -44656,8 +42388,8 @@ 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 -271 0x2030 //RX_TDDRC_THRD_2 -272 0x2030 //RX_TDDRC_THRD_3 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 @@ -44666,12 +42398,12 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0478 //RX_TDDRC_DRC_GAIN +281 0x0200 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP -286 0x000C //RX_SPK_VOL +286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH @@ -44712,8 +42444,8 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 -271 0x2030 //RX_TDDRC_THRD_2 -272 0x2030 //RX_TDDRC_THRD_3 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 @@ -44730,10 +42462,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -44796,7 +42528,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000C //RX_SPK_VOL +286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -44811,8 +42543,8 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 -271 0x2030 //RX_TDDRC_THRD_2 -272 0x2030 //RX_TDDRC_THRD_3 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 @@ -44829,10 +42561,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -44895,7 +42627,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0014 //RX_SPK_VOL +286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -44910,8 +42642,8 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 -271 0x2030 //RX_TDDRC_THRD_2 -272 0x2030 //RX_TDDRC_THRD_3 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 @@ -44928,10 +42660,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -44994,7 +42726,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0021 //RX_SPK_VOL +286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -45009,8 +42741,8 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 -271 0x2030 //RX_TDDRC_THRD_2 -272 0x2030 //RX_TDDRC_THRD_3 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 @@ -45027,10 +42759,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -45093,7 +42825,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0037 //RX_SPK_VOL +286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -45108,8 +42840,8 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 -271 0x2030 //RX_TDDRC_THRD_2 -272 0x2030 //RX_TDDRC_THRD_3 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 @@ -45126,10 +42858,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -45207,8 +42939,8 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 -271 0x2030 //RX_TDDRC_THRD_2 -272 0x2030 //RX_TDDRC_THRD_3 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 @@ -45225,10 +42957,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -45306,8 +43038,8 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 -271 0x2030 //RX_TDDRC_THRD_2 -272 0x2030 //RX_TDDRC_THRD_3 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 @@ -45324,10 +43056,10 @@ 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 +205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -45394,14 +43126,13 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-WB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 +3 0x2B28 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG @@ -45428,9 +43159,9 @@ 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -45520,7 +43251,7 @@ 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD +122 0x0015 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK @@ -45536,11 +43267,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -45795,7 +43526,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -45922,10 +43653,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -45943,29 +43674,29 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x001C //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 +567 0x6056 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 @@ -45990,7 +43721,7 @@ 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 +592 0x0302 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 @@ -45998,11 +43729,11 @@ 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 +600 0x0D07 //TX_FDEQ_BIN_9 601 0x0E0F //TX_FDEQ_BIN_10 602 0x0F10 //TX_FDEQ_BIN_11 603 0x1011 //TX_FDEQ_BIN_12 -604 0x1104 //TX_FDEQ_BIN_13 +604 0x1119 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 @@ -46221,12 +43952,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -46264,7 +43995,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN +866 0x0619 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -46304,7 +44035,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -46331,37 +44062,63 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x2024 //RX_RECVFUNC_MODE_0 +0 0xA020 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -46383,11 +44140,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -46490,7 +44247,7 @@ 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP -129 0x000C //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -46615,7 +44372,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000C //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -46714,7 +44471,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL +129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -46813,7 +44570,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0021 //RX_SPK_VOL +129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -46912,7 +44669,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0037 //RX_SPK_VOL +129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -47212,7 +44969,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x2024 //RX_RECVFUNC_MODE_0 +157 0xA020 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0001 //RX_SAMPLINGFREQ_SIG 160 0x0001 //RX_SAMPLINGFREQ_PROC @@ -47234,11 +44991,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -47341,7 +45098,7 @@ 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP -286 0x000C //RX_SPK_VOL +286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH @@ -47466,7 +45223,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000C //RX_SPK_VOL +286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -47565,7 +45322,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0014 //RX_SPK_VOL +286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -47664,7 +45421,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0021 //RX_SPK_VOL +286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -47763,7 +45520,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0037 //RX_SPK_VOL +286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 @@ -48064,14 +45821,13 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-SWB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 +3 0x2B28 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG @@ -48098,9 +45854,9 @@ 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -48190,7 +45946,7 @@ 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD +122 0x0015 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK @@ -48206,11 +45962,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -48465,7 +46221,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -48592,10 +46348,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -48613,26 +46369,26 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -48891,12 +46647,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -48974,7 +46730,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -49001,37 +46757,63 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x2024 //RX_RECVFUNC_MODE_0 +0 0xA020 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -49053,11 +46835,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -49160,7 +46942,7 @@ 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP -129 0x000C //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -49285,7 +47067,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000C //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x5000 //RX_TDDRC_ALPHA_UP_1 @@ -49384,7 +47166,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL +129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x5000 //RX_TDDRC_ALPHA_UP_1 @@ -49483,7 +47265,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0021 //RX_SPK_VOL +129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x5000 //RX_TDDRC_ALPHA_UP_1 @@ -49582,7 +47364,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0037 //RX_SPK_VOL +129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x5000 //RX_TDDRC_ALPHA_UP_1 @@ -49882,7 +47664,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x2024 //RX_RECVFUNC_MODE_0 +157 0xA020 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC @@ -49904,11 +47686,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -50011,7 +47793,7 @@ 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP -286 0x000C //RX_SPK_VOL +286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH @@ -50136,7 +47918,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000C //RX_SPK_VOL +286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x5000 //RX_TDDRC_ALPHA_UP_1 @@ -50235,7 +48017,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0014 //RX_SPK_VOL +286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x5000 //RX_TDDRC_ALPHA_UP_1 @@ -50334,7 +48116,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0021 //RX_SPK_VOL +286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x5000 //RX_TDDRC_ALPHA_UP_1 @@ -50433,7 +48215,7 @@ 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0037 //RX_SPK_VOL +286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x5000 //RX_TDDRC_ALPHA_UP_1 @@ -50734,14 +48516,13 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-FB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 2 0x0020 //TX_PATCH_REG -3 0x6B6A //TX_SENDFUNC_MODE_0 +3 0x6B2A //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG @@ -50768,9 +48549,9 @@ 27 0x0B4C //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -50860,7 +48641,7 @@ 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD +122 0x0015 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK @@ -50876,11 +48657,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -51135,7 +48916,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -51262,10 +49043,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -51283,26 +49064,26 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -51561,12 +49342,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -51644,7 +49425,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -51671,37 +49452,63 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x202C //RX_RECVFUNC_MODE_0 +0 0xA020 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -51723,11 +49530,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0500 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x000A //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF600 //RX_THR_SN_EST -24 0x7000 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -52552,7 +50359,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 +157 0xA020 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0004 //RX_SAMPLINGFREQ_SIG 160 0x0004 //RX_SAMPLINGFREQ_PROC @@ -52574,11 +50381,11 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0500 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x000A //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0xF600 //RX_THR_SN_EST -181 0x7000 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -53403,8 +51210,2702 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 +#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-RESERVE2-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B28 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xFA00 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0383 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0x8000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x8020 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x8020 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-NB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX @@ -53438,9 +53939,9 @@ 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF @@ -53546,11 +54047,11 @@ 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -53597,7 +54098,7 @@ 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST -189 0x0000 //TX_AEC_NUM_CH +189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH @@ -53805,7 +54306,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L +397 0x0000 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ @@ -53932,10 +54433,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR @@ -53953,26 +54454,26 @@ 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x0000 //TX_WNS_REFGAIN +546 0x0000 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0000 //TX_BF_LESSCUT_BBIN -554 0x0000 //TX_BF_LESSCUT_EBIN -555 0x0000 //TX_POSTBFB0 -556 0x0000 //TX_POSTBFB -557 0x0000 //TX_POSTBFE -558 0x0000 //TX_SPEECH_SNR_TH -559 0x0000 //TX_PB_MAX_PRI_SNR_TH -560 0x0000 //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0000 //TX_BVE_NOISE_FLOOR_1 +554 0x0000 //TX_BVE_NOISE_FLOOR_2 +555 0x0000 //TX_BVE_NOISE_FLOOR_3 +556 0x0000 //TX_BVE_NOISE_FLOOR_4 +557 0x0000 //TX_BVE_NOISE_FLOOR_5 +558 0x0000 //TX_BVE_NOISE_FLOOR_6 +559 0x0000 //TX_BVE_NOISE_FLOOR_7 +560 0x0000 //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -54231,12 +54732,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x0000 //TX_NOISE_FLOOR_TH +824 0x0000 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x0000 //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -54314,7 +54815,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -54341,37 +54842,63 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x243C //RX_RECVFUNC_MODE_0 +0 0x247C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -54381,8 +54908,8 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0403 //RX_PGA -11 0x7646 //RX_A_HP +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 @@ -54393,11 +54920,11 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x4000 //RX_TDDRC_ALPHA_DWN_2 29 0x4000 //RX_TDDRC_ALPHA_DWN_3 @@ -54410,16 +54937,16 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -54438,8 +54965,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -54482,7 +55009,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0005 //RX_FILTINDX +111 0x0004 //RX_FILTINDX 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 @@ -54495,12 +55022,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x03C3 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x1194 //RX_TPKA_FP +126 0x13E0 //RX_TPKA_FP 127 0x0400 //RX_MIN_G_FP -128 0x0800 //RX_MAX_G_FP -129 0x0015 //RX_SPK_VOL +128 0x1500 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -54529,40 +55056,40 @@ 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8050 //RX_FDEQ_GAIN_1 -41 0x4840 //RX_FDEQ_GAIN_2 -42 0x4040 //RX_FDEQ_GAIN_3 -43 0x4C68 //RX_FDEQ_GAIN_4 -44 0x403C //RX_FDEQ_GAIN_5 -45 0x3C38 //RX_FDEQ_GAIN_6 -46 0x3430 //RX_FDEQ_GAIN_7 -47 0x303C //RX_FDEQ_GAIN_8 -48 0x4C50 //RX_FDEQ_GAIN_9 +39 0x8484 //RX_FDEQ_GAIN_0 +40 0x8866 //RX_FDEQ_GAIN_1 +41 0x6858 //RX_FDEQ_GAIN_2 +42 0x7077 //RX_FDEQ_GAIN_3 +43 0x8E89 //RX_FDEQ_GAIN_4 +44 0x7B71 //RX_FDEQ_GAIN_5 +45 0x6655 //RX_FDEQ_GAIN_6 +46 0x5452 //RX_FDEQ_GAIN_7 +47 0x524D //RX_FDEQ_GAIN_8 +48 0x5A60 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -54577,16 +55104,16 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0703 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 +63 0x0302 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0C08 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 +72 0x1407 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 @@ -54625,43 +55152,43 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0012 //RX_SPK_VOL +129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8050 //RX_FDEQ_GAIN_1 -41 0x4840 //RX_FDEQ_GAIN_2 -42 0x4040 //RX_FDEQ_GAIN_3 -43 0x4C68 //RX_FDEQ_GAIN_4 -44 0x403C //RX_FDEQ_GAIN_5 -45 0x3C38 //RX_FDEQ_GAIN_6 -46 0x3430 //RX_FDEQ_GAIN_7 -47 0x303C //RX_FDEQ_GAIN_8 -48 0x4C50 //RX_FDEQ_GAIN_9 +39 0x8484 //RX_FDEQ_GAIN_0 +40 0x8866 //RX_FDEQ_GAIN_1 +41 0x6858 //RX_FDEQ_GAIN_2 +42 0x7077 //RX_FDEQ_GAIN_3 +43 0x8E89 //RX_FDEQ_GAIN_4 +44 0x7B71 //RX_FDEQ_GAIN_5 +45 0x6655 //RX_FDEQ_GAIN_6 +46 0x5452 //RX_FDEQ_GAIN_7 +47 0x524D //RX_FDEQ_GAIN_8 +48 0x5A60 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -54676,16 +55203,16 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0703 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 +63 0x0302 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0C08 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 +72 0x1407 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 @@ -54724,43 +55251,43 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001B //RX_SPK_VOL +129 0x0089 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8050 //RX_FDEQ_GAIN_1 -41 0x4840 //RX_FDEQ_GAIN_2 -42 0x4040 //RX_FDEQ_GAIN_3 -43 0x4C68 //RX_FDEQ_GAIN_4 -44 0x403C //RX_FDEQ_GAIN_5 -45 0x3C38 //RX_FDEQ_GAIN_6 -46 0x3430 //RX_FDEQ_GAIN_7 -47 0x303C //RX_FDEQ_GAIN_8 -48 0x4C50 //RX_FDEQ_GAIN_9 +39 0x8484 //RX_FDEQ_GAIN_0 +40 0x8866 //RX_FDEQ_GAIN_1 +41 0x6858 //RX_FDEQ_GAIN_2 +42 0x7077 //RX_FDEQ_GAIN_3 +43 0x8E89 //RX_FDEQ_GAIN_4 +44 0x7B71 //RX_FDEQ_GAIN_5 +45 0x6655 //RX_FDEQ_GAIN_6 +46 0x5452 //RX_FDEQ_GAIN_7 +47 0x524D //RX_FDEQ_GAIN_8 +48 0x5A60 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -54775,16 +55302,16 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0703 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 +63 0x0302 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0C08 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 +72 0x1407 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 @@ -54823,43 +55350,43 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0026 //RX_SPK_VOL +129 0x00C0 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x0112 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8050 //RX_FDEQ_GAIN_1 -41 0x4840 //RX_FDEQ_GAIN_2 -42 0x4040 //RX_FDEQ_GAIN_3 -43 0x4C68 //RX_FDEQ_GAIN_4 -44 0x403C //RX_FDEQ_GAIN_5 -45 0x3C38 //RX_FDEQ_GAIN_6 -46 0x3430 //RX_FDEQ_GAIN_7 -47 0x303C //RX_FDEQ_GAIN_8 -48 0x4C50 //RX_FDEQ_GAIN_9 +39 0x8484 //RX_FDEQ_GAIN_0 +40 0x8866 //RX_FDEQ_GAIN_1 +41 0x6858 //RX_FDEQ_GAIN_2 +42 0x7077 //RX_FDEQ_GAIN_3 +43 0x8E89 //RX_FDEQ_GAIN_4 +44 0x7B71 //RX_FDEQ_GAIN_5 +45 0x6655 //RX_FDEQ_GAIN_6 +46 0x5452 //RX_FDEQ_GAIN_7 +47 0x524D //RX_FDEQ_GAIN_8 +48 0x5A60 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -54874,16 +55401,16 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0703 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 +63 0x0302 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0C08 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 +72 0x1407 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 @@ -54922,43 +55449,43 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0037 //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 +112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0D56 //RX_TDDRC_DRC_GAIN +124 0x0191 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8050 //RX_FDEQ_GAIN_1 -41 0x4840 //RX_FDEQ_GAIN_2 -42 0x4040 //RX_FDEQ_GAIN_3 -43 0x4470 //RX_FDEQ_GAIN_4 -44 0x383C //RX_FDEQ_GAIN_5 -45 0x3C3C //RX_FDEQ_GAIN_6 -46 0x3434 //RX_FDEQ_GAIN_7 -47 0x344C //RX_FDEQ_GAIN_8 -48 0x585C //RX_FDEQ_GAIN_9 +39 0x8484 //RX_FDEQ_GAIN_0 +40 0x8866 //RX_FDEQ_GAIN_1 +41 0x6858 //RX_FDEQ_GAIN_2 +42 0x7077 //RX_FDEQ_GAIN_3 +43 0x8E89 //RX_FDEQ_GAIN_4 +44 0x7B71 //RX_FDEQ_GAIN_5 +45 0x6655 //RX_FDEQ_GAIN_6 +46 0x5452 //RX_FDEQ_GAIN_7 +47 0x524D //RX_FDEQ_GAIN_8 +48 0x5A60 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -54973,16 +55500,16 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0703 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 +63 0x0302 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0C08 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 +72 0x1407 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 @@ -55021,43 +55548,43 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x002C //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 +112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0D56 //RX_TDDRC_DRC_GAIN +124 0x02A9 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8050 //RX_FDEQ_GAIN_1 -41 0x4840 //RX_FDEQ_GAIN_2 -42 0x4040 //RX_FDEQ_GAIN_3 -43 0x4470 //RX_FDEQ_GAIN_4 -44 0x383C //RX_FDEQ_GAIN_5 -45 0x3C3C //RX_FDEQ_GAIN_6 -46 0x3434 //RX_FDEQ_GAIN_7 -47 0x344C //RX_FDEQ_GAIN_8 -48 0x585C //RX_FDEQ_GAIN_9 +39 0x9C9C //RX_FDEQ_GAIN_0 +40 0x9D74 //RX_FDEQ_GAIN_1 +41 0x706C //RX_FDEQ_GAIN_2 +42 0x809A //RX_FDEQ_GAIN_3 +43 0xA6A4 //RX_FDEQ_GAIN_4 +44 0xAA99 //RX_FDEQ_GAIN_5 +45 0x775F //RX_FDEQ_GAIN_6 +46 0x5F4A //RX_FDEQ_GAIN_7 +47 0x4A4A //RX_FDEQ_GAIN_8 +48 0x5060 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -55072,16 +55599,16 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0703 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 +63 0x0302 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0C08 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 +72 0x1407 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 @@ -55120,43 +55647,43 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0051 //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0D56 //RX_TDDRC_DRC_GAIN +124 0x04BB //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8050 //RX_FDEQ_GAIN_1 -41 0x4840 //RX_FDEQ_GAIN_2 -42 0x4040 //RX_FDEQ_GAIN_3 -43 0x4470 //RX_FDEQ_GAIN_4 -44 0x383C //RX_FDEQ_GAIN_5 -45 0x3C3C //RX_FDEQ_GAIN_6 -46 0x3434 //RX_FDEQ_GAIN_7 -47 0x344C //RX_FDEQ_GAIN_8 -48 0x585C //RX_FDEQ_GAIN_9 +39 0x9C9C //RX_FDEQ_GAIN_0 +40 0x9D74 //RX_FDEQ_GAIN_1 +41 0x706C //RX_FDEQ_GAIN_2 +42 0x809A //RX_FDEQ_GAIN_3 +43 0xA6A4 //RX_FDEQ_GAIN_4 +44 0xAA99 //RX_FDEQ_GAIN_5 +45 0x775F //RX_FDEQ_GAIN_6 +46 0x5F4A //RX_FDEQ_GAIN_7 +47 0x4A4A //RX_FDEQ_GAIN_8 +48 0x5060 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -55171,16 +55698,16 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0703 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 +63 0x0302 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0C08 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 +72 0x1407 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 @@ -55222,7 +55749,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x243C //RX_RECVFUNC_MODE_0 +157 0x027C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC @@ -55232,8 +55759,8 @@ 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0403 //RX_PGA -168 0x7646 //RX_A_HP +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 @@ -55247,8 +55774,8 @@ 179 0x0010 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x4000 //RX_TDDRC_ALPHA_DWN_2 186 0x4000 //RX_TDDRC_ALPHA_DWN_3 @@ -55348,10 +55875,10 @@ 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0780 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x1194 //RX_TPKA_FP -284 0x0400 //RX_MIN_G_FP -285 0x0800 //RX_MAX_G_FP -286 0x0015 //RX_SPK_VOL +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH @@ -55392,8 +55919,8 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -55405,15 +55932,15 @@ 281 0x0780 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x8080 //RX_FDEQ_GAIN_0 -197 0x8050 //RX_FDEQ_GAIN_1 -198 0x4840 //RX_FDEQ_GAIN_2 -199 0x4040 //RX_FDEQ_GAIN_3 -200 0x4C68 //RX_FDEQ_GAIN_4 -201 0x403C //RX_FDEQ_GAIN_5 -202 0x3C38 //RX_FDEQ_GAIN_6 -203 0x3430 //RX_FDEQ_GAIN_7 -204 0x303C //RX_FDEQ_GAIN_8 -205 0x4C50 //RX_FDEQ_GAIN_9 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -55432,7 +55959,7 @@ 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 -224 0x0703 //RX_FDEQ_BIN_4 +224 0x0604 //RX_FDEQ_BIN_4 225 0x0406 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 @@ -55476,7 +56003,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0012 //RX_SPK_VOL +286 0x0015 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -55491,8 +56018,8 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -55504,15 +56031,15 @@ 281 0x0780 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x8080 //RX_FDEQ_GAIN_0 -197 0x8050 //RX_FDEQ_GAIN_1 -198 0x4840 //RX_FDEQ_GAIN_2 -199 0x4040 //RX_FDEQ_GAIN_3 -200 0x4C68 //RX_FDEQ_GAIN_4 -201 0x403C //RX_FDEQ_GAIN_5 -202 0x3C38 //RX_FDEQ_GAIN_6 -203 0x3430 //RX_FDEQ_GAIN_7 -204 0x303C //RX_FDEQ_GAIN_8 -205 0x4C50 //RX_FDEQ_GAIN_9 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -55531,7 +56058,7 @@ 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 -224 0x0703 //RX_FDEQ_BIN_4 +224 0x0604 //RX_FDEQ_BIN_4 225 0x0406 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 @@ -55575,7 +56102,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001B //RX_SPK_VOL +286 0x001E //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -55590,8 +56117,8 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -55603,15 +56130,15 @@ 281 0x0780 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x8080 //RX_FDEQ_GAIN_0 -197 0x8050 //RX_FDEQ_GAIN_1 -198 0x4840 //RX_FDEQ_GAIN_2 -199 0x4040 //RX_FDEQ_GAIN_3 -200 0x4C68 //RX_FDEQ_GAIN_4 -201 0x403C //RX_FDEQ_GAIN_5 -202 0x3C38 //RX_FDEQ_GAIN_6 -203 0x3430 //RX_FDEQ_GAIN_7 -204 0x303C //RX_FDEQ_GAIN_8 -205 0x4C50 //RX_FDEQ_GAIN_9 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -55630,7 +56157,7 @@ 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 -224 0x0703 //RX_FDEQ_BIN_4 +224 0x0604 //RX_FDEQ_BIN_4 225 0x0406 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 @@ -55674,7 +56201,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0026 //RX_SPK_VOL +286 0x002A //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -55689,8 +56216,8 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -55702,15 +56229,15 @@ 281 0x0780 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x8080 //RX_FDEQ_GAIN_0 -197 0x8050 //RX_FDEQ_GAIN_1 -198 0x4840 //RX_FDEQ_GAIN_2 -199 0x4040 //RX_FDEQ_GAIN_3 -200 0x4C68 //RX_FDEQ_GAIN_4 -201 0x403C //RX_FDEQ_GAIN_5 -202 0x3C38 //RX_FDEQ_GAIN_6 -203 0x3430 //RX_FDEQ_GAIN_7 -204 0x303C //RX_FDEQ_GAIN_8 -205 0x4C50 //RX_FDEQ_GAIN_9 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -55729,7 +56256,7 @@ 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 -224 0x0703 //RX_FDEQ_BIN_4 +224 0x0604 //RX_FDEQ_BIN_4 225 0x0406 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 @@ -55773,7 +56300,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0037 //RX_SPK_VOL +286 0x003C //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -55788,8 +56315,8 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -55798,18 +56325,18 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0D56 //RX_TDDRC_DRC_GAIN +281 0x0780 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x8080 //RX_FDEQ_GAIN_0 -197 0x8050 //RX_FDEQ_GAIN_1 -198 0x4840 //RX_FDEQ_GAIN_2 -199 0x4040 //RX_FDEQ_GAIN_3 -200 0x4470 //RX_FDEQ_GAIN_4 -201 0x383C //RX_FDEQ_GAIN_5 -202 0x3C3C //RX_FDEQ_GAIN_6 -203 0x3434 //RX_FDEQ_GAIN_7 -204 0x344C //RX_FDEQ_GAIN_8 -205 0x585C //RX_FDEQ_GAIN_9 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -55828,7 +56355,7 @@ 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 -224 0x0703 //RX_FDEQ_BIN_4 +224 0x0604 //RX_FDEQ_BIN_4 225 0x0406 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 @@ -55872,7 +56399,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x002C //RX_SPK_VOL +286 0x0058 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -55887,8 +56414,8 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -55897,18 +56424,18 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0D56 //RX_TDDRC_DRC_GAIN +281 0x0780 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x8080 //RX_FDEQ_GAIN_0 -197 0x8050 //RX_FDEQ_GAIN_1 -198 0x4840 //RX_FDEQ_GAIN_2 -199 0x4040 //RX_FDEQ_GAIN_3 -200 0x4470 //RX_FDEQ_GAIN_4 -201 0x383C //RX_FDEQ_GAIN_5 -202 0x3C3C //RX_FDEQ_GAIN_6 -203 0x3434 //RX_FDEQ_GAIN_7 -204 0x344C //RX_FDEQ_GAIN_8 -205 0x585C //RX_FDEQ_GAIN_9 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -55927,7 +56454,7 @@ 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 -224 0x0703 //RX_FDEQ_BIN_4 +224 0x0604 //RX_FDEQ_BIN_4 225 0x0406 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 @@ -55971,7 +56498,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0051 //RX_SPK_VOL +286 0x0082 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -55986,8 +56513,8 @@ 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -55996,18 +56523,18 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0D56 //RX_TDDRC_DRC_GAIN +281 0x0780 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x8080 //RX_FDEQ_GAIN_0 -197 0x8050 //RX_FDEQ_GAIN_1 -198 0x4840 //RX_FDEQ_GAIN_2 -199 0x4040 //RX_FDEQ_GAIN_3 -200 0x4470 //RX_FDEQ_GAIN_4 -201 0x383C //RX_FDEQ_GAIN_5 -202 0x3C3C //RX_FDEQ_GAIN_6 -203 0x3434 //RX_FDEQ_GAIN_7 -204 0x344C //RX_FDEQ_GAIN_8 -205 0x585C //RX_FDEQ_GAIN_9 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 @@ -56026,7 +56553,7 @@ 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 -224 0x0703 //RX_FDEQ_BIN_4 +224 0x0604 //RX_FDEQ_BIN_4 225 0x0406 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 @@ -56074,7 +56601,6 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-WB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX @@ -56108,9 +56634,9 @@ 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF @@ -56216,11 +56742,11 @@ 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -56267,7 +56793,7 @@ 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST -189 0x0000 //TX_AEC_NUM_CH +189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH @@ -56475,7 +57001,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L +397 0x0000 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ @@ -56602,10 +57128,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR @@ -56623,26 +57149,26 @@ 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x0000 //TX_WNS_REFGAIN +546 0x0000 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0000 //TX_BF_LESSCUT_BBIN -554 0x0000 //TX_BF_LESSCUT_EBIN -555 0x0000 //TX_POSTBFB0 -556 0x0000 //TX_POSTBFB -557 0x0000 //TX_POSTBFE -558 0x0000 //TX_SPEECH_SNR_TH -559 0x0000 //TX_PB_MAX_PRI_SNR_TH -560 0x0000 //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0000 //TX_BVE_NOISE_FLOOR_1 +554 0x0000 //TX_BVE_NOISE_FLOOR_2 +555 0x0000 //TX_BVE_NOISE_FLOOR_3 +556 0x0000 //TX_BVE_NOISE_FLOOR_4 +557 0x0000 //TX_BVE_NOISE_FLOOR_5 +558 0x0000 //TX_BVE_NOISE_FLOOR_6 +559 0x0000 //TX_BVE_NOISE_FLOOR_7 +560 0x0000 //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -56901,12 +57427,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x0000 //TX_NOISE_FLOOR_TH +824 0x0000 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x0000 //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -56984,7 +57510,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -57011,47 +57537,73 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x243C //RX_RECVFUNC_MODE_0 +0 0x247C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0403 //RX_PGA +10 0x0800 //RX_PGA 11 0x7B02 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -57063,37 +57615,37 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6864 //RX_FDEQ_GAIN_1 -41 0x7070 //RX_FDEQ_GAIN_2 -42 0x6058 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x8854 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x847A //RX_FDEQ_GAIN_0 +40 0x6C66 //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x7084 //RX_FDEQ_GAIN_3 +43 0x7E82 //RX_FDEQ_GAIN_4 +44 0x7874 //RX_FDEQ_GAIN_5 +45 0x5864 //RX_FDEQ_GAIN_6 +46 0x625C //RX_FDEQ_GAIN_7 +47 0x5C50 //RX_FDEQ_GAIN_8 +48 0x545A //RX_FDEQ_GAIN_9 +49 0x5C58 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x6460 //RX_FDEQ_GAIN_12 +52 0x5048 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -57104,20 +57656,20 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 +63 0x0401 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0202 //RX_FDEQ_BIN_3 +67 0x0704 //RX_FDEQ_BIN_4 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +73 0x1006 //RX_FDEQ_BIN_10 +74 0x1614 //RX_FDEQ_BIN_11 +75 0x1414 //RX_FDEQ_BIN_12 +76 0x1404 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -57153,11 +57705,11 @@ 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x0CE0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -57165,11 +57717,11 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x03FC //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x157C //RX_TPKA_FP +126 0x13E0 //RX_TPKA_FP 127 0x0400 //RX_MIN_G_FP -128 0x0800 //RX_MAX_G_FP +128 0x1000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG @@ -57200,20 +57752,20 @@ 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -57221,22 +57773,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x5C5C //RX_FDEQ_GAIN_0 -40 0x5448 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4840 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x6048 //RX_FDEQ_GAIN_5 -45 0x4C40 //RX_FDEQ_GAIN_6 -46 0x4038 //RX_FDEQ_GAIN_7 -47 0x3C48 //RX_FDEQ_GAIN_8 -48 0x545C //RX_FDEQ_GAIN_9 -49 0x6864 //RX_FDEQ_GAIN_10 -50 0x7058 //RX_FDEQ_GAIN_11 -51 0x443C //RX_FDEQ_GAIN_12 -52 0x3838 //RX_FDEQ_GAIN_13 +39 0x845C //RX_FDEQ_GAIN_0 +40 0x5050 //RX_FDEQ_GAIN_1 +41 0x545A //RX_FDEQ_GAIN_2 +42 0x6773 //RX_FDEQ_GAIN_3 +43 0x7A77 //RX_FDEQ_GAIN_4 +44 0x6D6C //RX_FDEQ_GAIN_5 +45 0x6361 //RX_FDEQ_GAIN_6 +46 0x635D //RX_FDEQ_GAIN_7 +47 0x5A5E //RX_FDEQ_GAIN_8 +48 0x6060 //RX_FDEQ_GAIN_9 +49 0x605C //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x6460 //RX_FDEQ_GAIN_12 +52 0x5048 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -57247,20 +57799,20 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0401 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0403 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +73 0x1006 //RX_FDEQ_BIN_10 +74 0x1614 //RX_FDEQ_BIN_11 +75 0x1414 //RX_FDEQ_BIN_12 +76 0x1404 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -57295,24 +57847,24 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0011 //RX_SPK_VOL +129 0x005C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -57320,22 +57872,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x5C5C //RX_FDEQ_GAIN_0 -40 0x5448 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4840 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x6048 //RX_FDEQ_GAIN_5 -45 0x4C40 //RX_FDEQ_GAIN_6 -46 0x4038 //RX_FDEQ_GAIN_7 -47 0x3C48 //RX_FDEQ_GAIN_8 -48 0x545C //RX_FDEQ_GAIN_9 -49 0x6864 //RX_FDEQ_GAIN_10 -50 0x7058 //RX_FDEQ_GAIN_11 -51 0x443C //RX_FDEQ_GAIN_12 -52 0x3838 //RX_FDEQ_GAIN_13 +39 0x845C //RX_FDEQ_GAIN_0 +40 0x5050 //RX_FDEQ_GAIN_1 +41 0x545A //RX_FDEQ_GAIN_2 +42 0x6773 //RX_FDEQ_GAIN_3 +43 0x7A77 //RX_FDEQ_GAIN_4 +44 0x6D6C //RX_FDEQ_GAIN_5 +45 0x6361 //RX_FDEQ_GAIN_6 +46 0x635D //RX_FDEQ_GAIN_7 +47 0x5A5E //RX_FDEQ_GAIN_8 +48 0x6060 //RX_FDEQ_GAIN_9 +49 0x605C //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x6460 //RX_FDEQ_GAIN_12 +52 0x5048 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -57346,20 +57898,20 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0401 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0403 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +73 0x1006 //RX_FDEQ_BIN_10 +74 0x1614 //RX_FDEQ_BIN_11 +75 0x1414 //RX_FDEQ_BIN_12 +76 0x1404 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -57394,24 +57946,24 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0019 //RX_SPK_VOL +129 0x0087 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -57419,22 +57971,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x5C5C //RX_FDEQ_GAIN_0 -40 0x5448 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4840 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x6048 //RX_FDEQ_GAIN_5 -45 0x4C40 //RX_FDEQ_GAIN_6 -46 0x4038 //RX_FDEQ_GAIN_7 -47 0x3C48 //RX_FDEQ_GAIN_8 -48 0x545C //RX_FDEQ_GAIN_9 -49 0x6864 //RX_FDEQ_GAIN_10 -50 0x7058 //RX_FDEQ_GAIN_11 -51 0x443C //RX_FDEQ_GAIN_12 -52 0x3838 //RX_FDEQ_GAIN_13 +39 0x845C //RX_FDEQ_GAIN_0 +40 0x5050 //RX_FDEQ_GAIN_1 +41 0x545A //RX_FDEQ_GAIN_2 +42 0x6773 //RX_FDEQ_GAIN_3 +43 0x7A77 //RX_FDEQ_GAIN_4 +44 0x6D6C //RX_FDEQ_GAIN_5 +45 0x6361 //RX_FDEQ_GAIN_6 +46 0x635D //RX_FDEQ_GAIN_7 +47 0x5A5E //RX_FDEQ_GAIN_8 +48 0x6060 //RX_FDEQ_GAIN_9 +49 0x605C //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x6460 //RX_FDEQ_GAIN_12 +52 0x5048 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -57445,20 +57997,20 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0401 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0403 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +73 0x1006 //RX_FDEQ_BIN_10 +74 0x1614 //RX_FDEQ_BIN_11 +75 0x1414 //RX_FDEQ_BIN_12 +76 0x1404 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -57493,24 +58045,24 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0024 //RX_SPK_VOL +129 0x00BE //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -57518,22 +58070,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x0118 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x5C5C //RX_FDEQ_GAIN_0 -40 0x5448 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4840 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x6048 //RX_FDEQ_GAIN_5 -45 0x4C40 //RX_FDEQ_GAIN_6 -46 0x4038 //RX_FDEQ_GAIN_7 -47 0x3C48 //RX_FDEQ_GAIN_8 -48 0x545C //RX_FDEQ_GAIN_9 -49 0x6864 //RX_FDEQ_GAIN_10 -50 0x7058 //RX_FDEQ_GAIN_11 -51 0x443C //RX_FDEQ_GAIN_12 -52 0x3838 //RX_FDEQ_GAIN_13 +39 0x845C //RX_FDEQ_GAIN_0 +40 0x5050 //RX_FDEQ_GAIN_1 +41 0x545A //RX_FDEQ_GAIN_2 +42 0x6773 //RX_FDEQ_GAIN_3 +43 0x7A77 //RX_FDEQ_GAIN_4 +44 0x6D6C //RX_FDEQ_GAIN_5 +45 0x6361 //RX_FDEQ_GAIN_6 +46 0x635D //RX_FDEQ_GAIN_7 +47 0x5A5E //RX_FDEQ_GAIN_8 +48 0x6060 //RX_FDEQ_GAIN_9 +49 0x605C //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x6460 //RX_FDEQ_GAIN_12 +52 0x5048 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -57544,20 +58096,20 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0401 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0403 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +73 0x1006 //RX_FDEQ_BIN_10 +74 0x1614 //RX_FDEQ_BIN_11 +75 0x1414 //RX_FDEQ_BIN_12 +76 0x1404 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -57592,24 +58144,24 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0034 //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 +112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -57617,22 +58169,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0B39 //RX_TDDRC_DRC_GAIN +124 0x018B //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x685C //RX_FDEQ_GAIN_1 -41 0x6868 //RX_FDEQ_GAIN_2 -42 0x544C //RX_FDEQ_GAIN_3 -43 0x4C54 //RX_FDEQ_GAIN_4 -44 0x704C //RX_FDEQ_GAIN_5 -45 0x4C40 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x445C //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x7C74 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x6C6C //RX_FDEQ_GAIN_13 +39 0x845C //RX_FDEQ_GAIN_0 +40 0x5050 //RX_FDEQ_GAIN_1 +41 0x545A //RX_FDEQ_GAIN_2 +42 0x6773 //RX_FDEQ_GAIN_3 +43 0x7A77 //RX_FDEQ_GAIN_4 +44 0x6D6C //RX_FDEQ_GAIN_5 +45 0x6361 //RX_FDEQ_GAIN_6 +46 0x635D //RX_FDEQ_GAIN_7 +47 0x5A5E //RX_FDEQ_GAIN_8 +48 0x6060 //RX_FDEQ_GAIN_9 +49 0x605C //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x6460 //RX_FDEQ_GAIN_12 +52 0x5048 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -57643,20 +58195,20 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0401 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0403 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 +68 0x0605 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +73 0x1006 //RX_FDEQ_BIN_10 +74 0x1614 //RX_FDEQ_BIN_11 +75 0x1414 //RX_FDEQ_BIN_12 +76 0x1404 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -57691,24 +58243,24 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0038 //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 +112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -57716,22 +58268,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0B39 //RX_TDDRC_DRC_GAIN +124 0x0274 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x685C //RX_FDEQ_GAIN_1 -41 0x6868 //RX_FDEQ_GAIN_2 -42 0x544C //RX_FDEQ_GAIN_3 -43 0x4C54 //RX_FDEQ_GAIN_4 -44 0x704C //RX_FDEQ_GAIN_5 -45 0x4C40 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x445C //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x7C74 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x6C6C //RX_FDEQ_GAIN_13 +39 0x8060 //RX_FDEQ_GAIN_0 +40 0x535B //RX_FDEQ_GAIN_1 +41 0x6061 //RX_FDEQ_GAIN_2 +42 0x6E78 //RX_FDEQ_GAIN_3 +43 0x8994 //RX_FDEQ_GAIN_4 +44 0x9485 //RX_FDEQ_GAIN_5 +45 0x6A52 //RX_FDEQ_GAIN_6 +46 0x4F4E //RX_FDEQ_GAIN_7 +47 0x4C4F //RX_FDEQ_GAIN_8 +48 0x4A4B //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C54 //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x8088 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -57742,20 +58294,20 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0401 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0403 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 +68 0x0605 //RX_FDEQ_BIN_5 69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 +70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +73 0x1006 //RX_FDEQ_BIN_10 +74 0x1614 //RX_FDEQ_BIN_11 +75 0x1414 //RX_FDEQ_BIN_12 +76 0x1404 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -57790,24 +58342,24 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0060 //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -57815,22 +58367,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0B39 //RX_TDDRC_DRC_GAIN +124 0x041F //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x685C //RX_FDEQ_GAIN_1 -41 0x6868 //RX_FDEQ_GAIN_2 -42 0x544C //RX_FDEQ_GAIN_3 -43 0x4C54 //RX_FDEQ_GAIN_4 -44 0x704C //RX_FDEQ_GAIN_5 -45 0x4C40 //RX_FDEQ_GAIN_6 -46 0x4040 //RX_FDEQ_GAIN_7 -47 0x445C //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x7C74 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x6C6C //RX_FDEQ_GAIN_13 +39 0x8060 //RX_FDEQ_GAIN_0 +40 0x535B //RX_FDEQ_GAIN_1 +41 0x6061 //RX_FDEQ_GAIN_2 +42 0x6E78 //RX_FDEQ_GAIN_3 +43 0x8994 //RX_FDEQ_GAIN_4 +44 0x9485 //RX_FDEQ_GAIN_5 +45 0x6A52 //RX_FDEQ_GAIN_6 +46 0x4F4E //RX_FDEQ_GAIN_7 +47 0x4C4F //RX_FDEQ_GAIN_8 +48 0x4A4B //RX_FDEQ_GAIN_9 +49 0x4C4C //RX_FDEQ_GAIN_10 +50 0x4C54 //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x8088 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -57841,20 +58393,20 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0401 //RX_FDEQ_BIN_0 +64 0x0104 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0403 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 +68 0x0605 //RX_FDEQ_BIN_5 69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 +70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +73 0x1006 //RX_FDEQ_BIN_10 +74 0x1614 //RX_FDEQ_BIN_11 +75 0x1414 //RX_FDEQ_BIN_12 +76 0x1404 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -57892,7 +58444,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x243C //RX_RECVFUNC_MODE_0 +157 0x027C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0001 //RX_SAMPLINGFREQ_SIG 160 0x0001 //RX_SAMPLINGFREQ_PROC @@ -57902,7 +58454,7 @@ 164 0x6000 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0403 //RX_PGA +167 0x0800 //RX_PGA 168 0x7B02 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 @@ -57917,8 +58469,8 @@ 179 0x0010 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 @@ -57932,19 +58484,19 @@ 194 0x4000 //RX_LMT_ALPHA 195 0x001C //RX_FDEQ_SUBNUM 196 0x6868 //RX_FDEQ_GAIN_0 -197 0x6864 //RX_FDEQ_GAIN_1 -198 0x7070 //RX_FDEQ_GAIN_2 -199 0x6058 //RX_FDEQ_GAIN_3 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 200 0x5C5C //RX_FDEQ_GAIN_4 -201 0x8854 //RX_FDEQ_GAIN_5 -202 0x5448 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 204 0x4860 //RX_FDEQ_GAIN_8 205 0x6068 //RX_FDEQ_GAIN_9 -206 0x7070 //RX_FDEQ_GAIN_10 -207 0x8070 //RX_FDEQ_GAIN_11 -208 0x6060 //RX_FDEQ_GAIN_12 -209 0x7070 //RX_FDEQ_GAIN_13 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 @@ -58018,10 +58570,10 @@ 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0715 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x157C //RX_TPKA_FP -284 0x0400 //RX_MIN_G_FP -285 0x0800 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0011 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH @@ -58055,15 +58607,15 @@ 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -58072,22 +58624,22 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0780 //RX_TDDRC_DRC_GAIN +281 0x0715 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM -196 0x5C5C //RX_FDEQ_GAIN_0 -197 0x5448 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4840 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x6048 //RX_FDEQ_GAIN_5 -202 0x4C40 //RX_FDEQ_GAIN_6 -203 0x4038 //RX_FDEQ_GAIN_7 -204 0x3C48 //RX_FDEQ_GAIN_8 -205 0x545C //RX_FDEQ_GAIN_9 -206 0x6864 //RX_FDEQ_GAIN_10 -207 0x7058 //RX_FDEQ_GAIN_11 -208 0x443C //RX_FDEQ_GAIN_12 -209 0x3838 //RX_FDEQ_GAIN_13 +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 @@ -58154,15 +58706,15 @@ 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -58171,22 +58723,22 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0780 //RX_TDDRC_DRC_GAIN +281 0x0715 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM -196 0x5C5C //RX_FDEQ_GAIN_0 -197 0x5448 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4840 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x6048 //RX_FDEQ_GAIN_5 -202 0x4C40 //RX_FDEQ_GAIN_6 -203 0x4038 //RX_FDEQ_GAIN_7 -204 0x3C48 //RX_FDEQ_GAIN_8 -205 0x545C //RX_FDEQ_GAIN_9 -206 0x6864 //RX_FDEQ_GAIN_10 -207 0x7058 //RX_FDEQ_GAIN_11 -208 0x443C //RX_FDEQ_GAIN_12 -209 0x3838 //RX_FDEQ_GAIN_13 +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 @@ -58253,15 +58805,15 @@ 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -58270,22 +58822,22 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0780 //RX_TDDRC_DRC_GAIN +281 0x0715 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM -196 0x5C5C //RX_FDEQ_GAIN_0 -197 0x5448 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4840 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x6048 //RX_FDEQ_GAIN_5 -202 0x4C40 //RX_FDEQ_GAIN_6 -203 0x4038 //RX_FDEQ_GAIN_7 -204 0x3C48 //RX_FDEQ_GAIN_8 -205 0x545C //RX_FDEQ_GAIN_9 -206 0x6864 //RX_FDEQ_GAIN_10 -207 0x7058 //RX_FDEQ_GAIN_11 -208 0x443C //RX_FDEQ_GAIN_12 -209 0x3838 //RX_FDEQ_GAIN_13 +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 @@ -58352,15 +58904,15 @@ 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -58369,22 +58921,22 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0780 //RX_TDDRC_DRC_GAIN +281 0x0715 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM -196 0x5C5C //RX_FDEQ_GAIN_0 -197 0x5448 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4840 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x6048 //RX_FDEQ_GAIN_5 -202 0x4C40 //RX_FDEQ_GAIN_6 -203 0x4038 //RX_FDEQ_GAIN_7 -204 0x3C48 //RX_FDEQ_GAIN_8 -205 0x545C //RX_FDEQ_GAIN_9 -206 0x6864 //RX_FDEQ_GAIN_10 -207 0x7058 //RX_FDEQ_GAIN_11 -208 0x443C //RX_FDEQ_GAIN_12 -209 0x3838 //RX_FDEQ_GAIN_13 +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 @@ -58443,7 +58995,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0034 //RX_SPK_VOL +286 0x0033 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -58451,15 +59003,15 @@ 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -58468,22 +59020,22 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0B39 //RX_TDDRC_DRC_GAIN +281 0x0715 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x6868 //RX_FDEQ_GAIN_0 -197 0x685C //RX_FDEQ_GAIN_1 -198 0x6868 //RX_FDEQ_GAIN_2 -199 0x544C //RX_FDEQ_GAIN_3 -200 0x4C54 //RX_FDEQ_GAIN_4 -201 0x704C //RX_FDEQ_GAIN_5 -202 0x4C40 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x445C //RX_FDEQ_GAIN_8 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 205 0x6068 //RX_FDEQ_GAIN_9 206 0x7070 //RX_FDEQ_GAIN_10 -207 0x7C74 //RX_FDEQ_GAIN_11 +207 0x8070 //RX_FDEQ_GAIN_11 208 0x6060 //RX_FDEQ_GAIN_12 -209 0x6C6C //RX_FDEQ_GAIN_13 +209 0x7070 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 @@ -58542,7 +59094,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0038 //RX_SPK_VOL +286 0x0049 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -58550,15 +59102,15 @@ 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -58567,22 +59119,22 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0B39 //RX_TDDRC_DRC_GAIN +281 0x0715 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x6868 //RX_FDEQ_GAIN_0 -197 0x685C //RX_FDEQ_GAIN_1 -198 0x6868 //RX_FDEQ_GAIN_2 -199 0x544C //RX_FDEQ_GAIN_3 -200 0x4C54 //RX_FDEQ_GAIN_4 -201 0x704C //RX_FDEQ_GAIN_5 -202 0x4C40 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x445C //RX_FDEQ_GAIN_8 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 205 0x6068 //RX_FDEQ_GAIN_9 206 0x7070 //RX_FDEQ_GAIN_10 -207 0x7C74 //RX_FDEQ_GAIN_11 +207 0x8070 //RX_FDEQ_GAIN_11 208 0x6060 //RX_FDEQ_GAIN_12 -209 0x6C6C //RX_FDEQ_GAIN_13 +209 0x7070 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 @@ -58641,7 +59193,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0060 //RX_SPK_VOL +286 0x0074 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -58649,15 +59201,15 @@ 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -58666,22 +59218,22 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0B39 //RX_TDDRC_DRC_GAIN +281 0x0715 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x6868 //RX_FDEQ_GAIN_0 -197 0x685C //RX_FDEQ_GAIN_1 -198 0x6868 //RX_FDEQ_GAIN_2 -199 0x544C //RX_FDEQ_GAIN_3 -200 0x4C54 //RX_FDEQ_GAIN_4 -201 0x704C //RX_FDEQ_GAIN_5 -202 0x4C40 //RX_FDEQ_GAIN_6 -203 0x4040 //RX_FDEQ_GAIN_7 -204 0x445C //RX_FDEQ_GAIN_8 +197 0x6864 //RX_FDEQ_GAIN_1 +198 0x7070 //RX_FDEQ_GAIN_2 +199 0x6058 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 205 0x6068 //RX_FDEQ_GAIN_9 206 0x7070 //RX_FDEQ_GAIN_10 -207 0x7C74 //RX_FDEQ_GAIN_11 +207 0x8070 //RX_FDEQ_GAIN_11 208 0x6060 //RX_FDEQ_GAIN_12 -209 0x6C6C //RX_FDEQ_GAIN_13 +209 0x7070 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 @@ -58744,7 +59296,6 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-SWB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX @@ -58778,9 +59329,9 @@ 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF @@ -58886,11 +59437,11 @@ 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -58937,7 +59488,7 @@ 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST -189 0x0000 //TX_AEC_NUM_CH +189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH @@ -59145,7 +59696,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L +397 0x0000 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ @@ -59272,10 +59823,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR @@ -59293,26 +59844,26 @@ 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x0000 //TX_WNS_REFGAIN +546 0x0000 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0000 //TX_BF_LESSCUT_BBIN -554 0x0000 //TX_BF_LESSCUT_EBIN -555 0x0000 //TX_POSTBFB0 -556 0x0000 //TX_POSTBFB -557 0x0000 //TX_POSTBFE -558 0x0000 //TX_SPEECH_SNR_TH -559 0x0000 //TX_PB_MAX_PRI_SNR_TH -560 0x0000 //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0000 //TX_BVE_NOISE_FLOOR_1 +554 0x0000 //TX_BVE_NOISE_FLOOR_2 +555 0x0000 //TX_BVE_NOISE_FLOOR_3 +556 0x0000 //TX_BVE_NOISE_FLOOR_4 +557 0x0000 //TX_BVE_NOISE_FLOOR_5 +558 0x0000 //TX_BVE_NOISE_FLOOR_6 +559 0x0000 //TX_BVE_NOISE_FLOOR_7 +560 0x0000 //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -59571,12 +60122,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x0000 //TX_NOISE_FLOOR_TH +824 0x0000 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x0000 //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -59654,7 +60205,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -59681,48 +60232,74 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x243C //RX_RECVFUNC_MODE_0 +0 0x247C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0403 //RX_PGA -11 0x7D83 //RX_A_HP +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 @@ -59733,39 +60310,39 @@ 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL +22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x7C48 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x5858 //RX_FDEQ_GAIN_10 -50 0x5858 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5448 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x5858 //RX_FDEQ_GAIN_15 +39 0x847C //RX_FDEQ_GAIN_0 +40 0x5A56 //RX_FDEQ_GAIN_1 +41 0x6266 //RX_FDEQ_GAIN_2 +42 0x6E7A //RX_FDEQ_GAIN_3 +43 0x8678 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x706E //RX_FDEQ_GAIN_6 +46 0x6C64 //RX_FDEQ_GAIN_7 +47 0x5C6A //RX_FDEQ_GAIN_8 +48 0x6268 //RX_FDEQ_GAIN_9 +49 0x6462 //RX_FDEQ_GAIN_10 +50 0x646E //RX_FDEQ_GAIN_11 +51 0x6860 //RX_FDEQ_GAIN_12 +52 0x646A //RX_FDEQ_GAIN_13 +53 0x7478 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -59774,22 +60351,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0105 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -59823,24 +60400,24 @@ 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x0CE0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x03FC //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x0FA0 //RX_TPKA_FP +126 0x13E0 //RX_TPKA_FP 127 0x0400 //RX_MIN_G_FP -128 0x0800 //RX_MAX_G_FP -129 0x0014 //RX_SPK_VOL +128 0x1000 //RX_MAX_G_FP +129 0x0058 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -59870,20 +60447,20 @@ 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -59891,24 +60468,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x3434 //RX_FDEQ_GAIN_3 -43 0x3840 //RX_FDEQ_GAIN_4 -44 0x4838 //RX_FDEQ_GAIN_5 -45 0x5444 //RX_FDEQ_GAIN_6 -46 0x443C //RX_FDEQ_GAIN_7 -47 0x3C60 //RX_FDEQ_GAIN_8 -48 0x6460 //RX_FDEQ_GAIN_9 -49 0x6064 //RX_FDEQ_GAIN_10 -50 0x5C5C //RX_FDEQ_GAIN_11 -51 0x5440 //RX_FDEQ_GAIN_12 -52 0x4040 //RX_FDEQ_GAIN_13 -53 0x4040 //RX_FDEQ_GAIN_14 -54 0x5858 //RX_FDEQ_GAIN_15 +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -59917,22 +60494,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -59965,24 +60542,24 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0011 //RX_SPK_VOL +129 0x0056 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -59990,24 +60567,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x3434 //RX_FDEQ_GAIN_3 -43 0x3840 //RX_FDEQ_GAIN_4 -44 0x4838 //RX_FDEQ_GAIN_5 -45 0x5444 //RX_FDEQ_GAIN_6 -46 0x443C //RX_FDEQ_GAIN_7 -47 0x3C60 //RX_FDEQ_GAIN_8 -48 0x6460 //RX_FDEQ_GAIN_9 -49 0x6064 //RX_FDEQ_GAIN_10 -50 0x5C5C //RX_FDEQ_GAIN_11 -51 0x5440 //RX_FDEQ_GAIN_12 -52 0x4040 //RX_FDEQ_GAIN_13 -53 0x4040 //RX_FDEQ_GAIN_14 -54 0x5858 //RX_FDEQ_GAIN_15 +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -60016,22 +60593,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -60064,24 +60641,24 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0019 //RX_SPK_VOL +129 0x007D //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -60089,24 +60666,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x3434 //RX_FDEQ_GAIN_3 -43 0x3840 //RX_FDEQ_GAIN_4 -44 0x4838 //RX_FDEQ_GAIN_5 -45 0x5444 //RX_FDEQ_GAIN_6 -46 0x443C //RX_FDEQ_GAIN_7 -47 0x3C60 //RX_FDEQ_GAIN_8 -48 0x6460 //RX_FDEQ_GAIN_9 -49 0x6064 //RX_FDEQ_GAIN_10 -50 0x5C5C //RX_FDEQ_GAIN_11 -51 0x5440 //RX_FDEQ_GAIN_12 -52 0x4040 //RX_FDEQ_GAIN_13 -53 0x4040 //RX_FDEQ_GAIN_14 -54 0x5858 //RX_FDEQ_GAIN_15 +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -60115,22 +60692,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -60163,24 +60740,24 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0025 //RX_SPK_VOL +129 0x00B5 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -60188,24 +60765,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x3434 //RX_FDEQ_GAIN_3 -43 0x3840 //RX_FDEQ_GAIN_4 -44 0x4838 //RX_FDEQ_GAIN_5 -45 0x5444 //RX_FDEQ_GAIN_6 -46 0x443C //RX_FDEQ_GAIN_7 -47 0x3C60 //RX_FDEQ_GAIN_8 -48 0x6460 //RX_FDEQ_GAIN_9 -49 0x6064 //RX_FDEQ_GAIN_10 -50 0x5C5C //RX_FDEQ_GAIN_11 -51 0x5440 //RX_FDEQ_GAIN_12 -52 0x4040 //RX_FDEQ_GAIN_13 -53 0x4040 //RX_FDEQ_GAIN_14 -54 0x5858 //RX_FDEQ_GAIN_15 +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -60214,22 +60791,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -60262,24 +60839,24 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 +112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -60287,24 +60864,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0D56 //RX_TDDRC_DRC_GAIN +124 0x016A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6850 //RX_FDEQ_GAIN_1 -41 0x5048 //RX_FDEQ_GAIN_2 -42 0x383C //RX_FDEQ_GAIN_3 -43 0x4048 //RX_FDEQ_GAIN_4 -44 0x7040 //RX_FDEQ_GAIN_5 -45 0x4C44 //RX_FDEQ_GAIN_6 -46 0x4448 //RX_FDEQ_GAIN_7 -47 0x4868 //RX_FDEQ_GAIN_8 -48 0x7C70 //RX_FDEQ_GAIN_9 -49 0x707C //RX_FDEQ_GAIN_10 -50 0x786C //RX_FDEQ_GAIN_11 -51 0x6454 //RX_FDEQ_GAIN_12 -52 0x604C //RX_FDEQ_GAIN_13 -53 0x585C //RX_FDEQ_GAIN_14 -54 0x7480 //RX_FDEQ_GAIN_15 +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -60313,22 +60890,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -60361,24 +60938,24 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0034 //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 +112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -60386,24 +60963,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0D56 //RX_TDDRC_DRC_GAIN +124 0x022A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6850 //RX_FDEQ_GAIN_1 -41 0x5048 //RX_FDEQ_GAIN_2 -42 0x383C //RX_FDEQ_GAIN_3 -43 0x4048 //RX_FDEQ_GAIN_4 -44 0x7040 //RX_FDEQ_GAIN_5 -45 0x4C44 //RX_FDEQ_GAIN_6 -46 0x4448 //RX_FDEQ_GAIN_7 -47 0x4868 //RX_FDEQ_GAIN_8 -48 0x7C70 //RX_FDEQ_GAIN_9 -49 0x707C //RX_FDEQ_GAIN_10 -50 0x786C //RX_FDEQ_GAIN_11 -51 0x6454 //RX_FDEQ_GAIN_12 -52 0x604C //RX_FDEQ_GAIN_13 -53 0x585C //RX_FDEQ_GAIN_14 -54 0x7480 //RX_FDEQ_GAIN_15 +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x8586 //RX_FDEQ_GAIN_4 +44 0x8682 //RX_FDEQ_GAIN_5 +45 0x7459 //RX_FDEQ_GAIN_6 +46 0x4B4A //RX_FDEQ_GAIN_7 +47 0x4C58 //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x5A48 //RX_FDEQ_GAIN_10 +50 0x487C //RX_FDEQ_GAIN_11 +51 0x685A //RX_FDEQ_GAIN_12 +52 0x5A60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x9090 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -60412,22 +60989,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -60460,24 +61037,24 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0059 //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -60485,24 +61062,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0D56 //RX_TDDRC_DRC_GAIN +124 0x038C //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6850 //RX_FDEQ_GAIN_1 -41 0x5048 //RX_FDEQ_GAIN_2 -42 0x383C //RX_FDEQ_GAIN_3 -43 0x4048 //RX_FDEQ_GAIN_4 -44 0x7040 //RX_FDEQ_GAIN_5 -45 0x4C44 //RX_FDEQ_GAIN_6 -46 0x4448 //RX_FDEQ_GAIN_7 -47 0x4868 //RX_FDEQ_GAIN_8 -48 0x7C70 //RX_FDEQ_GAIN_9 -49 0x707C //RX_FDEQ_GAIN_10 -50 0x786C //RX_FDEQ_GAIN_11 -51 0x6454 //RX_FDEQ_GAIN_12 -52 0x604C //RX_FDEQ_GAIN_13 -53 0x585C //RX_FDEQ_GAIN_14 -54 0x7480 //RX_FDEQ_GAIN_15 +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x8586 //RX_FDEQ_GAIN_4 +44 0x8682 //RX_FDEQ_GAIN_5 +45 0x7459 //RX_FDEQ_GAIN_6 +46 0x4B4A //RX_FDEQ_GAIN_7 +47 0x4C58 //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x5A48 //RX_FDEQ_GAIN_10 +50 0x487C //RX_FDEQ_GAIN_11 +51 0x685A //RX_FDEQ_GAIN_12 +52 0x5A60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x9090 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -60511,22 +61088,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -60562,18 +61139,18 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x243C //RX_RECVFUNC_MODE_0 +157 0x247C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0403 //RX_PGA -168 0x7D83 //RX_A_HP +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 @@ -60584,39 +61161,39 @@ 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL +179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST -181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x7C48 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x5858 //RX_FDEQ_GAIN_10 -207 0x5858 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5448 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x5858 //RX_FDEQ_GAIN_15 +196 0x847C //RX_FDEQ_GAIN_0 +197 0x5A56 //RX_FDEQ_GAIN_1 +198 0x6266 //RX_FDEQ_GAIN_2 +199 0x6E7A //RX_FDEQ_GAIN_3 +200 0x8678 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x706E //RX_FDEQ_GAIN_6 +203 0x6C64 //RX_FDEQ_GAIN_7 +204 0x5C6A //RX_FDEQ_GAIN_8 +205 0x6268 //RX_FDEQ_GAIN_9 +206 0x6462 //RX_FDEQ_GAIN_10 +207 0x646E //RX_FDEQ_GAIN_11 +208 0x6860 //RX_FDEQ_GAIN_12 +209 0x646A //RX_FDEQ_GAIN_13 +210 0x7478 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -60625,22 +61202,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0105 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -60674,24 +61251,24 @@ 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x0CE0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x03FC //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x0FA0 //RX_TPKA_FP +283 0x13E0 //RX_TPKA_FP 284 0x0400 //RX_MIN_G_FP -285 0x0800 //RX_MAX_G_FP -286 0x0014 //RX_SPK_VOL +285 0x1000 //RX_MAX_G_FP +286 0x0058 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH @@ -60721,20 +61298,20 @@ 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -60742,24 +61319,24 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0780 //RX_TDDRC_DRC_GAIN +281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x6868 //RX_FDEQ_GAIN_0 -197 0x6848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x3434 //RX_FDEQ_GAIN_3 -200 0x3840 //RX_FDEQ_GAIN_4 -201 0x4838 //RX_FDEQ_GAIN_5 -202 0x5444 //RX_FDEQ_GAIN_6 -203 0x443C //RX_FDEQ_GAIN_7 -204 0x3C60 //RX_FDEQ_GAIN_8 -205 0x6460 //RX_FDEQ_GAIN_9 -206 0x6064 //RX_FDEQ_GAIN_10 -207 0x5C5C //RX_FDEQ_GAIN_11 -208 0x5440 //RX_FDEQ_GAIN_12 -209 0x4040 //RX_FDEQ_GAIN_13 -210 0x4040 //RX_FDEQ_GAIN_14 -211 0x5858 //RX_FDEQ_GAIN_15 +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -60768,22 +61345,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -60816,24 +61393,24 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0011 //RX_SPK_VOL +286 0x0056 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -60841,24 +61418,24 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0780 //RX_TDDRC_DRC_GAIN +281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x6868 //RX_FDEQ_GAIN_0 -197 0x6848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x3434 //RX_FDEQ_GAIN_3 -200 0x3840 //RX_FDEQ_GAIN_4 -201 0x4838 //RX_FDEQ_GAIN_5 -202 0x5444 //RX_FDEQ_GAIN_6 -203 0x443C //RX_FDEQ_GAIN_7 -204 0x3C60 //RX_FDEQ_GAIN_8 -205 0x6460 //RX_FDEQ_GAIN_9 -206 0x6064 //RX_FDEQ_GAIN_10 -207 0x5C5C //RX_FDEQ_GAIN_11 -208 0x5440 //RX_FDEQ_GAIN_12 -209 0x4040 //RX_FDEQ_GAIN_13 -210 0x4040 //RX_FDEQ_GAIN_14 -211 0x5858 //RX_FDEQ_GAIN_15 +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -60867,22 +61444,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -60915,24 +61492,24 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0019 //RX_SPK_VOL +286 0x007D //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -60940,24 +61517,24 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0780 //RX_TDDRC_DRC_GAIN +281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x6868 //RX_FDEQ_GAIN_0 -197 0x6848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x3434 //RX_FDEQ_GAIN_3 -200 0x3840 //RX_FDEQ_GAIN_4 -201 0x4838 //RX_FDEQ_GAIN_5 -202 0x5444 //RX_FDEQ_GAIN_6 -203 0x443C //RX_FDEQ_GAIN_7 -204 0x3C60 //RX_FDEQ_GAIN_8 -205 0x6460 //RX_FDEQ_GAIN_9 -206 0x6064 //RX_FDEQ_GAIN_10 -207 0x5C5C //RX_FDEQ_GAIN_11 -208 0x5440 //RX_FDEQ_GAIN_12 -209 0x4040 //RX_FDEQ_GAIN_13 -210 0x4040 //RX_FDEQ_GAIN_14 -211 0x5858 //RX_FDEQ_GAIN_15 +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -60966,22 +61543,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -61014,24 +61591,24 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0025 //RX_SPK_VOL +286 0x00B5 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -61039,24 +61616,24 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0780 //RX_TDDRC_DRC_GAIN +281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x6868 //RX_FDEQ_GAIN_0 -197 0x6848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x3434 //RX_FDEQ_GAIN_3 -200 0x3840 //RX_FDEQ_GAIN_4 -201 0x4838 //RX_FDEQ_GAIN_5 -202 0x5444 //RX_FDEQ_GAIN_6 -203 0x443C //RX_FDEQ_GAIN_7 -204 0x3C60 //RX_FDEQ_GAIN_8 -205 0x6460 //RX_FDEQ_GAIN_9 -206 0x6064 //RX_FDEQ_GAIN_10 -207 0x5C5C //RX_FDEQ_GAIN_11 -208 0x5440 //RX_FDEQ_GAIN_12 -209 0x4040 //RX_FDEQ_GAIN_13 -210 0x4040 //RX_FDEQ_GAIN_14 -211 0x5858 //RX_FDEQ_GAIN_15 +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -61065,22 +61642,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -61113,24 +61690,24 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL +286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 +269 0x0000 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -61138,24 +61715,24 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0D56 //RX_TDDRC_DRC_GAIN +281 0x016A //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x6868 //RX_FDEQ_GAIN_0 -197 0x6850 //RX_FDEQ_GAIN_1 -198 0x5048 //RX_FDEQ_GAIN_2 -199 0x383C //RX_FDEQ_GAIN_3 -200 0x4048 //RX_FDEQ_GAIN_4 -201 0x7040 //RX_FDEQ_GAIN_5 -202 0x4C44 //RX_FDEQ_GAIN_6 -203 0x4448 //RX_FDEQ_GAIN_7 -204 0x4868 //RX_FDEQ_GAIN_8 -205 0x7C70 //RX_FDEQ_GAIN_9 -206 0x707C //RX_FDEQ_GAIN_10 -207 0x786C //RX_FDEQ_GAIN_11 -208 0x6454 //RX_FDEQ_GAIN_12 -209 0x604C //RX_FDEQ_GAIN_13 -210 0x585C //RX_FDEQ_GAIN_14 -211 0x7480 //RX_FDEQ_GAIN_15 +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -61164,22 +61741,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -61212,24 +61789,24 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0034 //RX_SPK_VOL +286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 +269 0x0000 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -61237,24 +61814,24 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0D56 //RX_TDDRC_DRC_GAIN +281 0x022A //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x6868 //RX_FDEQ_GAIN_0 -197 0x6850 //RX_FDEQ_GAIN_1 -198 0x5048 //RX_FDEQ_GAIN_2 -199 0x383C //RX_FDEQ_GAIN_3 -200 0x4048 //RX_FDEQ_GAIN_4 -201 0x7040 //RX_FDEQ_GAIN_5 -202 0x4C44 //RX_FDEQ_GAIN_6 -203 0x4448 //RX_FDEQ_GAIN_7 -204 0x4868 //RX_FDEQ_GAIN_8 -205 0x7C70 //RX_FDEQ_GAIN_9 -206 0x707C //RX_FDEQ_GAIN_10 -207 0x786C //RX_FDEQ_GAIN_11 -208 0x6454 //RX_FDEQ_GAIN_12 -209 0x604C //RX_FDEQ_GAIN_13 -210 0x585C //RX_FDEQ_GAIN_14 -211 0x7480 //RX_FDEQ_GAIN_15 +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x8586 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7459 //RX_FDEQ_GAIN_6 +203 0x4B4A //RX_FDEQ_GAIN_7 +204 0x4C58 //RX_FDEQ_GAIN_8 +205 0x4C4C //RX_FDEQ_GAIN_9 +206 0x5A48 //RX_FDEQ_GAIN_10 +207 0x487C //RX_FDEQ_GAIN_11 +208 0x685A //RX_FDEQ_GAIN_12 +209 0x5A60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x9090 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -61263,22 +61840,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -61311,24 +61888,24 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0059 //RX_SPK_VOL +286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 +270 0x0006 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 @@ -61336,24 +61913,24 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0D56 //RX_TDDRC_DRC_GAIN +281 0x038C //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x6868 //RX_FDEQ_GAIN_0 -197 0x6850 //RX_FDEQ_GAIN_1 -198 0x5048 //RX_FDEQ_GAIN_2 -199 0x383C //RX_FDEQ_GAIN_3 -200 0x4048 //RX_FDEQ_GAIN_4 -201 0x7040 //RX_FDEQ_GAIN_5 -202 0x4C44 //RX_FDEQ_GAIN_6 -203 0x4448 //RX_FDEQ_GAIN_7 -204 0x4868 //RX_FDEQ_GAIN_8 -205 0x7C70 //RX_FDEQ_GAIN_9 -206 0x707C //RX_FDEQ_GAIN_10 -207 0x786C //RX_FDEQ_GAIN_11 -208 0x6454 //RX_FDEQ_GAIN_12 -209 0x604C //RX_FDEQ_GAIN_13 -210 0x585C //RX_FDEQ_GAIN_14 -211 0x7480 //RX_FDEQ_GAIN_15 +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x8586 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7459 //RX_FDEQ_GAIN_6 +203 0x4B4A //RX_FDEQ_GAIN_7 +204 0x4C58 //RX_FDEQ_GAIN_8 +205 0x4C4C //RX_FDEQ_GAIN_9 +206 0x5A48 //RX_FDEQ_GAIN_10 +207 0x487C //RX_FDEQ_GAIN_11 +208 0x685A //RX_FDEQ_GAIN_12 +209 0x5A60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x9090 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -61362,22 +61939,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -61414,7 +61991,6 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-FB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX @@ -61448,9 +62024,9 @@ 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF @@ -61556,11 +62132,11 @@ 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -61607,7 +62183,7 @@ 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST -189 0x0000 //TX_AEC_NUM_CH +189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH @@ -61815,7 +62391,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L +397 0x0000 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ @@ -61942,10 +62518,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR @@ -61963,26 +62539,26 @@ 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x0000 //TX_WNS_REFGAIN +546 0x0000 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0000 //TX_BF_LESSCUT_BBIN -554 0x0000 //TX_BF_LESSCUT_EBIN -555 0x0000 //TX_POSTBFB0 -556 0x0000 //TX_POSTBFB -557 0x0000 //TX_POSTBFE -558 0x0000 //TX_SPEECH_SNR_TH -559 0x0000 //TX_PB_MAX_PRI_SNR_TH -560 0x0000 //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0000 //TX_BVE_NOISE_FLOOR_1 +554 0x0000 //TX_BVE_NOISE_FLOOR_2 +555 0x0000 //TX_BVE_NOISE_FLOOR_3 +556 0x0000 //TX_BVE_NOISE_FLOOR_4 +557 0x0000 //TX_BVE_NOISE_FLOOR_5 +558 0x0000 //TX_BVE_NOISE_FLOOR_6 +559 0x0000 //TX_BVE_NOISE_FLOOR_7 +560 0x0000 //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -62241,12 +62817,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x0000 //TX_NOISE_FLOOR_TH +824 0x0000 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x0000 //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -62324,7 +62900,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -62351,37 +62927,63 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX -0 0x242C //RX_RECVFUNC_MODE_0 +0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -62391,7 +62993,7 @@ 7 0x4000 //RX_TDDRC_ALPHA_UP_2 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 -10 0x0403 //RX_PGA +10 0x0800 //RX_PGA 11 0x7E56 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -62406,35 +63008,35 @@ 22 0x0014 //RX_NS_LVL_CTRL 23 0xF400 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x3838 //RX_FDEQ_GAIN_2 -42 0x3448 //RX_FDEQ_GAIN_3 -43 0x343C //RX_FDEQ_GAIN_4 -44 0x4040 //RX_FDEQ_GAIN_5 -45 0x4048 //RX_FDEQ_GAIN_6 -46 0x384C //RX_FDEQ_GAIN_7 -47 0x4C54 //RX_FDEQ_GAIN_8 -48 0x5C54 //RX_FDEQ_GAIN_9 -49 0x4E38 //RX_FDEQ_GAIN_10 -50 0x303C //RX_FDEQ_GAIN_11 -51 0x5450 //RX_FDEQ_GAIN_12 -52 0x4860 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -62497,20 +63099,20 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0439 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x1B58 //RX_TPKA_FP -127 0x0400 //RX_MIN_G_FP -128 0x0800 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -62544,40 +63146,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0439 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x3838 //RX_FDEQ_GAIN_2 -42 0x3448 //RX_FDEQ_GAIN_3 -43 0x343C //RX_FDEQ_GAIN_4 -44 0x4040 //RX_FDEQ_GAIN_5 -45 0x4048 //RX_FDEQ_GAIN_6 -46 0x384C //RX_FDEQ_GAIN_7 -47 0x4C54 //RX_FDEQ_GAIN_8 -48 0x5C54 //RX_FDEQ_GAIN_9 -49 0x4E38 //RX_FDEQ_GAIN_10 -50 0x303C //RX_FDEQ_GAIN_11 -51 0x5450 //RX_FDEQ_GAIN_12 -52 0x4860 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -62635,7 +63237,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0012 //RX_SPK_VOL +129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -62643,40 +63245,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0439 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x3838 //RX_FDEQ_GAIN_2 -42 0x3448 //RX_FDEQ_GAIN_3 -43 0x343C //RX_FDEQ_GAIN_4 -44 0x4040 //RX_FDEQ_GAIN_5 -45 0x4048 //RX_FDEQ_GAIN_6 -46 0x384C //RX_FDEQ_GAIN_7 -47 0x4C54 //RX_FDEQ_GAIN_8 -48 0x5C54 //RX_FDEQ_GAIN_9 -49 0x4E38 //RX_FDEQ_GAIN_10 -50 0x303C //RX_FDEQ_GAIN_11 -51 0x5450 //RX_FDEQ_GAIN_12 -52 0x4860 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -62734,7 +63336,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001A //RX_SPK_VOL +129 0x001C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -62742,40 +63344,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0439 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x3838 //RX_FDEQ_GAIN_2 -42 0x3448 //RX_FDEQ_GAIN_3 -43 0x343C //RX_FDEQ_GAIN_4 -44 0x4040 //RX_FDEQ_GAIN_5 -45 0x4048 //RX_FDEQ_GAIN_6 -46 0x384C //RX_FDEQ_GAIN_7 -47 0x4C54 //RX_FDEQ_GAIN_8 -48 0x5C54 //RX_FDEQ_GAIN_9 -49 0x4E38 //RX_FDEQ_GAIN_10 -50 0x303C //RX_FDEQ_GAIN_11 -51 0x5450 //RX_FDEQ_GAIN_12 -52 0x4860 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -62833,7 +63435,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0025 //RX_SPK_VOL +129 0x0028 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -62841,40 +63443,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0439 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x3838 //RX_FDEQ_GAIN_2 -42 0x3448 //RX_FDEQ_GAIN_3 -43 0x343C //RX_FDEQ_GAIN_4 -44 0x4040 //RX_FDEQ_GAIN_5 -45 0x4048 //RX_FDEQ_GAIN_6 -46 0x384C //RX_FDEQ_GAIN_7 -47 0x4C54 //RX_FDEQ_GAIN_8 -48 0x5C54 //RX_FDEQ_GAIN_9 -49 0x4E38 //RX_FDEQ_GAIN_10 -50 0x303C //RX_FDEQ_GAIN_11 -51 0x5450 //RX_FDEQ_GAIN_12 -52 0x4860 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -62932,7 +63534,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0035 //RX_SPK_VOL +129 0x0028 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -62940,40 +63542,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0439 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x3838 //RX_FDEQ_GAIN_2 -42 0x3448 //RX_FDEQ_GAIN_3 -43 0x343C //RX_FDEQ_GAIN_4 -44 0x4040 //RX_FDEQ_GAIN_5 -45 0x4048 //RX_FDEQ_GAIN_6 -46 0x384C //RX_FDEQ_GAIN_7 -47 0x4C54 //RX_FDEQ_GAIN_8 -48 0x5C54 //RX_FDEQ_GAIN_9 -49 0x4E38 //RX_FDEQ_GAIN_10 -50 0x303C //RX_FDEQ_GAIN_11 -51 0x5450 //RX_FDEQ_GAIN_12 -52 0x4860 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 +39 0x4C4C //RX_FDEQ_GAIN_0 +40 0x4C4C //RX_FDEQ_GAIN_1 +41 0x4C48 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -63031,7 +63633,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x004D //RX_SPK_VOL +129 0x0052 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -63039,40 +63641,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0439 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x3838 //RX_FDEQ_GAIN_2 -42 0x3448 //RX_FDEQ_GAIN_3 -43 0x343C //RX_FDEQ_GAIN_4 -44 0x4040 //RX_FDEQ_GAIN_5 -45 0x4048 //RX_FDEQ_GAIN_6 -46 0x384C //RX_FDEQ_GAIN_7 -47 0x4C54 //RX_FDEQ_GAIN_8 -48 0x5C54 //RX_FDEQ_GAIN_9 -49 0x4E38 //RX_FDEQ_GAIN_10 -50 0x303C //RX_FDEQ_GAIN_11 -51 0x5450 //RX_FDEQ_GAIN_12 -52 0x4860 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 +39 0x4C4C //RX_FDEQ_GAIN_0 +40 0x4C4C //RX_FDEQ_GAIN_1 +41 0x4C48 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -63130,7 +63732,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0074 //RX_SPK_VOL +129 0x0078 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -63138,40 +63740,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0439 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x3838 //RX_FDEQ_GAIN_2 -42 0x3448 //RX_FDEQ_GAIN_3 -43 0x343C //RX_FDEQ_GAIN_4 -44 0x4040 //RX_FDEQ_GAIN_5 -45 0x4048 //RX_FDEQ_GAIN_6 -46 0x384C //RX_FDEQ_GAIN_7 -47 0x4C54 //RX_FDEQ_GAIN_8 -48 0x5C54 //RX_FDEQ_GAIN_9 -49 0x4E38 //RX_FDEQ_GAIN_10 -50 0x303C //RX_FDEQ_GAIN_11 -51 0x5450 //RX_FDEQ_GAIN_12 -52 0x4860 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 +39 0x4C4C //RX_FDEQ_GAIN_0 +40 0x4C4C //RX_FDEQ_GAIN_1 +41 0x4C48 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -63232,7 +63834,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x242C //RX_RECVFUNC_MODE_0 +157 0x006C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0004 //RX_SAMPLINGFREQ_SIG 160 0x0004 //RX_SAMPLINGFREQ_PROC @@ -63242,7 +63844,7 @@ 164 0x4000 //RX_TDDRC_ALPHA_UP_2 165 0x4000 //RX_TDDRC_ALPHA_UP_3 166 0x4000 //RX_TDDRC_ALPHA_UP_4 -167 0x0403 //RX_PGA +167 0x0800 //RX_PGA 168 0x7E56 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 @@ -63257,35 +63859,35 @@ 179 0x0014 //RX_NS_LVL_CTRL 180 0xF400 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4040 //RX_FDEQ_GAIN_1 -198 0x3838 //RX_FDEQ_GAIN_2 -199 0x3448 //RX_FDEQ_GAIN_3 -200 0x343C //RX_FDEQ_GAIN_4 -201 0x4040 //RX_FDEQ_GAIN_5 -202 0x4048 //RX_FDEQ_GAIN_6 -203 0x384C //RX_FDEQ_GAIN_7 -204 0x4C54 //RX_FDEQ_GAIN_8 -205 0x5C54 //RX_FDEQ_GAIN_9 -206 0x4E38 //RX_FDEQ_GAIN_10 -207 0x303C //RX_FDEQ_GAIN_11 -208 0x5450 //RX_FDEQ_GAIN_12 -209 0x4860 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 @@ -63348,20 +63950,20 @@ 270 0x0002 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 275 0x4000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0439 //RX_TDDRC_DRC_GAIN +281 0x02D2 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x1B58 //RX_TPKA_FP -284 0x0400 //RX_MIN_G_FP -285 0x0800 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH @@ -63395,40 +63997,40 @@ 165 0x4000 //RX_TDDRC_ALPHA_UP_3 166 0x4000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0001 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 275 0x4000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0439 //RX_TDDRC_DRC_GAIN +281 0x02D2 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4040 //RX_FDEQ_GAIN_1 -198 0x3838 //RX_FDEQ_GAIN_2 -199 0x3448 //RX_FDEQ_GAIN_3 -200 0x343C //RX_FDEQ_GAIN_4 -201 0x4040 //RX_FDEQ_GAIN_5 -202 0x4048 //RX_FDEQ_GAIN_6 -203 0x384C //RX_FDEQ_GAIN_7 -204 0x4C54 //RX_FDEQ_GAIN_8 -205 0x5C54 //RX_FDEQ_GAIN_9 -206 0x4E38 //RX_FDEQ_GAIN_10 -207 0x303C //RX_FDEQ_GAIN_11 -208 0x5450 //RX_FDEQ_GAIN_12 -209 0x4860 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 @@ -63486,7 +64088,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0012 //RX_SPK_VOL +286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -63494,40 +64096,40 @@ 165 0x4000 //RX_TDDRC_ALPHA_UP_3 166 0x4000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0001 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 275 0x4000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0439 //RX_TDDRC_DRC_GAIN +281 0x02D2 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4040 //RX_FDEQ_GAIN_1 -198 0x3838 //RX_FDEQ_GAIN_2 -199 0x3448 //RX_FDEQ_GAIN_3 -200 0x343C //RX_FDEQ_GAIN_4 -201 0x4040 //RX_FDEQ_GAIN_5 -202 0x4048 //RX_FDEQ_GAIN_6 -203 0x384C //RX_FDEQ_GAIN_7 -204 0x4C54 //RX_FDEQ_GAIN_8 -205 0x5C54 //RX_FDEQ_GAIN_9 -206 0x4E38 //RX_FDEQ_GAIN_10 -207 0x303C //RX_FDEQ_GAIN_11 -208 0x5450 //RX_FDEQ_GAIN_12 -209 0x4860 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 @@ -63585,7 +64187,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001A //RX_SPK_VOL +286 0x001C //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -63593,40 +64195,40 @@ 165 0x4000 //RX_TDDRC_ALPHA_UP_3 166 0x4000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0001 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 275 0x4000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0439 //RX_TDDRC_DRC_GAIN +281 0x02D2 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4040 //RX_FDEQ_GAIN_1 -198 0x3838 //RX_FDEQ_GAIN_2 -199 0x3448 //RX_FDEQ_GAIN_3 -200 0x343C //RX_FDEQ_GAIN_4 -201 0x4040 //RX_FDEQ_GAIN_5 -202 0x4048 //RX_FDEQ_GAIN_6 -203 0x384C //RX_FDEQ_GAIN_7 -204 0x4C54 //RX_FDEQ_GAIN_8 -205 0x5C54 //RX_FDEQ_GAIN_9 -206 0x4E38 //RX_FDEQ_GAIN_10 -207 0x303C //RX_FDEQ_GAIN_11 -208 0x5450 //RX_FDEQ_GAIN_12 -209 0x4860 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 @@ -63684,7 +64286,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0025 //RX_SPK_VOL +286 0x0028 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -63692,40 +64294,40 @@ 165 0x4000 //RX_TDDRC_ALPHA_UP_3 166 0x4000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0001 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 275 0x4000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0439 //RX_TDDRC_DRC_GAIN +281 0x02D2 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4040 //RX_FDEQ_GAIN_1 -198 0x3838 //RX_FDEQ_GAIN_2 -199 0x3448 //RX_FDEQ_GAIN_3 -200 0x343C //RX_FDEQ_GAIN_4 -201 0x4040 //RX_FDEQ_GAIN_5 -202 0x4048 //RX_FDEQ_GAIN_6 -203 0x384C //RX_FDEQ_GAIN_7 -204 0x4C54 //RX_FDEQ_GAIN_8 -205 0x5C54 //RX_FDEQ_GAIN_9 -206 0x4E38 //RX_FDEQ_GAIN_10 -207 0x303C //RX_FDEQ_GAIN_11 -208 0x5450 //RX_FDEQ_GAIN_12 -209 0x4860 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 @@ -63791,40 +64393,40 @@ 165 0x4000 //RX_TDDRC_ALPHA_UP_3 166 0x4000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0001 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 275 0x4000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0439 //RX_TDDRC_DRC_GAIN +281 0x02D2 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4040 //RX_FDEQ_GAIN_1 -198 0x3838 //RX_FDEQ_GAIN_2 -199 0x3448 //RX_FDEQ_GAIN_3 -200 0x343C //RX_FDEQ_GAIN_4 -201 0x4040 //RX_FDEQ_GAIN_5 -202 0x4048 //RX_FDEQ_GAIN_6 -203 0x384C //RX_FDEQ_GAIN_7 -204 0x4C54 //RX_FDEQ_GAIN_8 -205 0x5C54 //RX_FDEQ_GAIN_9 -206 0x4E38 //RX_FDEQ_GAIN_10 -207 0x303C //RX_FDEQ_GAIN_11 -208 0x5450 //RX_FDEQ_GAIN_12 -209 0x4860 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 +196 0x4C4C //RX_FDEQ_GAIN_0 +197 0x4C4C //RX_FDEQ_GAIN_1 +198 0x4C48 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 @@ -63882,7 +64484,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x004D //RX_SPK_VOL +286 0x0052 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -63890,40 +64492,40 @@ 165 0x4000 //RX_TDDRC_ALPHA_UP_3 166 0x4000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0001 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 275 0x4000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0439 //RX_TDDRC_DRC_GAIN +281 0x02D2 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4040 //RX_FDEQ_GAIN_1 -198 0x3838 //RX_FDEQ_GAIN_2 -199 0x3448 //RX_FDEQ_GAIN_3 -200 0x343C //RX_FDEQ_GAIN_4 -201 0x4040 //RX_FDEQ_GAIN_5 -202 0x4048 //RX_FDEQ_GAIN_6 -203 0x384C //RX_FDEQ_GAIN_7 -204 0x4C54 //RX_FDEQ_GAIN_8 -205 0x5C54 //RX_FDEQ_GAIN_9 -206 0x4E38 //RX_FDEQ_GAIN_10 -207 0x303C //RX_FDEQ_GAIN_11 -208 0x5450 //RX_FDEQ_GAIN_12 -209 0x4860 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 +196 0x4C4C //RX_FDEQ_GAIN_0 +197 0x4C4C //RX_FDEQ_GAIN_1 +198 0x4C48 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 @@ -63981,7 +64583,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0074 //RX_SPK_VOL +286 0x0078 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -63989,40 +64591,40 @@ 165 0x4000 //RX_TDDRC_ALPHA_UP_3 166 0x4000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x4000 //RX_TDDRC_ALPHA_DWN_2 -186 0x4000 //RX_TDDRC_ALPHA_DWN_3 -189 0x4000 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0001 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 275 0x4000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0439 //RX_TDDRC_DRC_GAIN +281 0x02D2 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4040 //RX_FDEQ_GAIN_1 -198 0x3838 //RX_FDEQ_GAIN_2 -199 0x3448 //RX_FDEQ_GAIN_3 -200 0x343C //RX_FDEQ_GAIN_4 -201 0x4040 //RX_FDEQ_GAIN_5 -202 0x4048 //RX_FDEQ_GAIN_6 -203 0x384C //RX_FDEQ_GAIN_7 -204 0x4C54 //RX_FDEQ_GAIN_8 -205 0x5C54 //RX_FDEQ_GAIN_9 -206 0x4E38 //RX_FDEQ_GAIN_10 -207 0x303C //RX_FDEQ_GAIN_11 -208 0x5450 //RX_FDEQ_GAIN_12 -209 0x4860 //RX_FDEQ_GAIN_13 -210 0x6060 //RX_FDEQ_GAIN_14 +196 0x4C4C //RX_FDEQ_GAIN_0 +197 0x4C4C //RX_FDEQ_GAIN_1 +198 0x4C48 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 @@ -64083,16 +64685,2710 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 +#CASE_NAME HEADSET-TTY_HCO-RESERVE2-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0000 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0078 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0302 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0000 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0000 //TX_MICS_OF_PAIR0 +38 0x0000 //TX_MICS_OF_PAIR1 +39 0x0000 //TX_MICS_OF_PAIR2 +40 0x0000 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0003 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x0000 //TX_HD_BIN_MASK +53 0x0000 //TX_HD_SUBAND_MASK +54 0x0000 //TX_HD_FRAME_AVG_MASK +55 0x0000 //TX_HD_MIN_FRQ +56 0x0000 //TX_HD_ALPHA_PSD +57 0x0000 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0x0000 //TX_T_PSDVAT +63 0x0000 //TX_CNT +64 0x0000 //TX_ANTI_HOWL_GAIN +65 0x0000 //TX_MICFORBFMARK_0 +66 0x0000 //TX_MICFORBFMARK_1 +67 0x0000 //TX_MICFORBFMARK_2 +68 0x0000 //TX_MICFORBFMARK_3 +69 0x0000 //TX_MICFORBFMARK_4 +70 0x0000 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x0000 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x0000 //TX_ADCS_GAIN +112 0x0000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x7FFF //TX_BLMIC_BLKFACTOR +116 0x7FFF //TX_BRMIC_BLKFACTOR +117 0x000A //TX_MICBLK_START_BIN +118 0x0041 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x0000 //TX_FE_ENER_TH_MTS +124 0x0000 //TX_FE_ENER_TH_EXP +125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x0000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0020 //TX_MIC_BLOCK_N +128 0x7652 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x7800 //TX_THR_PITCH_DET_0 +131 0x7000 //TX_THR_PITCH_DET_1 +132 0x6000 //TX_THR_PITCH_DET_2 +133 0x0000 //TX_PITCH_BFR_LEN +134 0x0000 //TX_SBD_PITCH_DET +135 0x0000 //TX_TD_AEC_L +136 0x0000 //TX_MU0_UNP_TD_AEC +137 0x0000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x2000 //TX_AEC_REF_GAIN_0 +148 0x2000 //TX_AEC_REF_GAIN_1 +149 0x2000 //TX_AEC_REF_GAIN_2 +150 0x4000 //TX_EAD_THR +151 0x0200 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0100 //TX_MIN_EQ_RE_EST_3 +156 0x0100 //TX_MIN_EQ_RE_EST_4 +157 0x0100 //TX_MIN_EQ_RE_EST_5 +158 0x0100 //TX_MIN_EQ_RE_EST_6 +159 0x0100 //TX_MIN_EQ_RE_EST_7 +160 0x0100 //TX_MIN_EQ_RE_EST_8 +161 0x0100 //TX_MIN_EQ_RE_EST_9 +162 0x0100 //TX_MIN_EQ_RE_EST_10 +163 0x0100 //TX_MIN_EQ_RE_EST_11 +164 0x0100 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x0000 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0008 //TX_SE_HOLD_N +170 0x0050 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x0000 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x0000 //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0000 //TX_FRQ_LIN_LEN +184 0x0000 //TX_FRQ_AEC_LEN_RHO +185 0x0000 //TX_MU0_UNP_FRQ_AEC +186 0x0000 //TX_MU0_PTD_FRQ_AEC +187 0x0000 //TX_MINENOISETH +188 0x0000 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x0000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7333 //TX_DTD_THR1_0 +198 0x7333 //TX_DTD_THR1_1 +199 0x7333 //TX_DTD_THR1_2 +200 0x7333 //TX_DTD_THR1_3 +201 0x7333 //TX_DTD_THR1_4 +202 0x7333 //TX_DTD_THR1_5 +203 0x7333 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0400 //TX_DT_CUT_K +214 0x0000 //TX_DT_CUT_THR +215 0x0000 //TX_COMFORT_G +216 0x0000 //TX_POWER_YOUT_TH +217 0x0000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x0800 //TX_B_POST_FILT_ECHO_H +230 0x0000 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x0000 //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0000 //TX_DT_RESRV_7 +240 0x0000 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xFA00 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF800 //TX_THR_SN_EST_2 +245 0xF600 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0A00 //TX_N_SN_EST +267 0x0000 //TX_INBEAM_T +268 0x0000 //TX_INBEAMHOLDT +269 0x1FFF //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x0000 //TX_B_POST_FLT_0 +280 0x0000 //TX_B_POST_FLT_1 +281 0x001A //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x000C //TX_NS_LVL_CTRL_3 +285 0x000C //TX_NS_LVL_CTRL_4 +286 0x000C //TX_NS_LVL_CTRL_5 +287 0x001A //TX_NS_LVL_CTRL_6 +288 0x000C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0014 //TX_MIN_GAIN_S_1 +291 0x0014 //TX_MIN_GAIN_S_2 +292 0x0014 //TX_MIN_GAIN_S_3 +293 0x0014 //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x0014 //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x0000 //TX_NMOS_SUP +298 0x0064 //TX_NS_MAX_PRI_SNR_TH +299 0x7FFF //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x1200 //TX_THR_LFNS +309 0x0147 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x7FFF //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x7FFF //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x1000 //TX_A_POST_FILT_S_2 +317 0x6666 //TX_A_POST_FILT_S_3 +318 0x6666 //TX_A_POST_FILT_S_4 +319 0x6666 //TX_A_POST_FILT_S_5 +320 0x199A //TX_A_POST_FILT_S_6 +321 0x6666 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7E00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7E00 //TX_LAMBDA_PFILT_S_4 +344 0x7E00 //TX_LAMBDA_PFILT_S_5 +345 0x7E00 //TX_LAMBDA_PFILT_S_6 +346 0x7E00 //TX_LAMBDA_PFILT_S_7 +347 0x0010 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x0000 //TX_K_PEPPER_HF +350 0x0000 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0000 //TX_DT_BINVAD_TH_0 +354 0x0000 //TX_DT_BINVAD_TH_1 +355 0x0000 //TX_DT_BINVAD_TH_2 +356 0x0000 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0001 //TX_BF_SGRAD_FLG +362 0x0000 //TX_BF_DVG_TH +363 0x0000 //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x05A0 //TX_NDETCT +367 0x0383 //TX_NOISE_TH_0 +368 0x1388 //TX_NOISE_TH_0_2 +369 0x3A98 //TX_NOISE_TH_0_3 +370 0x0C80 //TX_NOISE_TH_1 +371 0x0032 //TX_NOISE_TH_2 +372 0x3D54 //TX_NOISE_TH_3 +373 0x012C //TX_NOISE_TH_4 +374 0x07D0 //TX_NOISE_TH_5 +375 0x6590 //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x00C8 //TX_NOISE_TH_6 +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x6400 //TX_OUT_ENER_S_TH_CLEAN +385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x6400 //TX_OUT_ENER_S_TH_NOISY +387 0x6400 //TX_OUT_ENER_TH_NOISE +388 0x7D00 //TX_OUT_ENER_TH_SPEECH +389 0x0000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0000 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0000 //TX_MIN_G_LOW300HZ +401 0x0010 //TX_MAXLEVEL_CNG +402 0x0000 //TX_STN_NOISE_TH +403 0x0000 //TX_POST_MASK_SUP +404 0x0000 //TX_POST_MASK_ADJUST +405 0x0014 //TX_NS_ENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH +407 0x0226 //TX_MINENOISE_MIC0_S_TH +408 0x2879 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0080 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x2000 //TX_RHO_UPB +415 0x0020 //TX_N_HOLD_HS +416 0x0009 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0000 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x0219 //TX_THR_STD_PLH +421 0x09C4 //TX_N_HOLD_STD +422 0x0166 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x0000 //TX_SB_RTO_MEAN_TH_RUB +428 0x2000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0064 //TX_DESIRED_TALK_HOLDT +431 0x1000 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0000 //TX_HS_VAD_BIN +435 0x0000 //TX_THR_VAD_HS +436 0x0000 //TX_MEAN_RTO_MIN_TH2 +437 0x0000 //TX_SILENCE_T +438 0x4000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x099A //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x001E //TX_DOA_VAD_THR_1 +445 0x001E //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B +453 0x005A //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C +456 0x005A //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D +459 0x005A //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0172 //TX_BF_HOLDOFF_T +473 0x8000 //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x071C //TX_DOA_TRACK_HT +477 0x0280 //TX_N1_HOLD_HF +478 0x0140 //TX_N2_HOLD_HF +479 0x2AAB //TX_BF_RESET_THR_HF +480 0x4000 //TX_DOA_SMOOTH +481 0x0000 //TX_MU_BF +482 0x0200 //TX_BF_MU_LF_B2 +483 0x0000 //TX_BF_FC_END_BIN_B2 +484 0x0000 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0000 //TX_N_DOA_SEED +488 0x0000 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x0000 //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x0000 //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x0000 //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0168 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0004 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0230 //TX_NOR_OFF_TH1 +503 0xD333 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x6666 //TX_MICTOBFGAIN0 +513 0x0014 //TX_FASTMUE_TH +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x0000 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0028 //TX_SNR_THR +531 0x03E8 //TX_ENGY_THR +532 0x0000 //TX_CORR_HIGH_TH +533 0x0000 //TX_ENGY_THR_2 +534 0x0000 //TX_MEAN_RTO_THR +535 0x0000 //TX_WNS_ENOISE_MIC0_TH +536 0x0000 //TX_RATIOMICL_TH +537 0x0000 //TX_CALIG_HS +538 0x000A //TX_LVL_CTRL +539 0x0000 //TX_WIND_SUPRTO +540 0x0000 //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x0000 //TX_RATIOMICH_TH +543 0x0000 //TX_WIND_INBEAM_L_TH +544 0x0000 //TX_WIND_INBEAM_H_TH +545 0x0000 //TX_WNS_REFGAIN +546 0x0000 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0000 //TX_BVE_NOISE_FLOOR_1 +554 0x0000 //TX_BVE_NOISE_FLOOR_2 +555 0x0000 //TX_BVE_NOISE_FLOOR_3 +556 0x0000 //TX_BVE_NOISE_FLOOR_4 +557 0x0000 //TX_BVE_NOISE_FLOOR_5 +558 0x0000 //TX_BVE_NOISE_FLOOR_6 +559 0x0000 //TX_BVE_NOISE_FLOOR_7 +560 0x0000 //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0000 //TX_FDEQ_BIN_0 +592 0x0000 //TX_FDEQ_BIN_1 +593 0x0000 //TX_FDEQ_BIN_2 +594 0x0000 //TX_FDEQ_BIN_3 +595 0x0000 //TX_FDEQ_BIN_4 +596 0x0000 //TX_FDEQ_BIN_5 +597 0x0000 //TX_FDEQ_BIN_6 +598 0x0000 //TX_FDEQ_BIN_7 +599 0x0000 //TX_FDEQ_BIN_8 +600 0x0000 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0000 //TX_PREEQ_BIN_MIC0_0 +642 0x0000 //TX_PREEQ_BIN_MIC0_1 +643 0x0000 //TX_PREEQ_BIN_MIC0_2 +644 0x0000 //TX_PREEQ_BIN_MIC0_3 +645 0x0000 //TX_PREEQ_BIN_MIC0_4 +646 0x0000 //TX_PREEQ_BIN_MIC0_5 +647 0x0000 //TX_PREEQ_BIN_MIC0_6 +648 0x0000 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0000 //TX_PREEQ_BIN_MIC1_0 +691 0x0000 //TX_PREEQ_BIN_MIC1_1 +692 0x0000 //TX_PREEQ_BIN_MIC1_2 +693 0x0000 //TX_PREEQ_BIN_MIC1_3 +694 0x0000 //TX_PREEQ_BIN_MIC1_4 +695 0x0000 //TX_PREEQ_BIN_MIC1_5 +696 0x0000 //TX_PREEQ_BIN_MIC1_6 +697 0x0000 //TX_PREEQ_BIN_MIC1_7 +698 0x0000 //TX_PREEQ_BIN_MIC1_8 +699 0x0000 //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 +740 0x0000 //TX_PREEQ_BIN_MIC2_1 +741 0x0000 //TX_PREEQ_BIN_MIC2_2 +742 0x0000 //TX_PREEQ_BIN_MIC2_3 +743 0x0000 //TX_PREEQ_BIN_MIC2_4 +744 0x0000 //TX_PREEQ_BIN_MIC2_5 +745 0x0000 //TX_PREEQ_BIN_MIC2_6 +746 0x0000 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0064 //TX_MIC_CALIBRATION_0 +766 0x006A //TX_MIC_CALIBRATION_1 +767 0x006A //TX_MIC_CALIBRATION_2 +768 0x006B //TX_MIC_CALIBRATION_3 +769 0x0048 //TX_MIC_PWR_BIAS_0 +770 0x003C //TX_MIC_PWR_BIAS_1 +771 0x003C //TX_MIC_PWR_BIAS_2 +772 0x003C //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0009 //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 +788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 +789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 +790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 +791 0x65AD //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0002 //TX_DEADMIC_SILENCE_TH +817 0x0147 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x0000 //TX_NOISE_FLOOR_TH +824 0x0000 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x0000 //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x0000 //TX_A_POST_FLT_FP +835 0x0000 //TX_RTO_OUTBEAM_TH +836 0x0000 //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0000 //TX_FFP_RESRV_2 +849 0x0000 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x0E80 //TX_TDDRC_THRD_2 +857 0x3800 //TX_TDDRC_THRD_3 +858 0x2A00 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x0000 //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0000 //TX_TDDRC_SMT_W +866 0x0100 //TX_TDDRC_DRC_GAIN +867 0x0000 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x1EB8 //TX_TFMASKLTH +870 0x170A //TX_TFMASKLTHL +871 0x7FFF //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x4000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x0000 //TX_FASTNS_OUTIN_TH +884 0x0000 //TX_FASTNS_TFMASK_TH +885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 +886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 +887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0x8000 //TX_FASTNS_MASK5_TH +890 0x051F //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x247C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x847C //RX_FDEQ_GAIN_0 +40 0x5A56 //RX_FDEQ_GAIN_1 +41 0x6266 //RX_FDEQ_GAIN_2 +42 0x6E7A //RX_FDEQ_GAIN_3 +43 0x8678 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x706E //RX_FDEQ_GAIN_6 +46 0x6C64 //RX_FDEQ_GAIN_7 +47 0x5C6A //RX_FDEQ_GAIN_8 +48 0x6268 //RX_FDEQ_GAIN_9 +49 0x6462 //RX_FDEQ_GAIN_10 +50 0x646E //RX_FDEQ_GAIN_11 +51 0x6860 //RX_FDEQ_GAIN_12 +52 0x646A //RX_FDEQ_GAIN_13 +53 0x7478 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0105 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x0CE0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03FC //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x1000 //RX_MAX_G_FP +129 0x0058 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0056 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x007D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00B5 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x016A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D62 //RX_FDEQ_GAIN_5 +45 0x5A5C //RX_FDEQ_GAIN_6 +46 0x6568 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x5A5C //RX_FDEQ_GAIN_9 +49 0x6448 //RX_FDEQ_GAIN_10 +50 0x5A7C //RX_FDEQ_GAIN_11 +51 0x7460 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x022A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x8586 //RX_FDEQ_GAIN_4 +44 0x8682 //RX_FDEQ_GAIN_5 +45 0x7459 //RX_FDEQ_GAIN_6 +46 0x4B4A //RX_FDEQ_GAIN_7 +47 0x4C58 //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x5A48 //RX_FDEQ_GAIN_10 +50 0x487C //RX_FDEQ_GAIN_11 +51 0x685A //RX_FDEQ_GAIN_12 +52 0x5A60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x9090 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x038C //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x8586 //RX_FDEQ_GAIN_4 +44 0x8682 //RX_FDEQ_GAIN_5 +45 0x7459 //RX_FDEQ_GAIN_6 +46 0x4B4A //RX_FDEQ_GAIN_7 +47 0x4C58 //RX_FDEQ_GAIN_8 +48 0x4C4C //RX_FDEQ_GAIN_9 +49 0x5A48 //RX_FDEQ_GAIN_10 +50 0x487C //RX_FDEQ_GAIN_11 +51 0x685A //RX_FDEQ_GAIN_12 +52 0x5A60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x9090 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x247C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x847C //RX_FDEQ_GAIN_0 +197 0x5A56 //RX_FDEQ_GAIN_1 +198 0x6266 //RX_FDEQ_GAIN_2 +199 0x6E7A //RX_FDEQ_GAIN_3 +200 0x8678 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x706E //RX_FDEQ_GAIN_6 +203 0x6C64 //RX_FDEQ_GAIN_7 +204 0x5C6A //RX_FDEQ_GAIN_8 +205 0x6268 //RX_FDEQ_GAIN_9 +206 0x6462 //RX_FDEQ_GAIN_10 +207 0x646E //RX_FDEQ_GAIN_11 +208 0x6860 //RX_FDEQ_GAIN_12 +209 0x646A //RX_FDEQ_GAIN_13 +210 0x7478 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0105 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x0CE0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03FC //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x1000 //RX_MAX_G_FP +286 0x0058 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0056 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x007D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x00B5 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x016A //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D62 //RX_FDEQ_GAIN_5 +202 0x5A5C //RX_FDEQ_GAIN_6 +203 0x6568 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x5A5C //RX_FDEQ_GAIN_9 +206 0x6448 //RX_FDEQ_GAIN_10 +207 0x5A7C //RX_FDEQ_GAIN_11 +208 0x7460 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x022A //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x8586 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7459 //RX_FDEQ_GAIN_6 +203 0x4B4A //RX_FDEQ_GAIN_7 +204 0x4C58 //RX_FDEQ_GAIN_8 +205 0x4C4C //RX_FDEQ_GAIN_9 +206 0x5A48 //RX_FDEQ_GAIN_10 +207 0x487C //RX_FDEQ_GAIN_11 +208 0x685A //RX_FDEQ_GAIN_12 +209 0x5A60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x9090 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0006 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x038C //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x8586 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7459 //RX_FDEQ_GAIN_6 +203 0x4B4A //RX_FDEQ_GAIN_7 +204 0x4C58 //RX_FDEQ_GAIN_8 +205 0x4C4C //RX_FDEQ_GAIN_9 +206 0x5A48 //RX_FDEQ_GAIN_10 +207 0x487C //RX_FDEQ_GAIN_11 +208 0x685A //RX_FDEQ_GAIN_12 +209 0x5A60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x9090 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-NB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x6F7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6FFD //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC @@ -64109,18 +67405,18 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0010 //TX_DIST2REF_02 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -64129,8 +67425,8 @@ 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 43 0x0001 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 @@ -64216,7 +67512,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7646 //TX_A_HP +128 0x7652 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -64226,11 +67522,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -64238,28 +67534,28 @@ 147 0x0100 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7500 //TX_EAD_THR +150 0x7B00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 -153 0x0200 //TX_MIN_EQ_RE_EST_1 -154 0x0200 //TX_MIN_EQ_RE_EST_2 -155 0x0200 //TX_MIN_EQ_RE_EST_3 -156 0x0200 //TX_MIN_EQ_RE_EST_4 -157 0x0200 //TX_MIN_EQ_RE_EST_5 -158 0x0200 //TX_MIN_EQ_RE_EST_6 -159 0x1800 //TX_MIN_EQ_RE_EST_7 -160 0x1800 //TX_MIN_EQ_RE_EST_8 +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x2000 //TX_MIN_EQ_RE_EST_3 +156 0x2000 //TX_MIN_EQ_RE_EST_4 +157 0x2000 //TX_MIN_EQ_RE_EST_5 +158 0x2000 //TX_MIN_EQ_RE_EST_6 +159 0x2000 //TX_MIN_EQ_RE_EST_7 +160 0x2000 //TX_MIN_EQ_RE_EST_8 161 0x3000 //TX_MIN_EQ_RE_EST_9 162 0x4000 //TX_MIN_EQ_RE_EST_10 163 0x6000 //TX_MIN_EQ_RE_EST_11 164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x2000 //TX_LAMBDA_RE_EST +165 0x6000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE -167 0x4000 //TX_C_POST_FLT +167 0x2000 //TX_C_POST_FLT 168 0x2000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0008 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -64285,14 +67581,14 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x7FF0 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 +197 0x7FEE //TX_DTD_THR1_0 +198 0x7FEE //TX_DTD_THR1_1 199 0x7FF0 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 +200 0x7EF4 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x7E00 //TX_DTD_THR2_0 +204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 @@ -64301,7 +67597,7 @@ 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x1F40 //TX_DT_CUT_K +213 0x0FA0 //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH @@ -64311,18 +67607,18 @@ 220 0x0000 //TX_DTD_MIC_BLK 221 0x1000 //TX_ADPT_STRICT_L 222 0x1000 //TX_ADPT_STRICT_H -223 0x0001 //TX_RATIO_DT_L_TH_LOW +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x0640 //TX_RATIO_DT_L_TH_HIGH +225 0x157C //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x0001 //TX_RATIO_DT_L0_TH -228 0x7FFF //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H +228 0x1000 //TX_B_POST_FILT_ECHO_L +229 0x1000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x05DC //TX_RATIO_DT_L0_TH_HIGH +234 0x0BB8 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -64330,10 +67626,10 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 +242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF900 //TX_THR_SN_EST_3 +244 0xF200 //TX_THR_SN_EST_2 +245 0xF200 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 @@ -64341,7 +67637,7 @@ 250 0x0050 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0080 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x01A0 //TX_DELTA_THR_SN_EST_6 @@ -64355,12 +67651,12 @@ 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T +267 0x0018 //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x7F00 //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH +272 0x0800 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L @@ -64370,7 +67666,7 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0012 //TX_NS_LVL_CTRL_1 +282 0x0020 //TX_NS_LVL_CTRL_1 283 0x0015 //TX_NS_LVL_CTRL_2 284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 @@ -64378,20 +67674,20 @@ 287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 -290 0x000D //TX_MIN_GAIN_S_1 +290 0x0004 //TX_MIN_GAIN_S_1 291 0x000F //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000F //TX_MIN_GAIN_S_4 294 0x0010 //TX_MIN_GAIN_S_5 295 0x000F //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 -297 0x4000 //TX_NMOS_SUP +297 0x2000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x3000 //TX_SNRI_SUP_1 +301 0x4000 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 -303 0x2400 //TX_SNRI_SUP_3 +303 0x6000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 @@ -64403,17 +67699,17 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x2000 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x2000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 318 0x3000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 +323 0x7000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 326 0x3000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -64427,8 +67723,8 @@ 336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT -339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 +339 0x7000 //TX_LAMBDA_PFILT_S_0 +340 0x7400 //TX_LAMBDA_PFILT_S_1 341 0x7900 //TX_LAMBDA_PFILT_S_2 342 0x7000 //TX_LAMBDA_PFILT_S_3 343 0x7D00 //TX_LAMBDA_PFILT_S_4 @@ -64442,32 +67738,32 @@ 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0100 //TX_DT_BINVAD_TH_1 -355 0x0100 //TX_DT_BINVAD_TH_2 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x0FA0 //TX_DT_BINVAD_ENDF -358 0x7000 //TX_C_POST_FLT_DT +358 0x0080 //TX_C_POST_FLT_DT 359 0x4000 //TX_NS_B_POST_FLT_LESSCUT -360 0x01B0 //TX_DT_BOOST +360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x003B //TX_NOISE_TH_0 +367 0x0023 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x03ED //TX_NOISE_TH_2 -372 0x2EE0 //TX_NOISE_TH_3 -373 0x5528 //TX_NOISE_TH_4 +372 0x2CEC //TX_NOISE_TH_3 +373 0x4268 //TX_NOISE_TH_4 374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 -379 0x00C8 //TX_MINENOISE_TH +379 0x000A //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH @@ -64480,12 +67776,12 @@ 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH +392 0x7000 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ @@ -64494,7 +67790,7 @@ 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0032 //TX_MINENOISE_MIC0_TH +406 0x000A //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -64597,25 +67893,25 @@ 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC +509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -64633,38 +67929,38 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM -567 0x5050 //TX_FDEQ_GAIN_0 -568 0x5048 //TX_FDEQ_GAIN_1 +567 0x5250 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 -570 0x483C //TX_FDEQ_GAIN_3 -571 0x3034 //TX_FDEQ_GAIN_4 -572 0x3048 //TX_FDEQ_GAIN_5 -573 0x4840 //TX_FDEQ_GAIN_6 -574 0x403C //TX_FDEQ_GAIN_7 -575 0x262C //TX_FDEQ_GAIN_8 -576 0x3A3C //TX_FDEQ_GAIN_9 +570 0x4A43 //TX_FDEQ_GAIN_3 +571 0x374B //TX_FDEQ_GAIN_4 +572 0x3444 //TX_FDEQ_GAIN_5 +573 0x433C //TX_FDEQ_GAIN_6 +574 0x3A37 //TX_FDEQ_GAIN_7 +575 0x2A2A //TX_FDEQ_GAIN_8 +576 0x303C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 @@ -64713,8 +68009,8 @@ 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4A4C //TX_PREEQ_GAIN_MIC0_8 -626 0x4E50 //TX_PREEQ_GAIN_MIC0_9 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -64761,9 +68057,9 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4846 //TX_PREEQ_GAIN_MIC1_7 -674 0x4544 //TX_PREEQ_GAIN_MIC1_8 -675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +673 0x4A4A //TX_PREEQ_GAIN_MIC1_7 +674 0x4B4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4D4E //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -64809,10 +68105,10 @@ 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +721 0x484A //TX_PREEQ_GAIN_MIC2_6 +722 0x4B4B //TX_PREEQ_GAIN_MIC2_7 +723 0x4B4C //TX_PREEQ_GAIN_MIC2_8 +724 0x4D50 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 @@ -64827,16 +68123,16 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0000 //TX_PREEQ_BIN_MIC2_0 -740 0x0000 //TX_PREEQ_BIN_MIC2_1 -741 0x0000 //TX_PREEQ_BIN_MIC2_2 -742 0x0000 //TX_PREEQ_BIN_MIC2_3 -743 0x0000 //TX_PREEQ_BIN_MIC2_4 -744 0x0000 //TX_PREEQ_BIN_MIC2_5 -745 0x0000 //TX_PREEQ_BIN_MIC2_6 -746 0x0000 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0708 //TX_PREEQ_BIN_MIC2_6 +746 0x090A //TX_PREEQ_BIN_MIC2_7 +747 0x0B0C //TX_PREEQ_BIN_MIC2_8 +748 0x0D0E //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 @@ -64861,7 +68157,7 @@ 770 0x0044 //TX_MIC_PWR_BIAS_1 771 0x0044 //TX_MIC_PWR_BIAS_2 772 0x0044 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 +773 0x0000 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 @@ -64879,7 +68175,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -64904,23 +68200,23 @@ 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP +830 0x0130 //TX_TPKA_FP +831 0x0400 //TX_MIN_G_FP +832 0x0800 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH @@ -64942,8 +68238,8 @@ 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX -854 0x0004 //TX_TDDRC_THRD_0 -855 0x0010 //TX_TDDRC_THRD_1 +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0018 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 858 0x7FFF //TX_TDDRC_SLANT_0 @@ -64954,7 +68250,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0A00 //TX_TDDRC_DRC_GAIN +866 0x1C2F //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -64964,7 +68260,7 @@ 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK +876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 @@ -64986,70 +68282,96 @@ 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0300 //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME +903 0x0009 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +908 0x7F00 //TX_MICMUTE_EAD_THR +909 0x4000 //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 +911 0x7F44 //TX_DTD_THR1_MICMUTE_0 +912 0x7EF4 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N +922 0x0FA0 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x000F //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x3BF6 //TX_TFMASKM4_2_DT_THR +945 0x7F26 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -65061,7 +68383,7 @@ 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x050D //RX_PGA +10 0x00FB //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -65076,8 +68398,8 @@ 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0000 //RX_FADE_IN_PERIOD 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -65912,7 +69234,7 @@ 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x050D //RX_PGA +167 0x00FB //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 @@ -65927,8 +69249,8 @@ 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0000 //RX_FADE_IN_PERIOD 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -66754,15 +70076,14 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-WB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x6F7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6FFD //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC @@ -66779,18 +70100,18 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0010 //TX_DIST2REF_02 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -66799,8 +70120,8 @@ 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 43 0x0001 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 @@ -66871,8 +70192,8 @@ 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC -113 0x0004 //TX_MAINMIC_BLKFACTOR -114 0x0004 //TX_REFMIC_BLKFACTOR +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN @@ -66896,11 +70217,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -66908,10 +70229,10 @@ 147 0x0300 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6800 //TX_EAD_THR +150 0x6C00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x3000 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 154 0x0200 //TX_MIN_EQ_RE_EST_2 155 0x0200 //TX_MIN_EQ_RE_EST_3 156 0x0200 //TX_MIN_EQ_RE_EST_4 @@ -66922,14 +70243,14 @@ 161 0x1000 //TX_MIN_EQ_RE_EST_9 162 0x1000 //TX_MIN_EQ_RE_EST_10 163 0x1000 //TX_MIN_EQ_RE_EST_11 -164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x1B00 //TX_LAMBDA_RE_EST +164 0x6000 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x5000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N +169 0x02A0 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x0020 //TX_DT2_HOLD_N +171 0x0088 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -66955,15 +70276,15 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x76D0 //TX_DTD_THR1_0 -198 0x76D0 //TX_DTD_THR1_1 -199 0x76D0 //TX_DTD_THR1_2 +197 0x7FF8 //TX_DTD_THR1_0 +198 0x7FF8 //TX_DTD_THR1_1 +199 0x7FEE //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x7E00 //TX_DTD_THR2_0 -205 0x7E00 //TX_DTD_THR2_1 +204 0x5000 //TX_DTD_THR2_0 +205 0x5000 //TX_DTD_THR2_1 206 0x5000 //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 @@ -66971,8 +70292,8 @@ 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x03E8 //TX_DT_CUT_K -214 0x0010 //TX_DT_CUT_THR +213 0x1F40 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO @@ -66981,18 +70302,18 @@ 220 0x0000 //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x044C //TX_RATIO_DT_L_TH_HIGH -226 0x7800 //TX_RATIO_DT_H_TH_HIGH +225 0x1194 //TX_RATIO_DT_L_TH_HIGH +226 0x4A38 //TX_RATIO_DT_H_TH_HIGH 227 0x0001 //TX_RATIO_DT_L0_TH -228 0x7FFF //TX_B_POST_FILT_ECHO_L +228 0x4000 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH +234 0x07D0 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -67000,10 +70321,10 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 +242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFB00 //TX_THR_SN_EST_3 +244 0xF400 //TX_THR_SN_EST_2 +245 0xFC00 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 @@ -67011,7 +70332,7 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 @@ -67041,30 +70362,30 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0018 //TX_NS_LVL_CTRL_2 +283 0x0014 //TX_NS_LVL_CTRL_2 284 0x0016 //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 +290 0x0020 //TX_MIN_GAIN_S_1 291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 +292 0x0018 //TX_MIN_GAIN_S_3 293 0x0010 //TX_MIN_GAIN_S_4 294 0x0010 //TX_MIN_GAIN_S_5 295 0x0010 //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP +297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 +301 0x2000 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 +303 0x2000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x50C0 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x2000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -67075,15 +70396,15 @@ 314 0x5000 //TX_A_POST_FILT_S_0 315 0x4C00 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 +317 0x7FFF //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x4000 //TX_B_POST_FILT_3 +323 0x4000 //TX_B_POST_FILT_1 +324 0x7FFF //TX_B_POST_FILT_2 +325 0x7FFF //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -67098,9 +70419,9 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7A00 //TX_LAMBDA_PFILT_S_2 -342 0x7C00 //TX_LAMBDA_PFILT_S_3 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -67111,12 +70432,12 @@ 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0800 //TX_C_POST_FLT_DT +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x2000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0140 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG @@ -67125,23 +70446,23 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0102 //TX_NOISE_TH_0 +367 0x001E //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 -370 0x017E //TX_NOISE_TH_1 -371 0x0230 //TX_NOISE_TH_2 -372 0x3492 //TX_NOISE_TH_3 -373 0x4E20 //TX_NOISE_TH_4 -374 0x55B8 //TX_NOISE_TH_5 -375 0x49E6 //TX_NOISE_TH_5_2 +370 0x0320 //TX_NOISE_TH_1 +371 0x0384 //TX_NOISE_TH_2 +372 0x2904 //TX_NOISE_TH_3 +373 0x3E80 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 376 0x0001 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 -379 0x00F8 //TX_MINENOISE_TH +379 0x0033 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -67150,25 +70471,25 @@ 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH +392 0x7FFF //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG +401 0x0005 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x00DC //TX_MINENOISE_MIC0_TH +406 0x001E //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL +409 0x0400 //TX_METAL_RTO_THR +410 0x07D0 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 @@ -67267,25 +70588,25 @@ 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC +509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -67303,42 +70624,42 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM -567 0x5454 //TX_FDEQ_GAIN_0 -568 0x5448 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4850 //TX_FDEQ_GAIN_5 -573 0x5050 //TX_FDEQ_GAIN_6 -574 0x5448 //TX_FDEQ_GAIN_7 -575 0x464C //TX_FDEQ_GAIN_8 -576 0x5050 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 +567 0x5048 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4A4F //TX_FDEQ_GAIN_2 +570 0x4E48 //TX_FDEQ_GAIN_3 +571 0x4444 //TX_FDEQ_GAIN_4 +572 0x444B //TX_FDEQ_GAIN_5 +573 0x5152 //TX_FDEQ_GAIN_6 +574 0x584F //TX_FDEQ_GAIN_7 +575 0x4950 //TX_FDEQ_GAIN_8 +576 0x4C48 //TX_FDEQ_GAIN_9 +577 0x3D40 //TX_FDEQ_GAIN_10 +578 0x4240 //TX_FDEQ_GAIN_11 +579 0x4C4C //TX_FDEQ_GAIN_12 +580 0x4C4C //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 @@ -67383,12 +70704,12 @@ 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x484A //TX_PREEQ_GAIN_MIC0_8 -626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 -627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 -628 0x4A48 //TX_PREEQ_GAIN_MIC0_11 -629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 -630 0x4C4C //TX_PREEQ_GAIN_MIC0_13 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 @@ -67431,13 +70752,13 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4846 //TX_PREEQ_GAIN_MIC1_7 -674 0x4544 //TX_PREEQ_GAIN_MIC1_8 -675 0x4241 //TX_PREEQ_GAIN_MIC1_9 -676 0x403E //TX_PREEQ_GAIN_MIC1_10 -677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 -678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +673 0x484A //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4C4E //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5454 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 @@ -67457,11 +70778,11 @@ 696 0x0708 //TX_PREEQ_BIN_MIC1_6 697 0x090A //TX_PREEQ_BIN_MIC1_7 698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0F10 //TX_PREEQ_BIN_MIC1_9 -700 0x1011 //TX_PREEQ_BIN_MIC1_10 -701 0x1112 //TX_PREEQ_BIN_MIC1_11 -702 0x1208 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1112 //TX_PREEQ_BIN_MIC1_12 +703 0x120B //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 @@ -67476,19 +70797,19 @@ 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +718 0x484A //TX_PREEQ_GAIN_MIC2_3 +719 0x4B4A //TX_PREEQ_GAIN_MIC2_4 +720 0x4B4C //TX_PREEQ_GAIN_MIC2_5 +721 0x4C4D //TX_PREEQ_GAIN_MIC2_6 +722 0x4F50 //TX_PREEQ_GAIN_MIC2_7 +723 0x5050 //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5252 //TX_PREEQ_GAIN_MIC2_10 +726 0x5253 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x5454 //TX_PREEQ_GAIN_MIC2_13 +729 0x5455 //TX_PREEQ_GAIN_MIC2_14 +730 0x5555 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 @@ -67512,7 +70833,7 @@ 751 0x0808 //TX_PREEQ_BIN_MIC2_12 752 0x0808 //TX_PREEQ_BIN_MIC2_13 753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 +754 0x0808 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 @@ -67531,8 +70852,8 @@ 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0009 //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN @@ -67549,7 +70870,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -67574,23 +70895,23 @@ 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP +830 0x0100 //TX_TPKA_FP +831 0x0400 //TX_MIN_G_FP +832 0x0800 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH @@ -67612,19 +70933,19 @@ 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0018 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 858 0x7FFF //TX_TDDRC_SLANT_0 859 0x7FFF //TX_TDDRC_SLANT_1 -860 0x0800 //TX_TDDRC_ALPHA_UP_00 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0C97 //TX_TDDRC_DRC_GAIN +866 0x20C6 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -67656,70 +70977,96 @@ 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02EE //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME +903 0x0009 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +908 0x7FF6 //TX_MICMUTE_EAD_THR +909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 +911 0x7FFF //TX_DTD_THR1_MICMUTE_0 +912 0x7FDF //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +914 0x7918 //TX_DTD_THR1_MICMUTE_3 +915 0x7000 //TX_DTD_THR2_MICMUTE_0 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N +922 0x1F40 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x1F40 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x000F //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x3C0A //TX_TFMASKM4_2_DT_THR +945 0x2710 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -67731,7 +71078,7 @@ 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x050D //RX_PGA +10 0x00E6 //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -67746,8 +71093,8 @@ 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0000 //RX_FADE_IN_PERIOD 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -68582,7 +71929,7 @@ 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x050D //RX_PGA +167 0x00E6 //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 @@ -68597,8 +71944,8 @@ 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0000 //RX_FADE_IN_PERIOD 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -69424,15 +72771,14 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-SWB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x6F7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6FFD //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC @@ -69449,18 +72795,18 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0010 //TX_DIST2REF_02 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -69469,8 +72815,8 @@ 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 43 0x0001 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 @@ -69556,7 +72902,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7D83 //TX_A_HP +128 0x7B02 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -69566,11 +72912,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -69578,28 +72924,28 @@ 147 0x0400 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7600 //TX_EAD_THR +150 0x7A00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x2000 //TX_MIN_EQ_RE_EST_0 -153 0x0600 //TX_MIN_EQ_RE_EST_1 -154 0x3000 //TX_MIN_EQ_RE_EST_2 -155 0x3000 //TX_MIN_EQ_RE_EST_3 -156 0x3000 //TX_MIN_EQ_RE_EST_4 -157 0x3000 //TX_MIN_EQ_RE_EST_5 -158 0x3000 //TX_MIN_EQ_RE_EST_6 +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x7800 //TX_MIN_EQ_RE_EST_8 -161 0x7800 //TX_MIN_EQ_RE_EST_9 -162 0x7800 //TX_MIN_EQ_RE_EST_10 -163 0x7800 //TX_MIN_EQ_RE_EST_11 -164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x0880 //TX_LAMBDA_RE_EST +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x6000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST 166 0x7FFF //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N +169 0x0260 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0160 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -69626,23 +72972,23 @@ 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7FF0 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 +198 0x7FF3 //TX_DTD_THR1_1 199 0x7FF0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 204 0x7E00 //TX_DTD_THR2_0 -205 0x7E00 //TX_DTD_THR2_1 -206 0x5000 //TX_DTD_THR2_2 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 209 0x5000 //TX_DTD_THR2_5 210 0x5000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 +211 0x6CCC //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x36B0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR +213 0x0FA0 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO @@ -69651,18 +72997,18 @@ 220 0x7FFF //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x733C //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x7FFF //TX_B_POST_FILT_ECHO_L +225 0x0578 //TX_RATIO_DT_L_TH_HIGH +226 0x5528 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x6000 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x3A98 //TX_RATIO_DT_L0_TH_HIGH +234 0x0190 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -69670,21 +73016,21 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 +242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFA00 //TX_THR_SN_EST_3 +244 0xFD00 //TX_THR_SN_EST_2 +245 0xFC00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0000 //TX_DELTA_THR_SN_EST_3 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0100 //TX_DELTA_THR_SN_EST_6 +256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -69702,61 +73048,61 @@ 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x2000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x003C //TX_NS_LVL_CTRL_1 -283 0x0024 //TX_NS_LVL_CTRL_2 -284 0x003C //TX_NS_LVL_CTRL_3 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x000C //TX_NS_LVL_CTRL_2 +284 0x001A //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x003C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x1400 //TX_SNRI_SUP_1 -302 0x1400 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 +301 0x2000 //TX_SNRI_SUP_1 +302 0x3000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x50C0 //TX_SNRI_SUP_5 -306 0x1400 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 +305 0x4000 //TX_SNRI_SUP_5 +306 0x2000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x4C00 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 317 0x6000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x7C00 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x6000 //TX_B_POST_FILT_1 -324 0x6000 //TX_B_POST_FILT_2 +324 0x7000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 +328 0x6000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -69766,17 +73112,17 @@ 335 0x6000 //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7D00 //TX_LAMBDA_PFILT_S_1 -341 0x7D00 //TX_LAMBDA_PFILT_S_2 -342 0x7D00 //TX_LAMBDA_PFILT_S_3 -343 0x7D00 //TX_LAMBDA_PFILT_S_4 -344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 -346 0x7D00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7400 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x01F4 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG @@ -69784,9 +73130,9 @@ 353 0x0040 //TX_DT_BINVAD_TH_0 354 0x0040 //TX_DT_BINVAD_TH_1 355 0x0100 //TX_DT_BINVAD_TH_2 -356 0x0100 //TX_DT_BINVAD_TH_3 +356 0x2000 //TX_DT_BINVAD_TH_3 357 0x36B0 //TX_DT_BINVAD_ENDF -358 0x0200 //TX_C_POST_FLT_DT +358 0x1000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0140 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG @@ -69795,23 +73141,23 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0383 //TX_NOISE_TH_0 +367 0x0050 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 +370 0x0FA0 //TX_NOISE_TH_1 371 0x01F4 //TX_NOISE_TH_2 -372 0x36B0 //TX_NOISE_TH_3 +372 0x300C //TX_NOISE_TH_3 373 0x2710 //TX_NOISE_TH_4 -374 0x2CEC //TX_NOISE_TH_5 +374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 -379 0x044C //TX_MINENOISE_TH +379 0x0050 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 +383 0x07D0 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -69825,20 +73171,20 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG +401 0x0005 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x02F3 //TX_MINENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x4000 //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL +409 0x0200 //TX_METAL_RTO_THR +410 0x07D0 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 @@ -69937,25 +73283,25 @@ 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC +509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -69973,44 +73319,44 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM -567 0x5450 //TX_FDEQ_GAIN_0 -568 0x4C48 //TX_FDEQ_GAIN_1 +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 +571 0x4B48 //TX_FDEQ_GAIN_4 572 0x484E //TX_FDEQ_GAIN_5 -573 0x4E5E //TX_FDEQ_GAIN_6 -574 0x584E //TX_FDEQ_GAIN_7 -575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x564E //TX_FDEQ_GAIN_9 -577 0x5058 //TX_FDEQ_GAIN_10 -578 0x625C //TX_FDEQ_GAIN_11 -579 0x6C6C //TX_FDEQ_GAIN_12 -580 0x7086 //TX_FDEQ_GAIN_13 -581 0x869C //TX_FDEQ_GAIN_14 -582 0xB0B0 //TX_FDEQ_GAIN_15 +573 0x4E58 //TX_FDEQ_GAIN_6 +574 0x565E //TX_FDEQ_GAIN_7 +575 0x484E //TX_FDEQ_GAIN_8 +576 0x4E4C //TX_FDEQ_GAIN_9 +577 0x4A4A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x6050 //TX_FDEQ_GAIN_12 +580 0x585C //TX_FDEQ_GAIN_13 +581 0x5C70 //TX_FDEQ_GAIN_14 +582 0x7880 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -70034,7 +73380,7 @@ 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 -606 0x284A //TX_FDEQ_BIN_15 +606 0x282C //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 @@ -70044,7 +73390,7 @@ 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 @@ -70053,14 +73399,14 @@ 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x494A //TX_PREEQ_GAIN_MIC0_8 -626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 -627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 -628 0x484B //TX_PREEQ_GAIN_MIC0_11 -629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 -630 0x4B48 //TX_PREEQ_GAIN_MIC0_13 -631 0x3838 //TX_PREEQ_GAIN_MIC0_14 -632 0x3835 //TX_PREEQ_GAIN_MIC0_15 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -70075,17 +73421,17 @@ 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1719 //TX_PREEQ_BIN_MIC0_11 -653 0x1B1E //TX_PREEQ_BIN_MIC0_12 -654 0x1E1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x282C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -70093,7 +73439,7 @@ 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 @@ -70101,16 +73447,16 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4846 //TX_PREEQ_GAIN_MIC1_7 -674 0x4544 //TX_PREEQ_GAIN_MIC1_8 -675 0x4241 //TX_PREEQ_GAIN_MIC1_9 -676 0x403E //TX_PREEQ_GAIN_MIC1_10 -677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 -678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 -679 0x3C39 //TX_PREEQ_GAIN_MIC1_13 -680 0x3838 //TX_PREEQ_GAIN_MIC1_14 -681 0x3A3C //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -70124,17 +73470,17 @@ 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 700 0x1013 //TX_PREEQ_BIN_MIC1_10 -701 0x1719 //TX_PREEQ_BIN_MIC1_11 -702 0x1B1E //TX_PREEQ_BIN_MIC1_12 -703 0x1E1E //TX_PREEQ_BIN_MIC1_13 -704 0x1E28 //TX_PREEQ_BIN_MIC1_14 -705 0x282C //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -70149,16 +73495,16 @@ 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 @@ -70167,22 +73513,22 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0xF200 //TX_PREEQ_BIN_MIC2_15 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 @@ -70198,12 +73544,12 @@ 767 0x0050 //TX_MIC_CALIBRATION_2 768 0x0050 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 +770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 -775 0x0000 //TX_GAIN_LIMIT_2 +775 0x000F //TX_GAIN_LIMIT_2 776 0x0000 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP @@ -70219,7 +73565,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -70244,23 +73590,23 @@ 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP +830 0x0100 //TX_TPKA_FP +831 0x0400 //TX_MIN_G_FP +832 0x0800 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH @@ -70282,8 +73628,8 @@ 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX -854 0x0003 //TX_TDDRC_THRD_0 -855 0x0004 //TX_TDDRC_THRD_1 +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0018 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 858 0x7FFF //TX_TDDRC_SLANT_0 @@ -70294,7 +73640,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0E21 //TX_TDDRC_DRC_GAIN +866 0x237B //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -70319,77 +73665,103 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK +891 0x6000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02F0 //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME +903 0x0009 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +908 0x7FD0 //TX_MICMUTE_EAD_THR +909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +911 0x7DFA //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 +913 0x7FDA //TX_DTD_THR1_MICMUTE_2 +914 0x7EF4 //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N +922 0x3E80 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x3E80 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x0014 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x36B0 //TX_TFMASKM4_2_DT_THR +945 0x6590 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -70416,8 +73788,8 @@ 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0000 //RX_FADE_IN_PERIOD 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -71242,7 +74614,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x2040 //RX_RECVFUNC_MODE_0 +157 0x0040 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC @@ -71267,8 +74639,8 @@ 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0000 //RX_FADE_IN_PERIOD 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -72094,16 +75466,15 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-FB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x6B7C //TX_SENDFUNC_MODE_0 +3 0x4B7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC +5 0x0003 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -72119,18 +75490,18 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0010 //TX_DIST2REF_02 +21 0x00A4 //TX_DIST2REF1 +22 0x0017 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +27 0x0FF7 //TX_PGA_0 +28 0x0FF7 //TX_PGA_1 +29 0x0FF7 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF @@ -72236,11 +75607,11 @@ 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -72263,7 +75634,7 @@ 162 0x7FFF //TX_MIN_EQ_RE_EST_10 163 0x7FFF //TX_MIN_EQ_RE_EST_11 164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x0700 //TX_LAMBDA_RE_EST +165 0x4000 //TX_LAMBDA_RE_EST 166 0x0CCD //TX_LAMBDA_CB_NLE 167 0x2000 //TX_C_POST_FLT 168 0x7FFF //TX_GAIN_NP @@ -72323,16 +75694,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1194 //TX_RATIO_DT_L_TH_HIGH +225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x7FFF //TX_B_POST_FILT_ECHO_L +228 0x2000 //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0063 //TX_EPD_OFFSET_00 +232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x0A28 //TX_RATIO_DT_L0_TH_HIGH +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -72340,7 +75711,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF700 //TX_THR_SN_EST_0 +242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -72445,14 +75816,14 @@ 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0180 //TX_K_PEPPER +347 0x0000 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x2000 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 355 0x0200 //TX_DT_BINVAD_TH_2 356 0x0200 //TX_DT_BINVAD_TH_3 357 0x1F40 //TX_DT_BINVAD_ENDF @@ -72465,7 +75836,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x04E8 //TX_NOISE_TH_0 +367 0x0050 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -72477,11 +75848,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 -379 0x02BC //TX_MINENOISE_TH +379 0x0033 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x1482 //TX_DT_CUT_K1 +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -72495,16 +75866,16 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L +397 0x0002 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG +401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x04E7 //TX_MINENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -72612,20 +75983,20 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR @@ -72643,44 +76014,44 @@ 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 -570 0x484C //TX_FDEQ_GAIN_3 -571 0x4C4C //TX_FDEQ_GAIN_4 -572 0x544C //TX_FDEQ_GAIN_5 -573 0x5454 //TX_FDEQ_GAIN_6 -574 0x5454 //TX_FDEQ_GAIN_7 -575 0x585A //TX_FDEQ_GAIN_8 -576 0x5C5C //TX_FDEQ_GAIN_9 -577 0x6068 //TX_FDEQ_GAIN_10 -578 0x8894 //TX_FDEQ_GAIN_11 -579 0x94B4 //TX_FDEQ_GAIN_12 -580 0xB4C7 //TX_FDEQ_GAIN_13 -581 0xC7C6 //TX_FDEQ_GAIN_14 -582 0xC6C6 //TX_FDEQ_GAIN_15 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4853 //TX_FDEQ_GAIN_9 +577 0x5450 //TX_FDEQ_GAIN_10 +578 0x7465 //TX_FDEQ_GAIN_11 +579 0x807F //TX_FDEQ_GAIN_12 +580 0x82C4 //TX_FDEQ_GAIN_13 +581 0xC4C4 //TX_FDEQ_GAIN_14 +582 0xC4C4 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -72714,24 +76085,24 @@ 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4849 //TX_PREEQ_GAIN_MIC0_6 -624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 -626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 -627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 -628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 -629 0x4838 //TX_PREEQ_GAIN_MIC0_12 -630 0x3858 //TX_PREEQ_GAIN_MIC0_13 -631 0x7060 //TX_PREEQ_GAIN_MIC0_14 -632 0x9870 //TX_PREEQ_GAIN_MIC0_15 -633 0x5848 //TX_PREEQ_GAIN_MIC0_16 +623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 +624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 +625 0x5456 //TX_PREEQ_GAIN_MIC0_8 +626 0x585C //TX_PREEQ_GAIN_MIC0_9 +627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 +628 0x7478 //TX_PREEQ_GAIN_MIC0_11 +629 0x705C //TX_PREEQ_GAIN_MIC0_12 +630 0x4838 //TX_PREEQ_GAIN_MIC0_13 +631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 @@ -72745,17 +76116,17 @@ 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x0909 //TX_PREEQ_BIN_MIC0_7 +649 0x090B //TX_PREEQ_BIN_MIC0_8 650 0x0C10 //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x4000 //TX_PREEQ_BIN_MIC0_16 +653 0x1414 //TX_PREEQ_BIN_MIC0_12 +654 0x1C1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x462C //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -72770,15 +76141,15 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4645 //TX_PREEQ_GAIN_MIC1_6 -673 0x4442 //TX_PREEQ_GAIN_MIC1_7 -674 0x4140 //TX_PREEQ_GAIN_MIC1_8 -675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 -676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 -677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 -678 0x3938 //TX_PREEQ_GAIN_MIC1_12 -679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 -680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 @@ -72788,23 +76159,23 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0809 //TX_PREEQ_BIN_MIC1_7 -698 0x0A0A //TX_PREEQ_BIN_MIC1_8 -699 0x0C10 //TX_PREEQ_BIN_MIC1_9 -700 0x1013 //TX_PREEQ_BIN_MIC1_10 -701 0x1414 //TX_PREEQ_BIN_MIC1_11 -702 0x261E //TX_PREEQ_BIN_MIC1_12 -703 0x1E14 //TX_PREEQ_BIN_MIC1_13 -704 0x1414 //TX_PREEQ_BIN_MIC1_14 -705 0x2814 //TX_PREEQ_BIN_MIC1_15 -706 0x4000 //TX_PREEQ_BIN_MIC1_16 +690 0x1812 //TX_PREEQ_BIN_MIC1_0 +691 0x0A0A //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x080A //TX_PREEQ_BIN_MIC1_3 +694 0x0B09 //TX_PREEQ_BIN_MIC1_4 +695 0x0A06 //TX_PREEQ_BIN_MIC1_5 +696 0x0606 //TX_PREEQ_BIN_MIC1_6 +697 0x0605 //TX_PREEQ_BIN_MIC1_7 +698 0x050A //TX_PREEQ_BIN_MIC1_8 +699 0x1505 //TX_PREEQ_BIN_MIC1_9 +700 0x0506 //TX_PREEQ_BIN_MIC1_10 +701 0x0615 //TX_PREEQ_BIN_MIC1_11 +702 0x1516 //TX_PREEQ_BIN_MIC1_12 +703 0x2021 //TX_PREEQ_BIN_MIC1_13 +704 0x2021 //TX_PREEQ_BIN_MIC1_14 +705 0x2021 //TX_PREEQ_BIN_MIC1_15 +706 0x0800 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -72889,7 +76260,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7214 //TX_TDDRC_TD_DRC_LIMIT +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -72921,12 +76292,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -72951,20 +76322,20 @@ 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX +853 0x0004 //TX_FILTINDX 854 0x0004 //TX_TDDRC_THRD_0 855 0x0016 //TX_TDDRC_THRD_1 -856 0x1800 //TX_TDDRC_THRD_2 -857 0x1800 //TX_TDDRC_THRD_3 -858 0x7FFF //TX_TDDRC_SLANT_0 -859 0x7FFF //TX_TDDRC_SLANT_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 860 0x0C00 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0B39 //TX_TDDRC_DRC_GAIN +866 0x0A98 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -72989,7 +76360,7 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7000 //TX_A_LESSCUT_RTO_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL @@ -73004,7 +76375,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -73031,35 +76402,61 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -73086,8 +76483,8 @@ 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0000 //RX_FADE_IN_PERIOD 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -73937,8 +77334,2703 @@ 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0000 //RX_FADE_IN_PERIOD +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-TTY_VCO-RESERVE2-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00FB //TX_PATCH_REG +3 0x6F7D //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0800 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x6000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0260 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0160 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF3 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x6CCC //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0FA0 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x0578 //TX_RATIO_DT_L_TH_HIGH +226 0x5528 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x6000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0190 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFD00 //TX_THR_SN_EST_2 +245 0xFC00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x000C //TX_NS_LVL_CTRL_2 +284 0x001A //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x001A //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x4000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x2000 //TX_SNRI_SUP_1 +302 0x3000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x2000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x7000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x6000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7400 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x01F4 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x2000 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0FA0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x300C //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0005 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0200 //TX_METAL_RTO_THR +410 0x07D0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0064 //TX_KIDDET_NTH +525 0x1000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E58 //TX_FDEQ_GAIN_6 +574 0x565E //TX_FDEQ_GAIN_7 +575 0x484E //TX_FDEQ_GAIN_8 +576 0x4E4C //TX_FDEQ_GAIN_9 +577 0x4A4A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x6050 //TX_FDEQ_GAIN_12 +580 0x585C //TX_FDEQ_GAIN_13 +581 0x5C70 //TX_FDEQ_GAIN_14 +582 0x7880 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0006 //TX_DEADMIC_SILENCE_TH +817 0x2800 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0018 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x27D0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0x8000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x6000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02F0 //TX_MICMUTE_RATIO_THR +900 0x02F0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0009 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7FD0 //TX_MICMUTE_EAD_THR +909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7DFA //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 +913 0x7FDA //TX_DTD_THR1_MICMUTE_2 +914 0x7EF4 //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0200 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x3E80 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x3E80 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 +926 0x0014 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0100 //TX_MIC_VOLUME_MIC1MUTE +944 0x36B0 //TX_TFMASKM4_2_DT_THR +945 0x6590 //TX_MEAN_GAIN500HZ_DT_THR +946 0x000A //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x2040 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x050D //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0000 //RX_PITCH_BFR_LEN +17 0x0000 //RX_SBD_PITCH_DET +18 0x0000 //RX_PP_RESRV_0 +19 0x0000 //RX_PP_RESRV_1 +20 0xF800 //RX_N_SN_EST +21 0x0000 //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0000 //RX_FADE_IN_PERIOD +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +30 0x0000 //RX_EXTRA_NS_L +31 0x0000 //RX_EXTRA_NS_A +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x0000 //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0003 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0010 //RX_MAXLEVEL_CNG +132 0x0000 //RX_BWE_UV_TH +133 0x0000 //RX_BWE_UV_TH2 +134 0x0000 //RX_BWE_UV_TH3 +135 0x0000 //RX_BWE_V_TH +136 0x0000 //RX_BWE_GAIN1_V_TH1 +137 0x0000 //RX_BWE_GAIN1_V_TH2 +138 0x0000 //RX_BWE_UV_EQ +139 0x0000 //RX_BWE_V_EQ +140 0x0000 //RX_BWE_TONE_TH +141 0x0000 //RX_BWE_UV_HOLD_T +142 0x0000 //RX_BWE_GAIN2_ALPHA +143 0x0000 //RX_BWE_GAIN3_ALPHA +144 0x0000 //RX_BWE_CUTOFF +145 0x0000 //RX_BWE_GAINFILL +146 0x0000 //RX_BWE_MAXTH_TONE +147 0x0000 //RX_BWE_EQ_0 +148 0x0000 //RX_BWE_EQ_1 +149 0x0000 //RX_BWE_EQ_2 +150 0x0000 //RX_BWE_EQ_3 +151 0x0000 //RX_BWE_EQ_4 +152 0x0000 //RX_BWE_EQ_5 +153 0x0000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0000 //RX_FADE_IN_PERIOD 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -74764,7 +80856,6 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-NB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX @@ -74798,9 +80889,9 @@ 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF @@ -74906,11 +80997,11 @@ 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -74957,7 +81048,7 @@ 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST -189 0x0000 //TX_AEC_NUM_CH +189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH @@ -75165,7 +81256,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L +397 0x0000 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ @@ -75292,10 +81383,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR @@ -75313,26 +81404,26 @@ 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x0000 //TX_WNS_REFGAIN +546 0x0000 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0000 //TX_BF_LESSCUT_BBIN -554 0x0000 //TX_BF_LESSCUT_EBIN -555 0x0000 //TX_POSTBFB0 -556 0x0000 //TX_POSTBFB -557 0x0000 //TX_POSTBFE -558 0x0000 //TX_SPEECH_SNR_TH -559 0x0000 //TX_PB_MAX_PRI_SNR_TH -560 0x0000 //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0000 //TX_BVE_NOISE_FLOOR_1 +554 0x0000 //TX_BVE_NOISE_FLOOR_2 +555 0x0000 //TX_BVE_NOISE_FLOOR_3 +556 0x0000 //TX_BVE_NOISE_FLOOR_4 +557 0x0000 //TX_BVE_NOISE_FLOOR_5 +558 0x0000 //TX_BVE_NOISE_FLOOR_6 +559 0x0000 //TX_BVE_NOISE_FLOOR_7 +560 0x0000 //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -75591,12 +81682,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x0000 //TX_NOISE_FLOOR_TH +824 0x0000 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x0000 //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -75674,7 +81765,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -75701,35 +81792,61 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -75741,7 +81858,7 @@ 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x050D //RX_PGA +10 0x00FB //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -75756,8 +81873,8 @@ 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0000 //RX_FADE_IN_PERIOD 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -76592,7 +82709,7 @@ 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x050D //RX_PGA +167 0x00FB //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 @@ -76607,8 +82724,8 @@ 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0000 //RX_FADE_IN_PERIOD 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -77434,7 +83551,6 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-WB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX @@ -77468,9 +83584,9 @@ 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF @@ -77576,11 +83692,11 @@ 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -77627,7 +83743,7 @@ 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST -189 0x0000 //TX_AEC_NUM_CH +189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH @@ -77835,7 +83951,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L +397 0x0000 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ @@ -77962,10 +84078,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR @@ -77983,26 +84099,26 @@ 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x0000 //TX_WNS_REFGAIN +546 0x0000 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0000 //TX_BF_LESSCUT_BBIN -554 0x0000 //TX_BF_LESSCUT_EBIN -555 0x0000 //TX_POSTBFB0 -556 0x0000 //TX_POSTBFB -557 0x0000 //TX_POSTBFE -558 0x0000 //TX_SPEECH_SNR_TH -559 0x0000 //TX_PB_MAX_PRI_SNR_TH -560 0x0000 //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0000 //TX_BVE_NOISE_FLOOR_1 +554 0x0000 //TX_BVE_NOISE_FLOOR_2 +555 0x0000 //TX_BVE_NOISE_FLOOR_3 +556 0x0000 //TX_BVE_NOISE_FLOOR_4 +557 0x0000 //TX_BVE_NOISE_FLOOR_5 +558 0x0000 //TX_BVE_NOISE_FLOOR_6 +559 0x0000 //TX_BVE_NOISE_FLOOR_7 +560 0x0000 //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -78261,12 +84377,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x0000 //TX_NOISE_FLOOR_TH +824 0x0000 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x0000 //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -78344,7 +84460,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -78371,35 +84487,61 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -78411,7 +84553,7 @@ 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x050D //RX_PGA +10 0x00E6 //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -78426,8 +84568,8 @@ 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0000 //RX_FADE_IN_PERIOD 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -79262,7 +85404,7 @@ 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x050D //RX_PGA +167 0x00E6 //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 @@ -79277,8 +85419,8 @@ 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0000 //RX_FADE_IN_PERIOD 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -80104,7 +86246,6 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-SWB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX @@ -80138,9 +86279,9 @@ 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF @@ -80246,11 +86387,11 @@ 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -80297,7 +86438,7 @@ 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST -189 0x0000 //TX_AEC_NUM_CH +189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH @@ -80505,7 +86646,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L +397 0x0000 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ @@ -80632,10 +86773,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR @@ -80653,26 +86794,26 @@ 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x0000 //TX_WNS_REFGAIN +546 0x0000 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0000 //TX_BF_LESSCUT_BBIN -554 0x0000 //TX_BF_LESSCUT_EBIN -555 0x0000 //TX_POSTBFB0 -556 0x0000 //TX_POSTBFB -557 0x0000 //TX_POSTBFE -558 0x0000 //TX_SPEECH_SNR_TH -559 0x0000 //TX_PB_MAX_PRI_SNR_TH -560 0x0000 //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0000 //TX_BVE_NOISE_FLOOR_1 +554 0x0000 //TX_BVE_NOISE_FLOOR_2 +555 0x0000 //TX_BVE_NOISE_FLOOR_3 +556 0x0000 //TX_BVE_NOISE_FLOOR_4 +557 0x0000 //TX_BVE_NOISE_FLOOR_5 +558 0x0000 //TX_BVE_NOISE_FLOOR_6 +559 0x0000 //TX_BVE_NOISE_FLOOR_7 +560 0x0000 //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -80931,12 +87072,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x0000 //TX_NOISE_FLOOR_TH +824 0x0000 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x0000 //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -81014,7 +87155,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -81041,35 +87182,61 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -81096,8 +87263,8 @@ 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0000 //RX_FADE_IN_PERIOD 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -81922,7 +88089,7 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x2040 //RX_RECVFUNC_MODE_0 +157 0x0040 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC @@ -81947,8 +88114,8 @@ 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0000 //RX_FADE_IN_PERIOD 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -82774,7 +88941,6 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-FB -#PARAM_MODE Full #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX @@ -82808,9 +88974,9 @@ 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF @@ -82916,11 +89082,11 @@ 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 @@ -82967,7 +89133,7 @@ 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST -189 0x0000 //TX_AEC_NUM_CH +189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH @@ -83175,7 +89341,7 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L +397 0x0000 //TX_LOGSNR_THR 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ @@ -83302,10 +89468,10 @@ 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR @@ -83323,26 +89489,26 @@ 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 +545 0x0000 //TX_WNS_REFGAIN +546 0x0000 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0000 //TX_BF_LESSCUT_BBIN -554 0x0000 //TX_BF_LESSCUT_EBIN -555 0x0000 //TX_POSTBFB0 -556 0x0000 //TX_POSTBFB -557 0x0000 //TX_POSTBFE -558 0x0000 //TX_SPEECH_SNR_TH -559 0x0000 //TX_PB_MAX_PRI_SNR_TH -560 0x0000 //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0000 //TX_BVE_NOISE_FLOOR_1 +554 0x0000 //TX_BVE_NOISE_FLOOR_2 +555 0x0000 //TX_BVE_NOISE_FLOOR_3 +556 0x0000 //TX_BVE_NOISE_FLOOR_4 +557 0x0000 //TX_BVE_NOISE_FLOOR_5 +558 0x0000 //TX_BVE_NOISE_FLOOR_6 +559 0x0000 //TX_BVE_NOISE_FLOOR_7 +560 0x0000 //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 @@ -83601,12 +89767,12 @@ 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 +823 0x0000 //TX_NOISE_FLOOR_TH +824 0x0000 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x0000 //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP @@ -83684,7 +89850,7 @@ 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +906 0x0020 //TX_MICMUTE_DIST2REF_1 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE @@ -83711,35 +89877,61 @@ 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -83766,8 +89958,8 @@ 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 +25 0x000A //RX_MUTE_PERIOD +26 0x0000 //RX_FADE_IN_PERIOD 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -84617,8 +90809,8 @@ 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 +182 0x000A //RX_MUTE_PERIOD +183 0x0000 //RX_FADE_IN_PERIOD 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 @@ -85443,3 +91635,16173 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 +#CASE_NAME HEADSET-TTY_FULL-RESERVE2-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0000 //TX_PATCH_REG +3 0x0200 //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0078 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0302 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0000 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0000 //TX_MICS_OF_PAIR0 +38 0x0000 //TX_MICS_OF_PAIR1 +39 0x0000 //TX_MICS_OF_PAIR2 +40 0x0000 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0003 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x0000 //TX_HD_BIN_MASK +53 0x0000 //TX_HD_SUBAND_MASK +54 0x0000 //TX_HD_FRAME_AVG_MASK +55 0x0000 //TX_HD_MIN_FRQ +56 0x0000 //TX_HD_ALPHA_PSD +57 0x0000 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0x0000 //TX_T_PSDVAT +63 0x0000 //TX_CNT +64 0x0000 //TX_ANTI_HOWL_GAIN +65 0x0000 //TX_MICFORBFMARK_0 +66 0x0000 //TX_MICFORBFMARK_1 +67 0x0000 //TX_MICFORBFMARK_2 +68 0x0000 //TX_MICFORBFMARK_3 +69 0x0000 //TX_MICFORBFMARK_4 +70 0x0000 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x0000 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x0000 //TX_ADCS_GAIN +112 0x0000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x7FFF //TX_BLMIC_BLKFACTOR +116 0x7FFF //TX_BRMIC_BLKFACTOR +117 0x000A //TX_MICBLK_START_BIN +118 0x0041 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x0000 //TX_FE_ENER_TH_MTS +124 0x0000 //TX_FE_ENER_TH_EXP +125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x0000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0020 //TX_MIC_BLOCK_N +128 0x7652 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x7800 //TX_THR_PITCH_DET_0 +131 0x7000 //TX_THR_PITCH_DET_1 +132 0x6000 //TX_THR_PITCH_DET_2 +133 0x0000 //TX_PITCH_BFR_LEN +134 0x0000 //TX_SBD_PITCH_DET +135 0x0000 //TX_TD_AEC_L +136 0x0000 //TX_MU0_UNP_TD_AEC +137 0x0000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x2000 //TX_AEC_REF_GAIN_0 +148 0x2000 //TX_AEC_REF_GAIN_1 +149 0x2000 //TX_AEC_REF_GAIN_2 +150 0x4000 //TX_EAD_THR +151 0x0200 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0100 //TX_MIN_EQ_RE_EST_3 +156 0x0100 //TX_MIN_EQ_RE_EST_4 +157 0x0100 //TX_MIN_EQ_RE_EST_5 +158 0x0100 //TX_MIN_EQ_RE_EST_6 +159 0x0100 //TX_MIN_EQ_RE_EST_7 +160 0x0100 //TX_MIN_EQ_RE_EST_8 +161 0x0100 //TX_MIN_EQ_RE_EST_9 +162 0x0100 //TX_MIN_EQ_RE_EST_10 +163 0x0100 //TX_MIN_EQ_RE_EST_11 +164 0x0100 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x0000 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0008 //TX_SE_HOLD_N +170 0x0050 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x0000 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x0000 //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0000 //TX_FRQ_LIN_LEN +184 0x0000 //TX_FRQ_AEC_LEN_RHO +185 0x0000 //TX_MU0_UNP_FRQ_AEC +186 0x0000 //TX_MU0_PTD_FRQ_AEC +187 0x0000 //TX_MINENOISETH +188 0x0000 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x0000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7333 //TX_DTD_THR1_0 +198 0x7333 //TX_DTD_THR1_1 +199 0x7333 //TX_DTD_THR1_2 +200 0x7333 //TX_DTD_THR1_3 +201 0x7333 //TX_DTD_THR1_4 +202 0x7333 //TX_DTD_THR1_5 +203 0x7333 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0400 //TX_DT_CUT_K +214 0x0000 //TX_DT_CUT_THR +215 0x0000 //TX_COMFORT_G +216 0x0000 //TX_POWER_YOUT_TH +217 0x0000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x0800 //TX_B_POST_FILT_ECHO_H +230 0x0000 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x0000 //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0000 //TX_DT_RESRV_7 +240 0x0000 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xFA00 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF800 //TX_THR_SN_EST_2 +245 0xF600 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0A00 //TX_N_SN_EST +267 0x0000 //TX_INBEAM_T +268 0x0000 //TX_INBEAMHOLDT +269 0x1FFF //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x0000 //TX_B_POST_FLT_0 +280 0x0000 //TX_B_POST_FLT_1 +281 0x001A //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0014 //TX_NS_LVL_CTRL_2 +284 0x000C //TX_NS_LVL_CTRL_3 +285 0x000C //TX_NS_LVL_CTRL_4 +286 0x000C //TX_NS_LVL_CTRL_5 +287 0x001A //TX_NS_LVL_CTRL_6 +288 0x000C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0014 //TX_MIN_GAIN_S_1 +291 0x0014 //TX_MIN_GAIN_S_2 +292 0x0014 //TX_MIN_GAIN_S_3 +293 0x0014 //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x0014 //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x0000 //TX_NMOS_SUP +298 0x0064 //TX_NS_MAX_PRI_SNR_TH +299 0x7FFF //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x1200 //TX_THR_LFNS +309 0x0147 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x7FFF //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x7FFF //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x1000 //TX_A_POST_FILT_S_2 +317 0x6666 //TX_A_POST_FILT_S_3 +318 0x6666 //TX_A_POST_FILT_S_4 +319 0x6666 //TX_A_POST_FILT_S_5 +320 0x199A //TX_A_POST_FILT_S_6 +321 0x6666 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7E00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7E00 //TX_LAMBDA_PFILT_S_4 +344 0x7E00 //TX_LAMBDA_PFILT_S_5 +345 0x7E00 //TX_LAMBDA_PFILT_S_6 +346 0x7E00 //TX_LAMBDA_PFILT_S_7 +347 0x0010 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x0000 //TX_K_PEPPER_HF +350 0x0000 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0000 //TX_DT_BINVAD_TH_0 +354 0x0000 //TX_DT_BINVAD_TH_1 +355 0x0000 //TX_DT_BINVAD_TH_2 +356 0x0000 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0001 //TX_BF_SGRAD_FLG +362 0x0000 //TX_BF_DVG_TH +363 0x0000 //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x05A0 //TX_NDETCT +367 0x0383 //TX_NOISE_TH_0 +368 0x1388 //TX_NOISE_TH_0_2 +369 0x3A98 //TX_NOISE_TH_0_3 +370 0x0C80 //TX_NOISE_TH_1 +371 0x0032 //TX_NOISE_TH_2 +372 0x3D54 //TX_NOISE_TH_3 +373 0x012C //TX_NOISE_TH_4 +374 0x07D0 //TX_NOISE_TH_5 +375 0x6590 //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x00C8 //TX_NOISE_TH_6 +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x6400 //TX_OUT_ENER_S_TH_CLEAN +385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x6400 //TX_OUT_ENER_S_TH_NOISY +387 0x6400 //TX_OUT_ENER_TH_NOISE +388 0x7D00 //TX_OUT_ENER_TH_SPEECH +389 0x0000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0000 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0000 //TX_MIN_G_LOW300HZ +401 0x0010 //TX_MAXLEVEL_CNG +402 0x0000 //TX_STN_NOISE_TH +403 0x0000 //TX_POST_MASK_SUP +404 0x0000 //TX_POST_MASK_ADJUST +405 0x0014 //TX_NS_ENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH +407 0x0226 //TX_MINENOISE_MIC0_S_TH +408 0x2879 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0080 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x2000 //TX_RHO_UPB +415 0x0020 //TX_N_HOLD_HS +416 0x0009 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0000 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x0219 //TX_THR_STD_PLH +421 0x09C4 //TX_N_HOLD_STD +422 0x0166 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x0000 //TX_SB_RTO_MEAN_TH_RUB +428 0x2000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0064 //TX_DESIRED_TALK_HOLDT +431 0x1000 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0000 //TX_HS_VAD_BIN +435 0x0000 //TX_THR_VAD_HS +436 0x0000 //TX_MEAN_RTO_MIN_TH2 +437 0x0000 //TX_SILENCE_T +438 0x4000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x099A //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x001E //TX_DOA_VAD_THR_1 +445 0x001E //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B +453 0x005A //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C +456 0x005A //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D +459 0x005A //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0172 //TX_BF_HOLDOFF_T +473 0x8000 //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x071C //TX_DOA_TRACK_HT +477 0x0280 //TX_N1_HOLD_HF +478 0x0140 //TX_N2_HOLD_HF +479 0x2AAB //TX_BF_RESET_THR_HF +480 0x4000 //TX_DOA_SMOOTH +481 0x0000 //TX_MU_BF +482 0x0200 //TX_BF_MU_LF_B2 +483 0x0000 //TX_BF_FC_END_BIN_B2 +484 0x0000 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0000 //TX_N_DOA_SEED +488 0x0000 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x0000 //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x0000 //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x0000 //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0168 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0004 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0230 //TX_NOR_OFF_TH1 +503 0xD333 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x6666 //TX_MICTOBFGAIN0 +513 0x0014 //TX_FASTMUE_TH +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x0000 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0028 //TX_SNR_THR +531 0x03E8 //TX_ENGY_THR +532 0x0000 //TX_CORR_HIGH_TH +533 0x0000 //TX_ENGY_THR_2 +534 0x0000 //TX_MEAN_RTO_THR +535 0x0000 //TX_WNS_ENOISE_MIC0_TH +536 0x0000 //TX_RATIOMICL_TH +537 0x0000 //TX_CALIG_HS +538 0x000A //TX_LVL_CTRL +539 0x0000 //TX_WIND_SUPRTO +540 0x0000 //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x0000 //TX_RATIOMICH_TH +543 0x0000 //TX_WIND_INBEAM_L_TH +544 0x0000 //TX_WIND_INBEAM_H_TH +545 0x0000 //TX_WNS_REFGAIN +546 0x0000 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0000 //TX_BVE_NOISE_FLOOR_1 +554 0x0000 //TX_BVE_NOISE_FLOOR_2 +555 0x0000 //TX_BVE_NOISE_FLOOR_3 +556 0x0000 //TX_BVE_NOISE_FLOOR_4 +557 0x0000 //TX_BVE_NOISE_FLOOR_5 +558 0x0000 //TX_BVE_NOISE_FLOOR_6 +559 0x0000 //TX_BVE_NOISE_FLOOR_7 +560 0x0000 //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0000 //TX_FDEQ_BIN_0 +592 0x0000 //TX_FDEQ_BIN_1 +593 0x0000 //TX_FDEQ_BIN_2 +594 0x0000 //TX_FDEQ_BIN_3 +595 0x0000 //TX_FDEQ_BIN_4 +596 0x0000 //TX_FDEQ_BIN_5 +597 0x0000 //TX_FDEQ_BIN_6 +598 0x0000 //TX_FDEQ_BIN_7 +599 0x0000 //TX_FDEQ_BIN_8 +600 0x0000 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0000 //TX_PREEQ_BIN_MIC0_0 +642 0x0000 //TX_PREEQ_BIN_MIC0_1 +643 0x0000 //TX_PREEQ_BIN_MIC0_2 +644 0x0000 //TX_PREEQ_BIN_MIC0_3 +645 0x0000 //TX_PREEQ_BIN_MIC0_4 +646 0x0000 //TX_PREEQ_BIN_MIC0_5 +647 0x0000 //TX_PREEQ_BIN_MIC0_6 +648 0x0000 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0000 //TX_PREEQ_BIN_MIC1_0 +691 0x0000 //TX_PREEQ_BIN_MIC1_1 +692 0x0000 //TX_PREEQ_BIN_MIC1_2 +693 0x0000 //TX_PREEQ_BIN_MIC1_3 +694 0x0000 //TX_PREEQ_BIN_MIC1_4 +695 0x0000 //TX_PREEQ_BIN_MIC1_5 +696 0x0000 //TX_PREEQ_BIN_MIC1_6 +697 0x0000 //TX_PREEQ_BIN_MIC1_7 +698 0x0000 //TX_PREEQ_BIN_MIC1_8 +699 0x0000 //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 +740 0x0000 //TX_PREEQ_BIN_MIC2_1 +741 0x0000 //TX_PREEQ_BIN_MIC2_2 +742 0x0000 //TX_PREEQ_BIN_MIC2_3 +743 0x0000 //TX_PREEQ_BIN_MIC2_4 +744 0x0000 //TX_PREEQ_BIN_MIC2_5 +745 0x0000 //TX_PREEQ_BIN_MIC2_6 +746 0x0000 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0064 //TX_MIC_CALIBRATION_0 +766 0x006A //TX_MIC_CALIBRATION_1 +767 0x006A //TX_MIC_CALIBRATION_2 +768 0x006B //TX_MIC_CALIBRATION_3 +769 0x0048 //TX_MIC_PWR_BIAS_0 +770 0x003C //TX_MIC_PWR_BIAS_1 +771 0x003C //TX_MIC_PWR_BIAS_2 +772 0x003C //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0009 //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 +788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 +789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 +790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 +791 0x65AD //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0002 //TX_DEADMIC_SILENCE_TH +817 0x0147 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x0000 //TX_NOISE_FLOOR_TH +824 0x0000 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x0000 //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x0000 //TX_A_POST_FLT_FP +835 0x0000 //TX_RTO_OUTBEAM_TH +836 0x0000 //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0000 //TX_FFP_RESRV_2 +849 0x0000 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x0E80 //TX_TDDRC_THRD_2 +857 0x3800 //TX_TDDRC_THRD_3 +858 0x2A00 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x0000 //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0000 //TX_TDDRC_SMT_W +866 0x0100 //TX_TDDRC_DRC_GAIN +867 0x0000 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x1EB8 //TX_TFMASKLTH +870 0x170A //TX_TFMASKLTHL +871 0x7FFF //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x4000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x0000 //TX_FASTNS_OUTIN_TH +884 0x0000 //TX_FASTNS_TFMASK_TH +885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 +886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 +887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0x8000 //TX_FASTNS_MASK5_TH +890 0x051F //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x2040 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x050D //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0000 //RX_PITCH_BFR_LEN +17 0x0000 //RX_SBD_PITCH_DET +18 0x0000 //RX_PP_RESRV_0 +19 0x0000 //RX_PP_RESRV_1 +20 0xF800 //RX_N_SN_EST +21 0x0000 //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0000 //RX_FADE_IN_PERIOD +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +30 0x0000 //RX_EXTRA_NS_L +31 0x0000 //RX_EXTRA_NS_A +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x0000 //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0003 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0010 //RX_MAXLEVEL_CNG +132 0x0000 //RX_BWE_UV_TH +133 0x0000 //RX_BWE_UV_TH2 +134 0x0000 //RX_BWE_UV_TH3 +135 0x0000 //RX_BWE_V_TH +136 0x0000 //RX_BWE_GAIN1_V_TH1 +137 0x0000 //RX_BWE_GAIN1_V_TH2 +138 0x0000 //RX_BWE_UV_EQ +139 0x0000 //RX_BWE_V_EQ +140 0x0000 //RX_BWE_TONE_TH +141 0x0000 //RX_BWE_UV_HOLD_T +142 0x0000 //RX_BWE_GAIN2_ALPHA +143 0x0000 //RX_BWE_GAIN3_ALPHA +144 0x0000 //RX_BWE_CUTOFF +145 0x0000 //RX_BWE_GAINFILL +146 0x0000 //RX_BWE_MAXTH_TONE +147 0x0000 //RX_BWE_EQ_0 +148 0x0000 //RX_BWE_EQ_1 +149 0x0000 //RX_BWE_EQ_2 +150 0x0000 //RX_BWE_EQ_3 +151 0x0000 //RX_BWE_EQ_4 +152 0x0000 //RX_BWE_EQ_5 +153 0x0000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +33 0xDA9E //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x0E80 //RX_TDDRC_THRD_2 +115 0x3800 //RX_TDDRC_THRD_3 +116 0x2A00 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x0000 //RX_TDDRC_HMNC_GAIN +122 0x0000 //RX_TDDRC_SMT_FLAG +123 0x0000 //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0000 //RX_FDEQ_BIN_0 +64 0x0000 //RX_FDEQ_BIN_1 +65 0x0000 //RX_FDEQ_BIN_2 +66 0x0000 //RX_FDEQ_BIN_3 +67 0x0000 //RX_FDEQ_BIN_4 +68 0x0000 //RX_FDEQ_BIN_5 +69 0x0000 //RX_FDEQ_BIN_6 +70 0x0000 //RX_FDEQ_BIN_7 +71 0x0000 //RX_FDEQ_BIN_8 +72 0x0000 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x0000 //RX_FDEQ_RESRV_0 +88 0x0000 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x2000 //RX_FDDRC_SLANT_1_0 +107 0x2000 //RX_FDDRC_SLANT_1_1 +108 0x2000 //RX_FDDRC_SLANT_1_2 +109 0x2000 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0000 //RX_FADE_IN_PERIOD +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-NB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7646 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x7CCC //TX_THR_PITCH_DET_0 +131 0x7000 //TX_THR_PITCH_DET_1 +132 0x6333 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0010 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x1000 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x2000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x0064 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x5000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7F00 //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x2000 //TX_DTD_THR2_3 +208 0x2000 //TX_DTD_THR2_4 +209 0x2000 //TX_DTD_THR2_5 +210 0x2000 //TX_DTD_THR2_6 +211 0x4100 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x1000 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0010 //TX_EPD_OFFSET_00 +233 0x0010 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xFA00 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xFA00 //TX_THR_SN_EST_6 +249 0xFA00 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0000 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0000 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0000 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x0400 //TX_B_POST_FLT_0 +280 0x0400 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0010 //TX_NS_LVL_CTRL_1 +283 0x0010 //TX_NS_LVL_CTRL_2 +284 0x0010 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0010 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000D //TX_MIN_GAIN_S_0 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x000D //TX_MIN_GAIN_S_2 +292 0x000D //TX_MIN_GAIN_S_3 +293 0x000D //TX_MIN_GAIN_S_4 +294 0x000D //TX_MIN_GAIN_S_5 +295 0x000D //TX_MIN_GAIN_S_6 +296 0x000D //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0014 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x4000 //TX_A_POST_FILT_S_7 +322 0x0400 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x0400 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x0FA0 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x003B //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x02BC //TX_NOISE_TH_1 +371 0x1F40 //TX_NOISE_TH_2 +372 0x4650 //TX_NOISE_TH_3 +373 0x7148 //TX_NOISE_TH_4 +374 0x044C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x0032 //TX_NOISE_TH_6 +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0280 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2400 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x2000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0064 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0014 //TX_FDEQ_SUBNUM +567 0x6048 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4844 //TX_FDEQ_GAIN_6 +574 0x4041 //TX_FDEQ_GAIN_7 +575 0x3B34 //TX_FDEQ_GAIN_8 +576 0x343A //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0401 //TX_FDEQ_BIN_0 +592 0x0103 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0010 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0802 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0010 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0802 //TX_PREEQ_BIN_MIC1_7 +698 0x0000 //TX_PREEQ_BIN_MIC1_8 +699 0x0000 //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0010 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0802 //TX_PREEQ_BIN_MIC2_7 +747 0x0000 //TX_PREEQ_BIN_MIC2_8 +748 0x0000 //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x000B //TX_GAIN_LIMIT_0 +774 0x000B //TX_GAIN_LIMIT_1 +775 0x000B //TX_GAIN_LIMIT_2 +776 0x000B //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0001 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x04BB //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA02C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0200 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02A9 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4343 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4444 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02A9 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4343 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4444 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02A9 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4343 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4444 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02A9 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4343 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4444 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02A9 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4343 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4444 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02A9 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4343 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4444 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02A9 //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4844 //RX_FDEQ_GAIN_6 +46 0x4343 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4444 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0xA02C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02A9 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4343 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4444 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02A9 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4343 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4444 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02A9 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4343 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4444 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02A9 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4343 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4444 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02A9 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4343 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4444 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02A9 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4343 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4444 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02A9 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4844 //RX_FDEQ_GAIN_6 +203 0x4343 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4444 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-WB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0008 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B68 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7D83 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0019 //TX_EPD_OFFSET_00 +233 0x0019 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xFA00 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000F //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0102 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x0000 //TX_NS_FP_K_METAL +411 0x7FFF //TX_NOISEDET_BOOST_TH +412 0x0000 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x6056 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4440 //TX_FDEQ_GAIN_8 +576 0x3C3C //TX_FDEQ_GAIN_9 +577 0x3A38 //TX_FDEQ_GAIN_10 +578 0x3737 //TX_FDEQ_GAIN_11 +579 0x3030 //TX_FDEQ_GAIN_12 +580 0x3333 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0302 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D07 //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1119 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0608 //TX_PREEQ_BIN_MIC0_0 +642 0x0808 //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x0808 //TX_PREEQ_BIN_MIC0_3 +645 0x0808 //TX_PREEQ_BIN_MIC0_4 +646 0x0808 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0808 //TX_PREEQ_BIN_MIC0_7 +649 0x0808 //TX_PREEQ_BIN_MIC0_8 +650 0x0808 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0808 //TX_PREEQ_BIN_MIC0_11 +653 0x0808 //TX_PREEQ_BIN_MIC0_12 +654 0x0808 //TX_PREEQ_BIN_MIC0_13 +655 0x0808 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0608 //TX_PREEQ_BIN_MIC1_0 +691 0x0808 //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x0808 //TX_PREEQ_BIN_MIC1_3 +694 0x0808 //TX_PREEQ_BIN_MIC1_4 +695 0x0808 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0808 //TX_PREEQ_BIN_MIC1_7 +698 0x0808 //TX_PREEQ_BIN_MIC1_8 +699 0x0808 //TX_PREEQ_BIN_MIC1_9 +700 0x0808 //TX_PREEQ_BIN_MIC1_10 +701 0x0808 //TX_PREEQ_BIN_MIC1_11 +702 0x0808 //TX_PREEQ_BIN_MIC1_12 +703 0x0808 //TX_PREEQ_BIN_MIC1_13 +704 0x0808 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0000 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0001 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0443 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA02C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x3800 //RX_THR_PITCH_DET_0 +14 0x3000 //RX_THR_PITCH_DET_1 +15 0x2800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0196 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x3000 //RX_TDDRC_ALPHA_UP_1 +7 0x3000 //RX_TDDRC_ALPHA_UP_2 +8 0x3000 //RX_TDDRC_ALPHA_UP_3 +9 0x3000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x2000 //RX_TDDRC_THRD_2 +115 0x3000 //RX_TDDRC_THRD_3 +116 0x0800 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x3000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0xA02C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B28 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xFA00 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0383 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0503 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0x8000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0xA024 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0xA024 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-FB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0009 //TX_OPERATION_MODE_1 +2 0x0020 //TX_PATCH_REG +3 0x6B2A //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B4C //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0000 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x6800 //TX_THR_PITCH_DET_0 +131 0x6000 //TX_THR_PITCH_DET_1 +132 0x5800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0200 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x61A8 //TX_EAD_THR +151 0x0400 //TX_THR_RE_EST +152 0x3000 //TX_MIN_EQ_RE_EST_0 +153 0x3000 //TX_MIN_EQ_RE_EST_1 +154 0x4000 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x6000 //TX_MIN_EQ_RE_EST_6 +159 0x6000 //TX_MIN_EQ_RE_EST_7 +160 0x6000 //TX_MIN_EQ_RE_EST_8 +161 0x6000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x4000 //TX_MIN_EQ_RE_EST_11 +164 0x4000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x3000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x0800 //TX_DTD_THR1_0 +198 0x0800 //TX_DTD_THR1_1 +199 0x0800 //TX_DTD_THR1_2 +200 0x0800 //TX_DTD_THR1_3 +201 0x0800 //TX_DTD_THR1_4 +202 0x0800 //TX_DTD_THR1_5 +203 0x0800 //TX_DTD_THR1_6 +204 0x0800 //TX_DTD_THR2_0 +205 0x0800 //TX_DTD_THR2_1 +206 0x0800 //TX_DTD_THR2_2 +207 0x0800 //TX_DTD_THR2_3 +208 0x0800 //TX_DTD_THR2_4 +209 0x0100 //TX_DTD_THR2_5 +210 0x0100 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x03E8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00C0 //TX_EPD_OFFSET_00 +233 0x00C0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF700 //TX_THR_SN_EST_0 +243 0xFB00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF700 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF600 //TX_THR_SN_EST_5 +248 0xF600 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0200 //TX_DELTA_THR_SN_EST_0 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0012 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 +286 0x0010 //TX_NS_LVL_CTRL_5 +287 0x0019 //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x0011 //TX_MIN_GAIN_S_6 +296 0x000C //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7000 //TX_SNRI_SUP_0 +301 0x7000 //TX_SNRI_SUP_1 +302 0x7000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0016 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x6000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x6000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x6000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x6000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x2000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7CCD //TX_LAMBDA_PFILT +339 0x7CCD //TX_LAMBDA_PFILT_S_0 +340 0x7CCD //TX_LAMBDA_PFILT_S_1 +341 0x7CCD //TX_LAMBDA_PFILT_S_2 +342 0x7CCD //TX_LAMBDA_PFILT_S_3 +343 0x7CCD //TX_LAMBDA_PFILT_S_4 +344 0x7CCD //TX_LAMBDA_PFILT_S_5 +345 0x7CCD //TX_LAMBDA_PFILT_S_6 +346 0x7CCD //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0500 //TX_A_PEPPER +349 0x1600 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x04E8 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x02A6 //TX_NOISE_TH_1 +371 0x04B0 //TX_NOISE_TH_2 +372 0x3194 //TX_NOISE_TH_3 +373 0x0960 //TX_NOISE_TH_4 +374 0x5555 //TX_NOISE_TH_5 +375 0x3FF4 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x02BC //TX_NOISE_TH_6 +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0001 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x07F2 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x2024 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7B02 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0500 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF600 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1200 //RX_TDDRC_THRD_2 +115 0x1900 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0240 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0304 //RX_FDEQ_BIN_2 +66 0x0405 //RX_FDEQ_BIN_3 +67 0x0607 //RX_FDEQ_BIN_4 +68 0x0809 //RX_FDEQ_BIN_5 +69 0x0A0B //RX_FDEQ_BIN_6 +70 0x0C0D //RX_FDEQ_BIN_7 +71 0x0E0F //RX_FDEQ_BIN_8 +72 0x1011 //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1618 //RX_FDEQ_BIN_11 +75 0x1C1C //RX_FDEQ_BIN_12 +76 0x2020 //RX_FDEQ_BIN_13 +77 0x2020 //RX_FDEQ_BIN_14 +78 0x2011 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2024 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HEADSET-RESERVE1-RESERVE2-SWB +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0009 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2B28 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0001 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009B //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0B80 //TX_PGA_0 +28 0x0800 //TX_PGA_1 +29 0x0800 //TX_PGA_2 +30 0x0000 //TX_PRE_GAIN_0 +31 0x0000 //TX_PRE_GAIN_1 +32 0x0000 //TX_PRE_GAIN_2 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0001 //TX_MIC_DATA_SRC1 +43 0x0002 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3E00 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0800 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7EFF //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_LT_ENB_FLAG +139 0x2A94 //TX_LT_DOA_L_THRD +140 0x55F0 //TX_LT_DOA_H_THRD +141 0x0000 //TX_NEPLH_LOWFREQ_THR +142 0x0000 //TX_NEPLH_HIGHFREQ_THR +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x001E //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7000 //TX_EAD_THR +151 0x0800 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x0800 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x0800 //TX_MIN_EQ_RE_EST_4 +157 0x0800 //TX_MIN_EQ_RE_EST_5 +158 0x0800 //TX_MIN_EQ_RE_EST_6 +159 0x0800 //TX_MIN_EQ_RE_EST_7 +160 0x0800 //TX_MIN_EQ_RE_EST_8 +161 0x0800 //TX_MIN_EQ_RE_EST_9 +162 0x0800 //TX_MIN_EQ_RE_EST_10 +163 0x0800 //TX_MIN_EQ_RE_EST_11 +164 0x0800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x2000 //TX_LAMBDA_CB_NLE +167 0x6000 //TX_C_POST_FLT +168 0x7000 //TX_GAIN_NP +169 0x00C8 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7800 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7FFF //TX_DTD_THR1_2 +200 0x7FFF //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7FFF //TX_DTD_THR1_5 +203 0x7FFF //TX_DTD_THR1_6 +204 0x7FFF //TX_DTD_THR2_0 +205 0x7FFF //TX_DTD_THR2_1 +206 0x7FFF //TX_DTD_THR2_2 +207 0x7FFF //TX_DTD_THR2_3 +208 0x7FFF //TX_DTD_THR2_4 +209 0x7FFF //TX_DTD_THR2_5 +210 0x7FFF //TX_DTD_THR2_6 +211 0x1000 //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0BB8 //TX_DT_CUT_K +214 0x0CCD //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x0800 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x00F0 //TX_EPD_OFFSET_00 +233 0x00F0 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x7FFF //TX_DTD_THR1_7 +238 0x7FFF //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xFA00 //TX_THR_SN_EST_0 +243 0xF400 //TX_THR_SN_EST_1 +244 0xF600 //TX_THR_SN_EST_2 +245 0xF400 //TX_THR_SN_EST_3 +246 0xF400 //TX_THR_SN_EST_4 +247 0xF400 //TX_THR_SN_EST_5 +248 0xF400 //TX_THR_SN_EST_6 +249 0xF600 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0000 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x6000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x6000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x000B //TX_NS_LVL_CTRL_0 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 +284 0x000F //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 +286 0x000F //TX_NS_LVL_CTRL_5 +287 0x000F //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000C //TX_MIN_GAIN_S_0 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x000C //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x000C //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x000E //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x5000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x5000 //TX_A_POST_FILT_S_3 +318 0x5000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x5000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x1000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x1000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7900 //TX_LAMBDA_PFILT +339 0x7B00 //TX_LAMBDA_PFILT_S_0 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7B00 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 +343 0x7B00 //TX_LAMBDA_PFILT_S_4 +344 0x7B00 //TX_LAMBDA_PFILT_S_5 +345 0x7B00 //TX_LAMBDA_PFILT_S_6 +346 0x7B00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0800 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0383 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x00C8 //TX_NOISE_TH_2 +372 0x3A98 //TX_NOISE_TH_3 +373 0x0FA0 //TX_NOISE_TH_4 +374 0x157C //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x7FFF //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x044C //TX_NOISE_TH_6 +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_LOGSNR_THR +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH +524 0x0000 //TX_KIDDET_NTH +525 0x0000 //TX_B_POST_FLT_KID +526 0x122E //TX_T0_NE_TH +527 0x1100 //TX_T0_NE_3_TH +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_REFGAIN +546 0x59D8 //TX_WNS_SAT_TH +547 0x0000 //TX_ABSM_WNS_TH +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4868 //TX_PREEQ_GAIN_MIC0_8 +626 0x6860 //TX_PREEQ_GAIN_MIC0_9 +627 0x6048 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0E10 //TX_PREEQ_BIN_MIC0_0 +642 0x1010 //TX_PREEQ_BIN_MIC0_1 +643 0x1010 //TX_PREEQ_BIN_MIC0_2 +644 0x1010 //TX_PREEQ_BIN_MIC0_3 +645 0x1010 //TX_PREEQ_BIN_MIC0_4 +646 0x1010 //TX_PREEQ_BIN_MIC0_5 +647 0x1010 //TX_PREEQ_BIN_MIC0_6 +648 0x1010 //TX_PREEQ_BIN_MIC0_7 +649 0x1010 //TX_PREEQ_BIN_MIC0_8 +650 0x1010 //TX_PREEQ_BIN_MIC0_9 +651 0x1010 //TX_PREEQ_BIN_MIC0_10 +652 0x1010 //TX_PREEQ_BIN_MIC0_11 +653 0x1010 //TX_PREEQ_BIN_MIC0_12 +654 0x1010 //TX_PREEQ_BIN_MIC0_13 +655 0x1010 //TX_PREEQ_BIN_MIC0_14 +656 0x0200 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0E10 //TX_PREEQ_BIN_MIC1_0 +691 0x1010 //TX_PREEQ_BIN_MIC1_1 +692 0x1010 //TX_PREEQ_BIN_MIC1_2 +693 0x1010 //TX_PREEQ_BIN_MIC1_3 +694 0x1010 //TX_PREEQ_BIN_MIC1_4 +695 0x1010 //TX_PREEQ_BIN_MIC1_5 +696 0x1010 //TX_PREEQ_BIN_MIC1_6 +697 0x1010 //TX_PREEQ_BIN_MIC1_7 +698 0x1010 //TX_PREEQ_BIN_MIC1_8 +699 0x1010 //TX_PREEQ_BIN_MIC1_9 +700 0x1010 //TX_PREEQ_BIN_MIC1_10 +701 0x1010 //TX_PREEQ_BIN_MIC1_11 +702 0x1010 //TX_PREEQ_BIN_MIC1_12 +703 0x1010 //TX_PREEQ_BIN_MIC1_13 +704 0x1010 //TX_PREEQ_BIN_MIC1_14 +705 0x0200 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x000C //TX_GAIN_LIMIT_0 +774 0x000C //TX_GAIN_LIMIT_1 +775 0x000C //TX_GAIN_LIMIT_2 +776 0x000C //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x3000 //TX_TDDRC_ALPHA_UP_01 +784 0x3000 //TX_TDDRC_ALPHA_UP_02 +785 0x3000 //TX_TDDRC_ALPHA_UP_03 +786 0x3000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0000 //TX_DEADMIC_SILENCE_TH +817 0x0000 //TX_MIC_DEGRADE_TH +818 0x0000 //TX_DEADMIC_CNT +819 0x0000 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_NOISE_FLOOR_TH +824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1 +825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2 +826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3 +827 0x0000 //TX_NOISE_IN_N +828 0x0000 //TX_NOISE_OUT_N +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0000 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0000 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x2000 //TX_TDDRC_THRD_2 +857 0x2000 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x3000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0503 //TX_TDDRC_DRC_GAIN +867 0x78D6 //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0x8000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_DIST2REF_1 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_POST_MASK_SUP +934 0xFC00 //TX_MICMUTE_PRE_MASK_SUP +935 0x001C //TX_MICMUTE_SDPCRN_GAIN +936 0x6000 //TX_MICMUTE_NSSAMASK_MORENS +937 0x7000 //TX_MICMUTE_CGMMMASK_MORENS +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_MIC_VOLUME_MIC1MUTE +944 0x0000 //TX_TFMASKM4_2_DT_THR +945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR +946 0x0000 //TX_MUTE_REF_POW_TH +947 0x0000 //TX_MIC0_MUTE_INITECHO_CUT_LEN +948 0x0000 //TX_MIC1_MUTE_INITECHO_CUT_LEN +949 0x0000 //TX_PRE_MASK_SUP +950 0x0000 //TX_SDPCRN_GAIN +951 0x0000 //TX_EASSA_CUT_GAINTH +952 0x0000 //TX_DT_HARME_ENDF +953 0x0000 //TX_NSSAMASK_MORENS +954 0x0000 //TX_CGMMMASK_MORENS +955 0x0000 //TX_DPCRN_MASK_MORENS_ECHO +956 0x0000 //TX_PRE_EASSAMASK_SUP +957 0x0000 //TX_NSSAMASK_MORENS_TYPE1 +958 0x0000 //TX_NSSAMASK_MORENS_TYPE2 +959 0x0000 //TX_CGMMMASK_MORENS_TYPE1 +960 0x0000 //TX_CGMMMASK_MORENS_TYPE2 +961 0x0000 //TX_SSA30_RESRV_0 +962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0 +963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1 +964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2 +965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3 +966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4 +967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5 +968 0x0000 //TX_EASSA_AEC_NSSA_GAIN +969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH +970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0 +971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1 +972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2 +973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3 +974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4 +975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5 +976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH +977 0x0032 //TX_EASSA_NONLECHO_TH +978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH +979 0x0000 //TX_EASSA_NNG +980 0x0800 //TX_EASSA_NONLHFG +981 0x1000 //TX_EASSA_DT2000HZ_REFG +982 0x0C00 //TX_EASSA_DT400HZ_MAING +983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA +984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0 +985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1 +986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0 +987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1 +#RX +0 0x8024 //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x0000 //RX_B_PE +13 0x1800 //RX_THR_PITCH_DET_0 +14 0x1000 //RX_THR_PITCH_DET_1 +15 0x0800 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0x9000 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_MUTE_PERIOD +26 0x0190 //RX_FADE_IN_PERIOD +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0036 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0099 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x5000 //RX_TDDRC_ALPHA_UP_1 +7 0x5000 //RX_TDDRC_ALPHA_UP_2 +8 0x5000 //RX_TDDRC_ALPHA_UP_3 +9 0x2000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x65AD //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x7EB8 //RX_TDDRC_SLANT_1 +118 0x5000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01C8 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x8024 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0006 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_MUTE_PERIOD +183 0x0190 //RX_FADE_IN_PERIOD +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +