Merge "thermal: set dfs clock divider to 8" into udc-dev am: 359287372a

Original change: https://googleplex-android-review.googlesource.com/c/device/google/zuma/+/21551760

Change-Id: Ib4075d60ca4a6c185116c7ce7f0ea53a2c8360eb
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
This commit is contained in:
Sayanna Chandula 2023-02-28 20:56:56 +00:00 committed by Automerger Merge Worker
commit 2c76893efc

View file

@ -899,13 +899,15 @@ on post-fs-data
on property:vendor.thermal.link_ready=1 on property:vendor.thermal.link_ready=1
# BCL # BCL
write /sys/devices/virtual/pmic/mitigation/clock_ratio/tpu_light_clk_ratio 0xfff041c1 #DFS write /sys/devices/platform/cpupm/cpupm/cpd_cl1 0 #Disable power down
write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu1_heavy_clk_ratio 0xfff041c1 #DFS write /sys/devices/platform/cpupm/cpupm/cpd_cl2 0 #Disable power down
write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu2_heavy_clk_ratio 0xfff041c1 #DFS write /sys/devices/virtual/pmic/mitigation/clock_ratio/tpu_light_clk_ratio 0xfff041c1 #OCP
write /sys/devices/virtual/pmic/mitigation/clock_ratio/gpu_light_clk_ratio 0xfff041c1 #DFS write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu1_heavy_clk_ratio 0xfff041c0 #DFS
write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu2_heavy_clk_ratio 0xfff041c0 #DFS
write /sys/devices/virtual/pmic/mitigation/clock_ratio/gpu_light_clk_ratio 0xfff041c1 #OCP
write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu2_light_clk_ratio 0xfff041c3 #OCP write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu2_light_clk_ratio 0xfff041c3 #OCP
write /sys/devices/virtual/pmic/mitigation/clock_ratio/gpu_heavy_clk_ratio 0xfff04385 #OCP write /sys/devices/virtual/pmic/mitigation/clock_ratio/gpu_heavy_clk_ratio 0xfff04380 #DFS
write /sys/devices/virtual/pmic/mitigation/clock_ratio/tpu_heavy_clk_ratio 0xfff041c3 #OCP write /sys/devices/virtual/pmic/mitigation/clock_ratio/tpu_heavy_clk_ratio 0xfff041c0 #DFS
write /sys/devices/virtual/pmic/mitigation/triggered_lvl/smpl_lvl 3100 write /sys/devices/virtual/pmic/mitigation/triggered_lvl/smpl_lvl 3100
write /sys/devices/virtual/pmic/mitigation/triggered_lvl/soft_ocp_cpu2_lvl 12000 write /sys/devices/virtual/pmic/mitigation/triggered_lvl/soft_ocp_cpu2_lvl 12000
write /sys/devices/virtual/pmic/mitigation/triggered_lvl/soft_ocp_gpu_lvl 9000 write /sys/devices/virtual/pmic/mitigation/triggered_lvl/soft_ocp_gpu_lvl 9000
@ -913,6 +915,8 @@ on property:vendor.thermal.link_ready=1
write /sys/devices/virtual/pmic/mitigation/clock_div/tpu_clk_div 0x1 write /sys/devices/virtual/pmic/mitigation/clock_div/tpu_clk_div 0x1
write /sys/devices/virtual/pmic/mitigation/clock_div/gpu_clk_div 0x1 write /sys/devices/virtual/pmic/mitigation/clock_div/gpu_clk_div 0x1
write /sys/devices/virtual/pmic/mitigation/clock_div/cpu2_clk_div 0x1 write /sys/devices/virtual/pmic/mitigation/clock_div/cpu2_clk_div 0x1
write /sys/devices/platform/cpupm/cpupm/cpd_cl1 1 #Enable power down
write /sys/devices/platform/cpupm/cpupm/cpd_cl2 1 #Enable power down
chown system system /dev/thermal/tz-by-name/soc/mode chown system system /dev/thermal/tz-by-name/soc/mode
chown system system /dev/thermal/tz-by-name/vdroop2/trip_point_0_temp chown system system /dev/thermal/tz-by-name/vdroop2/trip_point_0_temp
chown system system /dev/thermal/tz-by-name/vdroop2/trip_point_0_hyst chown system system /dev/thermal/tz-by-name/vdroop2/trip_point_0_hyst