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Zuma:conf Add memlat CPU idle awareness settings am: c7cd3e4205

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Original change: https://googleplex-android-review.googlesource.com/c/device/google/zuma/+/23214516

Change-Id: I0cb277b1e18cb8ff71b5cd18663537b84908fab5
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
This commit is contained in:
Sophia Wang 2023-05-12 18:41:58 +00:00 • committed by Automerger Merge Worker
commit e400d3f8a7
1 changed files with 22 additions and 0 deletions
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22
conf/init.zuma.rc
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@ -61,6 +61,16 @@ on init
chown system system /sys/devices/system/cpu/cpufreq/policy8/sched_pixel/limit_frequency
chown system system /sys/devices/system/cpu/cpufreq/policy8/sched_pixel/pmu_limit_enable
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu0_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu1_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu2_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu3_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu4_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu5_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu6_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu8_memlat@17000010/memlat_cpuidle_state_aware
chmod 0220 /proc/vendor_sched/set_task_group_bg
chmod 0220 /proc/vendor_sched/set_task_group_cam
chmod 0220 /proc/vendor_sched/set_task_group_fg
@ -169,6 +179,18 @@ on init
write /sys/devices/system/cpu/cpu8/cpufreq/sched_pixel/up_rate_limit_us 500
write /sys/devices/system/cpu/cpu8/cpufreq/sched_pixel/down_rate_limit_us 20000
# memlat cpuidle awareness setting
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu0_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu1_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu2_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu3_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu4_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu5_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu6_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu8_memlat@17000010/memlat_cpuidle_state_aware 2
# RT uclamp setting
write /proc/sys/kernel/sched_util_clamp_min_rt_default 0