init: zuma: move sched rate limit to late init

Since pixel performance has a shared configuration,
we need to move override values into late init.

Bug: 381100494
Test: Boot
Flag: EXEMPT bug fix
Change-Id: I359c33622f18c9345ee3f250ca5d5c61bc1440cc
This commit is contained in:
Will Song 2024-11-27 02:25:32 -08:00
parent ba46b074a1
commit 7f6e9bb150

View file

@ -34,14 +34,11 @@ on init
# governor setting
write /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor sched_pixel
write /sys/devices/system/cpu/cpu0/cpufreq/sched_pixel/up_rate_limit_us 500
write /sys/devices/system/cpu/cpu0/cpufreq/sched_pixel/down_rate_limit_us 5000
write /sys/devices/system/cpu/cpu0/cpufreq/sched_pixel/down_rate_limit_scale_pow 2
write /sys/devices/system/cpu/cpu4/cpufreq/scaling_governor sched_pixel
write /sys/devices/system/cpu/cpu4/cpufreq/sched_pixel/up_rate_limit_us 500
write /sys/devices/system/cpu/cpu4/cpufreq/sched_pixel/down_rate_limit_us 20000
write /sys/devices/system/cpu/cpu8/cpufreq/scaling_governor sched_pixel
write /sys/devices/system/cpu/cpu8/cpufreq/sched_pixel/up_rate_limit_us 500
write /sys/devices/system/cpu/cpu8/cpufreq/sched_pixel/down_rate_limit_us 20000
# memlat cpuidle awareness setting
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu0_memlat@17000010/memlat_cpuidle_state_aware 2
@ -107,6 +104,11 @@ on init
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/mem_latency/stall_floor 2400
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu8_memlat@17000010/mem_latency/stall_floor 500
on late-init
write /sys/devices/system/cpu/cpu0/cpufreq/sched_pixel/down_rate_limit_us 5000
write /sys/devices/system/cpu/cpu4/cpufreq/sched_pixel/down_rate_limit_us 20000
write /sys/devices/system/cpu/cpu8/cpufreq/sched_pixel/down_rate_limit_us 20000
on zygote-start
# For PixelLogger configuration file.
chmod 0771 /data/vendor/wifi