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disp: msm: sde: fix UBWC decoder version support for Kalama

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Add support for detecting UBWC decoder version and program
UBWC configuration to hardware.

Change-Id: Ibe753d35ca46b069de8392c65a3b06131b7e238a
Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
This commit is contained in:
Amine Najahi
2022-01-14 10:03:01 -05:00
committed by Gerrit - the friendly Code Review server
parent 3c4210e869
commit 1aacef1e1d
2 changed files with 16 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
msm/sde/sde_hw_catalog.h
View File

@@ -169,6 +169,7 @@ enum {
SDE_HW_UBWC_VER_20 = SDE_HW_UBWC_VER(0x200),
SDE_HW_UBWC_VER_30 = SDE_HW_UBWC_VER(0x300),
SDE_HW_UBWC_VER_40 = SDE_HW_UBWC_VER(0x400),
SDE_HW_UBWC_VER_43 = SDE_HW_UBWC_VER(0x431),
};
#define IS_UBWC_10_SUPPORTED(rev) \
IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_UBWC_VER_10)
@@ -178,6 +179,8 @@ enum {
IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_UBWC_VER_30)
#define IS_UBWC_40_SUPPORTED(rev) \
IS_SDE_MAJOR_SAME((rev), SDE_HW_UBWC_VER_40)
#define IS_UBWC_43_SUPPORTED(rev) \
IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_UBWC_VER_43)
/**
* Supported system cache settings

23
msm/sde/sde_hw_top.c
View File

@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
*/
@@ -312,7 +313,8 @@ static void sde_hw_setup_vsync_source_v1(struct sde_hw_mdp *mdp,
void sde_hw_reset_ubwc(struct sde_hw_mdp *mdp, struct sde_mdss_cfg *m)
{
struct sde_hw_blk_reg_map c;
u32 ubwc_rev;
u32 ubwc_dec_version;
u32 ubwc_enc_version;
if (!mdp || !m)
return;
@@ -320,17 +322,18 @@ void sde_hw_reset_ubwc(struct sde_hw_mdp *mdp, struct sde_mdss_cfg *m)
/* force blk offset to zero to access beginning of register region */
c = mdp->hw;
c.blk_off = 0x0;
ubwc_rev = SDE_REG_READ(&c, UBWC_DEC_HW_VERSION);
ubwc_dec_version = SDE_REG_READ(&c, UBWC_DEC_HW_VERSION);
ubwc_enc_version = m->ubwc_rev;
if (IS_UBWC_40_SUPPORTED(ubwc_rev)) {
u32 ver = 2;
if (IS_UBWC_40_SUPPORTED(ubwc_dec_version) || IS_UBWC_43_SUPPORTED(ubwc_dec_version)) {
u32 ver = IS_UBWC_43_SUPPORTED(ubwc_dec_version) ? 3 : 2;
u32 mode = 1;
u32 reg = (m->mdp[0].ubwc_swizzle & 0x7) |
((m->mdp[0].ubwc_static & 0x1) << 3) |
((m->mdp[0].highest_bank_bit & 0x7) << 4) |
((m->macrotile_mode & 0x1) << 12);
if (IS_UBWC_30_SUPPORTED(m->ubwc_rev)) {
if (IS_UBWC_30_SUPPORTED(ubwc_enc_version)) {
ver = 1;
mode = 0;
}
@@ -338,22 +341,22 @@ void sde_hw_reset_ubwc(struct sde_hw_mdp *mdp, struct sde_mdss_cfg *m)
SDE_REG_WRITE(&c, UBWC_STATIC, reg);
SDE_REG_WRITE(&c, UBWC_CTRL_2, ver);
SDE_REG_WRITE(&c, UBWC_PREDICTION_MODE, mode);
} else if (IS_UBWC_20_SUPPORTED(ubwc_rev)) {
} else if (IS_UBWC_20_SUPPORTED(ubwc_dec_version)) {
SDE_REG_WRITE(&c, UBWC_STATIC, m->mdp[0].ubwc_static);
} else if (IS_UBWC_30_SUPPORTED(ubwc_rev)) {
} else if (IS_UBWC_30_SUPPORTED(ubwc_dec_version)) {
u32 reg = m->mdp[0].ubwc_static |
(m->mdp[0].ubwc_swizzle & 0x1) |
((m->mdp[0].highest_bank_bit & 0x3) << 4) |
((m->macrotile_mode & 0x1) << 12);
if (IS_UBWC_30_SUPPORTED(m->ubwc_rev))
if (IS_UBWC_30_SUPPORTED(ubwc_enc_version))
reg |= BIT(10);
if (IS_UBWC_10_SUPPORTED(m->ubwc_rev))
if (IS_UBWC_10_SUPPORTED(ubwc_enc_version))
reg |= BIT(8);
SDE_REG_WRITE(&c, UBWC_STATIC, reg);
} else {
SDE_ERROR("Unsupported UBWC version 0x%08x\n", ubwc_rev);
SDE_ERROR("unsupported ubwc decoder version 0x%08x\n", ubwc_dec_version);
}
}