Merge "disp: msm: sde: update dither, unsharp along with VLUT"

This commit is contained in:
qctecmdr
2023-12-14 02:24:20 -08:00
committed by Gerrit - the friendly Code Review server
2 changed files with 7 additions and 11 deletions

View File

@@ -2003,6 +2003,7 @@ int sde_cp_crtc_check_properties(struct drm_crtc *crtc,
{ {
struct sde_crtc *sde_crtc = NULL; struct sde_crtc *sde_crtc = NULL;
struct sde_crtc_state *sde_crtc_state = NULL; struct sde_crtc_state *sde_crtc_state = NULL;
struct drm_display_mode *old_mode, *new_mode;
int i, ret = 0; int i, ret = 0;
if (!crtc || !crtc->dev || !state) { if (!crtc || !crtc->dev || !state) {
@@ -2023,8 +2024,11 @@ int sde_cp_crtc_check_properties(struct drm_crtc *crtc,
return -EINVAL; return -EINVAL;
} }
/* force revalidation of some properties when there is a mode switch */ /* force revalidation of some properties when there is a resolution switch */
if (state->mode_changed) old_mode = &crtc->state->adjusted_mode;
new_mode = &state->adjusted_mode;
if ((old_mode->hdisplay != new_mode->hdisplay) ||
(old_mode->vdisplay != new_mode->vdisplay))
sde_cp_crtc_res_change(crtc); sde_cp_crtc_res_change(crtc);
mutex_lock(&sde_crtc->crtc_cp_lock); mutex_lock(&sde_crtc->crtc_cp_lock);

View File

@@ -32,7 +32,7 @@
* When disabling INIT property, we don't want to reset those bits since * When disabling INIT property, we don't want to reset those bits since
* they are needed for both LTM histogram and VLUT. * they are needed for both LTM histogram and VLUT.
*/ */
#define REG_DMA_LTM_INIT_ENABLE_OP_MASK 0xFFFF8CAB #define REG_DMA_LTM_INIT_ENABLE_OP_MASK 0x1100153
#define REG_DMA_LTM_INIT_DISABLE_OP_MASK 0xFFFF8CAF #define REG_DMA_LTM_INIT_DISABLE_OP_MASK 0xFFFF8CAF
#define REG_DMA_LTM_ROI_OP_MASK 0xFEFFFFFF #define REG_DMA_LTM_ROI_OP_MASK 0xFEFFFFFF
/** /**
@@ -3794,22 +3794,16 @@ void reg_dmav1_setup_ltm_initv1(struct sde_hw_dspp *ctx, void *cfg)
} }
if (init_param->init_param_01) { if (init_param->init_param_01) {
if (ltm_vlut_ops_mask[dspp_idx[i]] & ltm_vlut)
opmode |= BIT(6);
ltm_vlut_ops_mask[dspp_idx[i]] |= ltm_dither; ltm_vlut_ops_mask[dspp_idx[i]] |= ltm_dither;
opmode |= ((init_param->init_param_02 & 0x7) << 12); opmode |= ((init_param->init_param_02 & 0x7) << 12);
} else { } else {
opmode &= ~BIT(6);
ltm_vlut_ops_mask[dspp_idx[i]] &= ~ltm_dither; ltm_vlut_ops_mask[dspp_idx[i]] &= ~ltm_dither;
} }
if (init_param->init_param_03) { if (init_param->init_param_03) {
if (ltm_vlut_ops_mask[dspp_idx[i]] & ltm_vlut)
opmode |= BIT(4);
ltm_vlut_ops_mask[dspp_idx[i]] |= ltm_unsharp; ltm_vlut_ops_mask[dspp_idx[i]] |= ltm_unsharp;
opmode |= ((init_param->init_param_04 & 0x3) << 8); opmode |= ((init_param->init_param_04 & 0x3) << 8);
} else { } else {
opmode &= ~BIT(4);
ltm_vlut_ops_mask[dspp_idx[i]] &= ~ltm_unsharp; ltm_vlut_ops_mask[dspp_idx[i]] &= ~ltm_unsharp;
} }
@@ -3988,8 +3982,6 @@ void reg_dmav1_setup_ltm_roiv1(struct sde_hw_dspp *ctx, void *cfg)
return; return;
} }
if (ltm_vlut_ops_mask[dspp_idx[i]] & ltm_vlut)
opmode |= BIT(24);
ltm_vlut_ops_mask[dspp_idx[i]] |= ltm_roi; ltm_vlut_ops_mask[dspp_idx[i]] |= ltm_roi;
REG_DMA_SETUP_OPS(dma_write_cfg, 0x04, &opmode, sizeof(opmode), REG_DMA_SETUP_OPS(dma_write_cfg, 0x04, &opmode, sizeof(opmode),