From 45439a9ef49d849eff13149ce2bf090d112053a3 Mon Sep 17 00:00:00 2001 From: Ritesh Kumar Date: Wed, 9 Nov 2022 12:48:00 +0530 Subject: [PATCH 1/2] disp: msm: dsi: Avoid re-initializing PLL registers during dyn clk switch Currently, we are always initializing PLL registers whenever PLL is configured. Re-initializing PLL registers during dynamic clock switch in case of cphy video mode is moving the PLL to some bad state resulting in display freeze. Avoid this by restricting initialization of PLL registers to only while turning on the PLL. This change is for 4nm PLL. Change-Id: I57c8cfe1927f83f1ac25238c696a606960f3a8c8 Signed-off-by: Ritesh Kumar --- msm/dsi/dsi_pll_4nm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/msm/dsi/dsi_pll_4nm.c b/msm/dsi/dsi_pll_4nm.c index 80a94f2b..22155892 100644 --- a/msm/dsi/dsi_pll_4nm.c +++ b/msm/dsi/dsi_pll_4nm.c @@ -1481,7 +1481,8 @@ int dsi_pll_4nm_configure(void *pll, bool commit) if (rsc->slave) dsi_pll_enable_pll_bias(rsc->slave); - dsi_pll_init_val(rsc); + if (commit) + dsi_pll_init_val(rsc); rc = dsi_pll_4nm_set_byteclk_div(rsc, commit); From 62864e8bac175afc5057b295d3bfb083a5b61de6 Mon Sep 17 00:00:00 2001 From: Ritesh Kumar Date: Tue, 15 Nov 2022 09:15:37 +0530 Subject: [PATCH 2/2] disp: msm: dsi: skip clearing dynamic refresh done status in dsi ctrl ISR After triggering dynamic refresh, if there is any dsi_ctrl_isr, dynamic refresh done status also gets cleared as part of it. Because of this, wait4dynamic_refresh_done timeout error is seen even though dynamic refresh is done successfully. Change-Id: I39b42c60d15d9cb0557669f95ff2ed83989f9cd3 Signed-off-by: Ritesh Kumar --- msm/dsi/dsi_ctrl_hw_cmn.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/msm/dsi/dsi_ctrl_hw_cmn.c b/msm/dsi/dsi_ctrl_hw_cmn.c index a0afc9b7..5fcaed1b 100644 --- a/msm/dsi/dsi_ctrl_hw_cmn.c +++ b/msm/dsi/dsi_ctrl_hw_cmn.c @@ -1170,11 +1170,12 @@ void dsi_ctrl_hw_cmn_clear_interrupt_status(struct dsi_ctrl_hw *ctrl, u32 ints) reg |= BIT(30); /* - * Do not clear error status. - * It will be cleared as part of - * error handler function. + * Do not clear error status. It will be cleared as part of error handler function. + * Do not clear dynamic refresh done status. It will be cleared as part of + * wait4dynamic_refresh_done() function. */ - reg &= ~BIT(24); + reg &= ~(BIT(24) | BIT(28)); + DSI_W32(ctrl, DSI_INT_CTRL, reg); DSI_CTRL_HW_DBG(ctrl, "Clear interrupts, ints = 0x%x, INT_CTRL=0x%x\n",