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Revert "disp: msm: sde: use mode from new state during CP check phase"

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This reverts commit a9294b7329.

Change-Id: I1258955eebc11ae2694ea106e0a90e7221e4d82d
Signed-off-by: Arya Anand <quic_aryaanan@quicinc.com>
This commit is contained in:
Arya Anand
2022-08-18 16:32:37 -07:00
parent 9c68afbcb0
commit 2d176f445c
2 changed files with 8 additions and 23 deletions
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17
msm/sde/sde_color_processing.c
View File

@@ -1617,8 +1617,6 @@ static int _sde_cp_crtc_checkfeature(u32 feature,
hw_cfg.num_of_mixers = sde_crtc->num_mixers;
hw_cfg.last_feature = 0;
hw_cfg.panel_width = sde_crtc_state->base.adjusted_mode.hdisplay;
hw_cfg.panel_height = sde_crtc_state->base.adjusted_mode.vdisplay;
for (i = 0; i < num_mixers; i++) {
hw_dspp = sde_crtc->mixers[i].hw_dspp;
@@ -1627,7 +1625,6 @@ static int _sde_cp_crtc_checkfeature(u32 feature,
hw_cfg.dspp[i] = hw_dspp;
}
SDE_EVT32(feature, hw_cfg.panel_width, hw_cfg.panel_height);
for (i = 0; i < num_mixers && !ret; i++) {
hw_lm = sde_crtc->mixers[i].hw_lm;
hw_dspp = sde_crtc->mixers[i].hw_dspp;
@@ -1642,6 +1639,8 @@ static int _sde_cp_crtc_checkfeature(u32 feature,
hw_cfg.displayh = num_mixers *
sde_crtc_state->lm_roi[i].w;
hw_cfg.displayv = sde_crtc_state->lm_roi[i].h;
hw_cfg.panel_width = sde_crtc->base.state->adjusted_mode.hdisplay;
hw_cfg.panel_height = sde_crtc->base.state->adjusted_mode.vdisplay;
DRM_DEBUG_DRIVER("check cp feature %d on mixer %d\n",
feature, hw_lm->idx - LM_0);
ret = check_feature(hw_dspp, &hw_cfg, sde_crtc);
@@ -1686,7 +1685,7 @@ static void _sde_cp_crtc_commit_feature(struct sde_cp_node *prop_node,
hw_cfg.num_ds_enabled = sde_crtc_state->num_ds_enabled;
SDE_EVT32(prop_node->feature, hw_cfg.panel_width, hw_cfg.panel_height);
SDE_EVT32(hw_cfg.panel_width, hw_cfg.panel_height);
for (i = 0; i < num_mixers; i++) {
hw_dspp = sde_crtc->mixers[i].hw_dspp;
@@ -1889,9 +1888,6 @@ static int _sde_cp_crtc_check_pu_features(struct drm_crtc *crtc)
hw_cfg.num_of_mixers = sde_crtc->num_mixers;
hw_cfg.payload = &sde_crtc_state->user_roi_list;
hw_cfg.len = sizeof(sde_crtc_state->user_roi_list);
hw_cfg.panel_height = sde_crtc_state->base.adjusted_mode.vdisplay;
hw_cfg.panel_width = sde_crtc_state->base.adjusted_mode.hdisplay;
for (i = 0; i < hw_cfg.num_of_mixers; i++)
hw_cfg.dspp[i] = sde_crtc->mixers[i].hw_dspp;
@@ -1903,7 +1899,6 @@ static int _sde_cp_crtc_check_pu_features(struct drm_crtc *crtc)
!(sde_crtc->cp_pu_feature_mask & BIT(i)))
continue;
SDE_EVT32(i, hw_cfg.panel_width, hw_cfg.panel_height);
for (j = 0; j < hw_cfg.num_of_mixers; j++) {
hw_dspp = sde_crtc->mixers[j].hw_dspp;
@@ -1913,7 +1908,8 @@ static int _sde_cp_crtc_check_pu_features(struct drm_crtc *crtc)
hw_cfg.displayh = hw_cfg.num_of_mixers *
sde_crtc_state->lm_roi[j].w;
hw_cfg.displayv = sde_crtc_state->lm_roi[j].h;
hw_cfg.panel_height = sde_crtc->base.state->adjusted_mode.vdisplay;
hw_cfg.panel_width = sde_crtc->base.state->adjusted_mode.hdisplay;
ret = check_pu_feature(hw_dspp, &hw_cfg, sde_crtc);
if (ret) {
DRM_ERROR("failed pu feature %d in mixer %d\n",
@@ -2066,7 +2062,6 @@ static int _sde_cp_crtc_update_pu_features(struct drm_crtc *crtc, bool *need_flu
!(sde_crtc->cp_pu_feature_mask & BIT(i)))
continue;
SDE_EVT32(i, hw_cfg.panel_width, hw_cfg.panel_height);
for (j = 0; j < hw_cfg.num_of_mixers; j++) {
hw_lm = sde_crtc->mixers[j].hw_lm;
hw_dspp = sde_crtc->mixers[j].hw_dspp;
@@ -2076,6 +2071,8 @@ static int _sde_cp_crtc_update_pu_features(struct drm_crtc *crtc, bool *need_flu
hw_cfg.displayh = hw_cfg.num_of_mixers *
hw_lm->cfg.out_width;
hw_cfg.displayv = hw_lm->cfg.out_height;
hw_cfg.panel_width = sde_crtc->base.state->adjusted_mode.hdisplay;
hw_cfg.panel_height = sde_crtc->base.state->adjusted_mode.vdisplay;
ret = set_pu_feature(hw_dspp, &hw_cfg, sde_crtc);
/* feature does not need flush when ret > 0 */

14
msm/sde/sde_hw_rc.c
View File

@@ -749,7 +749,6 @@ int sde_hw_rc_check_mask(struct sde_hw_dspp *hw_dspp, void *cfg)
if ((hw_cfg->len == 0 && hw_cfg->payload == NULL)) {
SDE_DEBUG("RC feature disabled, skip mask checks\n");
SDE_EVT32(RC_IDX(hw_dspp));
return 0;
}
@@ -803,7 +802,6 @@ int sde_hw_rc_check_pu_roi(struct sde_hw_dspp *hw_dspp, void *cfg)
SDE_DEBUG("full frame update\n");
memset(&empty_roi_list, 0, sizeof(struct msm_roi_list));
roi_list = &empty_roi_list;
SDE_EVT32(RC_IDX(hw_dspp));
}
rc_mask_cfg = RC_STATE(hw_dspp).last_rc_mask_cfg;
@@ -812,7 +810,6 @@ int sde_hw_rc_check_pu_roi(struct sde_hw_dspp *hw_dspp, void *cfg)
/* early return when there is no mask in memory */
if (!mask_programmed || !rc_mask_cfg) {
SDE_DEBUG("no previous rc mask programmed\n");
SDE_EVT32(RC_IDX(hw_dspp));
return SDE_HW_RC_PU_SKIP_OP;
}
@@ -872,12 +869,10 @@ int sde_hw_rc_setup_pu_roi(struct sde_hw_dspp *hw_dspp, void *cfg)
rc_mask_cfg = RC_STATE(hw_dspp).last_rc_mask_cfg;
mask_programmed = RC_STATE(hw_dspp).mask_programmed;
SDE_EVT32(RC_IDX(hw_dspp), roi_list, rc_mask_cfg, mask_programmed);
/* early return when there is no mask in memory */
if (!mask_programmed || !rc_mask_cfg) {
SDE_DEBUG("no previous rc mask programmed\n");
SDE_EVT32(RC_IDX(hw_dspp));
return SDE_HW_RC_PU_SKIP_OP;
}
@@ -941,9 +936,7 @@ int sde_hw_rc_setup_mask(struct sde_hw_dspp *hw_dspp, void *cfg)
memset(RC_STATE(hw_dspp).last_roi_list, 0,
sizeof(struct msm_roi_list));
RC_STATE(hw_dspp).roi_programmed = false;
SDE_EVT32(RC_IDX(hw_dspp), RC_STATE(hw_dspp).last_rc_mask_cfg,
RC_STATE(hw_dspp).mask_programmed,
RC_STATE(hw_dspp).roi_programmed);
return 0;
}
@@ -964,7 +957,6 @@ int sde_hw_rc_setup_mask(struct sde_hw_dspp *hw_dspp, void *cfg)
SDE_DEBUG("partial frame update\n");
sde_kms_rect_merge_rectangles(last_roi_list, &merged_roi);
}
SDE_EVT32(RC_IDX(hw_dspp), roi_programmed);
rc = _sde_hw_rc_get_ajusted_roi(hw_cfg, &merged_roi, &rc_roi);
if (rc) {
@@ -1011,7 +1003,6 @@ int sde_hw_rc_setup_data_dma(struct sde_hw_dspp *hw_dspp, void *cfg)
if ((hw_cfg->len == 0 && hw_cfg->payload == NULL)) {
SDE_DEBUG("RC feature disabled, skip data programming\n");
SDE_EVT32(RC_IDX(hw_dspp));
return 0;
}
@@ -1025,7 +1016,6 @@ int sde_hw_rc_setup_data_dma(struct sde_hw_dspp *hw_dspp, void *cfg)
if (rc_mask_cfg->flags & SDE_HW_RC_SKIP_DATA_PROG) {
SDE_DEBUG("skip data programming\n");
SDE_EVT32(RC_IDX(hw_dspp));
return 0;
}
@@ -1052,7 +1042,6 @@ int sde_hw_rc_setup_data_ahb(struct sde_hw_dspp *hw_dspp, void *cfg)
if ((hw_cfg->len == 0 && hw_cfg->payload == NULL)) {
SDE_DEBUG("rc feature disabled, skip data programming\n");
SDE_EVT32(RC_IDX(hw_dspp));
return 0;
}
@@ -1066,7 +1055,6 @@ int sde_hw_rc_setup_data_ahb(struct sde_hw_dspp *hw_dspp, void *cfg)
if (rc_mask_cfg->flags & SDE_HW_RC_SKIP_DATA_PROG) {
SDE_DEBUG("skip data programming\n");
SDE_EVT32(RC_IDX(hw_dspp));
return 0;
}