From d0d89184870a018834d7973709507e9961be6f30 Mon Sep 17 00:00:00 2001 From: Jayaprakash Date: Tue, 4 Feb 2020 11:48:13 +0530 Subject: [PATCH 1/3] disp: msm: sde: add rev check for Lagoon target Add required sde revision checks for lagoon target. Also, update rscc branch offset for lagoon. Change-Id: Id445caf6b584a6a35a4d9797e6d85aa9af9ee0bf Signed-off-by: Jayaprakash Signed-off-by: Steve Cohen --- msm/sde/sde_hw_catalog.c | 15 +++++++++++++++ msm/sde/sde_hw_catalog.h | 6 ++++-- msm/sde_rsc_hw_v3.c | 3 ++- 3 files changed, 21 insertions(+), 3 deletions(-) diff --git a/msm/sde/sde_hw_catalog.c b/msm/sde/sde_hw_catalog.c index 8d358775..1335bdfd 100644 --- a/msm/sde/sde_hw_catalog.c +++ b/msm/sde/sde_hw_catalog.c @@ -4702,6 +4702,21 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) sde_cfg->has_hdr = false; sde_cfg->has_sui_blendstage = true; sde_cfg->vbif_disable_inner_outer_shareable = true; + } else if (IS_LAGOON_TARGET(hw_rev)) { + sde_cfg->has_cwb_support = true; + sde_cfg->has_qsync = true; + sde_cfg->perf.min_prefill_lines = 24; + sde_cfg->vbif_qos_nlvl = 8; + sde_cfg->ts_prefill_rev = 2; + sde_cfg->ctl_rev = SDE_CTL_CFG_VERSION_1_0_0; + sde_cfg->delay_prg_fetch_start = true; + sde_cfg->sui_ns_allowed = true; + sde_cfg->sui_misr_supported = true; + sde_cfg->sui_block_xin_mask = 0x261; + sde_cfg->has_sui_blendstage = true; + sde_cfg->has_hdr = true; + sde_cfg->has_vig_p010 = true; + sde_cfg->vbif_disable_inner_outer_shareable = true; } else if (IS_LAHAINA_TARGET(hw_rev)) { sde_cfg->has_demura = true; sde_cfg->demura_supported[SSPP_DMA1][0] = 0; diff --git a/msm/sde/sde_hw_catalog.h b/msm/sde/sde_hw_catalog.h index d674635e..5a6c62dd 100644 --- a/msm/sde/sde_hw_catalog.h +++ b/msm/sde/sde_hw_catalog.h @@ -42,9 +42,10 @@ #define SDE_HW_VER_600 SDE_HW_VER(6, 0, 0) /* kona */ #define SDE_HW_VER_610 SDE_HW_VER(6, 1, 0) /* sm7250 */ #define SDE_HW_VER_630 SDE_HW_VER(6, 3, 0) /* bengal */ -#define SDE_HW_VER_700 SDE_HW_VER(7, 0, 0) /* lahaina */ +#define SDE_HW_VER_640 SDE_HW_VER(6, 4, 0) /* lagoon */ #define SDE_HW_VER_660 SDE_HW_VER(6, 6, 0) /* holi */ #define SDE_HW_VER_670 SDE_HW_VER(6, 7, 0) /* shima */ +#define SDE_HW_VER_700 SDE_HW_VER(7, 0, 0) /* lahaina */ /* Avoid using below IS_XXX macros outside catalog, use feature bit instead */ #define IS_SDE_MAJOR_SAME(rev1, rev2) \ @@ -64,9 +65,10 @@ #define IS_KONA_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_600) #define IS_SAIPAN_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_610) #define IS_BENGAL_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_630) -#define IS_LAHAINA_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_700) +#define IS_LAGOON_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_640) #define IS_HOLI_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_660) #define IS_SHIMA_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_670) +#define IS_LAHAINA_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_700) #define SDE_HW_BLK_NAME_LEN 16 diff --git a/msm/sde_rsc_hw_v3.c b/msm/sde_rsc_hw_v3.c index 0e7dae28..aa218525 100644 --- a/msm/sde_rsc_hw_v3.c +++ b/msm/sde_rsc_hw_v3.c @@ -131,7 +131,8 @@ static int _rsc_hw_seq_memory_init_v3(struct sde_rsc_priv *rsc) 0x00209ce7, rsc->debug_mode); /* branch address */ - if (rsc->hw_drv_ver >= SDE_RSC_HW_MAJOR_MINOR_STEP(2,0,5)) + if (rsc->hw_drv_ver >= SDE_RSC_HW_MAJOR_MINOR_STEP(2, 0, 5) || + rsc->hw_drv_ver == SDE_RSC_HW_MAJOR_MINOR_STEP(1, 9, 0)) br_offset = 0xf0; dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_CFG_BR_ADDR_0_DRV0 + br_offset, From 8a72802e89f03751c8f52601cdd40338359a73ad Mon Sep 17 00:00:00 2001 From: Yashwanth Date: Fri, 6 Mar 2020 14:26:11 +0530 Subject: [PATCH 2/3] disp: msm: sde: add rev check for scuba target Add required sde revision checks for scuba target. Change-Id: Ic3f0f8e2b182d0d68b2f5342043d3e12f0f35557 Signed-off-by: Yashwanth Signed-off-by: Steve Cohen --- msm/sde/sde_hw_catalog.c | 13 +++++++++++++ msm/sde/sde_hw_catalog.h | 2 ++ 2 files changed, 15 insertions(+) diff --git a/msm/sde/sde_hw_catalog.c b/msm/sde/sde_hw_catalog.c index 1335bdfd..539b57ed 100644 --- a/msm/sde/sde_hw_catalog.c +++ b/msm/sde/sde_hw_catalog.c @@ -4717,6 +4717,19 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) sde_cfg->has_hdr = true; sde_cfg->has_vig_p010 = true; sde_cfg->vbif_disable_inner_outer_shareable = true; + } else if (IS_SCUBA_TARGET(hw_rev)) { + sde_cfg->has_cwb_support = false; + sde_cfg->has_qsync = true; + sde_cfg->perf.min_prefill_lines = 24; + sde_cfg->vbif_qos_nlvl = 8; + sde_cfg->ts_prefill_rev = 2; + sde_cfg->ctl_rev = SDE_CTL_CFG_VERSION_1_0_0; + sde_cfg->delay_prg_fetch_start = true; + sde_cfg->sui_ns_allowed = true; + sde_cfg->sui_misr_supported = true; + sde_cfg->sui_block_xin_mask = 0x1; + sde_cfg->has_hdr = false; + sde_cfg->has_sui_blendstage = true; } else if (IS_LAHAINA_TARGET(hw_rev)) { sde_cfg->has_demura = true; sde_cfg->demura_supported[SSPP_DMA1][0] = 0; diff --git a/msm/sde/sde_hw_catalog.h b/msm/sde/sde_hw_catalog.h index 5a6c62dd..7f9679da 100644 --- a/msm/sde/sde_hw_catalog.h +++ b/msm/sde/sde_hw_catalog.h @@ -43,6 +43,7 @@ #define SDE_HW_VER_610 SDE_HW_VER(6, 1, 0) /* sm7250 */ #define SDE_HW_VER_630 SDE_HW_VER(6, 3, 0) /* bengal */ #define SDE_HW_VER_640 SDE_HW_VER(6, 4, 0) /* lagoon */ +#define SDE_HW_VER_650 SDE_HW_VER(6, 5, 0) /* scuba */ #define SDE_HW_VER_660 SDE_HW_VER(6, 6, 0) /* holi */ #define SDE_HW_VER_670 SDE_HW_VER(6, 7, 0) /* shima */ #define SDE_HW_VER_700 SDE_HW_VER(7, 0, 0) /* lahaina */ @@ -66,6 +67,7 @@ #define IS_SAIPAN_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_610) #define IS_BENGAL_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_630) #define IS_LAGOON_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_640) +#define IS_SCUBA_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_650) #define IS_HOLI_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_660) #define IS_SHIMA_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_670) #define IS_LAHAINA_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_700) From 12bfeccd42e5be2035dfe144a4f8eaeac704a0b8 Mon Sep 17 00:00:00 2001 From: Jayaprakash Date: Fri, 26 Jun 2020 17:15:17 +0530 Subject: [PATCH 3/3] disp: msm: sde: update min_prefill lines for lito and lagoon Add changes to update min_prefill_lines to 40 for inline rotation use-cases on lito and lagoon targets. Change-Id: I1d6ba877972e31a8f950d98ebab8944e1b93cef0 Signed-off-by: Jayaprakash Signed-off-by: Steve Cohen --- msm/sde/sde_hw_catalog.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/msm/sde/sde_hw_catalog.c b/msm/sde/sde_hw_catalog.c index 539b57ed..af0dcfdf 100644 --- a/msm/sde/sde_hw_catalog.c +++ b/msm/sde/sde_hw_catalog.c @@ -4658,7 +4658,7 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) sde_cfg->has_cwb_support = true; sde_cfg->has_wb_ubwc = true; sde_cfg->has_qsync = true; - sde_cfg->perf.min_prefill_lines = 24; + sde_cfg->perf.min_prefill_lines = 40; sde_cfg->vbif_qos_nlvl = 8; sde_cfg->ts_prefill_rev = 2; sde_cfg->ctl_rev = SDE_CTL_CFG_VERSION_1_0_0; @@ -4705,7 +4705,7 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) } else if (IS_LAGOON_TARGET(hw_rev)) { sde_cfg->has_cwb_support = true; sde_cfg->has_qsync = true; - sde_cfg->perf.min_prefill_lines = 24; + sde_cfg->perf.min_prefill_lines = 40; sde_cfg->vbif_qos_nlvl = 8; sde_cfg->ts_prefill_rev = 2; sde_cfg->ctl_rev = SDE_CTL_CFG_VERSION_1_0_0;