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drm/amd/display: Revert Reduce delay when sink device not able to ACK 00340h write

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[ Upstream commit 639f6ad6df7f47db48b59956b469a6917a136afb ]

[WHY]
It causes regression AMD source will not write DPCD 340.

Reviewed-by: Wayne Lin <Wayne.Lin@amd.com>
Acked-by: Jasdeep Dhillon <jdhillon@amd.com>
Signed-off-by: Ian Chen <ian.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Ian Chen
2022-11-28 16:17:34 +08:00
committed by Greg Kroah-Hartman
parent 93be5b2dda
commit 54ba1ec7ed
3 changed files with 3 additions and 18 deletions
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6
drivers/gpu/drm/amd/display/dc/core/dc_link.c
View File

@@ -1665,12 +1665,6 @@ struct dc_link *link_create(const struct link_init_data *init_params)
if (false == dc_link_construct(link, init_params))
goto construct_fail;
/*
* Must use preferred_link_setting, not reported_link_cap or verified_link_cap,
* since struct preferred_link_setting won't be reset after S3.
*/
link->preferred_link_setting.dpcd_source_device_specific_field_support = true;
return link;
construct_fail:

14
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
View File

@@ -4841,18 +4841,10 @@ void dpcd_set_source_specific_data(struct dc_link *link)
uint8_t hblank_size = (uint8_t)link->dc->caps.min_horizontal_blanking_period;
if (link->preferred_link_setting.dpcd_source_device_specific_field_support) {
result_write_min_hblank = core_link_write_dpcd(link,
DP_SOURCE_MINIMUM_HBLANK_SUPPORTED, (uint8_t *)(&hblank_size),
sizeof(hblank_size));
if (result_write_min_hblank == DC_ERROR_UNEXPECTED)
link->preferred_link_setting.dpcd_source_device_specific_field_support = false;
} else {
DC_LOG_DC("Sink device does not support 00340h DPCD write. Skipping on purpose.\n");
}
result_write_min_hblank = core_link_write_dpcd(link,
DP_SOURCE_MINIMUM_HBLANK_SUPPORTED, (uint8_t *)(&hblank_size),
sizeof(hblank_size));
}
DC_TRACE_LEVEL_MESSAGE(DAL_TRACE_LEVEL_INFORMATION,
WPP_BIT_FLAG_DC_DETECTION_DP_CAPS,
"result=%u link_index=%u enum dce_version=%d DPCD=0x%04X min_hblank=%u branch_dev_id=0x%x branch_dev_name='%c%c%c%c%c%c'",

1
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
View File

@@ -109,7 +109,6 @@ struct dc_link_settings {
enum dc_link_spread link_spread;
bool use_link_rate_set;
uint8_t link_rate_set;
bool dpcd_source_device_specific_field_support;
};
struct dc_lane_settings {