anierin/msm-5.15
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

clk: qcom: videocc-kalama: Keep video_cc_sleep_clk always ON

Browse Source 
Remove video_cc_sleep_clk modelling and keep it always ON from
clock driver.

Change-Id: I4148e9223ba28a2ad3d2533ead368a76f5095efa
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
This commit is contained in:
Jagadeesh Kona
2023-11-20 15:53:38 +05:30
parent 4611894bd2
commit 5f191aac3d
1 changed files with 2 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

21
drivers/clk/qcom/videocc-kalama.c
View File

@@ -493,32 +493,16 @@ static struct clk_branch video_cc_mvs1c_clk = {
}, },
}; };
static struct clk_branch video_cc_sleep_clk = {
.halt_reg = 0x8140,
.halt_check = BRANCH_HALT,
.clkr = {
.enable_reg = 0x8140,
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "video_cc_sleep_clk",
.parent_hws = (const struct clk_hw*[]){
&video_cc_sleep_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_branch2_ops,
},
},
};
/* /*
* video_cc_ahb_clk * video_cc_ahb_clk
* video_cc_xo_clk * video_cc_xo_clk
* video_cc_sleep_clk
*/ */
static struct critical_clk_offset critical_clk_list[] = { static struct critical_clk_offset critical_clk_list[] = {
{ .offset = 0x80f4, .mask = BIT(0) }, { .offset = 0x80f4, .mask = BIT(0) },
{ .offset = 0x8124, .mask = BIT(0) }, { .offset = 0x8124, .mask = BIT(0) },
{ .offset = 0x8140, .mask = BIT(0) },
}; };
static struct clk_regmap *video_cc_kalama_clocks[] = { static struct clk_regmap *video_cc_kalama_clocks[] = {
@@ -535,7 +519,6 @@ static struct clk_regmap *video_cc_kalama_clocks[] = {
[VIDEO_CC_MVS1C_DIV2_DIV_CLK_SRC] = &video_cc_mvs1c_div2_div_clk_src.clkr, [VIDEO_CC_MVS1C_DIV2_DIV_CLK_SRC] = &video_cc_mvs1c_div2_div_clk_src.clkr,
[VIDEO_CC_PLL0] = &video_cc_pll0.clkr, [VIDEO_CC_PLL0] = &video_cc_pll0.clkr,
[VIDEO_CC_PLL1] = &video_cc_pll1.clkr, [VIDEO_CC_PLL1] = &video_cc_pll1.clkr,
[VIDEO_CC_SLEEP_CLK] = &video_cc_sleep_clk.clkr,
[VIDEO_CC_SLEEP_CLK_SRC] = &video_cc_sleep_clk_src.clkr, [VIDEO_CC_SLEEP_CLK_SRC] = &video_cc_sleep_clk_src.clkr,
[VIDEO_CC_XO_CLK_SRC] = &video_cc_xo_clk_src.clkr, [VIDEO_CC_XO_CLK_SRC] = &video_cc_xo_clk_src.clkr,
}; };