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soc: sifive: l2_cache: fix missing free_irq() in error path in sifive_l2_init()

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commit 756344e7cb1afbb87da8705c20384dddd0dea233 upstream.

Add missing free_irq() before return error from sifive_l2_init().

Fixes: a967a289f1 ("RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
[conor: ccache -> l2_cache]
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Yang Yingliang
2023-04-24 10:19:03 +01:00
committed by Greg Kroah-Hartman
parent 48c5fd3733
commit 71e7ed6e3a
1 changed files with 4 additions and 1 deletions
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5
drivers/soc/sifive/sifive_l2_cache.c
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@@ -221,7 +221,7 @@ static int __init sifive_l2_init(void)
rc = request_irq(g_irq[i], l2_int_handler, 0, "l2_ecc", NULL);
if (rc) {
pr_err("L2CACHE: Could not request IRQ %d\n", g_irq[i]);
goto err_unmap;
goto err_free_irq;
}
}
@@ -235,6 +235,9 @@ static int __init sifive_l2_init(void)
#endif
return 0;
err_free_irq:
while (--i >= 0)
free_irq(g_irq[i], NULL);
err_unmap:
iounmap(l2_base);
return rc;