Commit Graph

78 Commits

Author SHA1 Message Date
qctecmdr
41c3adea18 Merge "i2c: i2c-msm-geni: Correct ipc logging for ret value" 2023-12-22 20:29:25 -08:00
Mehul Raninga
0ae958c774 i2c: i2c-msm-geni: Correct ipc logging for ret value
One of the ipc logging statement was missing argument
of ret. Corrected by adding last argument in ipc log.

Change-Id: Icaf6cba021abb1df8d12ab6b821a9a12c04e4f17
Signed-off-by: Mehul Raninga <quic_mraninga@quicinc.com>
2023-12-14 14:32:20 +05:30
Somesh Dey
e6298624c2 i2c: i2c-msm-geni: check for gi2c->cur null pointer
In geni_i2c_irq_handle_watermark, due to spurious
interrupt gi2c->cur is becoming null resulting in crash.

Hence added a check to prevent this scenario due to
spurious interrupts.

Change-Id: I522b2dbdacb48208ecddd81115c7a9a7c40da021
Signed-off-by: Visweswara Tanuku <quic_vtanuku@quicinc.com>
Signed-off-by: Somesh Dey <quic_somedey@quicinc.com>
Signed-off-by: Madhu Ananthula <quic_mananthu@quicinc.com>
2023-12-13 16:33:31 +05:30
qctecmdr
757877f42f Merge "i2c: i2c-msm-geni: Correct the I2C error codes for geni_i2c_xfer" 2023-11-22 23:41:18 -08:00
qctecmdr
2c4bacde1d Merge "i2c: i2c-msm-geni: create new function from probe" 2023-11-09 02:26:07 -08:00
qctecmdr
e3fa8ebc51 Merge "i2c: i2c-msm-geni: Skip NACK detection for read operation" 2023-10-22 07:41:16 -07:00
Jyothi Kumar Seerapu
b46fd1154d i2c: i2c-msm-geni: Correct the I2C error codes for geni_i2c_xfer
Added the i2c error condition check for updating GENI_M_CMD_FAILURE
and so its make sure that geni_i2c_xfer return error codes is not
replaced with the new error code of GENI_M_CMD_FAILURE.
Also removed GENI_M_CANCEL_DONE from GENI error codes list.

Change-Id: Icaf6cba021abb1df8d12ab6b821a9a12c04e4f06
Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
2023-10-18 20:08:22 +05:30
Viken Dadhaniya
aa59342cc9 i2c: i2c-msm-geni: create new function from probe
Due to multiple if in i2c geni probe function, getting error.

Create new function from probe function to avoid error.

Change-Id: I34a848dc2225b80e8610f54c8e1499d772b288a9
Signed-off-by: Somesh Dey <quic_somedey@quicinc.com>
Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
2023-10-16 12:07:54 +05:30
Viken Dadhaniya
76c899f7a7 i2c: i2c-msm-geni: Skip NACK detection for read operation
As per discussion with design team, Qupv3 HW doesn’t set
M_GP_IRQ_1_EN irq Read opcode during data phase. So HW doesn’t
generate IRQ/NACK bit in data phase for i2c read operation.

So, Skip NACK detection in data phase for read operation.

Change-Id: Ic96db185fe15900bedafb624febba6c3847e20f0
Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
2023-10-02 02:38:35 -07:00
Viken Dadhaniya
8b9164f6a6 i2c: i2c-msm-geni: create new function from IRQ handler
Due to multiple if in IRQ handler function, getting error.

Create new function from IRQ handler function to avoid error.

Change-Id: Ia7cffa9d27af0370e5127edad45e69464c96c19b
Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
2023-09-26 11:48:39 +05:30
Mehul Raninga
3674fdd8bb Revert "i2c: i2c-msm-geni: Update deepsleep and quickboot changes for I2C"
This reverts commit d88ba3aa60.

Reason for revert: This change has  caused regression in
stability testing.

Change-Id: I07be0e8dbcc0f4cdb8d0a8787a2a0beae56f520e
Signed-off-by: Himanshu Choudhary <quic_himansch@quicinc.com>
Signed-off-by: Mehul Raninga <quic_mraninga@quicinc.com>
2023-09-22 18:22:24 +05:30
Viken Dadhaniya
3890a6b125 i2c: i2c-msm-geni: Framework to have test bus dump support
This change does below things for debug :

1. Configures Test bus
2. Read test bus register based on selected point.
3. Config and read of the test bus are for particular I2C instance
   based on DTSI flag.
4. When target crashes, collect dump from T32 script with PS hold HIGH.
5. Test bus registers are printed as logs.

set "qcom,i2c-test-dev" flag in the particular DTSI.
Driver reads the property and sets  gi2c->i2c_test_dev accordingly.
Accordingly call test_bus_enable_per_qupv3() once during probe only once.

call geni_se_test_bus_dump() at the issue point which can enable/select
test bus and read the test bus register dump via test_bus_read_per_qupv3().

In i2c-msm-geni.c, change below value based on SE number, default SE4.
define SE_NUM_FOR_TEST_BUS 5.

Change-Id: Icea7eb18d03a0121aa3679b27eba9f4a4be990c1
Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
2023-08-30 11:34:31 +05:30
Jyothi Kumar Seerapu
d88ba3aa60 i2c: i2c-msm-geni: Update deepsleep and quickboot changes for I2C
Moved deep sleep and quick boot functionality to i2c late suspend and
i2c early resume respectivily.

Also fixed i2c gsi global error which occurred while exiting from
deep sleep.

Change-Id: Iaa088b6a223c615a4493a883e1747d0835b1491d
Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
2023-08-03 02:28:01 -07:00
qctecmdr
9b66bd77bc Merge "i2c: i2c-msm-geni: disable auto suspend timer for levm" 2023-08-02 03:52:19 -07:00
qctecmdr
1182d6d25f Merge "i2c: i2c-msm-geni: add gpi terminate for levm" 2023-08-02 03:52:18 -07:00
qctecmdr
959f826602 Merge "i2c: i2c-msm-geni: Add NULL pointer check for gi2c->cur" 2023-08-02 03:52:18 -07:00
qctecmdr
8d610e116f Merge "i2c: i2c-msm-geni: handle clear of tx water mark" 2023-08-01 23:54:01 -07:00
Jyothi Kumar Seerapu
867ca08250 i2c: i2c-msm-geni: Add NULL pointer check for gi2c->cur
Added Null pointer check in I2C GSI RX callback for gi2c->cur.
It will check whether gi2c->cur is NULL and so marking the complete
of the transfer and returning from GSI RX callback.

Change-Id: I517fa2f4f9a3ce2245f085c9e7956e4a2367a7ef
Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
2023-07-19 13:00:28 +05:30
Anil Veshala Veshala
da4d57e955 i2c: i2c-msm-geni: add gpi terminate for levm
Currently i2c geni driver doing gpi_pause for levm
during error cases like nack/timeout etc. While xfers
onging if suddenly slave went to bad state will get
ios lines not in good state, hence causing xfer timeout.
To recover this we need to apply gpi terminate instead
of gpi_pause.

Change-Id: I1026b7f6ac95ab9c6ce03872f6e0a93aabbd36f5
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2023-07-11 04:08:26 -07:00
Anil Veshala Veshala
cbe4cadb4f i2c: i2c-msm-geni: disable auto suspend timer for levm
Currently for levm, if ios lines not in good state we are
enabling auto suspend timer, this will call runtime suspend
for i2c driver, so will miss suspend/resume sequence.
This will cause side effects, to solve this disabled auto
suspend for levm.

Change-Id: I638156755249ce2aa38ca750e9e56944ad0518a2
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2023-07-10 22:58:10 -07:00
Anil Veshala Veshala
9a58df3730 i2c: i2c-msm-geni: handle clear of tx water mark
During delayed irq or xfer timeout scenario's we are not clearing irq,
this may cause race conditions with current implementation, this could
cause irq storm. To solve this clearing tx water mark during xfer timeout.

Change-Id: I6f78a41be9d349e26a261513edfe30b0a2e4d457
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2023-06-26 21:20:33 -07:00
Srikanth Nanavalla
42402aa6bb i2c: i2c-msm-geni: Add shutdown callback for i2c
If the hardware is still accessing memory after SMMU translation
is disabled (as part of smmu shutdown callback), then the
IOVAs (I/O virtual address) which it was using will go on the bus
as the physical addresses which will result in unknown crashes
like NoC/interconnect errors.

So, implement shutdown callback for i2c driver to suspend the bus
during system "reboot" or "shutdown".

Change-Id: I58b719082a8d8beed4317b33691115c9e7031ec1
Signed-off-by: Srikanth Nanavalla <quic_snanaval@quicinc.com>
2023-06-12 10:54:52 +05:30
Visweswara Tanuku
c3b5270d60 i2c: i2c-msm-geni: Limit i2c xfer errors to ipc logging
Current i2c xfer errors are logged to both
ipc and kernel dmesg.
Limit i2c xfer errors for only ipc logging to
avoid excessive console logging.

Change-Id: I5ef69b840f0e3d5d0af22ee1f2fbd02bacd7d53c
Signed-off-by: Visweswara Tanuku <quic_vtanuku@quicinc.com>
2023-05-25 14:18:10 +05:30
qctecmdr
85189d7bd6 Merge "i2c: i2c-msm-geni: handle gsi error conditions" 2023-05-18 12:39:13 -07:00
qctecmdr
9ddd807071 Merge "i2c: i2c-msm-geni: Add support to identify Data/Address NACK for GSI" 2023-04-26 06:42:48 -07:00
qctecmdr
9b3a95fa19 Merge "i2c: i2c-msm-geni: use dma coherent memory for scatter list" 2023-04-25 03:48:13 -07:00
Anil Veshala Veshala
f1d64e1a3b i2c: i2c-msm-geni: handle gsi error conditions
Currently i2c driver doesn't handle gsi error sequence, if any
errors seen from gsi we should terminate the channels. So added gsi
reset logic during error scenarios.

Change-Id: I42da72eef40bb9ba5c7093ddedc3f098c16cef69
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2023-04-20 06:37:39 -07:00
Anil Veshala Veshala
d1e97f406a i2c: i2c-msm-geni: Add support to identify Data/Address NACK for GSI
Add support to identify the Address or data NACK for Master.
If "M_GP_IRQ_1" bit is set and nonzero value of GENI_M_GP_LENGTH
indicate NACK is received in data phase.

Change-Id: I6ddeef10e99f0711793445400089fe58e4d208e5
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2023-04-20 05:54:22 -07:00
Anil Veshala Veshala
94b56b86cd i2c: i2c-msm-geni: use dma coherent memory for scatter list
For debug purpose use dma coherent memory for scatter list.

Change-Id: I10f02a936faab16473b5d22362776a989a4f1c8f
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
Signed-off-by: Vaishnavi AVS <quic_vavs@quicinc.com>
2023-04-04 12:08:52 +05:30
Chandana Kishori Chiluveru
4d8a4c4aeb i2c: i2c-msm-geni: Remove gi2c->cur pointer check from gsi completions
Currently in gsi TX/RX callbacks, there is a check for gi2c->cur
pointer with NULL and we are updating error code if current
message ponits to NULL. For TUI usecase for the first transfer with
LOCK TRE we are going for this check and marking the error code
which will fail transfer and TUI usecase is failing and
furthr resulting in crash LE VM.

Hence remove gi2c->cur pointer NULL check for GSI TX/RX callbacks.

Change-Id: I38d16ef8a44aaa98e6748d201a3e1d5178006f95
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2023-03-30 00:37:24 -07:00
qctecmdr
02efa7c143 Merge "i2c: i2c-msm-geni: Add support to identify Data/Address NACK" 2023-03-15 09:18:45 -07:00
qctecmdr
5e1371162f Merge "i2c: i2c-msm-geni: Add a return check to solve warning" 2023-03-14 05:13:11 -07:00
Aniket Randive
da3fa80be1 i2c: i2c-msm-geni: Add support to identify Data/Address NACK
Add support to identify the Address or data NACK for Master.
If "M_GP_IRQ_1" bit is set and nonzero value of GENI_M_GP_LENGTH
indicate NACK is received in data phase.

Change-Id: I35036dba8988edf39d1afe5243039a679fa69f8d
Signed-off-by: Aniket Randive <quic_arandive@quicinc.com>
2023-03-14 10:10:48 +05:30
Aniket Randive
2824dd88a1 i2c: i2c-msm-geni: Add a return check to solve warning
In this patch we have solved two issues,
1. Currently we are not checking return value for dmaengine_submit
function and this function returns a cookie can be used to check
the progress of DMA engine activity.
2. Add a NULL check before calling dmaengine_terminate_all function
to avoid NULL pointer dereference issue.

Change-Id: I43f883cbd74baf93769ae5acc862e35290000580
Signed-off-by: Aniket Randive <quic_arandive@quicinc.com>
2023-03-03 14:13:49 +05:30
Viken Dadhaniya
b9daeb976e i2c: i2c-msm-geni: Add a new error code for Spurious irq
Currently in irq handler, there is a check for current message
pointer with NULL. We are not updating any error code if current
message ponits to NULL. Due to this, we are going for
i2c second xfer(READ) without i2c first xfer (WRITE) success on bus.
To solve that updating an error code as spurious interrupt received
when current message ponits to NULL and also that we don't serve
read if write is failing.

Change-Id: I78fe370a8d80010a9f55fda0e69d50670f82d06b
Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
2023-03-03 12:02:53 +05:30
qctecmdr
a7766daf88 Merge "i2c: i2c-msm-geni: add changes for levm suspend" 2023-02-26 09:09:28 -08:00
Anil Veshala Veshala
4b1bcb3775 i2c: i2c-msm-geni: add changes for levm suspend
For le-vm we are seeing probe sequence issues from client and
i2c-master driver, due to this multiple times i2c_resume invoking
and we are seeing unclocked access during the probe. Currently
geni i2c driver is setting first_xfer_done flag in suspend, due to
this in second resume during the probe we are touching registers,
hence seen unclocked access issues. To solve this removed first_xfer
flag set in suspend path.

Change-Id: Iaaaf7bf9eb6b09e530a4517b27526afdd195c32a
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2023-02-26 00:53:03 -08:00
Mukesh Kumar Savaliya
661888b025 i2c: i2c-msm-geni: Do not add reg68 WAR unless stretch bit set
This change removes applied reg68 war from pending cancel operation
function and keep it in place only for stretch bit case. Since pending
cancel operation recovers the IOS line state with force default, we
don't need to run reg68 WAR.
As per the original stretch bit time issue, we should get ARB lost
error and hence execute the WAR only that time.

Change-Id: I6df856de9010e0a55fb78fceb63ffc29853f14c3
Signed-off-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>
2023-02-23 03:50:13 -08:00
qctecmdr
b5c17cb877 Merge "i2c: i2c-msm-geni: Add error bits to handle error inside ISR" 2023-01-10 06:27:47 -08:00
qctecmdr
3cbbf96f8f Merge "i2c: i2c-msm-geni: Set RTL SE flag based on HW reg" 2023-01-08 23:44:03 -08:00
blingala
93a1e2df69 i2c: i2c-msm-geni: Add error bits to handle error inside ISR
Right now ISR is handling the respective Error bits but it's missing
to handle primary check to enter into the condition before handling
the error.

This change adds the error bit check and then handles those error
interrupts. Also remove GP_IRQ_0_EN which is not of use for i2c.

Change-Id: Ided8b80cf8456cc0452422f587abeac9bcd76563
Signed-off-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>
Signed-off-by: blingala <quic_blingala@quicinc.com>
2023-01-04 20:13:32 -08:00
Anil Veshala Veshala
0bc50414e2 dmaengine: gpi: Add changes for deep sleep requirements
This change mainly intended to cover deep sleep requirements
along with GSI driver. There exiting deep sleep need to be
restored with probe similar configurations.

Also added HPG related fixes and taken cared for the LE VM usecases.

Change-Id: I62f0b29874d7b5dc20690877aaf7a7347e084bc1
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2023-01-03 15:53:32 +05:30
Praveen Talari
f5b7638a1c i2c-msm-geni: KASAN: use-after-free in __list_add_valid+0x2c/0xc4
This UAF issue is seen when driver is removed and inserted.

During driver removal, pm runtime resume callback invoked
in which as part of clock, ab/ib nodes are added in
common struct geni_se_dev. As part of driver exit,
we are not removing the ab/ib list from common structure list
due to which the issue is seen when driver is loaded.

As part of driver removal, checking the status of runtime suspend
if it is not suspended, invoke geni suspend call otherwise ignore.
So by suspend call ensured that ab/ib are removed from lists,
so that UAF will not be encountered when next load of driver.

Change-Id: I1f0c7a29c5e268a1ab5c017e271ad0484dcab24f
Signed-off-by: Praveen Talari <quic_ptalari@quicinc.com>
2023-01-02 14:09:45 +05:30
qctecmdr
8eaf27f68b Merge "i2c: i2c-msm-geni: Add bus recovery support for slave devices" 2022-12-30 05:20:48 -08:00
qctecmdr
69f0ad148b Merge "i2c: i2c-msm-geni: Reset i2c GPIOs using FORCE_DEFAULT" 2022-12-30 05:20:47 -08:00
Mukesh Kumar Savaliya
fa317cb587 i2c: i2c-msm-geni: Reset i2c GPIOs using FORCE_DEFAULT
If cancel command is failing due to bad IOS line and not in
proper state, then reset the GPIOs using FORCE_DEFAULT.

This will ensure if master side is behaving bad, it will come to
the proper state else fix it from the slave side.

Change-Id: I3ac143a3c5184ebc4f7f7072de9ba4f4b132dd42
Signed-off-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>
2022-12-29 21:30:11 -08:00
Mukesh Kumar Savaliya
04b652e9b8 i2c: i2c-msm-geni: Add bus recovery support for slave devices
This change adds bus recovery mechansim to recover slave when slave
device went bad. This is an attempt from master SE to send recovery
command to slave.
As of now only FIFO/DMA mode supported, GSI mode can be added later.
To enable this mechanism, client must define the flag qcom,slave_recovery
in the client DTSI node.

Change-Id: I51e896c84ddc97960eedbd2f828293a6d45a2604
Signed-off-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>
2022-12-29 21:23:17 -08:00
Anil Veshala Veshala
0c57d2fea1 i2c: i2c-msm-geni: prevent NULL pointer access
Currently in irq handler we are accessing cur message
pointer without NULL check, due to this we are seeing
NULL pointer access issue. To solve this added NULL
pointer check for cur message.

Change-Id: I8c4a569f5569d4d2d942b633168ad4b270facabf
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2022-12-29 01:27:25 -08:00
Viken Dadhaniya
11fce3c962 i2c: i2c-msm-geni: Set RTL SE flag based on HW reg
Set RTL SE flag by using SE_HW_PARAM_2 register
value.

For I2C HUB, we don't have HW reg to identify RTL/SW base SE.
Hence setting flag for all I2C HUB instances.

Change-Id: I73b3875a009f29730372bfba0caf41a7c9c0a5ea
Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
2022-12-27 19:53:48 +05:30
qctecmdr
2a22c5088d Merge "Revert "i2c: i2c-msm-geni: Add SMbus transfer function"" 2022-12-13 20:48:40 -08:00