1c401bb993
commit edcbdd57de499305e2a3737d4a73fe387f71d84c upstream.
After renaming NAND controller node name from "qpic-nand" to
"nand-controller", the board DTS/DTSI also have to be updated:
Warning (unit_address_vs_reg): /soc/qpic-nand@79b0000: node has a unit name, but no reg or ranges property
Cc: <stable@vger.kernel.org>
Fixes: 9e1e00f18a ("ARM: dts: qcom: Fix node name for NAND controller node")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230420072811.36947-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
112 lines
2.0 KiB
Plaintext
112 lines
2.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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// Copyright (c) 2018, The Linux Foundation. All rights reserved.
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#include "qcom-ipq4019.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
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aliases {
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serial0 = &blsp1_uart1;
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serial1 = &blsp1_uart2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256MB */
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};
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soc {
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pinctrl@1000000 {
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serial_0_pins: serial0-pinmux {
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pins = "gpio16", "gpio17";
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function = "blsp_uart0";
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bias-disable;
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};
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serial_1_pins: serial1-pinmux {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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function = "blsp_uart1";
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bias-disable;
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};
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spi_0_pins: spi-0-pinmux {
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pinmux {
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function = "blsp_spi0";
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pins = "gpio13", "gpio14", "gpio15";
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bias-disable;
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};
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pinmux_cs {
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function = "gpio";
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pins = "gpio12";
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bias-disable;
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output-high;
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};
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};
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i2c_0_pins: i2c-0-pinmux {
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pins = "gpio20", "gpio21";
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function = "blsp_i2c0";
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bias-disable;
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};
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nand_pins: nand-pins {
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pins = "gpio53", "gpio55", "gpio56",
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"gpio57", "gpio58", "gpio59",
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"gpio60", "gpio62", "gpio63",
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"gpio64", "gpio65", "gpio66",
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"gpio67", "gpio68", "gpio69";
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function = "qpic";
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};
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};
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serial@78af000 {
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pinctrl-0 = <&serial_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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serial@78b0000 {
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pinctrl-0 = <&serial_1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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dma@7884000 {
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status = "okay";
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};
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spi@78b5000 { /* BLSP1 QUP1 */
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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cs-gpios = <&tlmm 12 0>;
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m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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compatible = "n25q128a11";
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spi-max-frequency = <24000000>;
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};
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};
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pci@40000000 {
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status = "okay";
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perst-gpio = <&tlmm 38 0x1>;
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};
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};
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};
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&nand {
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pinctrl-0 = <&nand_pins>;
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pinctrl-names = "default";
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};
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