8f997c3ab5
Changes in 5.15.28 slip: fix macro redefine warning x86,bugs: Unconditionally allow spectre_v2=retpoline,amd x86/speculation: Rename RETPOLINE_AMD to RETPOLINE_LFENCE x86/speculation: Add eIBRS + Retpoline options Documentation/hw-vuln: Update spectre doc x86/speculation: Include unprivileged eBPF status in Spectre v2 mitigation reporting x86/speculation: Use generic retpoline by default on AMD x86/speculation: Update link to AMD speculation whitepaper x86/speculation: Warn about Spectre v2 LFENCE mitigation x86/speculation: Warn about eIBRS + LFENCE + Unprivileged eBPF + SMT ARM: report Spectre v2 status through sysfs ARM: early traps initialisation ARM: use LOADADDR() to get load address of sections ARM: Spectre-BHB workaround ARM: include unprivileged BPF status in Spectre V2 reporting arm64: Add Neoverse-N2, Cortex-A710 CPU part definition arm64: Add HWCAP for self-synchronising virtual counter arm64: Add Cortex-X2 CPU part definition arm64: add ID_AA64ISAR2_EL1 sys register arm64: cpufeature: add HWCAP for FEAT_AFP arm64: cpufeature: add HWCAP for FEAT_RPRES arm64: entry.S: Add ventry overflow sanity checks arm64: spectre: Rename spectre_v4_patch_fw_mitigation_conduit KVM: arm64: Allow indirect vectors to be used without SPECTRE_V3A arm64: entry: Make the trampoline cleanup optional arm64: entry: Free up another register on kpti's tramp_exit path arm64: entry: Move the trampoline data page before the text page arm64: entry: Allow tramp_alias to access symbols after the 4K boundary arm64: entry: Don't assume tramp_vectors is the start of the vectors arm64: entry: Move trampoline macros out of ifdef'd section arm64: entry: Make the kpti trampoline's kpti sequence optional arm64: entry: Allow the trampoline text to occupy multiple pages arm64: entry: Add non-kpti __bp_harden_el1_vectors for mitigations arm64: entry: Add vectors that have the bhb mitigation sequences arm64: entry: Add macro for reading symbol addresses from the trampoline arm64: Add percpu vectors for EL1 arm64: proton-pack: Report Spectre-BHB vulnerabilities as part of Spectre-v2 arm64: Mitigate spectre style branch history side channels KVM: arm64: Allow SMCCC_ARCH_WORKAROUND_3 to be discovered and migrated arm64: Use the clearbhb instruction in mitigations arm64: proton-pack: Include unprivileged eBPF status in Spectre v2 mitigation reporting ARM: fix build error when BPF_SYSCALL is disabled ARM: fix co-processor register typo ARM: Do not use NOCROSSREFS directive with ld.lld arm64: Do not include __READ_ONCE() block in assembly files ARM: fix build warning in proc-v7-bugs.c xen/xenbus: don't let xenbus_grant_ring() remove grants in error case xen/grant-table: add gnttab_try_end_foreign_access() xen/blkfront: don't use gnttab_query_foreign_access() for mapped status xen/netfront: don't use gnttab_query_foreign_access() for mapped status xen/scsifront: don't use gnttab_query_foreign_access() for mapped status xen/gntalloc: don't use gnttab_query_foreign_access() xen: remove gnttab_query_foreign_access() xen/9p: use alloc/free_pages_exact() xen/pvcalls: use alloc/free_pages_exact() xen/gnttab: fix gnttab_end_foreign_access() without page specified xen/netfront: react properly to failing gnttab_end_foreign_access_ref() Revert "ACPI: PM: s2idle: Cancel wakeup before dispatching EC GPE" Linux 5.15.28 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: I6d6fcf4f171c097168e17ecff30e1c510cf69fe8
136 lines
5.1 KiB
C
136 lines
5.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 ARM Ltd.
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*/
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#ifndef __ASM_HWCAP_H
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#define __ASM_HWCAP_H
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#include <uapi/asm/hwcap.h>
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#include <asm/cpufeature.h>
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#define COMPAT_HWCAP_SWP (1 << 0)
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#define COMPAT_HWCAP_HALF (1 << 1)
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#define COMPAT_HWCAP_THUMB (1 << 2)
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#define COMPAT_HWCAP_26BIT (1 << 3)
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#define COMPAT_HWCAP_FAST_MULT (1 << 4)
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#define COMPAT_HWCAP_FPA (1 << 5)
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#define COMPAT_HWCAP_VFP (1 << 6)
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#define COMPAT_HWCAP_EDSP (1 << 7)
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#define COMPAT_HWCAP_JAVA (1 << 8)
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#define COMPAT_HWCAP_IWMMXT (1 << 9)
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#define COMPAT_HWCAP_CRUNCH (1 << 10) /* Obsolete */
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#define COMPAT_HWCAP_THUMBEE (1 << 11)
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#define COMPAT_HWCAP_NEON (1 << 12)
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#define COMPAT_HWCAP_VFPv3 (1 << 13)
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#define COMPAT_HWCAP_VFPV3D16 (1 << 14)
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#define COMPAT_HWCAP_TLS (1 << 15)
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#define COMPAT_HWCAP_VFPv4 (1 << 16)
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#define COMPAT_HWCAP_IDIVA (1 << 17)
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#define COMPAT_HWCAP_IDIVT (1 << 18)
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#define COMPAT_HWCAP_IDIV (COMPAT_HWCAP_IDIVA|COMPAT_HWCAP_IDIVT)
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#define COMPAT_HWCAP_VFPD32 (1 << 19)
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#define COMPAT_HWCAP_LPAE (1 << 20)
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#define COMPAT_HWCAP_EVTSTRM (1 << 21)
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#define COMPAT_HWCAP2_AES (1 << 0)
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#define COMPAT_HWCAP2_PMULL (1 << 1)
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#define COMPAT_HWCAP2_SHA1 (1 << 2)
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#define COMPAT_HWCAP2_SHA2 (1 << 3)
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#define COMPAT_HWCAP2_CRC32 (1 << 4)
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#ifndef __ASSEMBLY__
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#include <linux/log2.h>
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/*
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* For userspace we represent hwcaps as a collection of HWCAP{,2}_x bitfields
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* as described in uapi/asm/hwcap.h. For the kernel we represent hwcaps as
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* natural numbers (in a single range of size MAX_CPU_FEATURES) defined here
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* with prefix KERNEL_HWCAP_ mapped to their HWCAP{,2}_x counterpart.
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*
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* Hwcaps should be set and tested within the kernel via the
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* cpu_{set,have}_named_feature(feature) where feature is the unique suffix
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* of KERNEL_HWCAP_{feature}.
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*/
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#define __khwcap_feature(x) const_ilog2(HWCAP_ ## x)
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#define KERNEL_HWCAP_FP __khwcap_feature(FP)
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#define KERNEL_HWCAP_ASIMD __khwcap_feature(ASIMD)
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#define KERNEL_HWCAP_EVTSTRM __khwcap_feature(EVTSTRM)
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#define KERNEL_HWCAP_AES __khwcap_feature(AES)
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#define KERNEL_HWCAP_PMULL __khwcap_feature(PMULL)
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#define KERNEL_HWCAP_SHA1 __khwcap_feature(SHA1)
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#define KERNEL_HWCAP_SHA2 __khwcap_feature(SHA2)
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#define KERNEL_HWCAP_CRC32 __khwcap_feature(CRC32)
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#define KERNEL_HWCAP_ATOMICS __khwcap_feature(ATOMICS)
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#define KERNEL_HWCAP_FPHP __khwcap_feature(FPHP)
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#define KERNEL_HWCAP_ASIMDHP __khwcap_feature(ASIMDHP)
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#define KERNEL_HWCAP_CPUID __khwcap_feature(CPUID)
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#define KERNEL_HWCAP_ASIMDRDM __khwcap_feature(ASIMDRDM)
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#define KERNEL_HWCAP_JSCVT __khwcap_feature(JSCVT)
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#define KERNEL_HWCAP_FCMA __khwcap_feature(FCMA)
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#define KERNEL_HWCAP_LRCPC __khwcap_feature(LRCPC)
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#define KERNEL_HWCAP_DCPOP __khwcap_feature(DCPOP)
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#define KERNEL_HWCAP_SHA3 __khwcap_feature(SHA3)
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#define KERNEL_HWCAP_SM3 __khwcap_feature(SM3)
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#define KERNEL_HWCAP_SM4 __khwcap_feature(SM4)
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#define KERNEL_HWCAP_ASIMDDP __khwcap_feature(ASIMDDP)
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#define KERNEL_HWCAP_SHA512 __khwcap_feature(SHA512)
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#define KERNEL_HWCAP_SVE __khwcap_feature(SVE)
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#define KERNEL_HWCAP_ASIMDFHM __khwcap_feature(ASIMDFHM)
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#define KERNEL_HWCAP_DIT __khwcap_feature(DIT)
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#define KERNEL_HWCAP_USCAT __khwcap_feature(USCAT)
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#define KERNEL_HWCAP_ILRCPC __khwcap_feature(ILRCPC)
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#define KERNEL_HWCAP_FLAGM __khwcap_feature(FLAGM)
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#define KERNEL_HWCAP_SSBS __khwcap_feature(SSBS)
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#define KERNEL_HWCAP_SB __khwcap_feature(SB)
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#define KERNEL_HWCAP_PACA __khwcap_feature(PACA)
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#define KERNEL_HWCAP_PACG __khwcap_feature(PACG)
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#define __khwcap2_feature(x) (const_ilog2(HWCAP2_ ## x) + 32)
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#define KERNEL_HWCAP_DCPODP __khwcap2_feature(DCPODP)
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#define KERNEL_HWCAP_SVE2 __khwcap2_feature(SVE2)
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#define KERNEL_HWCAP_SVEAES __khwcap2_feature(SVEAES)
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#define KERNEL_HWCAP_SVEPMULL __khwcap2_feature(SVEPMULL)
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#define KERNEL_HWCAP_SVEBITPERM __khwcap2_feature(SVEBITPERM)
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#define KERNEL_HWCAP_SVESHA3 __khwcap2_feature(SVESHA3)
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#define KERNEL_HWCAP_SVESM4 __khwcap2_feature(SVESM4)
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#define KERNEL_HWCAP_FLAGM2 __khwcap2_feature(FLAGM2)
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#define KERNEL_HWCAP_FRINT __khwcap2_feature(FRINT)
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#define KERNEL_HWCAP_SVEI8MM __khwcap2_feature(SVEI8MM)
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#define KERNEL_HWCAP_SVEF32MM __khwcap2_feature(SVEF32MM)
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#define KERNEL_HWCAP_SVEF64MM __khwcap2_feature(SVEF64MM)
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#define KERNEL_HWCAP_SVEBF16 __khwcap2_feature(SVEBF16)
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#define KERNEL_HWCAP_I8MM __khwcap2_feature(I8MM)
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#define KERNEL_HWCAP_BF16 __khwcap2_feature(BF16)
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#define KERNEL_HWCAP_DGH __khwcap2_feature(DGH)
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#define KERNEL_HWCAP_RNG __khwcap2_feature(RNG)
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#define KERNEL_HWCAP_BTI __khwcap2_feature(BTI)
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#define KERNEL_HWCAP_MTE __khwcap2_feature(MTE)
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#define KERNEL_HWCAP_ECV __khwcap2_feature(ECV)
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#define KERNEL_HWCAP_AFP __khwcap2_feature(AFP)
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#define KERNEL_HWCAP_RPRES __khwcap2_feature(RPRES)
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#define KERNEL_HWCAP_MTE3 __khwcap2_feature(MTE3)
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/*
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* This yields a mask that user programs can use to figure out what
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* instruction set this cpu supports.
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*/
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#define ELF_HWCAP cpu_get_elf_hwcap()
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#define ELF_HWCAP2 cpu_get_elf_hwcap2()
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#ifdef CONFIG_COMPAT
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#define COMPAT_ELF_HWCAP (compat_elf_hwcap)
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#define COMPAT_ELF_HWCAP2 (compat_elf_hwcap2)
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extern unsigned int compat_elf_hwcap, compat_elf_hwcap2;
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#endif
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enum {
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CAP_HWCAP = 1,
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#ifdef CONFIG_COMPAT
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CAP_COMPAT_HWCAP,
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CAP_COMPAT_HWCAP2,
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#endif
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};
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#endif
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#endif
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