8f997c3ab5
Changes in 5.15.28 slip: fix macro redefine warning x86,bugs: Unconditionally allow spectre_v2=retpoline,amd x86/speculation: Rename RETPOLINE_AMD to RETPOLINE_LFENCE x86/speculation: Add eIBRS + Retpoline options Documentation/hw-vuln: Update spectre doc x86/speculation: Include unprivileged eBPF status in Spectre v2 mitigation reporting x86/speculation: Use generic retpoline by default on AMD x86/speculation: Update link to AMD speculation whitepaper x86/speculation: Warn about Spectre v2 LFENCE mitigation x86/speculation: Warn about eIBRS + LFENCE + Unprivileged eBPF + SMT ARM: report Spectre v2 status through sysfs ARM: early traps initialisation ARM: use LOADADDR() to get load address of sections ARM: Spectre-BHB workaround ARM: include unprivileged BPF status in Spectre V2 reporting arm64: Add Neoverse-N2, Cortex-A710 CPU part definition arm64: Add HWCAP for self-synchronising virtual counter arm64: Add Cortex-X2 CPU part definition arm64: add ID_AA64ISAR2_EL1 sys register arm64: cpufeature: add HWCAP for FEAT_AFP arm64: cpufeature: add HWCAP for FEAT_RPRES arm64: entry.S: Add ventry overflow sanity checks arm64: spectre: Rename spectre_v4_patch_fw_mitigation_conduit KVM: arm64: Allow indirect vectors to be used without SPECTRE_V3A arm64: entry: Make the trampoline cleanup optional arm64: entry: Free up another register on kpti's tramp_exit path arm64: entry: Move the trampoline data page before the text page arm64: entry: Allow tramp_alias to access symbols after the 4K boundary arm64: entry: Don't assume tramp_vectors is the start of the vectors arm64: entry: Move trampoline macros out of ifdef'd section arm64: entry: Make the kpti trampoline's kpti sequence optional arm64: entry: Allow the trampoline text to occupy multiple pages arm64: entry: Add non-kpti __bp_harden_el1_vectors for mitigations arm64: entry: Add vectors that have the bhb mitigation sequences arm64: entry: Add macro for reading symbol addresses from the trampoline arm64: Add percpu vectors for EL1 arm64: proton-pack: Report Spectre-BHB vulnerabilities as part of Spectre-v2 arm64: Mitigate spectre style branch history side channels KVM: arm64: Allow SMCCC_ARCH_WORKAROUND_3 to be discovered and migrated arm64: Use the clearbhb instruction in mitigations arm64: proton-pack: Include unprivileged eBPF status in Spectre v2 mitigation reporting ARM: fix build error when BPF_SYSCALL is disabled ARM: fix co-processor register typo ARM: Do not use NOCROSSREFS directive with ld.lld arm64: Do not include __READ_ONCE() block in assembly files ARM: fix build warning in proc-v7-bugs.c xen/xenbus: don't let xenbus_grant_ring() remove grants in error case xen/grant-table: add gnttab_try_end_foreign_access() xen/blkfront: don't use gnttab_query_foreign_access() for mapped status xen/netfront: don't use gnttab_query_foreign_access() for mapped status xen/scsifront: don't use gnttab_query_foreign_access() for mapped status xen/gntalloc: don't use gnttab_query_foreign_access() xen: remove gnttab_query_foreign_access() xen/9p: use alloc/free_pages_exact() xen/pvcalls: use alloc/free_pages_exact() xen/gnttab: fix gnttab_end_foreign_access() without page specified xen/netfront: react properly to failing gnttab_end_foreign_access_ref() Revert "ACPI: PM: s2idle: Cancel wakeup before dispatching EC GPE" Linux 5.15.28 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: I6d6fcf4f171c097168e17ecff30e1c510cf69fe8
84 lines
2.5 KiB
C
84 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _UAPI__ASM_HWCAP_H
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#define _UAPI__ASM_HWCAP_H
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/*
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* HWCAP flags - for AT_HWCAP
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*/
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#define HWCAP_FP (1 << 0)
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#define HWCAP_ASIMD (1 << 1)
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#define HWCAP_EVTSTRM (1 << 2)
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#define HWCAP_AES (1 << 3)
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#define HWCAP_PMULL (1 << 4)
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#define HWCAP_SHA1 (1 << 5)
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#define HWCAP_SHA2 (1 << 6)
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#define HWCAP_CRC32 (1 << 7)
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#define HWCAP_ATOMICS (1 << 8)
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#define HWCAP_FPHP (1 << 9)
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#define HWCAP_ASIMDHP (1 << 10)
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#define HWCAP_CPUID (1 << 11)
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#define HWCAP_ASIMDRDM (1 << 12)
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#define HWCAP_JSCVT (1 << 13)
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#define HWCAP_FCMA (1 << 14)
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#define HWCAP_LRCPC (1 << 15)
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#define HWCAP_DCPOP (1 << 16)
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#define HWCAP_SHA3 (1 << 17)
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#define HWCAP_SM3 (1 << 18)
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#define HWCAP_SM4 (1 << 19)
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#define HWCAP_ASIMDDP (1 << 20)
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#define HWCAP_SHA512 (1 << 21)
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#define HWCAP_SVE (1 << 22)
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#define HWCAP_ASIMDFHM (1 << 23)
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#define HWCAP_DIT (1 << 24)
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#define HWCAP_USCAT (1 << 25)
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#define HWCAP_ILRCPC (1 << 26)
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#define HWCAP_FLAGM (1 << 27)
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#define HWCAP_SSBS (1 << 28)
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#define HWCAP_SB (1 << 29)
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#define HWCAP_PACA (1 << 30)
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#define HWCAP_PACG (1UL << 31)
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/*
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* HWCAP2 flags - for AT_HWCAP2
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*/
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#define HWCAP2_DCPODP (1 << 0)
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#define HWCAP2_SVE2 (1 << 1)
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#define HWCAP2_SVEAES (1 << 2)
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#define HWCAP2_SVEPMULL (1 << 3)
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#define HWCAP2_SVEBITPERM (1 << 4)
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#define HWCAP2_SVESHA3 (1 << 5)
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#define HWCAP2_SVESM4 (1 << 6)
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#define HWCAP2_FLAGM2 (1 << 7)
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#define HWCAP2_FRINT (1 << 8)
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#define HWCAP2_SVEI8MM (1 << 9)
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#define HWCAP2_SVEF32MM (1 << 10)
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#define HWCAP2_SVEF64MM (1 << 11)
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#define HWCAP2_SVEBF16 (1 << 12)
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#define HWCAP2_I8MM (1 << 13)
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#define HWCAP2_BF16 (1 << 14)
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#define HWCAP2_DGH (1 << 15)
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#define HWCAP2_RNG (1 << 16)
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#define HWCAP2_BTI (1 << 17)
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#define HWCAP2_MTE (1 << 18)
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#define HWCAP2_ECV (1 << 19)
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#define HWCAP2_AFP (1 << 20)
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#define HWCAP2_RPRES (1 << 21)
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#define HWCAP2_MTE3 (1 << 22)
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#endif /* _UAPI__ASM_HWCAP_H */
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