38e30fccb8
Although we padded the cpucaps space for android13-5.10, the move to a generated header in android13-5.15 was missed and consequently we are unable to backport some errata workarounds from upstream without breaking the KMI. To resolve this problem, reclaim some cpucaps allocated by errata workarounds which will never be relevant to Android (i.e. those which apply only to server parts such as Cavium designs and the Neoverse-N1) and which have their use carefully confined to core architecture code. Bug: 248633761 Signed-off-by: Will Deacon <willdeacon@google.com> Change-Id: Id2d9429cae62d97fee44d051318aa5e5b93b29d8
69 lines
1.4 KiB
ArmAsm
69 lines
1.4 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 ARM Ltd.
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*/
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#include <linux/linkage.h>
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#include <linux/const.h>
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#include <asm/assembler.h>
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#include <asm/page.h>
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#include <asm/cpufeature.h>
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#include <asm/alternative.h>
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/*
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* Copy a page from src to dest (both are page aligned)
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*
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* Parameters:
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* x0 - dest
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* x1 - src
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*/
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SYM_FUNC_START_PI(copy_page)
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ldp x2, x3, [x1]
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ldp x4, x5, [x1, #16]
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ldp x6, x7, [x1, #32]
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ldp x8, x9, [x1, #48]
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ldp x10, x11, [x1, #64]
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ldp x12, x13, [x1, #80]
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ldp x14, x15, [x1, #96]
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ldp x16, x17, [x1, #112]
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add x0, x0, #256
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add x1, x1, #128
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1:
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tst x0, #(PAGE_SIZE - 1)
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stnp x2, x3, [x0, #-256]
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ldp x2, x3, [x1]
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stnp x4, x5, [x0, #16 - 256]
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ldp x4, x5, [x1, #16]
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stnp x6, x7, [x0, #32 - 256]
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ldp x6, x7, [x1, #32]
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stnp x8, x9, [x0, #48 - 256]
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ldp x8, x9, [x1, #48]
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stnp x10, x11, [x0, #64 - 256]
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ldp x10, x11, [x1, #64]
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stnp x12, x13, [x0, #80 - 256]
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ldp x12, x13, [x1, #80]
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stnp x14, x15, [x0, #96 - 256]
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ldp x14, x15, [x1, #96]
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stnp x16, x17, [x0, #112 - 256]
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ldp x16, x17, [x1, #112]
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add x0, x0, #128
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add x1, x1, #128
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b.ne 1b
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stnp x2, x3, [x0, #-256]
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stnp x4, x5, [x0, #16 - 256]
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stnp x6, x7, [x0, #32 - 256]
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stnp x8, x9, [x0, #48 - 256]
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stnp x10, x11, [x0, #64 - 256]
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stnp x12, x13, [x0, #80 - 256]
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stnp x14, x15, [x0, #96 - 256]
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stnp x16, x17, [x0, #112 - 256]
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ret
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SYM_FUNC_END_PI(copy_page)
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EXPORT_SYMBOL(copy_page)
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