80 Commits
udc ... bka

Author SHA1 Message Date
Michael Bestas
de2e7fb303 b1c1: Migrade audio HAL to blueprint
Change-Id: I589683d4f2f97b6dbc52fcaa1055a23b0cab8b06
2025-09-23 00:17:16 +02:00
Michael Bestas
fc8295d8f2 b1c1: Remove userdebug/eng configuration
Change-Id: I67b39c183415b5641e16f8ae383848e276825540
2025-09-23 00:17:16 +02:00
Michael Bestas
1dfdc11ed3 b1c1: Drop unused AndroidBoard.mk
Change-Id: I6149ebbec9ebb3687819d8c72c31ebf124056644
2025-09-23 00:17:16 +02:00
Michael Bestas
3062a026e8 b1c1: Migrate mount point creation out of AndroidBoard.mk
Change-Id: Id5986b8a740e45f864eecdd2bd82d9455f128d6b
2025-09-23 00:17:16 +02:00
Michael Bestas
3df095e134 b1c1: Drop unused in-tree kernel headers
Change-Id: If871800764cdb47a4423c615c57267dea964bbe8
2025-09-23 00:17:16 +02:00
Michael Bestas
35b4b5387a b1c1: Resolve qtidataservices denial
Fixes fatal crash of the dataservices app

Change-Id: I4acfa9eef648cbb36f1900cad91fc4fe19a9fe5d
2025-09-23 00:17:15 +02:00
Michael Bestas
5198570b8e b1c1: Update namespace imports
Change-Id: I646fb32c9cb84ac650e16f6568bdb0c214f53290
2025-09-23 00:17:15 +02:00
Michael Bestas
99cb29c85b b1c1: Update display flags & packages
Required after display HAL blueprint conversion

Change-Id: Ifc4e10703d3424607b9dc8bcc8e417d1c88cc2f3
2025-09-23 00:17:15 +02:00
Nolen Johnson
1b02d6cb68 b1c1: Migrate to AIDL LiveDisplay HAL
Change-Id: I4e8be836e94d442b40c63a1ac7dade3c9d9c784c
2025-09-23 00:17:15 +02:00
razorloves
c1b1007ab5 b1c1: Remove duplicate ipacm init entries
These are already being done in
vendor/qcom/opensource/data-ipa-cfg-mgr-legacy-um

Change-Id: I207b1fd170a13381bdb6b0fd8178ecf15f8692f4
2025-09-23 00:17:15 +02:00
Bruno Martins
802cc938c6 b1c1: Migrate Lineage Health to soong_config_set
Change-Id: I2eff39e83b9673aa2989d05de65c646241ba61da
2025-06-03 14:54:27 +02:00
Michael Bestas
5051a64dc8 b1c1: Remove CleanSpec.mk
Change-Id: I6af355cfbfd5fc388ca25cd25cea9df9e74c41c3
2025-05-07 12:24:04 +02:00
Alexander Koskovich
61f3e4d591 b1c1: Remove vendor RenderScript implementation.
* RenderScript is deprecated on newer platforms and
   is being officially replaced.

 * On April 19, 2021, Google announced that RenderScript
   will be deprecated in Android 12, and recommended
   porting existing code to Vulkan.

   https://android-developers.googleblog.com/2021/04/android-gpu-compute-going-forward.html

Change-Id: I19460ef266a646b046f1e7d2f0b4eab7c48ae536
2025-05-07 12:24:04 +02:00
donjohanliebert
6730bbeefe b1c1: fix lag while app opening and QS lags Signed-off-by: donjohanliebert <donjohanliebert@gmail.com>
Signed-off-by: Onelots <onelots@onelots.fr>
2025-04-27 22:46:53 +02:00
d32b03d8b1 b1c1: bump lineage dependencies to 22.2
Signed-off-by: Onelots <onelots@onelots.fr>
2025-04-08 01:55:33 +02:00
Nelson Li
569d76ffec Change TARGET_RECOVERY_UI_LIB to use fully qualified names in b1c1
Since the TARGET_RECOVERY_UI_LIB for each device is not exactly the
same, and most of the modules in it contain `soong_namespace{}` to
avoid conflicts between different devices, after converting
`librecovery_ui_ext` from Android.mk to Android.bp, it needs to be
changed to a `fully qualified name` in order to correctly use the
corresponding module.

Flag: EXEMPT refactor

Bug: 339143524
Test: m -j librecovery_ui_ext
Change-Id: Iee116ad6d0efe7fcc321ec9ecec49224b5ba19e2
2025-03-25 11:51:15 +01:00
Michael Bestas
1f8353671c b1c1: Update CHRE daemon name
Change-Id: Ia1139714c5019684b1e62933fd34632aca2e02a7
2025-03-21 12:29:03 +01:00
Michael Bestas
ebf84d3e71 b1c1: Set chre_daemon_dsp_library
Change-Id: If0a2be3eee2f55fcbb48ca9118f4f14f68ac1c32
2025-03-21 12:29:03 +01:00
Michael Bestas
d6d7ac9fcc fixup! b1c1: switch to common QCOM AIDL bootctrl HAL
Change-Id: I72c6e59f040a54ae8c3edbfb25caab401f2e7418
2025-03-21 12:29:03 +01:00
Georg Veichtlbauer
2c3de3966b b1c1: Remove unneeded NFC packages
* NfcNci and SecureElement are built by handheld_system.mk

Change-Id: I83f686b67778634b584a58d8bae95d237e6dbad1
2025-03-21 12:29:03 +01:00
Michael Bestas
94179b0792 b1c1: Enable ELF checks for libwpa_client dependent libs
Change-Id: I490df02b68da4b9a7088a239672a1dcace66d270
2025-03-21 12:29:03 +01:00
Anthony Adamo
1f884d8991 b1c1: sepolicy: Add default permission for aidl hal_bootctl
add in default sepolicy configuration for aidl implementation
of hal_bootctl

Change-Id: I8bd86071dde93d8ed5ea41555b6d3ede9d434838
2025-03-21 12:29:02 +01:00
Michael Bestas
198786c695 b1c1: Don't use BSG framework for gpt-utils
Change-Id: Ia6e5d651560c8ae5186a48bfbb0e30b864150564
2025-03-21 12:29:02 +01:00
Cosmin Tanislav
6eb62a71f3 b1c1: switch to common QCOM AIDL bootctrl HAL
Change-Id: I04ab771d3b1c38b58913607fbff1bb3b55e1fe25
2025-03-21 12:29:02 +01:00
14585c0ad7 b1c1: vendor: switch back to EvolutionX's vendor for b1c1
Signed-off-by: Onelots <onelots@onelots.fr>
2025-03-06 18:42:22 +01:00
Tyler Wear
016c37d549 b1c1: tetheroffload: Version 1.1
Update tetheroffload to version 1.1.

Change-Id: I004e44e416a88a1b39a4c80366df9008722f096b
2025-03-06 11:54:52 +01:00
4dae96e44b Revert "b1c1: revert dtbo image"
This reverts commit badac1f85a.
2025-03-02 22:58:18 +01:00
PixelBoot
badac1f85a b1c1: revert dtbo image
blame Convert DT overlays to full DTBs kernel commit.
2025-02-20 12:22:09 +01:00
Bruno Martins
a7c7b49847 b1c1: Remove VR permissions
The service and binderized HAL for VR on sdm845 have been removed.

Change-Id: I404ad381651e3218aee7839613a0f0d128cdb37f
2025-02-14 08:43:20 +01:00
Edwin Moquete
64537954d5 b1c1: Enable ELF checks for libril-qcril-hook-oem.so
Change-Id: I5079c44b4ea3cd5f94ade580272704e4f37c2385
2025-02-14 08:43:20 +01:00
504d5878ff b1c1: fix bootloop issues permanently
Signed-off-by: Onelots <onelots@onelots.fr>
2025-02-14 08:38:39 +01:00
8b5e7c1a8f b1c1: fix cam broken dep
Signed-off-by: Onelots <onelots@onelots.fr>
2025-01-27 11:06:05 +01:00
Joey Huab
50b0fd5597 b4s4: Set status_bar_header_height_keyguard to status_bar_height_default value 2025-01-26 15:27:50 +01:00
74941f4299 b1c1: move cam to vendor/Camera
Adding ueventd.hardware.rc too, why the fuck was it not pushed before ?

Signed-off-by: Onelots <onelots@onelots.fr>
2025-01-23 00:26:41 +01:00
Michael Bestas
557763aef9 b1c1: Build Lineage Health HAL
Change-Id: I70cc903a03ac9fa3303bb8fa039c9de4806449bf
2025-01-07 23:29:26 +01:00
Michael Bestas
d7baaefd3a b1c1: Remove non existent soong namespaces
Change-Id: If0b86441d47da127e37aeed6fcd6cbfff656e3f8
2025-01-07 23:27:33 +01:00
Michael Bestas
c803235678 b1c1: Switch to data-ipa-cfg-mgr-legacy-um
Change-Id: Ief79e49dd5f993a05b0e5be1bfe4868a34505a3c
2025-01-07 23:27:33 +01:00
Alex Hong
6dbc4b1055 b1c1: sepolicy: Fix hal_memtrack_default sepolicy denial
avc: denied { search } for comm="memtrack@1.0-se" name="proc" dev="sysfs" ino=57089 scontext=u:r:hal_memtrack_default:s0 tcontext=u:object_r:sysfs_kgsl_proc:s0 tclass=dir permissive=1
avc: denied { read } for comm="memtrack@1.0-se" name="gpumem_mapped" dev="sysfs" ino=116251 scontext=u:r:hal_memtrack_default:s0 tcontext=u:object_r:sysfs_kgsl_proc:s0 tclass=file permissive=1
avc: denied { open } for comm="memtrack@1.0-se" path="/sys/devices/virtual/kgsl/kgsl/proc/2389/gpumem_mapped" dev="sysfs" ino=116251 scontext=u:r:hal_memtrack_default:s0 tcontext=u:object_r:sysfs_kgsl_proc:s0 tclass=file permissive=1
avc: denied { getattr } for comm="memtrack@1.0-se" path="/sys/devices/virtual/kgsl/kgsl/proc/2389/gpumem_mapped" dev="sysfs" ino=116251 scontext=u:r:hal_memtrack_default:s0 tcontext=u:object_r:sysfs_kgsl_proc:s0 tclass=file permissive=1

Bug: 130521615
Test: flash selinux modules to device and reboot under enforcing mode
Change-Id: I57c81c93787b52e240a88d925f8b7f672a729e12
Merged-In: I57c81c93787b52e240a88d925f8b7f672a729e12
2025-01-07 23:27:33 +01:00
Naseer Ahmed
9a60d3c9af b1c1: sepolicy: Add memtrack HAL
Change-Id: I96aba595b174dcdf8949e17cd13f97d1c76af1d4
2025-01-07 23:27:33 +01:00
Yumi Yukimura
ad2e469da5 b1c1: Switch to QTI Memtrack AIDL HAL
Change-Id: Ibcbaff02fd56fbccc3a88c01a5f46a89cb212ef5
2025-01-07 23:27:33 +01:00
Michael Bestas
f5a8b0a7e1 b1c1: Disable OMX service & remove leftovers
Change-Id: Ic9335f694a28852560652090c8035069189d839e
2025-01-07 23:27:33 +01:00
Michael Bestas
d4a5691dd4 b1c1: Drop sensors.$(PRODUCT_HARDWARE)
This is unused and also has been removed in AP4A

Change-Id: I88bf1cd6f616df2e403f6b064e5cef8f2af303e4
2025-01-07 23:27:32 +01:00
89e6317507 b1c1: bump dependencies to lineage-22.1
Signed-off-by: Onelots <onelots@onelots.fr>
2024-12-27 15:34:11 +01:00
Jeff Pu
8ea8d918e1 b4s4: Exclude coredomain access from hal_fingerprint
Bug: 326227403
Test: manual (build target aosp_cf_x86_64_phone-trunk_staging-eng)
Change-Id: I3d4acc283fc14964e10c93a0bbf496791d30966e
2024-12-24 11:47:22 +01:00
Michael Bestas
4af358506e b4s4: Drop USE_SENSOR_MULTI_HAL flag
This is unused and also has been removed in AP4A

Change-Id: I0ca2e6648c04578ebcac829450f5b1fe043859a8
2024-12-24 11:47:22 +01:00
fd9769febf Revert "b1c1: Re-enable broken dup rules check"
This reverts commit fd88701eb8.
2024-12-19 15:30:36 +01:00
4a7de5cd35 b1c1: switch to python extract-utils
Change-Id: Ia2d6a0235d9343d7de0ef69d4197cac7f276af84

Original changes made by LineageOs.
2024-12-14 15:46:03 +01:00
Michael Bestas
b13bd43ea7 b1c1: Remove double pin from xml files
Change-Id: I939b4294351bdb4cbc9cef113aeee06e0fb2506f
2024-12-14 15:31:31 +01:00
Aaron Kling
fd88701eb8 b1c1: Re-enable broken dup rules check
All failures of this have been resolved

Change-Id: I56a923ac90b98e63c093c8cb65cb1059dde57c49
2024-12-14 15:31:31 +01:00
Cosmin Tanislav
edf3fd53bc b1c1: do not manually build dependencies
Change-Id: I4046d8eeabfc70842898b7034f75cdd6bcfc441b
2024-12-14 15:31:31 +01:00
Michael Bestas
1b95e4bf18 b1c1: Libraries are now automatically added to PRODUCT_PACKAGES
Change-Id: Ie92fe02b7e6279195bf28944942c815db773b798
2024-12-14 15:31:31 +01:00
Aaron Kling
7d014c35f2 b1c1: Remove elf files in copy files check
New extract files uses packages instead of copy files

Change-Id: I337c07d13bd350958d4808e1693cc6e03753a96c
2024-12-14 15:31:31 +01:00
Michael Bestas
4bd784e3f5 b1c1: Disable ELF checks for certain libraries
Change-Id: I61dbc3559b43becc22f69ae2c1c3e8edf95e2483
2024-12-14 15:31:31 +01:00
Cosmin Tanislav
b5876d9353 b1c1: skip dependencies which aren't defined in .bp
Change-Id: I01a653661856495788c05b720c0577dac44998a4
2024-12-14 15:31:31 +01:00
Michael Bestas
423a9c18b7 b1c1: fix legacy libprotobuf-cpp-full ELF check
Change-Id: Iadab26630d4599d5df8630d73c8eee254ea2a13f
2024-12-14 15:31:31 +01:00
Michael Bestas
84a3101a03 b1c1: fix libprotobuf-cpp-lite-21.12 ELF check
Change-Id: I028723e6ff9ef71514857d683e2c65caf9e28fa0
2024-12-14 15:31:31 +01:00
Michael Bestas
18f5937ad7 b1c1: fix vendor.qti.hardware.tui_comm@1.0 ELF check
Change-Id: Iaaa6a2afd002fc4ac50c5b4718c6b2399b04c9de
2024-12-14 15:31:31 +01:00
Cosmin Tanislav
1715a0ed52 b1c1: fix vendor.qti.imsrtpservice@3.0 ELF checks
Change-Id: Ia1995d0a3360317843685082e3226ab30f124d09
2024-12-14 15:31:31 +01:00
Aaron Kling
af39b93ec1 b1c1: Add vendor soong imports to extract
Change-Id: Ib19e69dc35af6b04519eeb695228af65f3d01d2a
2024-12-14 15:31:31 +01:00
Aaron Kling
0a50f1e57c b1c1: Enable elf checks
Change-Id: Ia6c9a381abb3384c77532d75e02fd84c841a4d1e
2024-12-14 15:31:31 +01:00
Michael Bestas
acfcf2f04a b1c1: Correct libdsp_streamer_add_constant location
Change-Id: I525880dc9756ba1a094b339748515fbf6c8a9fa6
2024-12-14 15:31:31 +01:00
Michael Bestas
af5ba9eefa b1c1: Remove unused libcamxncs
Change-Id: If6ea2c4fc78f3d6199140aa9210ce78bbd0cac5e
2024-12-14 15:31:31 +01:00
Michael Bestas
932c7bbc07 b1c1: Remove unused 32bit RIL libs
Change-Id: Iaaa897693710374e259fac7c8293de3a439137f8
2024-12-14 15:31:31 +01:00
Michael Bestas
76a598053d b1c1: Remove unused IMS libs
Change-Id: I3f9abbe412f486c27d88b4418fbb38a289216884
2024-12-14 15:31:31 +01:00
Michael Bestas
b8971263e2 b1c1: Remove unused GPS libs
Change-Id: Idc7136e12f2e7c5622023321b4b5a71630f2ed63
2024-12-14 15:31:31 +01:00
Michael Bestas
196e39389d b1c1: Patch citadel to load pixelatoms-cpp-legacy.so
Also remove unused prebuilt libpixelstats

Change-Id: I3c03f4924517499bcc3ede80db4a889f4ef47708
2024-12-14 15:31:31 +01:00
Michael Bestas
680bdd995f b1c1: Replace shim libs with the actual libs
Change-Id: Icb97ba831fd7e2855ce13db08a051ec99fd9ed84
2024-12-14 15:31:31 +01:00
Herbert Xue
776330ef39 Remove device/google/crosshatch/Android.mk
There is no other Android.mk under device/google/crosshatch. So this
Android.mk can be removed.

Bug: 351712146
Test: presubmit
Change-Id: I5823c5228e1706a9aef1ec93c3825458fe4cbd19
2024-12-08 00:15:19 +01:00
Michael Bestas
f7c9d61f89 b1c1: Remove unused thermal-engine headers
We are using vendor/qcom/opensource/thermal-engine

Change-Id: Id0de11d14b17e6241e8c69aa4425ba8e348c0802
2024-12-08 00:15:19 +01:00
Herbert Xue
51c101bbbf Remove unused Android.mk under device/google/crosshatch
Bug: 311512631
Test: NA
Change-Id: I60cda6b26822f815873e2db7f4079019c41d0dca
2024-12-08 00:15:14 +01:00
kellyhung
4dabcf993c Convert Android.mk under device/google/crosshatch/dumpstate/ to Android.bp
Bug: 311287207
Test: m android.hardware.dumpstate@1.1-service.crosshatch

Change-Id: I9768765b57c9fc1ddb2024b26c96bd6378313022
2024-12-08 00:15:13 +01:00
a9caf665f5 b1c1: fix dependencies
Signed-off-by: Onelots <onelots@onelots.fr>
2024-11-27 17:55:49 +01:00
ce7cb4fa37 b1c1: track lineage-22.0 vendor 2024-11-12 14:43:36 +01:00
Michael Bestas
d04a53a702 b1c1: Correct EGL symlinks
Change-Id: Ib51d5490a1082cd4814b635fe744338bebde7cf6
2024-11-11 01:37:20 +01:00
Nolen Johnson
0b20f1308e b1c1: Ensure we build the vendor version of libcrypto_shim
Reference: Ia42de59ff157cddc930a111f8ce5e36e645055ed
Change-Id: I9c9340b37a1ad0d6c22d3947541fe1196a5efeec
2024-11-11 01:37:20 +01:00
Nolen Johnson
e5062eb2fe b1c1: Build libcppbor_external.vendor
* Citadel depends on this.

Change-Id: Ic7d7e54d318e4d6e711ba788f17fabe0508e7a32
2024-11-11 01:37:20 +01:00
Michael Bestas
39e4b68e02 b1c1: Sync extract scripts with 22 templates
Change-Id: I7963ae050cfb193c5d0c2636da9c1e8f82bcdbdb
2024-11-11 01:37:20 +01:00
Michael Bestas
d06e98d0d1 b1c1: Adjust override prop key names
Change-Id: Iaa96fd777196fe90f408457a580b80d86b041140
2024-11-11 01:37:20 +01:00
Michael Bestas
6105c0d190 b1c1: Switch to AOSP Wi-Fi service
Prebuilt blobs crash on 15

Change-Id: I02b593cfd9736c5581216de88c762081e74f3145
2024-11-11 01:37:20 +01:00
Michael Bestas
e1be2ab1cf b1c1: Shim rebootescrow/keymaster/libwvhidl with libcrypto_shim
The following change
e202e51cb0
removed symbols that our libs require.

Change-Id: I1325c34ecec3d339dd68c665010ecb36fa2e6a29
2024-11-11 01:37:20 +01:00
262 changed files with 382 additions and 62523 deletions

View File

@@ -1,7 +1,8 @@
soong_namespace {
imports: ["hardware/google/interfaces",
"hardware/google/pixel",
"hardware/qcom/bootctrl"],
imports: [
"hardware/google/interfaces",
"hardware/google/pixel",
],
}
package {

View File

@@ -1,38 +0,0 @@
#
# Copyright 2017 The Android Open Source Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
LOCAL_PATH := $(call my-dir)
$(eval $(call declare-copy-files-license-metadata,device/google/crosshatch,default-permissions.xml,SPDX-license-identifier-Apache-2.0,notice,build/soong/licenses/LICENSE,))
$(eval $(call declare-copy-files-license-metadata,device/google/crosshatch,libnfc-nci.conf,SPDX-license-identifier-Apache-2.0,notice,build/soong/licenses/LICENSE,))
$(eval $(call declare-copy-files-license-metadata,device/google/crosshatch,fstab.postinstall,SPDX-license-identifier-Apache-2.0,notice,build/soong/licenses/LICENSE,))
$(eval $(call declare-copy-files-license-metadata,device/google/crosshatch,ueventd.rc,SPDX-license-identifier-Apache-2.0,notice,build/soong/licenses/LICENSE,))
$(eval $(call declare-copy-files-license-metadata,device/google/crosshatch,wpa_supplicant.conf,SPDX-license-identifier-Apache-2.0,notice,build/soong/licenses/LICENSE,))
$(eval $(call declare-copy-files-license-metadata,device/google/crosshatch,hals.conf,SPDX-license-identifier-Apache-2.0,notice,build/soong/licenses/LICENSE,))
$(eval $(call declare-copy-files-license-metadata,device/google/crosshatch,media_profiles_V1_0.xml,SPDX-license-identifier-Apache-2.0,notice,build/soong/licenses/LICENSE,))
$(eval $(call declare-copy-files-license-metadata,device/google/crosshatch,media_codecs_performance.xml,SPDX-license-identifier-Apache-2.0,notice,build/soong/licenses/LICENSE,))
$(eval $(call declare-copy-files-license-metadata,device/google/crosshatch,device_state_configuration.xml,SPDX-license-identifier-Apache-2.0,notice,build/soong/licenses/LICENSE,))
$(eval $(call declare-copy-files-license-metadata,device/google/crosshatch,task_profiles.json,SPDX-license-identifier-Apache-2.0,notice,build/soong/licenses/LICENSE,))
$(eval $(call declare-copy-files-license-metadata,device/google/crosshatch,p2p_supplicant.conf,SPDX-license-identifier-Apache-2.0,notice,build/soong/licenses/LICENSE,))
$(eval $(call declare-copy-files-license-metadata,device/google/crosshatch,wpa_supplicant.conf,SPDX-license-identifier-Apache-2.0,notice,build/soong/licenses/LICENSE,))
$(eval $(call declare-copy-files-license-metadata,device/google/crosshatch,wpa_supplicant_overlay.conf,SPDX-license-identifier-Apache-2.0,notice,build/soong/licenses/LICENSE,))
$(eval $(call declare-1p-copy-files,device/google/crosshatch,audio_policy_configuration.xml))
ifeq ($(USES_DEVICE_GOOGLE_B1C1),true)
subdir_makefiles=$(call first-makefiles-under,$(LOCAL_PATH))
$(foreach mk,$(subdir_makefiles),$(info including $(mk) ...)$(eval include $(mk)))
endif

View File

@@ -101,7 +101,7 @@ TARGET_RECOVERY_FSTAB := device/google/crosshatch/fstab.hardware
endif
TARGET_RECOVERY_PIXEL_FORMAT := RGBX_8888
TARGET_RECOVERY_UI_LIB := \
librecovery_ui_pixel \
//hardware/google/pixel/recovery:librecovery_ui_pixel \
libfstab
ifneq ($(filter %_mainline,$(TARGET_PRODUCT)),)
@@ -221,11 +221,7 @@ TARGET_NO_RPC := true
BOARD_VENDOR_QCOM_GPS_LOC_API_HARDWARE := default
BOARD_VENDOR_QCOM_LOC_PDK_FEATURE_SET := true
# RenderScript
OVERRIDE_RS_DRIVER := libRSDriver_adreno.so
# Sensors
USE_SENSOR_MULTI_HAL := true
TARGET_SUPPORT_DIRECT_REPORT := true
# Enable sensor Version V_2
USE_SENSOR_HAL_VER := 2.0
@@ -233,7 +229,6 @@ USE_SENSOR_HAL_VER := 2.0
# CHRE
CHRE_DAEMON_ENABLED := true
CHRE_DAEMON_LPMA_ENABLED := true
CHRE_DAEMON_USE_SDSPRPC := true
# wlan
BOARD_WLAN_DEVICE := qcwcn
@@ -249,27 +244,6 @@ WIFI_FEATURE_WIFI_EXT_HAL := true
WIFI_FEATURE_IMU_DETECTION := false
WIFI_HIDL_UNIFIED_SUPPLICANT_SERVICE_RC_ENTRY := true
# Audio
BOARD_USES_ALSA_AUDIO := true
AUDIO_FEATURE_ENABLED_MULTI_VOICE_SESSIONS := true
AUDIO_FEATURE_ENABLED_SND_MONITOR := true
AUDIO_FEATURE_ENABLED_USB_TUNNEL := true
AUDIO_FEATURE_ENABLED_CIRRUS_SPKR_PROTECTION := true
BOARD_SUPPORTS_SOUND_TRIGGER := true
AUDIO_FEATURE_FLICKER_SENSOR_INPUT := true
SOUND_TRIGGER_FEATURE_LPMA_ENABLED := true
AUDIO_FEATURE_ENABLED_MAXX_AUDIO := true
AUDIO_FEATURE_ENABLED_24BITS_CAMCORDER := true
# Graphics
TARGET_USES_GRALLOC1 := true
TARGET_USES_HWC2 := true
# Display
TARGET_USES_DISPLAY_RENDER_INTENTS := true
TARGET_USES_COLOR_METADATA := true
TARGET_USES_DRM_PP := true
# Vendor Interface Manifest
DEVICE_MANIFEST_FILE := device/google/crosshatch/manifest.xml
DEVICE_MATRIX_FILE := device/google/crosshatch/compatibility_matrix.xml

View File

@@ -4,8 +4,6 @@
# SPDX-License-Identifier: Apache-2.0
#
BUILD_BROKEN_ELF_PREBUILT_PRODUCT_COPY_FILES := true
# Kernel
BOARD_KERNEL_IMAGE_NAME := Image.lz4
TARGET_COMPILE_WITH_MSM_KERNEL := true
@@ -17,7 +15,6 @@ TARGET_KERNEL_SOURCE := kernel/google/b1c1
TARGET_NEEDS_DTBOIMAGE := true
# Manifests
DEVICE_MANIFEST_FILE += device/google/crosshatch/lineage_manifest.xml
DEVICE_FRAMEWORK_COMPATIBILITY_MATRIX_FILE += vendor/lineage/config/device_framework_matrix.xml
# Partitions

View File

@@ -1,177 +0,0 @@
# Copyright 2017 The Android Open Source Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# If you don't need to do a full clean build but would like to touch
# a file or delete some intermediate files, add a clean step to the end
# of the list. These steps will only be run once, if they haven't been
# run before.
#
# E.g.:
# $(call add-clean-step, touch -c external/sqlite/sqlite3.h)
# $(call add-clean-step, rm -rf $(PRODUCT_OUT)/obj/STATIC_LIBRARIES/libz_intermediates)
#
# Always use "touch -c" and "rm -f" or "rm -rf" to gracefully deal with
# files that are missing or have been moved.
#
# Use $(PRODUCT_OUT) to get to the "out/target/product/blah/" directory.
# Use $(OUT_DIR) to refer to the "out" directory.
#
# If you need to re-do something that's already mentioned, just copy
# the command and add it to the bottom of the list. E.g., if a change
# that you made last week required touching a file and a change you
# made today requires touching the same file, just copy the old
# touch step and add it to the end of the list.
#
# ************************************************
# NEWER CLEAN STEPS MUST BE AT THE END OF THE LIST
# ************************************************
# For example:
#$(call add-clean-step, rm -rf $(OUT_DIR)/target/common/obj/APPS/AndroidTests_intermediates)
#$(call add-clean-step, rm -rf $(OUT_DIR)/target/common/obj/JAVA_LIBRARIES/core_intermediates)
#$(call add-clean-step, find $(OUT_DIR) -type f -name "IGTalkSession*" -print0 | xargs -0 rm -f)
#$(call add-clean-step, rm -rf $(PRODUCT_OUT)/data/*)
$(call add-clean-step, rm -rf $(PRODUCT_OUT))
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor)
# Remove /system/lib[64]/vndk-sp/libz.so
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/lib/vndk-sp/libz.so)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/lib64/vndk-sp/libz.so)
# Remove Power HAL 1.2
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.power@1.2-service.crosshatch-libperfmgr.rc)
# Remove Vibrator HAL 1.1
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.vibrator@1.1-service.crosshatch.rc)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/bin/hw/android.hardware.vibrator@1.1-service.crosshatch)
# Remove /product mount point
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/product)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/root/product)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/product)
# Remove android.hardware.audio*@2.0 implementation
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/lib/hw/android.hardware.audio*@2.0-impl.so)
# Adds product.img
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/product)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/root/product)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/app)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/etc)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/fonts)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/framework)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/media)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/priv-app)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/product)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/usr)
# Remove default android.hardware.health@2.0-service
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/bin/hw/android.hardware.health@2.0-service)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.health@2.0-service.rc)
# Remove healthd
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/bin/healthd)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/etc/init/healthd.rc)
# Remove KM3 RC
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.keymaster@3.0-service-qti.rc)
# Remove Codec2.0 software process
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/hw/hardware.google.media.c2@1.0-service-software)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/hardware.google.media.c2@1.0-service-software.rc)
# Remove default android.hardware.graphics.composer@2.1
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/bin/hw/android.hardware.graphics.composer@2.1-service)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.graphics.composer@2.1-service.rc)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/lib64/hw/android.hardware.graphics.composer@2.1-impl.so)
# Remove StrongBox RC
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.keymaster@4.1-service.citadel.rc)
# Migrate to versioned VNDK directory
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/lib/vndk-sp)
# Remove non-qti-display mapper (b/79269048)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/lib/hw/android.hardware.graphics.mapper@2.0-impl.so)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/lib64/hw/android.hardware.graphics.mapper@2.0-impl.so)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/lib/hw/android.hardware.graphics.allocator@2.0-impl.so)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/lib64/hw/android.hardware.graphics.allocator@2.0-impl.so)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/bin/hw/android.hardware.graphics.allocator@2.0-service)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.graphics.allocator@2.0-service.rc)
#AU300 cleanup
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/product)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/obj/include)
# Secure_element HAL for eSE1
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.secure_element@1.0-service.rc)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/bin/hw/android.hardware.secure_element@1.0-service)
# ThermalHAL 1.1
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.thermal@1.1-service.crosshatch.rc)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/bin/hw/android.hardware.thermal@1.1-service.crosshatch)
# Verified boot xml moved to /product
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/etc/permissions/android.software.verified_boot.xml)
# Move libnfc-nci.conf to /product
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/etc/libnfc-nci.conf)
# Remove default android.hardware.graphics.composer@2.3
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/bin/hw/android.hardware.graphics.composer@2.2-service)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.graphics.composer@2.2-service.rc)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/lib64/hw/android.hardware.graphics.composer@2.2-impl.so)
# Remove /firmware which used to be a symlink to /vendor/firmware_mnt
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/root/firmware)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/system/app/webview)
# Moved to /product
$(call add-clean-step, rm -f $(PRODUCT_OUT)/system/etc/sysconfig/qti_whitelist.xml)
# Rename power HAL
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.power@1.3-service.crosshatch-libperfmgr.rc)
# Remove generic atrace HAL
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.atrace@1.0-service.rc)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/vintf/manifest/android.hardware.atrace@1.0-service.xml)
# Combine memtrack/thermal/vibrator HALs into small_hals.crosshatch-service
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.vibrator@1.2-service.crosshatch.rc)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/bin/hw/android.hardware.vibrator@1.2-service.crosshatch)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.memtrack@1.0-service.rc)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/bin/hw/android.hardware.memtrack@1.0-service)
# Removing GSI keys from the ramdisk.
# Those keys will be embedded into VTS instead, to verify the GSI image in used.
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/recovery/root/first_stage_ramdisk/avb/q-gsi.avbpubkey)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/recovery/root/first_stage_ramdisk/avb/r-gsi.avbpubkey)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/recovery/root/first_stage_ramdisk/avb/s-gsi.avbpubkey)
# Use stable aidl power HAL
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.power@1.3-service.pixel-libperfmgr.rc)
# Update to USB HAL 1.3
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/bin/hw/android.hardware.usb@1.2-service.crosshatch)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.usb@1.2-service.crosshatch.rc)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/vintf/manifest/android.hardware.usb@1.2-service.crosshatch.xml)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/bin/hw/android.hardware.usb@1.3-service.crosshatch)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/init/android.hardware.usb@1.3-service.crosshatch.rc)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/vendor/etc/vintf/manifest/android.hardware.usb@1.3-service.crosshatch.xml)

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@@ -39,6 +39,7 @@ $(call inherit-product, $(SRC_TARGET_DIR)/product/aosp_product.mk)
# All components inherited here go to vendor image
#
# TODO(b/136525499): move *_vendor.mk into the vendor makefile later
TARGET_SUPPORTS_OMX_SERVICE := false
$(call inherit-product, $(SRC_TARGET_DIR)/product/handheld_vendor.mk)
$(call inherit-product, $(SRC_TARGET_DIR)/product/telephony_vendor.mk)
$(call inherit-product, device/google/crosshatch/device-blueline.mk)

View File

@@ -39,14 +39,12 @@ $(call inherit-product, $(SRC_TARGET_DIR)/product/aosp_product.mk)
# All components inherited here go to vendor image
#
# TODO(b/136525499): move *_vendor.mk into the vendor makefile later
TARGET_SUPPORTS_OMX_SERVICE := false
$(call inherit-product, $(SRC_TARGET_DIR)/product/handheld_vendor.mk)
$(call inherit-product, $(SRC_TARGET_DIR)/product/telephony_vendor.mk)
$(call inherit-product, device/google/crosshatch/device-crosshatch.mk)
$(call inherit-product-if-exists, vendor/google_devices/crosshatch/proprietary/device-vendor.mk)
PRODUCT_SOONG_NAMESPACES += \
vendor/google_devices/crosshatch/proprietary/hardwareinfo
PRODUCT_COPY_FILES += $(LOCAL_PATH)/audio_effects.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_effects.xml
# STOPSHIP deal with Qualcomm stuff later

View File

@@ -1 +0,0 @@
../crosshatch/AndroidBoard.mk

98
blueline/extract-files.py Executable file
View File

@@ -0,0 +1,98 @@
#!/usr/bin/env -S PYTHONPATH=../../../../tools/extract-utils python3
#
# SPDX-FileCopyrightText: 2024 The LineageOS Project
# SPDX-License-Identifier: Apache-2.0
#
from extract_utils.extract import extract_fns_user_type
from extract_utils.extract_pixel import (
extract_pixel_factory_image,
extract_pixel_firmware,
pixel_factory_image_regex,
pixel_firmware_regex,
)
from extract_utils.fixups_blob import (
blob_fixup,
blob_fixups_user_type,
)
from extract_utils.fixups_lib import (
lib_fixups,
lib_fixups_user_type,
)
from extract_utils.main import (
ExtractUtils,
ExtractUtilsModule,
)
namespace_imports = [
'hardware/google/interfaces',
'hardware/google/pixel',
'hardware/qcom/sdm845/display',
'hardware/qcom/sdm845/gps',
'hardware/qcom/wlan/legacy',
]
def lib_fixup_vendor_suffix(lib: str, partition: str, *args, **kwargs):
return f'{lib}_{partition}' if partition == 'vendor' else None
lib_fixups: lib_fixups_user_type = {
**lib_fixups,
(
'vendor.qti.hardware.tui_comm@1.0',
'vendor.qti.imsrtpservice@3.0',
): lib_fixup_vendor_suffix,
}
blob_fixups: blob_fixups_user_type = {
(
'vendor/bin/hw/android.hardware.identity@1.0-service.citadel',
'vendor/lib64/android.hardware.identity@1.0-impl.nos.so',
): blob_fixup()
.replace_needed('android.hardware.identity-V3-ndk_platform.so', 'android.hardware.identity-V3-ndk.so')
.replace_needed('android.hardware.keymaster-V3-ndk_platform.so', 'android.hardware.keymaster-V3-ndk.so'),
'vendor/bin/hw/android.hardware.rebootescrow-service.citadel': blob_fixup()
.replace_needed('android.hardware.rebootescrow-V1-ndk_platform.so', 'android.hardware.rebootescrow-V1-ndk.so')
.replace_needed('libcrypto.so', 'libcrypto-v33.so')
.add_needed('libcrypto_shim.so'),
(
'vendor/bin/hw/citadeld',
'vendor/lib64/libnos_citadeld_proxy.so',
): blob_fixup()
.replace_needed('android.frameworks.stats-V1-ndk_platform.so', 'android.frameworks.stats-V1-ndk.so')
.replace_needed('pixelatoms-cpp.so', 'pixelatoms-cpp-legacy.so'),
'vendor/bin/hw/vendor.qti.media.c2@1.0-service': blob_fixup()
.replace_needed('libavservices_minijail_vendor.so', 'libavservices_minijail.so'),
(
'vendor/lib64/android.hardware.keymaster@4.1-impl.nos.so',
'vendor/lib64/libwvhidl@1.3.so',
): blob_fixup()
.add_needed('libcrypto_shim.so'),
'vendor/lib64/hw/com.qti.chi.override.so': blob_fixup()
.replace_needed('android.hardware.power-V1-ndk_platform.so', 'android.hardware.power-V1-ndk.so'),
} # fmt: skip
extract_fns: extract_fns_user_type = {
pixel_factory_image_regex: extract_pixel_factory_image,
pixel_firmware_regex: extract_pixel_firmware,
}
module = ExtractUtilsModule(
'blueline',
'google',
device_rel_path='device/google/crosshatch/blueline',
blob_fixups=blob_fixups,
lib_fixups=lib_fixups,
namespace_imports=namespace_imports,
add_firmware_proprietary_file=True,
extract_fns=extract_fns,
)
module.add_proprietary_file('proprietary-files-carriersettings.txt')
module.add_proprietary_file('proprietary-files-radio.txt')
module.add_proprietary_file('proprietary-files-vendor.txt')
if __name__ == '__main__':
utils = ExtractUtils.device(module)
utils.run()

View File

@@ -1,102 +0,0 @@
#!/bin/bash
#
# SPDX-FileCopyrightText: 2016 The CyanogenMod Project
# SPDX-FileCopyrightText: 2017-2024 The LineageOS Project
# SPDX-License-Identifier: Apache-2.0
#
set -e
DEVICE=blueline
VENDOR=google
# Load extract_utils and do some sanity checks
MY_DIR="${BASH_SOURCE%/*}"
if [[ ! -d "${MY_DIR}" ]]; then MY_DIR="${PWD}"; fi
ANDROID_ROOT="${MY_DIR}/../../../.."
# If XML files don't have comments before the XML header, use this flag
# Can still be used with broken XML files by using blob_fixup
export TARGET_DISABLE_XML_FIXING=true
HELPER="${ANDROID_ROOT}/tools/extract-utils/extract_utils.sh"
if [ ! -f "${HELPER}" ]; then
echo "Unable to find helper script at ${HELPER}"
exit 1
fi
source "${HELPER}"
# Default to sanitizing the vendor folder before extraction
CLEAN_VENDOR=true
ONLY_FIRMWARE=
KANG=
SECTION=
while [ "${#}" -gt 0 ]; do
case "${1}" in
--only-firmware)
ONLY_FIRMWARE=true
;;
-n | --no-cleanup)
CLEAN_VENDOR=false
;;
-k | --kang)
KANG="--kang"
;;
-s | --section)
SECTION="${2}"
shift
CLEAN_VENDOR=false
;;
*)
SRC="${1}"
;;
esac
shift
done
if [ -z "${SRC}" ]; then
SRC="adb"
fi
function blob_fixup() {
case "${1}" in
vendor/bin/hw/android.hardware.rebootescrow-service.citadel)
[ "$2" = "" ] && return 0
"${PATCHELF}" --replace-needed "libcrypto.so" "libcrypto-v33.so" "${2}"
;;
*)
return 1
;;
esac
return 0
}
function blob_fixup_dry() {
blob_fixup "$1" ""
}
function prepare_firmware() {
if [ "${SRC}" != "adb" ]; then
bash "${ANDROID_ROOT}"/lineage/scripts/pixel/prepare-firmware.sh "${DEVICE}" "${SRC}"
fi
}
# Initialize the helper
setup_vendor "${DEVICE}" "${VENDOR}" "${ANDROID_ROOT}" false "${CLEAN_VENDOR}"
if [ -z "${ONLY_FIRMWARE}" ]; then
extract "${MY_DIR}/proprietary-files.txt" "${SRC}" "${KANG}" --section "${SECTION}"
extract "${MY_DIR}/proprietary-files-carriersettings.txt" "${SRC}" "${KANG}" --section "${SECTION}"
extract "${MY_DIR}/proprietary-files-radio.txt" "${SRC}" "${KANG}" --section "${SECTION}"
extract "${MY_DIR}/proprietary-files-vendor.txt" "${SRC}" "${KANG}" --section "${SECTION}"
fi
if [ -z "${SECTION}" ]; then
extract_firmware "${MY_DIR}/proprietary-firmware.txt" "${SRC}"
fi
"${MY_DIR}/setup-makefiles.sh"

View File

@@ -20,7 +20,7 @@
<dimen name="status_bar_padding_top">1px</dimen>
<!-- Height of the status bar header bar when on Keyguard (match status_bar_height) -->
<dimen name="status_bar_header_height_keyguard">@*android:dimen/status_bar_height</dimen>
<dimen name="status_bar_header_height_keyguard">28dp</dimen>
<!-- Margin on the right side of the system icon group on Keyguard. -->
<dimen name="system_icons_keyguard_padding_end">9dp</dimen>

View File

@@ -1,9 +1,9 @@
# CNE - from coral - TP1A.221005.002.B2
vendor/app/CneApp/CneApp.apk;REQUIRED=CneApp.libvndfwk_detect_jni.qti_symlink|8c05c492f3673a0e52d86dbd01c144d502fe51f5
vendor/bin/cnd|00c98e93cb936320d90af32a26078e6e97a8c5eb
vendor/etc/cne/Nexus/ATT/ATT_profiles.xml|a0039cb3a4c5a4ca1adf897904b61c91e32d06f7|33e568627fd3f94dc45bca1c01ad10e6d8fb5b52
vendor/etc/cne/Nexus/ROW/ROW_profiles.xml|e3907ff71cbbe0f1073ec1bf0223d26c8282aa35|238e785e9674b27c4b2365958d127533d7293132
vendor/etc/cne/Nexus/VZW/VZW_profiles.xml|0d35b3266ea656d8868ae8f5d7e938f4859e9b0a|0f63b632e3a3f114def7aeadaabd13851c8ceec5
vendor/etc/cne/Nexus/ATT/ATT_profiles.xml|a0039cb3a4c5a4ca1adf897904b61c91e32d06f7
vendor/etc/cne/Nexus/ROW/ROW_profiles.xml|e3907ff71cbbe0f1073ec1bf0223d26c8282aa35
vendor/etc/cne/Nexus/VZW/VZW_profiles.xml|0d35b3266ea656d8868ae8f5d7e938f4859e9b0a
vendor/etc/cne/mwqem.conf|c42ad47b34b511075e5dfb9047d32f881fe0c159
vendor/etc/cne/profileMwqem.xml|947917691684584b7e2ddf3588cd6f8e99f3804f
vendor/etc/cne/wqeclient/ATT/ATT_profile1.xml|578f3f8f56059bfdbef926bcc68d01c15e06951f
@@ -34,29 +34,7 @@ vendor/etc/cne/wqeclient/VZW/VZW_profile4.xml|ff91feb5060a6df07e3e4d9bc99ae58bcc
vendor/etc/cne/wqeclient/VZW/VZW_profile5.xml|f76c894f3c6d5b6ed35113a088dc3174c900501b
vendor/etc/cne/wqeclient/VZW/VZW_profile6.xml|14d136e7fcc682311757d3edc0b9d3eaeba11815
vendor/etc/init/cnd-generic.rc|5ec06d42d32b58bf5c73b77d485606c477d57324
vendor/lib/libcne.so|d5455fe1491870c2469eb0d5479130aeacd361a7
vendor/lib/libcneapiclient.so|9366beb21450011bc6c7fb95d985a26da41b7dbb
vendor/lib/libcneoplookup.so|46789f90f01a6a669a53647e189900712aebad0d
vendor/lib/libcneqmiutils.so|8b97ff1bb8ab0f2ded483d243d87289de33db72b
vendor/lib/libwms.so|d7a8df1240b4846a752195bad6b0c493fa42d13f
vendor/lib/libwqe.so|deec314722d1ebb4d847f2e7983eb92a201bada6
vendor/lib/libxml.so|b453fbd6fcaae2d13f51a8838cf975de8d562e20
vendor/lib/vendor.qti.data.factory@2.0.so|cc920d710a51ec5638acec13bfcf3faff8cb8fdf
vendor/lib/vendor.qti.data.factory@2.1.so|32ecdbebbce71746a244c7a3e70decbab819ee87
vendor/lib/vendor.qti.data.factory@2.2.so|bf46ecfff10609dc22aed0da0414fc8d3fe230bf
vendor/lib/vendor.qti.data.factory@2.3.so|66659e5ff8ffa4f0ccdc64a588e1fee036d5a663
vendor/lib/vendor.qti.data.mwqem@1.0.so|a4953eaf4fd719e8eb7b44e9042976cbedc70ee6
vendor/lib/vendor.qti.data.slm@1.0.so|b3f16e4d8a1ba347f1ff6033228be2c49de55953
vendor/lib/vendor.qti.hardware.data.cne.internal.api@1.0.so|18647099b9e71aabbbb21636540cabfa1fc9426d
vendor/lib/vendor.qti.hardware.data.cne.internal.constants@1.0.so|fedc651cf3ad3c4bc084d359404d7113e6866336
vendor/lib/vendor.qti.hardware.data.cne.internal.server@1.0.so|4c310a92f8ae1dbec77ad5d000c31671a6dd6c37
vendor/lib/vendor.qti.hardware.data.connection@1.0.so|f908c9a9b0de8696fb9c6f9dea1a49bbe444114c
vendor/lib/vendor.qti.hardware.data.dynamicdds@1.0.so|a30ac71448d8712d8c69b884a8a9a0dea17d44ff
vendor/lib/vendor.qti.hardware.data.latency@1.0.so|b6b66d2201a807ca15d90efc3404e7cd4d4a76a1
vendor/lib/vendor.qti.hardware.data.lce@1.0.so|1227a2b1ac3c8adca5ca79eeb46f78af34043614
vendor/lib/vendor.qti.hardware.data.qmi@1.0.so|4d6f1bea9ae5e97f7e456fc7946f913917dbd66c
vendor/lib/vendor.qti.hardware.mwqemadapter@1.0.so|99048bc4f2aef592096d23d6098def735c3a5ca4
vendor/lib/vendor.qti.hardware.slmadapter@1.0.so|e75b017e2e1f75821496bfec235eb400d6ecc3cc
vendor/lib64/libcne.so|1eb5ae1fdd51f05e25d38afd8a793d8adb0ed1cf
vendor/lib64/libcneapiclient.so|a3bd1e0e85f0684fe6c999f5dc17ffdbc14e8f24
vendor/lib64/libcneoplookup.so|573229322afd00b1bfb553f0eef72ce4e2c99ff4
@@ -108,38 +86,6 @@ vendor/etc/init/imsdatadaemon.rc|68e9a06b92817be8c59c3e2b00d95f5a7fa97a1b
vendor/etc/init/imsqmidaemon.rc|b0b9f70b5c56c89769255ea03d8e3f5050c08657
vendor/etc/init/imsrcsd.rc|a12f5a8efbfccf9a8ec47a39367382346eb8dc35
vendor/etc/seccomp_policy/imsrtp.policy|fb5f1f63dbc3a002ac0f203cce3b8d3434752fa2
vendor/lib/com.qualcomm.qti.imscmservice@1.0.so|0395ecc6a78444be3cc585845f91cbcda55875f8
vendor/lib/com.qualcomm.qti.imscmservice@2.0.so|b9dc935adf82410134d63406c4574567902b022e
vendor/lib/com.qualcomm.qti.imscmservice@2.1.so|9dbeb7a9a115a1b91bb0f954070b2e2353076d72
vendor/lib/com.qualcomm.qti.imscmservice@2.2.so|dce9d40f3bb4ced209019348cdde92a7d6f76519
vendor/lib/com.qualcomm.qti.uceservice@2.0.so|7b7914430aece9acd88d3b8fb83d7838cf5d914b
vendor/lib/com.qualcomm.qti.uceservice@2.1.so|b29e2c7292e020863b09991e88368b1aa375b1dc
vendor/lib/com.qualcomm.qti.uceservice@2.2.so|870f9b16df935aab7c4a9b9c6194258f75c331c1
vendor/lib/com.qualcomm.qti.uceservice@2.3.so|19e48d852e08785d6468fdae021d53da53977d3c
vendor/lib/lib-imscmservice.so|38f5e8d9128c5a0eb425c19f867c324704563e30
vendor/lib/lib-imsdpl.so|03a7b299db808ab81347cd7566b7ea9cd63f8d6a
vendor/lib/lib-imsqimf.so|d4e1d33a87cc7b745642ac4b4fe36328fbdbe7aa
vendor/lib/lib-imsrcs-v2.so|571999f88559ec6e75c1f6d0e18fcc0b28090143
vendor/lib/lib-imsrcsbaseimpl.so|c98f6838658ca8bcfecf9a77dbf36ebed0d6f2a4
vendor/lib/lib-imsvtcore.so|108575c6ad012c1e38a4100051041f920e883525
vendor/lib/lib-imsxml.so|82219d37c0c7c77dbbad743ec15b992663c02b2b
vendor/lib/lib-rcsconfig.so|13783a699f7e192e89b1b40fa5b1bdc19958ad0c
vendor/lib/lib-rtpcommon.so|83d1c3a2d0a9a096742f0ae55ef77c18359e90f0
vendor/lib/lib-rtpcore.so|59c05d07ab9fea55fb535a05ed5ca0f1bf429c7d
vendor/lib/lib-rtpsl.so|de204d26ebfe21f640769dee9da74ea300130464
vendor/lib/lib-siputility.so|0cd56a4a2c62c36b540ca644fe5bf006864a9b1a
vendor/lib/lib-uceservice.so|93573179e5e62d0091eeb241c5891368145b35a1
vendor/lib/librcc.so|2a98fdb6200b6d322e6aab0db07bb2c3874e2b7f
vendor/lib/vendor.qti.ims.callcapability@1.0.so|6a2b8dcbb6c565c226853d322fe9b81f0dc5e8e4
vendor/lib/vendor.qti.ims.callinfo@1.0.so|b77c30854532562d1368c02d23538edbe4a13a55
vendor/lib/vendor.qti.ims.factory@1.0.so|6d196d5861b2a8b2abdba3df6dd7d2d3591dc5e6
vendor/lib/vendor.qti.ims.factory@1.1.so|bc5ff74b8cb1ff76706b12072d29bb1a10cbcae5
vendor/lib/vendor.qti.ims.rcsconfig@1.0.so|b2072e058696c248f59184ef4e2290d7d4b0d7e2
vendor/lib/vendor.qti.ims.rcsconfig@1.1.so|c98e14a382990a88f0f946ca0c1340b83f7a2431
vendor/lib/vendor.qti.ims.rcsconfig@2.0.so|1f5916daa9201c9ca6ae51452ebe9e28ae7e4576
vendor/lib/vendor.qti.ims.rcsconfig@2.1.so|2fd70cf484b42c607b74175c3d9b9f4d93d81f10
vendor/lib/vendor.qti.imsrtpservice@3.0-service-Impl.so|8d91a21a4fb1ed8323159af610fda78a752a3ed4
vendor/lib/vendor.qti.imsrtpservice@3.0.so|ac0a1374a03cd01875ae7fac9eb26461349110f6
vendor/lib64/com.qualcomm.qti.imscmservice@1.0.so|c81670607cd83e49ef7799c33ee8d6671ddc1d2d
vendor/lib64/com.qualcomm.qti.imscmservice@2.0.so|5cc27542fa649723d0ade59a09f645c7d24b8218
vendor/lib64/com.qualcomm.qti.imscmservice@2.1.so|6e0037052bd4c8f607106c7b6ce7397fd2ef3430
@@ -184,7 +130,7 @@ vendor/lib64/vendor.qti.ims.rcsconfig@1.1.so|6b0a93fea15929f446c0819fc5411268b09
vendor/lib64/vendor.qti.ims.rcsconfig@2.0.so|edde36e3eaf91a7c26e378dc17c312b99e2cc65b
vendor/lib64/vendor.qti.ims.rcsconfig@2.1.so|dfe17b80d07b431615c35cbd3403f0c0c9455c6f
vendor/lib64/vendor.qti.imsrtpservice@3.0-service-Impl.so|29c39c454cd7c11368db5c480d151e0487f4e0ea
vendor/lib64/vendor.qti.imsrtpservice@3.0.so|91cc47edc34172234d56156e7e69fa5b4871dd21
vendor/lib64/vendor.qti.imsrtpservice@3.0.so;MODULE_SUFFIX=_vendor|91cc47edc34172234d56156e7e69fa5b4871dd21
# QMI - from coral - TP1A.221005.002.B2
vendor/bin/irsc_util|f194faebe803843eb855a72e172367e02dc49ecd

View File

@@ -1,4 +1,5 @@
# All blobs are extracted from Google factory images for each new ASB
vendor/app/TimeService/TimeService.apk
vendor/bin/adsprpcd
vendor/bin/cdsprpcd
@@ -385,28 +386,16 @@ vendor/lib/hw/android.hardware.gatekeeper@1.0-impl-qti.so
vendor/lib/hw/sound_trigger.primary.sdm845.so
vendor/lib/hw/vendor.qti.hardware.qteeconnector@1.0-impl.so
vendor/lib/hw/vulkan.adreno.so
vendor/lib/lib-dplmedia.so
vendor/lib/libAlacSwDec.so
vendor/lib/libApeSwDec.so
vendor/lib/libC2D2.so
vendor/lib/libCB.so
vendor/lib/libFlacSwDec.so
vendor/lib/libGPQTEEC_vendor.so
vendor/lib/libGPTEE_vendor.so
vendor/lib/libGPreqcancel.so
vendor/lib/libGPreqcancel_svc.so
-vendor/lib/libMpeg4SwEncoder.so
vendor/lib/libOmxAlacDecSw.so
vendor/lib/libOmxAmrwbplusDec.so
vendor/lib/libOmxApeDecSw.so
vendor/lib/libOmxDsdDec.so
vendor/lib/libOmxEvrcDec.so
vendor/lib/libOmxQcelp13Dec.so
vendor/lib/libOpenCL-pixel.so
vendor/lib/libOpenCL.so
vendor/lib/libQSEEComAPI.so
vendor/lib/libQTEEConnector_vendor.so
vendor/lib/libRSDriver_adreno.so
vendor/lib/libSecureUILib.so
vendor/lib/libStDrvInt.so
vendor/lib/libSubSystemShutdown.so
@@ -427,7 +416,7 @@ vendor/lib/libaudioalsa.so
vendor/lib/libbase64.so
vendor/lib/libbccQTI.so
vendor/lib/libbluetooth_audio_session_qti.so
-vendor/lib/libbtnv.so
vendor/lib/libbtnv.so
vendor/lib/libc2d30_bltlib.so
vendor/lib/libcameradepthcalibrator.so
vendor/lib/libcdsp_default_listener.so
@@ -440,7 +429,6 @@ vendor/lib/libdisp-aba.so
vendor/lib/libdisplayqos.so
vendor/lib/libdrmfs.so
vendor/lib/libdrmtime.so
vendor/lib/libdsd2pcm.so
vendor/lib/libeaselmanager_client.so
vendor/lib/libelmyra-protos.so
vendor/lib/libfastcrc.so
@@ -480,16 +468,13 @@ vendor/lib/libqisl.so
vendor/lib/libqseed3.so
vendor/lib/libqti-utils.so
vendor/lib/libqtikeymaster4.so
vendor/lib/libquipc_os_api.so
vendor/lib/librpmb.so
vendor/lib/librs_adreno.so
vendor/lib/librs_adreno_sha1.so
vendor/lib/libsdedrm.so
vendor/lib/libsdm-color.so
vendor/lib/libsdm-diag.so
vendor/lib/libsdm-disp-vndapis.so
vendor/lib/libsdmextension.so
-vendor/lib/libsdsprpc.so
vendor/lib/libsdsprpc.so
vendor/lib/libsecureui.so
vendor/lib/libsecureui_svcsock.so
vendor/lib/libsensorslog.so
@@ -545,7 +530,7 @@ vendor/lib/vendor.qti.hardware.qteeconnector@1.0.so
vendor/lib/vendor.qti.hardware.scve.objecttracker@1.0.so
vendor/lib/vendor.qti.hardware.scve.panorama@1.0.so
vendor/lib/vendor.qti.hardware.soter@1.0.so
vendor/lib/vendor.qti.hardware.tui_comm@1.0.so
vendor/lib/vendor.qti.hardware.tui_comm@1.0.so;MODULE_SUFFIX=_vendor
vendor/lib/vendor.qti.hardware.wigig.netperftuner@1.0.so
vendor/lib/vendor.qti.power.pasrmanager@1.0.so
vendor/lib/vendor.qti.voiceprint@1.0.so
@@ -612,11 +597,11 @@ vendor/lib64/camera/fdconfigvideo.bin
vendor/lib64/camera/fdconfigvideolite.bin
vendor/lib64/com.fingerprints.extension@1.0.so
vendor/lib64/egl/eglSubDriverAndroid.so
vendor/lib64/egl/libEGL_adreno.so;SYMLINK=vendor/lib/libEGL_adreno.so
vendor/lib64/egl/libEGL_adreno.so;SYMLINK=vendor/lib64/libEGL_adreno.so
vendor/lib64/egl/libGLESv1_CM_adreno.so
vendor/lib64/egl/libGLESv2_adreno.so;SYMLINK=vendor/lib/libGLESv2_adreno.so
vendor/lib64/egl/libGLESv2_adreno.so;SYMLINK=vendor/lib64/libGLESv2_adreno.so
vendor/lib64/egl/libQTapGLES.so
vendor/lib64/egl/libq3dtools_adreno.so;SYMLINK=vendor/lib/libq3dtools_adreno.so
vendor/lib64/egl/libq3dtools_adreno.so;SYMLINK=vendor/lib64/libq3dtools_adreno.so
vendor/lib64/egl/libq3dtools_esx.so
vendor/lib64/hw/android.hardware.bluetooth@1.0-impl-qti.so
vendor/lib64/hw/android.hardware.gatekeeper@1.0-impl-qti.so
@@ -625,27 +610,16 @@ vendor/lib64/hw/com.qti.chi.override.so
vendor/lib64/hw/sound_trigger.primary.sdm845.so
vendor/lib64/hw/vendor.qti.hardware.qteeconnector@1.0-impl.so
vendor/lib64/hw/vulkan.adreno.so
vendor/lib64/lib-dplmedia.so
vendor/lib64/libAlacSwDec.so
vendor/lib64/libApeSwDec.so
vendor/lib64/libC2D2.so
vendor/lib64/libCB.so
vendor/lib64/libFlacSwDec.so
vendor/lib64/libGPQTEEC_vendor.so
vendor/lib64/libGPTEE_vendor.so
vendor/lib64/libGPreqcancel.so
vendor/lib64/libGPreqcancel_svc.so
-vendor/lib64/libMpeg4SwEncoder.so
vendor/lib64/libOmxAlacDecSw.so
vendor/lib64/libOmxAmrwbplusDec.so
vendor/lib64/libOmxApeDecSw.so
vendor/lib64/libOmxEvrcDec.so
vendor/lib64/libOmxQcelp13Dec.so
vendor/lib64/libOpenCL-pixel.so
vendor/lib64/libOpenCL.so
vendor/lib64/libQSEEComAPI.so
vendor/lib64/libQTEEConnector_vendor.so
vendor/lib64/libRSDriver_adreno.so
vendor/lib64/libSecureUILib.so
vendor/lib64/libStDrvInt.so
vendor/lib64/libSubSystemShutdown.so
@@ -664,12 +638,11 @@ vendor/lib64/libaudioalsa.so
vendor/lib64/libbase64.so
vendor/lib64/libbccQTI.so
vendor/lib64/libbluetooth_audio_session_qti.so
-vendor/lib64/libbtnv.so
vendor/lib64/libbtnv.so
vendor/lib64/libc2d30_bltlib.so
vendor/lib64/libcameradepthcalibrator.so
vendor/lib64/libcamxfdalgov7.so
vendor/lib64/libcamxfdengine.so
vendor/lib64/libcamxncs.so
vendor/lib64/libcamxstatscore.so
vendor/lib64/libcamxtintlessalgo.so
vendor/lib64/libcdsp_default_listener.so
@@ -727,7 +700,6 @@ vendor/lib64/libnos_transport.so
vendor/lib64/libnosprotos.so
vendor/lib64/liboemcrypto.so
vendor/lib64/libperipheral_client.so
vendor/lib64/libpixelstats.so
vendor/lib64/libpower_anomaly_data.so
vendor/lib64/libqcbor.so
vendor/lib64/libqcodec2.so
@@ -735,17 +707,14 @@ vendor/lib64/libqisl.so
vendor/lib64/libqseed3.so
vendor/lib64/libqti-utils.so
vendor/lib64/libqtikeymaster4.so
vendor/lib64/libquipc_os_api.so
vendor/lib64/librpmb.so
vendor/lib64/librs_adreno.so
vendor/lib64/librs_adreno_sha1.so
vendor/lib64/librtxproto.so
vendor/lib64/libsdedrm.so
vendor/lib64/libsdm-color.so
vendor/lib64/libsdm-diag.so
vendor/lib64/libsdm-disp-vndapis.so
vendor/lib64/libsdmextension.so
-vendor/lib64/libsdsprpc.so
vendor/lib64/libsdsprpc.so
vendor/lib64/libsecureui.so
vendor/lib64/libsecureui_svcsock.so
vendor/lib64/libsensorslog.so
@@ -778,8 +747,8 @@ vendor/lib64/nos_app_avb.so
vendor/lib64/nos_app_identity.so
vendor/lib64/nos_app_keymaster.so
vendor/lib64/nos_app_weaver.so
vendor/lib64/pixelatoms-cpp.so
vendor/lib64/rfsa/adsp/libdsp_streamer_add_constant.so
vendor/lib64/pixelatoms-cpp.so:vendor/lib64/pixelatoms-cpp-legacy.so;FIX_SONAME
vendor/lib64/rfsa/adsp/libdsp_streamer_add_constant.so:vendor/lib/rfsa/adsp/libdsp_streamer_add_constant.so
vendor/lib64/sensors.ssc.so
vendor/lib64/unnhal-acc-adreno.so
vendor/lib64/unnhal-acc-common.so
@@ -802,7 +771,7 @@ vendor/lib64/vendor.qti.hardware.qteeconnector@1.0.so
vendor/lib64/vendor.qti.hardware.scve.objecttracker@1.0.so
vendor/lib64/vendor.qti.hardware.scve.panorama@1.0.so
vendor/lib64/vendor.qti.hardware.soter@1.0.so
vendor/lib64/vendor.qti.hardware.tui_comm@1.0.so
vendor/lib64/vendor.qti.hardware.tui_comm@1.0.so;MODULE_SUFFIX=_vendor
vendor/lib64/vendor.qti.hardware.wigig.netperftuner@1.0.so
vendor/lib64/vendor.qti.power.pasrmanager@1.0.so
vendor/lib64/vendor.qti.voiceprint@1.0.so

View File

@@ -113,12 +113,3 @@ system_ext/etc/permissions/vzw_mvs_permissions.xml
system_ext/priv-app/MyVerizonServices/MyVerizonServices.apk;PRESIGNED
system_ext/priv-app/OBDM_Permissions/OBDM_Permissions.apk;PRESIGNED
system_ext/priv-app/obdm_stub/obdm_stub.apk;PRESIGNED
# vendor partition
# Wi-Fi service
vendor/bin/hw/vendor.google.wifi_ext-service-vendor|2f00a17b75612cbf8fb3685fe0d183148a70dd03
vendor/etc/init/vendor.google.wifi_ext-service.rc|8565ca57da131819441d6fb87abfcae134ed2ef9
vendor/etc/vintf/manifest/manifest_wifi_ext_aidl.xml|f273a6ab68268f73935c36bdecea0aad97cbe70f
vendor/lib64/google_wifi_firmware_config_info_cc_proto.so|b290b5ba92c6b505d2314e75d8c7269a1cc03942
vendor/lib64/vendor.google.wifi_ext-V3-ndk.so|9fcddf2e1eab7978f6c57270170b3f4a9aea04b8

1
blueline/setup-makefiles.py Executable file
View File

@@ -0,0 +1 @@
#!./extract-files.py --regenerate_makefiles

View File

@@ -1,40 +0,0 @@
#!/bin/bash
#
# SPDX-FileCopyrightText: 2016 The CyanogenMod Project
# SPDX-FileCopyrightText: 2017-2024 The LineageOS Project
# SPDX-License-Identifier: Apache-2.0
#
set -e
DEVICE=blueline
VENDOR=google
# Load extract_utils and do some sanity checks
MY_DIR="${BASH_SOURCE%/*}"
if [[ ! -d "${MY_DIR}" ]]; then MY_DIR="${PWD}"; fi
ANDROID_ROOT="${MY_DIR}/../../../.."
HELPER="${ANDROID_ROOT}/tools/extract-utils/extract_utils.sh"
if [ ! -f "${HELPER}" ]; then
echo "Unable to find helper script at ${HELPER}"
exit 1
fi
source "${HELPER}"
# Initialize the helper
setup_vendor "${DEVICE}" "${VENDOR}" "${ANDROID_ROOT}"
# Warning headers and guards
write_headers
write_makefiles "${MY_DIR}/proprietary-files.txt" true
write_makefiles "${MY_DIR}/proprietary-files-carriersettings.txt" true
write_makefiles "${MY_DIR}/proprietary-files-radio.txt" true
write_makefiles "${MY_DIR}/proprietary-files-vendor.txt" true
append_firmware_calls_to_makefiles "${MY_DIR}/proprietary-firmware.txt"
# Finish
write_footers

View File

@@ -1,25 +0,0 @@
//
// Copyright (C) 2018 The Android Open Source Project
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
//
package {
default_applicable_licenses: ["Android-Apache-2.0"],
}
cc_library {
name: "bootctrl.sdm845",
defaults: ["bootctrl_hal_defaults"],
static_libs: ["libgptutils.crosshatch"],
}

View File

@@ -1,59 +0,0 @@
LOCAL_PATH := $(call my-dir)
#A/B builds require us to create the mount points at compile time.
#Just creating it for all cases since it does not hurt.
FIRMWARE_MOUNT_POINT := $(TARGET_OUT_VENDOR)/firmware_mnt
ALL_DEFAULT_INSTALLED_MODULES += $(FIRMWARE_MOUNT_POINT)
$(FIRMWARE_MOUNT_POINT):
@echo "Creating $(FIRMWARE_MOUNT_POINT)"
@mkdir -p $(TARGET_OUT_VENDOR)/firmware_mnt
#----------------------------------------------------------------------
# Generate persist image (persist.img)
#----------------------------------------------------------------------
TARGET_OUT_PERSIST_IMG_PATH := $(PRODUCT_OUT)/persist
INTERNAL_PERSISTIMAGE_FILES := \
$(foreach pair,$(PRODUCT_COPY_FILES),\
$(if $(filter persist/%,$(call word-colon,2,$(pair))),\
$(call word-colon,1,$(pair)):$(PRODUCT_OUT)/$(call word-colon,2,$(pair))))
INSTALLED_PERSISTIMAGE_FILES := $(call copy-many-files,$(INTERNAL_PERSISTIMAGE_FILES))
INSTALLED_PERSISTIMAGE_TARGET := $(PRODUCT_OUT)/persist.img
$(INSTALLED_PERSISTIMAGE_TARGET): $(MKEXTUSERIMG) $(MAKE_EXT4FS) $(INSTALLED_PERSISTIMAGE_FILES)
$(call pretty,"Target persist fs image: $(INSTALLED_PERSISTIMAGE_TARGET)")
@mkdir -p $(TARGET_OUT_PERSIST_IMG_PATH)
$(hide) PATH=$(HOST_OUT_EXECUTABLES):$${PATH} $(MKEXTUSERIMG) -s $(TARGET_OUT_PERSIST_IMG_PATH) $@ ext4 persist $(BOARD_PERSISTIMAGE_PARTITION_SIZE)
$(hide) chmod a+r $@
$(hide) $(call assert-max-image-size,$@,$(BOARD_PERSISTIMAGE_PARTITION_SIZE))
$(call declare-1p-container,$(INSTALLED_PERSISTIMAGE_TARGET),)
$(call declare-container-license-deps,$(INSTALLED_PERSISTIMAGE_TARGET),$(INSTALLED_PERSISTIMAGE_FILES),$(INSTALLED_PERSISTIMAGE_TARGET):)
ALL_DEFAULT_INSTALLED_MODULES += $(INSTALLED_PERSISTIMAGE_TARGET)
ALL_MODULES.$(LOCAL_MODULE).INSTALLED += $(INSTALLED_PERSISTIMAGE_TARGET)
INSTALLED_RADIOIMAGE_TARGET += $(INSTALLED_PERSISTIMAGE_TARGET)
.PHONY: persistimage
persistimage: $(INSTALLED_PERSISTIMAGE_TARGET)
droidcore: $(INSTALLED_PERSISTIMAGE_TARGET)
# copy kernel headers to the build tree
$(TARGET_OUT_INTERMEDIATES)/KERNEL_OBJ/usr: $(wildcard $(PRODUCT_VENDOR_KERNEL_HEADERS)/*)
rm -rf $@
mkdir -p $@/include
cp -a $(PRODUCT_VENDOR_KERNEL_HEADERS)/. $@/include
#----------------------------------------------------------------------
# build and sign the final stage of bootloader
#----------------------------------------------------------------------
.PHONY: aboot
ifeq ($(USESECIMAGETOOL), true)
aboot: gensecimage_target gensecimage_install
else
aboot: $(INSTALLED_BOOTLOADER_MODULE)
endif

98
crosshatch/extract-files.py Executable file
View File

@@ -0,0 +1,98 @@
#!/usr/bin/env -S PYTHONPATH=../../../../tools/extract-utils python3
#
# SPDX-FileCopyrightText: 2024 The LineageOS Project
# SPDX-License-Identifier: Apache-2.0
#
from extract_utils.extract import extract_fns_user_type
from extract_utils.extract_pixel import (
extract_pixel_factory_image,
extract_pixel_firmware,
pixel_factory_image_regex,
pixel_firmware_regex,
)
from extract_utils.fixups_blob import (
blob_fixup,
blob_fixups_user_type,
)
from extract_utils.fixups_lib import (
lib_fixups,
lib_fixups_user_type,
)
from extract_utils.main import (
ExtractUtils,
ExtractUtilsModule,
)
namespace_imports = [
'hardware/google/interfaces',
'hardware/google/pixel',
'hardware/qcom/sdm845/display',
'hardware/qcom/sdm845/gps',
'hardware/qcom/wlan/legacy',
]
def lib_fixup_vendor_suffix(lib: str, partition: str, *args, **kwargs):
return f'{lib}_{partition}' if partition == 'vendor' else None
lib_fixups: lib_fixups_user_type = {
**lib_fixups,
(
'vendor.qti.hardware.tui_comm@1.0',
'vendor.qti.imsrtpservice@3.0',
): lib_fixup_vendor_suffix,
}
blob_fixups: blob_fixups_user_type = {
(
'vendor/bin/hw/android.hardware.identity@1.0-service.citadel',
'vendor/lib64/android.hardware.identity@1.0-impl.nos.so',
): blob_fixup()
.replace_needed('android.hardware.identity-V3-ndk_platform.so', 'android.hardware.identity-V3-ndk.so')
.replace_needed('android.hardware.keymaster-V3-ndk_platform.so', 'android.hardware.keymaster-V3-ndk.so'),
'vendor/bin/hw/android.hardware.rebootescrow-service.citadel': blob_fixup()
.replace_needed('android.hardware.rebootescrow-V1-ndk_platform.so', 'android.hardware.rebootescrow-V1-ndk.so')
.replace_needed('libcrypto.so', 'libcrypto-v33.so')
.add_needed('libcrypto_shim.so'),
(
'vendor/bin/hw/citadeld',
'vendor/lib64/libnos_citadeld_proxy.so',
): blob_fixup()
.replace_needed('android.frameworks.stats-V1-ndk_platform.so', 'android.frameworks.stats-V1-ndk.so')
.replace_needed('pixelatoms-cpp.so', 'pixelatoms-cpp-legacy.so'),
'vendor/bin/hw/vendor.qti.media.c2@1.0-service': blob_fixup()
.replace_needed('libavservices_minijail_vendor.so', 'libavservices_minijail.so'),
(
'vendor/lib64/android.hardware.keymaster@4.1-impl.nos.so',
'vendor/lib64/libwvhidl@1.3.so',
): blob_fixup()
.add_needed('libcrypto_shim.so'),
'vendor/lib64/hw/com.qti.chi.override.so': blob_fixup()
.replace_needed('android.hardware.power-V1-ndk_platform.so', 'android.hardware.power-V1-ndk.so'),
} # fmt: skip
extract_fns: extract_fns_user_type = {
pixel_factory_image_regex: extract_pixel_factory_image,
pixel_firmware_regex: extract_pixel_firmware,
}
module = ExtractUtilsModule(
'crosshatch',
'google',
device_rel_path='device/google/crosshatch/crosshatch',
blob_fixups=blob_fixups,
lib_fixups=lib_fixups,
namespace_imports=namespace_imports,
add_firmware_proprietary_file=True,
extract_fns=extract_fns,
)
module.add_proprietary_file('proprietary-files-carriersettings.txt')
module.add_proprietary_file('proprietary-files-radio.txt')
module.add_proprietary_file('proprietary-files-vendor.txt')
if __name__ == '__main__':
utils = ExtractUtils.device(module)
utils.run()

View File

@@ -1,102 +0,0 @@
#!/bin/bash
#
# SPDX-FileCopyrightText: 2016 The CyanogenMod Project
# SPDX-FileCopyrightText: 2017-2024 The LineageOS Project
# SPDX-License-Identifier: Apache-2.0
#
set -e
DEVICE=crosshatch
VENDOR=google
# Load extract_utils and do some sanity checks
MY_DIR="${BASH_SOURCE%/*}"
if [[ ! -d "${MY_DIR}" ]]; then MY_DIR="${PWD}"; fi
ANDROID_ROOT="${MY_DIR}/../../../.."
# If XML files don't have comments before the XML header, use this flag
# Can still be used with broken XML files by using blob_fixup
export TARGET_DISABLE_XML_FIXING=true
HELPER="${ANDROID_ROOT}/tools/extract-utils/extract_utils.sh"
if [ ! -f "${HELPER}" ]; then
echo "Unable to find helper script at ${HELPER}"
exit 1
fi
source "${HELPER}"
# Default to sanitizing the vendor folder before extraction
CLEAN_VENDOR=true
ONLY_FIRMWARE=
KANG=
SECTION=
while [ "${#}" -gt 0 ]; do
case "${1}" in
--only-firmware)
ONLY_FIRMWARE=true
;;
-n | --no-cleanup)
CLEAN_VENDOR=false
;;
-k | --kang)
KANG="--kang"
;;
-s | --section)
SECTION="${2}"
shift
CLEAN_VENDOR=false
;;
*)
SRC="${1}"
;;
esac
shift
done
if [ -z "${SRC}" ]; then
SRC="adb"
fi
function blob_fixup() {
case "${1}" in
vendor/bin/hw/android.hardware.rebootescrow-service.citadel)
[ "$2" = "" ] && return 0
"${PATCHELF}" --replace-needed "libcrypto.so" "libcrypto-v33.so" "${2}"
;;
*)
return 1
;;
esac
return 0
}
function blob_fixup_dry() {
blob_fixup "$1" ""
}
function prepare_firmware() {
if [ "${SRC}" != "adb" ]; then
bash "${ANDROID_ROOT}"/lineage/scripts/pixel/prepare-firmware.sh "${DEVICE}" "${SRC}"
fi
}
# Initialize the helper
setup_vendor "${DEVICE}" "${VENDOR}" "${ANDROID_ROOT}" false "${CLEAN_VENDOR}"
if [ -z "${ONLY_FIRMWARE}" ]; then
extract "${MY_DIR}/proprietary-files.txt" "${SRC}" "${KANG}" --section "${SECTION}"
extract "${MY_DIR}/proprietary-files-carriersettings.txt" "${SRC}" "${KANG}" --section "${SECTION}"
extract "${MY_DIR}/proprietary-files-radio.txt" "${SRC}" "${KANG}" --section "${SECTION}"
extract "${MY_DIR}/proprietary-files-vendor.txt" "${SRC}" "${KANG}" --section "${SECTION}"
fi
if [ -z "${SECTION}" ]; then
extract_firmware "${MY_DIR}/proprietary-firmware.txt" "${SRC}"
fi
"${MY_DIR}/setup-makefiles.sh"

View File

@@ -733,7 +733,7 @@
Do not read this dimen directly. Use {@link SystemBarUtils#getStatusBarHeight} instead.
-->
<dimen name="status_bar_height_default">28dp</dimen>
<dimen name="status_bar_height_portrait">171px</dimen>
<dimen name="status_bar_height_portrait">28dp</dimen>
<dimen name="status_bar_height_landscape">28dp</dimen>
<dimen name="rounded_corner_radius_top">133px</dimen>

View File

@@ -20,7 +20,7 @@
<dimen name="display_cutout_margin_consumption">0px</dimen>
<!-- Height of the status bar header bar when on Keyguard (match status_bar_height) -->
<dimen name="status_bar_header_height_keyguard">@*android:dimen/status_bar_height</dimen>
<dimen name="status_bar_header_height_keyguard">28dp</dimen>
<!-- Margin on the right side of the system icon group on Keyguard. -->
<dimen name="system_icons_keyguard_padding_end">9dp</dimen>

View File

@@ -1,9 +1,9 @@
# CNE - from coral - TP1A.221005.002.B2
vendor/app/CneApp/CneApp.apk;REQUIRED=CneApp.libvndfwk_detect_jni.qti_symlink|8c05c492f3673a0e52d86dbd01c144d502fe51f5
vendor/bin/cnd|00c98e93cb936320d90af32a26078e6e97a8c5eb
vendor/etc/cne/Nexus/ATT/ATT_profiles.xml|a0039cb3a4c5a4ca1adf897904b61c91e32d06f7|33e568627fd3f94dc45bca1c01ad10e6d8fb5b52
vendor/etc/cne/Nexus/ROW/ROW_profiles.xml|e3907ff71cbbe0f1073ec1bf0223d26c8282aa35|238e785e9674b27c4b2365958d127533d7293132
vendor/etc/cne/Nexus/VZW/VZW_profiles.xml|0d35b3266ea656d8868ae8f5d7e938f4859e9b0a|0f63b632e3a3f114def7aeadaabd13851c8ceec5
vendor/etc/cne/Nexus/ATT/ATT_profiles.xml|a0039cb3a4c5a4ca1adf897904b61c91e32d06f7
vendor/etc/cne/Nexus/ROW/ROW_profiles.xml|e3907ff71cbbe0f1073ec1bf0223d26c8282aa35
vendor/etc/cne/Nexus/VZW/VZW_profiles.xml|0d35b3266ea656d8868ae8f5d7e938f4859e9b0a
vendor/etc/cne/mwqem.conf|c42ad47b34b511075e5dfb9047d32f881fe0c159
vendor/etc/cne/profileMwqem.xml|947917691684584b7e2ddf3588cd6f8e99f3804f
vendor/etc/cne/wqeclient/ATT/ATT_profile1.xml|578f3f8f56059bfdbef926bcc68d01c15e06951f
@@ -34,29 +34,7 @@ vendor/etc/cne/wqeclient/VZW/VZW_profile4.xml|ff91feb5060a6df07e3e4d9bc99ae58bcc
vendor/etc/cne/wqeclient/VZW/VZW_profile5.xml|f76c894f3c6d5b6ed35113a088dc3174c900501b
vendor/etc/cne/wqeclient/VZW/VZW_profile6.xml|14d136e7fcc682311757d3edc0b9d3eaeba11815
vendor/etc/init/cnd-generic.rc|5ec06d42d32b58bf5c73b77d485606c477d57324
vendor/lib/libcne.so|d5455fe1491870c2469eb0d5479130aeacd361a7
vendor/lib/libcneapiclient.so|9366beb21450011bc6c7fb95d985a26da41b7dbb
vendor/lib/libcneoplookup.so|46789f90f01a6a669a53647e189900712aebad0d
vendor/lib/libcneqmiutils.so|8b97ff1bb8ab0f2ded483d243d87289de33db72b
vendor/lib/libwms.so|d7a8df1240b4846a752195bad6b0c493fa42d13f
vendor/lib/libwqe.so|deec314722d1ebb4d847f2e7983eb92a201bada6
vendor/lib/libxml.so|b453fbd6fcaae2d13f51a8838cf975de8d562e20
vendor/lib/vendor.qti.data.factory@2.0.so|cc920d710a51ec5638acec13bfcf3faff8cb8fdf
vendor/lib/vendor.qti.data.factory@2.1.so|32ecdbebbce71746a244c7a3e70decbab819ee87
vendor/lib/vendor.qti.data.factory@2.2.so|bf46ecfff10609dc22aed0da0414fc8d3fe230bf
vendor/lib/vendor.qti.data.factory@2.3.so|66659e5ff8ffa4f0ccdc64a588e1fee036d5a663
vendor/lib/vendor.qti.data.mwqem@1.0.so|a4953eaf4fd719e8eb7b44e9042976cbedc70ee6
vendor/lib/vendor.qti.data.slm@1.0.so|b3f16e4d8a1ba347f1ff6033228be2c49de55953
vendor/lib/vendor.qti.hardware.data.cne.internal.api@1.0.so|18647099b9e71aabbbb21636540cabfa1fc9426d
vendor/lib/vendor.qti.hardware.data.cne.internal.constants@1.0.so|fedc651cf3ad3c4bc084d359404d7113e6866336
vendor/lib/vendor.qti.hardware.data.cne.internal.server@1.0.so|4c310a92f8ae1dbec77ad5d000c31671a6dd6c37
vendor/lib/vendor.qti.hardware.data.connection@1.0.so|f908c9a9b0de8696fb9c6f9dea1a49bbe444114c
vendor/lib/vendor.qti.hardware.data.dynamicdds@1.0.so|a30ac71448d8712d8c69b884a8a9a0dea17d44ff
vendor/lib/vendor.qti.hardware.data.latency@1.0.so|b6b66d2201a807ca15d90efc3404e7cd4d4a76a1
vendor/lib/vendor.qti.hardware.data.lce@1.0.so|1227a2b1ac3c8adca5ca79eeb46f78af34043614
vendor/lib/vendor.qti.hardware.data.qmi@1.0.so|4d6f1bea9ae5e97f7e456fc7946f913917dbd66c
vendor/lib/vendor.qti.hardware.mwqemadapter@1.0.so|99048bc4f2aef592096d23d6098def735c3a5ca4
vendor/lib/vendor.qti.hardware.slmadapter@1.0.so|e75b017e2e1f75821496bfec235eb400d6ecc3cc
vendor/lib64/libcne.so|1eb5ae1fdd51f05e25d38afd8a793d8adb0ed1cf
vendor/lib64/libcneapiclient.so|a3bd1e0e85f0684fe6c999f5dc17ffdbc14e8f24
vendor/lib64/libcneoplookup.so|573229322afd00b1bfb553f0eef72ce4e2c99ff4
@@ -108,38 +86,6 @@ vendor/etc/init/imsdatadaemon.rc|68e9a06b92817be8c59c3e2b00d95f5a7fa97a1b
vendor/etc/init/imsqmidaemon.rc|b0b9f70b5c56c89769255ea03d8e3f5050c08657
vendor/etc/init/imsrcsd.rc|a12f5a8efbfccf9a8ec47a39367382346eb8dc35
vendor/etc/seccomp_policy/imsrtp.policy|fb5f1f63dbc3a002ac0f203cce3b8d3434752fa2
vendor/lib/com.qualcomm.qti.imscmservice@1.0.so|0395ecc6a78444be3cc585845f91cbcda55875f8
vendor/lib/com.qualcomm.qti.imscmservice@2.0.so|b9dc935adf82410134d63406c4574567902b022e
vendor/lib/com.qualcomm.qti.imscmservice@2.1.so|9dbeb7a9a115a1b91bb0f954070b2e2353076d72
vendor/lib/com.qualcomm.qti.imscmservice@2.2.so|dce9d40f3bb4ced209019348cdde92a7d6f76519
vendor/lib/com.qualcomm.qti.uceservice@2.0.so|7b7914430aece9acd88d3b8fb83d7838cf5d914b
vendor/lib/com.qualcomm.qti.uceservice@2.1.so|b29e2c7292e020863b09991e88368b1aa375b1dc
vendor/lib/com.qualcomm.qti.uceservice@2.2.so|870f9b16df935aab7c4a9b9c6194258f75c331c1
vendor/lib/com.qualcomm.qti.uceservice@2.3.so|19e48d852e08785d6468fdae021d53da53977d3c
vendor/lib/lib-imscmservice.so|38f5e8d9128c5a0eb425c19f867c324704563e30
vendor/lib/lib-imsdpl.so|03a7b299db808ab81347cd7566b7ea9cd63f8d6a
vendor/lib/lib-imsqimf.so|d4e1d33a87cc7b745642ac4b4fe36328fbdbe7aa
vendor/lib/lib-imsrcs-v2.so|571999f88559ec6e75c1f6d0e18fcc0b28090143
vendor/lib/lib-imsrcsbaseimpl.so|c98f6838658ca8bcfecf9a77dbf36ebed0d6f2a4
vendor/lib/lib-imsvtcore.so|108575c6ad012c1e38a4100051041f920e883525
vendor/lib/lib-imsxml.so|82219d37c0c7c77dbbad743ec15b992663c02b2b
vendor/lib/lib-rcsconfig.so|13783a699f7e192e89b1b40fa5b1bdc19958ad0c
vendor/lib/lib-rtpcommon.so|83d1c3a2d0a9a096742f0ae55ef77c18359e90f0
vendor/lib/lib-rtpcore.so|59c05d07ab9fea55fb535a05ed5ca0f1bf429c7d
vendor/lib/lib-rtpsl.so|de204d26ebfe21f640769dee9da74ea300130464
vendor/lib/lib-siputility.so|0cd56a4a2c62c36b540ca644fe5bf006864a9b1a
vendor/lib/lib-uceservice.so|93573179e5e62d0091eeb241c5891368145b35a1
vendor/lib/librcc.so|2a98fdb6200b6d322e6aab0db07bb2c3874e2b7f
vendor/lib/vendor.qti.ims.callcapability@1.0.so|6a2b8dcbb6c565c226853d322fe9b81f0dc5e8e4
vendor/lib/vendor.qti.ims.callinfo@1.0.so|b77c30854532562d1368c02d23538edbe4a13a55
vendor/lib/vendor.qti.ims.factory@1.0.so|6d196d5861b2a8b2abdba3df6dd7d2d3591dc5e6
vendor/lib/vendor.qti.ims.factory@1.1.so|bc5ff74b8cb1ff76706b12072d29bb1a10cbcae5
vendor/lib/vendor.qti.ims.rcsconfig@1.0.so|b2072e058696c248f59184ef4e2290d7d4b0d7e2
vendor/lib/vendor.qti.ims.rcsconfig@1.1.so|c98e14a382990a88f0f946ca0c1340b83f7a2431
vendor/lib/vendor.qti.ims.rcsconfig@2.0.so|1f5916daa9201c9ca6ae51452ebe9e28ae7e4576
vendor/lib/vendor.qti.ims.rcsconfig@2.1.so|2fd70cf484b42c607b74175c3d9b9f4d93d81f10
vendor/lib/vendor.qti.imsrtpservice@3.0-service-Impl.so|8d91a21a4fb1ed8323159af610fda78a752a3ed4
vendor/lib/vendor.qti.imsrtpservice@3.0.so|ac0a1374a03cd01875ae7fac9eb26461349110f6
vendor/lib64/com.qualcomm.qti.imscmservice@1.0.so|c81670607cd83e49ef7799c33ee8d6671ddc1d2d
vendor/lib64/com.qualcomm.qti.imscmservice@2.0.so|5cc27542fa649723d0ade59a09f645c7d24b8218
vendor/lib64/com.qualcomm.qti.imscmservice@2.1.so|6e0037052bd4c8f607106c7b6ce7397fd2ef3430
@@ -184,7 +130,7 @@ vendor/lib64/vendor.qti.ims.rcsconfig@1.1.so|6b0a93fea15929f446c0819fc5411268b09
vendor/lib64/vendor.qti.ims.rcsconfig@2.0.so|edde36e3eaf91a7c26e378dc17c312b99e2cc65b
vendor/lib64/vendor.qti.ims.rcsconfig@2.1.so|dfe17b80d07b431615c35cbd3403f0c0c9455c6f
vendor/lib64/vendor.qti.imsrtpservice@3.0-service-Impl.so|29c39c454cd7c11368db5c480d151e0487f4e0ea
vendor/lib64/vendor.qti.imsrtpservice@3.0.so|91cc47edc34172234d56156e7e69fa5b4871dd21
vendor/lib64/vendor.qti.imsrtpservice@3.0.so;MODULE_SUFFIX=_vendor|91cc47edc34172234d56156e7e69fa5b4871dd21
# QMI - from coral - TP1A.221005.002.B2
vendor/bin/irsc_util|f194faebe803843eb855a72e172367e02dc49ecd

View File

@@ -1,4 +1,5 @@
# All blobs are extracted from Google factory images for each new ASB
vendor/app/TimeService/TimeService.apk
vendor/bin/adsprpcd
vendor/bin/cdsprpcd
@@ -385,28 +386,16 @@ vendor/lib/hw/android.hardware.gatekeeper@1.0-impl-qti.so
vendor/lib/hw/sound_trigger.primary.sdm845.so
vendor/lib/hw/vendor.qti.hardware.qteeconnector@1.0-impl.so
vendor/lib/hw/vulkan.adreno.so
vendor/lib/lib-dplmedia.so
vendor/lib/libAlacSwDec.so
vendor/lib/libApeSwDec.so
vendor/lib/libC2D2.so
vendor/lib/libCB.so
vendor/lib/libFlacSwDec.so
vendor/lib/libGPQTEEC_vendor.so
vendor/lib/libGPTEE_vendor.so
vendor/lib/libGPreqcancel.so
vendor/lib/libGPreqcancel_svc.so
-vendor/lib/libMpeg4SwEncoder.so
vendor/lib/libOmxAlacDecSw.so
vendor/lib/libOmxAmrwbplusDec.so
vendor/lib/libOmxApeDecSw.so
vendor/lib/libOmxDsdDec.so
vendor/lib/libOmxEvrcDec.so
vendor/lib/libOmxQcelp13Dec.so
vendor/lib/libOpenCL-pixel.so
vendor/lib/libOpenCL.so
vendor/lib/libQSEEComAPI.so
vendor/lib/libQTEEConnector_vendor.so
vendor/lib/libRSDriver_adreno.so
vendor/lib/libSecureUILib.so
vendor/lib/libStDrvInt.so
vendor/lib/libSubSystemShutdown.so
@@ -427,7 +416,7 @@ vendor/lib/libaudioalsa.so
vendor/lib/libbase64.so
vendor/lib/libbccQTI.so
vendor/lib/libbluetooth_audio_session_qti.so
-vendor/lib/libbtnv.so
vendor/lib/libbtnv.so
vendor/lib/libc2d30_bltlib.so
vendor/lib/libcameradepthcalibrator.so
vendor/lib/libcdsp_default_listener.so
@@ -440,7 +429,6 @@ vendor/lib/libdisp-aba.so
vendor/lib/libdisplayqos.so
vendor/lib/libdrmfs.so
vendor/lib/libdrmtime.so
vendor/lib/libdsd2pcm.so
vendor/lib/libeaselmanager_client.so
vendor/lib/libelmyra-protos.so
vendor/lib/libfastcrc.so
@@ -480,16 +468,13 @@ vendor/lib/libqisl.so
vendor/lib/libqseed3.so
vendor/lib/libqti-utils.so
vendor/lib/libqtikeymaster4.so
vendor/lib/libquipc_os_api.so
vendor/lib/librpmb.so
vendor/lib/librs_adreno.so
vendor/lib/librs_adreno_sha1.so
vendor/lib/libsdedrm.so
vendor/lib/libsdm-color.so
vendor/lib/libsdm-diag.so
vendor/lib/libsdm-disp-vndapis.so
vendor/lib/libsdmextension.so
-vendor/lib/libsdsprpc.so
vendor/lib/libsdsprpc.so
vendor/lib/libsecureui.so
vendor/lib/libsecureui_svcsock.so
vendor/lib/libsensorslog.so
@@ -545,7 +530,7 @@ vendor/lib/vendor.qti.hardware.qteeconnector@1.0.so
vendor/lib/vendor.qti.hardware.scve.objecttracker@1.0.so
vendor/lib/vendor.qti.hardware.scve.panorama@1.0.so
vendor/lib/vendor.qti.hardware.soter@1.0.so
vendor/lib/vendor.qti.hardware.tui_comm@1.0.so
vendor/lib/vendor.qti.hardware.tui_comm@1.0.so;MODULE_SUFFIX=_vendor
vendor/lib/vendor.qti.hardware.wigig.netperftuner@1.0.so
vendor/lib/vendor.qti.power.pasrmanager@1.0.so
vendor/lib/vendor.qti.voiceprint@1.0.so
@@ -612,11 +597,11 @@ vendor/lib64/camera/fdconfigvideo.bin
vendor/lib64/camera/fdconfigvideolite.bin
vendor/lib64/com.fingerprints.extension@1.0.so
vendor/lib64/egl/eglSubDriverAndroid.so
vendor/lib64/egl/libEGL_adreno.so;SYMLINK=vendor/lib/libEGL_adreno.so
vendor/lib64/egl/libEGL_adreno.so;SYMLINK=vendor/lib64/libEGL_adreno.so
vendor/lib64/egl/libGLESv1_CM_adreno.so
vendor/lib64/egl/libGLESv2_adreno.so;SYMLINK=vendor/lib/libGLESv2_adreno.so
vendor/lib64/egl/libGLESv2_adreno.so;SYMLINK=vendor/lib64/libGLESv2_adreno.so
vendor/lib64/egl/libQTapGLES.so
vendor/lib64/egl/libq3dtools_adreno.so;SYMLINK=vendor/lib/libq3dtools_adreno.so
vendor/lib64/egl/libq3dtools_adreno.so;SYMLINK=vendor/lib64/libq3dtools_adreno.so
vendor/lib64/egl/libq3dtools_esx.so
vendor/lib64/hw/android.hardware.bluetooth@1.0-impl-qti.so
vendor/lib64/hw/android.hardware.gatekeeper@1.0-impl-qti.so
@@ -625,27 +610,16 @@ vendor/lib64/hw/com.qti.chi.override.so
vendor/lib64/hw/sound_trigger.primary.sdm845.so
vendor/lib64/hw/vendor.qti.hardware.qteeconnector@1.0-impl.so
vendor/lib64/hw/vulkan.adreno.so
vendor/lib64/lib-dplmedia.so
vendor/lib64/libAlacSwDec.so
vendor/lib64/libApeSwDec.so
vendor/lib64/libC2D2.so
vendor/lib64/libCB.so
vendor/lib64/libFlacSwDec.so
vendor/lib64/libGPQTEEC_vendor.so
vendor/lib64/libGPTEE_vendor.so
vendor/lib64/libGPreqcancel.so
vendor/lib64/libGPreqcancel_svc.so
-vendor/lib64/libMpeg4SwEncoder.so
vendor/lib64/libOmxAlacDecSw.so
vendor/lib64/libOmxAmrwbplusDec.so
vendor/lib64/libOmxApeDecSw.so
vendor/lib64/libOmxEvrcDec.so
vendor/lib64/libOmxQcelp13Dec.so
vendor/lib64/libOpenCL-pixel.so
vendor/lib64/libOpenCL.so
vendor/lib64/libQSEEComAPI.so
vendor/lib64/libQTEEConnector_vendor.so
vendor/lib64/libRSDriver_adreno.so
vendor/lib64/libSecureUILib.so
vendor/lib64/libStDrvInt.so
vendor/lib64/libSubSystemShutdown.so
@@ -664,12 +638,11 @@ vendor/lib64/libaudioalsa.so
vendor/lib64/libbase64.so
vendor/lib64/libbccQTI.so
vendor/lib64/libbluetooth_audio_session_qti.so
-vendor/lib64/libbtnv.so
vendor/lib64/libbtnv.so
vendor/lib64/libc2d30_bltlib.so
vendor/lib64/libcameradepthcalibrator.so
vendor/lib64/libcamxfdalgov7.so
vendor/lib64/libcamxfdengine.so
vendor/lib64/libcamxncs.so
vendor/lib64/libcamxstatscore.so
vendor/lib64/libcamxtintlessalgo.so
vendor/lib64/libcdsp_default_listener.so
@@ -727,7 +700,6 @@ vendor/lib64/libnos_transport.so
vendor/lib64/libnosprotos.so
vendor/lib64/liboemcrypto.so
vendor/lib64/libperipheral_client.so
vendor/lib64/libpixelstats.so
vendor/lib64/libpower_anomaly_data.so
vendor/lib64/libqcbor.so
vendor/lib64/libqcodec2.so
@@ -735,17 +707,14 @@ vendor/lib64/libqisl.so
vendor/lib64/libqseed3.so
vendor/lib64/libqti-utils.so
vendor/lib64/libqtikeymaster4.so
vendor/lib64/libquipc_os_api.so
vendor/lib64/librpmb.so
vendor/lib64/librs_adreno.so
vendor/lib64/librs_adreno_sha1.so
vendor/lib64/librtxproto.so
vendor/lib64/libsdedrm.so
vendor/lib64/libsdm-color.so
vendor/lib64/libsdm-diag.so
vendor/lib64/libsdm-disp-vndapis.so
vendor/lib64/libsdmextension.so
-vendor/lib64/libsdsprpc.so
vendor/lib64/libsdsprpc.so
vendor/lib64/libsecureui.so
vendor/lib64/libsecureui_svcsock.so
vendor/lib64/libsensorslog.so
@@ -778,8 +747,8 @@ vendor/lib64/nos_app_avb.so
vendor/lib64/nos_app_identity.so
vendor/lib64/nos_app_keymaster.so
vendor/lib64/nos_app_weaver.so
vendor/lib64/pixelatoms-cpp.so
vendor/lib64/rfsa/adsp/libdsp_streamer_add_constant.so
vendor/lib64/pixelatoms-cpp.so:vendor/lib64/pixelatoms-cpp-legacy.so;FIX_SONAME
vendor/lib64/rfsa/adsp/libdsp_streamer_add_constant.so:vendor/lib/rfsa/adsp/libdsp_streamer_add_constant.so
vendor/lib64/sensors.ssc.so
vendor/lib64/unnhal-acc-adreno.so
vendor/lib64/unnhal-acc-common.so
@@ -802,7 +771,7 @@ vendor/lib64/vendor.qti.hardware.qteeconnector@1.0.so
vendor/lib64/vendor.qti.hardware.scve.objecttracker@1.0.so
vendor/lib64/vendor.qti.hardware.scve.panorama@1.0.so
vendor/lib64/vendor.qti.hardware.soter@1.0.so
vendor/lib64/vendor.qti.hardware.tui_comm@1.0.so
vendor/lib64/vendor.qti.hardware.tui_comm@1.0.so;MODULE_SUFFIX=_vendor
vendor/lib64/vendor.qti.hardware.wigig.netperftuner@1.0.so
vendor/lib64/vendor.qti.power.pasrmanager@1.0.so
vendor/lib64/vendor.qti.voiceprint@1.0.so

View File

@@ -113,12 +113,3 @@ system_ext/etc/permissions/vzw_mvs_permissions.xml
system_ext/priv-app/MyVerizonServices/MyVerizonServices.apk;PRESIGNED
system_ext/priv-app/OBDM_Permissions/OBDM_Permissions.apk;PRESIGNED
system_ext/priv-app/obdm_stub/obdm_stub.apk;PRESIGNED
# vendor partition
# Wi-Fi service
vendor/bin/hw/vendor.google.wifi_ext-service-vendor|2f00a17b75612cbf8fb3685fe0d183148a70dd03
vendor/etc/init/vendor.google.wifi_ext-service.rc|8565ca57da131819441d6fb87abfcae134ed2ef9
vendor/etc/vintf/manifest/manifest_wifi_ext_aidl.xml|f273a6ab68268f73935c36bdecea0aad97cbe70f
vendor/lib64/google_wifi_firmware_config_info_cc_proto.so|b290b5ba92c6b505d2314e75d8c7269a1cc03942
vendor/lib64/vendor.google.wifi_ext-V3-ndk.so|9fcddf2e1eab7978f6c57270170b3f4a9aea04b8

1
crosshatch/setup-makefiles.py Executable file
View File

@@ -0,0 +1 @@
#!./extract-files.py --regenerate_makefiles

View File

@@ -1,40 +0,0 @@
#!/bin/bash
#
# SPDX-FileCopyrightText: 2016 The CyanogenMod Project
# SPDX-FileCopyrightText: 2017-2024 The LineageOS Project
# SPDX-License-Identifier: Apache-2.0
#
set -e
DEVICE=crosshatch
VENDOR=google
# Load extract_utils and do some sanity checks
MY_DIR="${BASH_SOURCE%/*}"
if [[ ! -d "${MY_DIR}" ]]; then MY_DIR="${PWD}"; fi
ANDROID_ROOT="${MY_DIR}/../../../.."
HELPER="${ANDROID_ROOT}/tools/extract-utils/extract_utils.sh"
if [ ! -f "${HELPER}" ]; then
echo "Unable to find helper script at ${HELPER}"
exit 1
fi
source "${HELPER}"
# Initialize the helper
setup_vendor "${DEVICE}" "${VENDOR}" "${ANDROID_ROOT}"
# Warning headers and guards
write_headers
write_makefiles "${MY_DIR}/proprietary-files.txt" true
write_makefiles "${MY_DIR}/proprietary-files-carriersettings.txt" true
write_makefiles "${MY_DIR}/proprietary-files-radio.txt" true
write_makefiles "${MY_DIR}/proprietary-files-vendor.txt" true
append_firmware_calls_to_makefiles "${MY_DIR}/proprietary-firmware.txt"
# Finish
write_footers

View File

@@ -20,6 +20,9 @@ include device/google/crosshatch/device-common.mk
DEVICE_PACKAGE_OVERLAYS += device/google/crosshatch/blueline/overlay
# CHRE
$(call soong_config_set,chre,chre_daemon_dsp_library,//vendor/google/blueline:libsdsprpc)
# SKU specific RROs
PRODUCT_PACKAGES += \
SettingsOverlayG013A \

View File

@@ -24,7 +24,7 @@ PRODUCT_PLATFORM := sdm845
include device/google/crosshatch/device.mk
# Ship GCam
$(call inherit-product, vendor/google/GoogleCamera/b1c1/config.mk)
$(call inherit-product, vendor/Camera/b1c1/config.mk)
# Target now uses mini_gapps
TARGET_USES_MINI_GAPPS := true
@@ -44,12 +44,6 @@ PRODUCT_PROPERTY_OVERRIDES += vendor.audio.adm.buffering.ms=3
PRODUCT_PROPERTY_OVERRIDES += audio_hal.period_multiplier=2
PRODUCT_PROPERTY_OVERRIDES += af.fast_track_multiplier=1
# Enable HW Codec 2.0 as default service
# Set all codec components are available with their normal ranks
# Set OMX components's default rank large than Codec 2.0 HW components's default rank (0x100)
PRODUCT_PROPERTY_OVERRIDES += debug.stagefright.ccodec=4
PRODUCT_PROPERTY_OVERRIDES += debug.stagefright.omx_default_rank=512
# Pixelstats broken mic detection
PRODUCT_PROPERTY_OVERRIDES += vendor.audio.mic_break=true
@@ -88,9 +82,6 @@ PRODUCT_PROPERTY_OVERRIDES += aaudio.mmap_exclusive_policy=2
# A low number, like 48, might increase power consumption or stress the system.
PRODUCT_PROPERTY_OVERRIDES += aaudio.hw_burst_min_usec=2000
# A2DP offload enabled for compilation
AUDIO_FEATURE_ENABLED_A2DP_OFFLOAD := true
# A2DP offload supported
PRODUCT_PROPERTY_OVERRIDES += \
ro.bluetooth.a2dp_offload.supported=true
@@ -103,6 +94,18 @@ persist.bluetooth.a2dp_offload.disabled=false
PRODUCT_PROPERTY_OVERRIDES += \
persist.bluetooth.a2dp_offload.cap=sbc-aac-aptx-aptxhd-ldac
# Audio
$(call soong_config_set,qtiaudio,feature_24bits_camcorder,true)
$(call soong_config_set,qtiaudio,feature_a2dp_offload,true)
$(call soong_config_set,qtiaudio,feature_cirrus_spkr_protection,true)
$(call soong_config_set,qtiaudio,feature_flicker_sensor_input,true)
$(call soong_config_set,qtiaudio,feature_hwdep_cal,true)
$(call soong_config_set,qtiaudio,feature_maxx_audio,true)
$(call soong_config_set,qtiaudio,feature_multi_voice_sessions,true)
$(call soong_config_set,qtiaudio,feature_snd_monitor,true)
$(call soong_config_set,qtiaudio,feature_usb_tunnel,true)
$(call soong_config_set,qtiaudio,feature_sound_trigger,true)
# Modem loging file
PRODUCT_COPY_FILES += \
device/google/crosshatch/init.logging.rc:$(TARGET_COPY_OUT_VENDOR)/etc/init/hw/init.$(PRODUCT_PLATFORM).logging.rc
@@ -122,8 +125,6 @@ PRODUCT_PACKAGES += \
PRODUCT_USE_DYNAMIC_PARTITIONS := true
PRODUCT_RETROFIT_DYNAMIC_PARTITIONS := true
PRODUCT_PACKAGES += \
bootctrl.sdm845 \
bootctrl.sdm845.recovery \
check_dynamic_partitions \
AB_OTA_POSTINSTALL_CONFIG += \

View File

@@ -20,6 +20,9 @@ include device/google/crosshatch/device-common.mk
DEVICE_PACKAGE_OVERLAYS += device/google/crosshatch/crosshatch/overlay
# CHRE
$(call soong_config_set,chre,chre_daemon_dsp_library,//vendor/google/crosshatch:libsdsprpc)
# SKU specific RROs
PRODUCT_PACKAGES += \
SettingsOverlayG013C \

View File

@@ -30,9 +30,18 @@ PRODUCT_COPY_FILES += \
# Google Assistant
PRODUCT_PRODUCT_PROPERTIES += ro.opa.eligible_device=true
# Lineage Health
include hardware/google/pixel/lineage_health/device.mk
$(call soong_config_set,lineage_health,charging_control_charging_path,/sys/class/power_supply/battery/charge_disable)
$(call soong_config_set,lineage_health,charging_control_charging_enabled,0)
$(call soong_config_set,lineage_health,charging_control_charging_disabled,1)
# LiveDisplay
PRODUCT_PACKAGES += \
vendor.lineage.livedisplay@2.0-service-sdm
vendor.lineage.livedisplay-service.sdm
$(call soong_config_set,livedisplay_sdm,enable_dm,false)
# Parts
PRODUCT_PACKAGES += \
@@ -43,75 +52,23 @@ PRODUCT_PACKAGES += \
PresencePolling \
RcsService
# Build necessary packages for product
# Display
PRODUCT_PACKAGES += \
vendor.display.config@1.0
# Build necessary packages for vendor
# Bluetooth
PRODUCT_PACKAGES += \
android.hardware.bluetooth@1.0.vendor \
hardware.google.bluetooth.bt_channel_avoidance@1.0.vendor \
hardware.google.bluetooth.sar@1.0.vendor:64 \
vendor.qti.hardware.bluetooth_audio@2.0.vendor
# CHRE
PRODUCT_PACKAGES += \
chre
# Codec2
PRODUCT_PACKAGES += \
android.hardware.media.c2@1.0.vendor:32 \
libavservices_minijail_vendor:32 \
libavservices_minijail.vendor:64 \
libcodec2_hidl@1.0.vendor:32 \
libcodec2_vndk.vendor \
libstagefright_bufferpool@2.0.1.vendor
chre_daemon_msm
# Configstore
PRODUCT_PACKAGES += \
disable_configstore
# Confirmation UI
PRODUCT_PACKAGES += \
android.hardware.confirmationui@1.0.vendor:64 \
libteeui_hal_support.vendor:64
# Display
PRODUCT_PACKAGES += \
vendor.display.config@1.0.vendor \
vendor.display.config@1.1.vendor \
vendor.display.config@1.2.vendor \
vendor.display.config@1.3.vendor
# HIDL
PRODUCT_PACKAGES += \
libhidltransport.vendor \
libhwbinder.vendor
$(call soong_config_set,qtidisplay,drmpp,true)
# Identity credential
PRODUCT_PACKAGES += \
android.hardware.identity-support-lib.vendor:64 \
android.hardware.identity_credential.xml
# Nos
PRODUCT_PACKAGES += \
libkeymaster4support.vendor:64 \
libkeymaster4_1support.vendor:64
# Json
PRODUCT_PACKAGES += \
libjson
# Protobuf
PRODUCT_PACKAGES += \
libprotobuf-cpp-full-vendorcompat \
libprotobuf-cpp-full-3.9.1-vendorcompat \
libprotobuf-cpp-lite-3.9.1-vendorcompat
# Telephony
PRODUCT_PACKAGES += \
qti-telephony-hidl-wrapper \
@@ -123,67 +80,7 @@ PRODUCT_PACKAGES += \
# VNDK FWK detect
PRODUCT_PACKAGES += \
libqti_vndfwk_detect.vendor \
libvndfwk_detect_jni.qti.vendor
# Wi-Fi
PRODUCT_PACKAGES += \
android.hardware.wifi-V2-ndk.vendor:64 \
android.hardware.wifi@1.0.vendor:64 \
libwifi-hal:64 \
libwifi-hal-qcom \
libwifi-system-iface.vendor:64
# Misc interfaces
PRODUCT_PACKAGES += \
android.frameworks.sensorservice@1.0.vendor \
android.frameworks.stats@1.0.vendor:64 \
android.hardware.authsecret@1.0.vendor:64 \
android.hardware.biometrics.fingerprint@2.1.vendor:64 \
android.hardware.biometrics.fingerprint@2.2.vendor:64 \
android.hardware.gatekeeper@1.0.vendor \
android.hardware.keymaster@3.0.vendor:32 \
android.hardware.keymaster@4.0.vendor:32 \
android.hardware.keymaster@4.1.vendor:64 \
android.hardware.neuralnetworks@1.0.vendor:64 \
android.hardware.neuralnetworks@1.1.vendor:64 \
android.hardware.neuralnetworks@1.2.vendor:64 \
android.hardware.neuralnetworks@1.3.vendor:64 \
android.hardware.oemlock@1.0.vendor:64 \
android.hardware.radio.config@1.0.vendor:64 \
android.hardware.radio.config@1.1.vendor:64 \
android.hardware.radio.config@1.2.vendor:64 \
android.hardware.radio.deprecated@1.0.vendor:64 \
android.hardware.radio@1.2.vendor:64 \
android.hardware.radio@1.3.vendor:64 \
android.hardware.radio@1.4.vendor:64 \
android.hardware.radio@1.5.vendor:64 \
android.hardware.secure_element@1.1.vendor:64 \
android.hardware.secure_element@1.2.vendor:64 \
android.hardware.sensors@1.0.vendor:32 \
android.hardware.sensors@2.0.vendor \
android.hardware.thermal@1.0.vendor:64 \
android.hardware.weaver@1.0.vendor:64 \
android.system.net.netd@1.1.vendor:64
# Misc
PRODUCT_PACKAGES += \
libcrypto_utils.vendor:64 \
libpng.vendor \
libsqlite.vendor \
libssl.vendor:32
# Properties
TARGET_VENDOR_PROP := $(LOCAL_PATH)/vendor.prop
# Shims
PRODUCT_PACKAGES += \
android.frameworks.stats-V1-ndk_platform.vendor:64 \
android.hardware.identity-V3-ndk_platform.vendor:64 \
android.hardware.keymaster-V3-ndk_platform.vendor:64 \
android.hardware.power-V1-ndk_platform.vendor:64 \
android.hardware.rebootescrow-V1-ndk_platform.vendor:64
# VNDK
PRODUCT_PACKAGES += \
libcrypto-v33

189
device.mk
View File

@@ -20,14 +20,12 @@ PRODUCT_SOONG_NAMESPACES += \
hardware/google/camera \
hardware/google/interfaces \
hardware/google/pixel \
hardware/qcom/sdm845 \
hardware/qcom/audio \
hardware/qcom/sdm845/display \
hardware/qcom/sdm845/gps \
hardware/qcom/wlan/legacy \
vendor/google/camera \
vendor/qcom/sdm845 \
vendor/google/interfaces \
vendor/google_devices/common/proprietary/confirmatioui_hal \
vendor/google_nos/host/android \
vendor/google_nos/test/system-test-harness
hardware/qcom-caf/bootctrl \
vendor/qcom/opensource/data-ipa-cfg-mgr-legacy-um
PRODUCT_PROPERTY_OVERRIDES += \
keyguard.no_require_sim=true
@@ -58,10 +56,6 @@ PRODUCT_PROPERTY_OVERRIDES += \
PRODUCT_PACKAGES += \
messaging
ifneq (,$(filter eng, $(TARGET_BUILD_VARIANT)))
PRODUCT_PACKAGES += chre_test_client
endif
LOCAL_PATH := device/google/crosshatch
SRC_MEDIA_HAL_DIR := hardware/qcom/media/sdm845
SRC_DISPLAY_HAL_DIR := hardware/qcom/display/sdm845
@@ -114,19 +108,10 @@ else
$(LOCAL_PATH)/init.hardware.xr.rc:$(TARGET_COPY_OUT_VENDOR)/etc/init/hw/init.$(PRODUCT_PLATFORM).rc
endif
ifneq (,$(filter eng, $(TARGET_BUILD_VARIANT)))
PRODUCT_COPY_FILES += \
$(LOCAL_PATH)/init.hardware.diag.rc.userdebug:$(TARGET_COPY_OUT_VENDOR)/etc/init/hw/init.$(PRODUCT_PLATFORM).diag.rc
PRODUCT_COPY_FILES += \
$(LOCAL_PATH)/init.hardware.mpssrfs.rc.userdebug:$(TARGET_COPY_OUT_VENDOR)/etc/init/hw/init.$(PRODUCT_PLATFORM).mpssrfs.rc
PRODUCT_COPY_FILES += \
$(LOCAL_PATH)/init.hardware.wlc.rc.userdebug:$(TARGET_COPY_OUT_VENDOR)/etc/init/init.$(PRODUCT_PLATFORM).wlc.rc
else
PRODUCT_COPY_FILES += \
$(LOCAL_PATH)/init.hardware.diag.rc.user:$(TARGET_COPY_OUT_VENDOR)/etc/init/hw/init.$(PRODUCT_PLATFORM).diag.rc
PRODUCT_COPY_FILES += \
$(LOCAL_PATH)/init.hardware.mpssrfs.rc.user:$(TARGET_COPY_OUT_VENDOR)/etc/init/hw/init.$(PRODUCT_PLATFORM).mpssrfs.rc
endif
PRODUCT_COPY_FILES += \
$(LOCAL_PATH)/init.hardware.diag.rc.user:$(TARGET_COPY_OUT_VENDOR)/etc/init/hw/init.$(PRODUCT_PLATFORM).diag.rc
PRODUCT_COPY_FILES += \
$(LOCAL_PATH)/init.hardware.mpssrfs.rc.user:$(TARGET_COPY_OUT_VENDOR)/etc/init/hw/init.$(PRODUCT_PLATFORM).mpssrfs.rc
#per device
PRODUCT_COPY_FILES += \
@@ -135,6 +120,10 @@ PRODUCT_COPY_FILES += \
$(LOCAL_PATH)/init.recovery.hardware.device.rc:recovery/root/init.recovery.crosshatch.rc \
$(LOCAL_PATH)/init.recovery.hardware.device.rc:recovery/root/init.recovery.blueline.rc \
# Partitions
PRODUCT_PACKAGES += \
vendor_firmware_mnt_mountpoint
MSM_VIDC_TARGET_LIST := sdm845 # Get the color format from kernel headers
MASTER_SIDE_CP_TARGET_LIST := sdm845 # ION specific settings
@@ -149,10 +138,6 @@ PRODUCT_PACKAGES += \
PRODUCT_PRODUCT_PROPERTIES += \
ro.sys.sdcardfs=1
PRODUCT_PACKAGES += \
bootctrl.sdm845 \
bootctrl.sdm845.recovery
# Userdata Checkpointing OTA GC
PRODUCT_PACKAGES += \
checkpoint_gc
@@ -175,16 +160,6 @@ AB_OTA_POSTINSTALL_CONFIG += \
PRODUCT_PACKAGES += \
update_engine_sideload
PRODUCT_PACKAGES_DEBUG += \
sg_write_buffer \
f2fs_io \
check_f2fs
# The following modules are included in debuggable builds only.
PRODUCT_PACKAGES_DEBUG += \
bootctl \
update_engine_client
# Write flags to the vendor space in /misc partition.
PRODUCT_PACKAGES += \
misc_writer
@@ -226,8 +201,6 @@ PRODUCT_COPY_FILES += \
frameworks/native/data/etc/android.hardware.nfc.hce.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.hce.xml \
frameworks/native/data/etc/android.hardware.nfc.hcef.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.hcef.xml \
frameworks/native/data/etc/com.nxp.mifare.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/com.nxp.mifare.xml \
frameworks/native/data/etc/android.hardware.vr.headtracking-0.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.vr.headtracking.xml \
frameworks/native/data/etc/android.hardware.vr.high_performance.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.vr.high_performance.xml \
frameworks/native/data/etc/android.hardware.vulkan.level-1.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.vulkan.level.xml \
frameworks/native/data/etc/android.hardware.vulkan.compute-0.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.vulkan.compute.xml \
frameworks/native/data/etc/android.hardware.vulkan.version-1_1.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.vulkan.version.xml \
@@ -342,15 +315,14 @@ PRODUCT_COPY_FILES += \
$(LOCAL_PATH)/WCNSS_qcom_cfg.ini:$(TARGET_COPY_OUT_VENDOR)/firmware/wlan/qca_cld/WCNSS_qcom_cfg.ini \
PRODUCT_PACKAGES += \
hwcomposer.sdm845 \
hwcomposer.qcom \
android.hardware.graphics.composer@2.3-service \
gralloc.sdm845 \
android.hardware.graphics.mapper@2.0-impl-qti-display \
vendor.qti.hardware.display.allocator@1.0-service
# RenderScript HAL
PRODUCT_PACKAGES += \
android.hardware.renderscript@1.0-impl
PRODUCT_PROPERTY_OVERRIDES += \
ro.hardware.hwcomposer=qcom
# Health HAL
PRODUCT_PACKAGES += \
@@ -365,14 +337,13 @@ PRODUCT_PACKAGES += \
PRODUCT_PACKAGES += \
lights.qcom \
hardware.google.light@1.0-service
PRODUCT_PROPERTY_OVERRIDES += \
ro.hardware.lights=qcom
# Memtrack HAL
PRODUCT_PACKAGES += \
memtrack.sdm845 \
android.hardware.memtrack@1.0-impl \
android.hardware.memtrack@1.0-service
vendor.qti.hardware.memtrack-service
# Bluetooth SoC
PRODUCT_PROPERTY_OVERRIDES += \
@@ -398,9 +369,7 @@ PRODUCT_PACKAGES += \
# NFC and Secure Element packages
PRODUCT_PACKAGES += \
NfcNci \
Tag \
SecureElement \
android.hardware.nfc@1.2-service \
android.hardware.secure_element@1.1-service-disabled
@@ -429,22 +398,6 @@ PRODUCT_PACKAGES += \
PRODUCT_PACKAGES += \
android.hardware.usb.gadget-service.crosshatch
PRODUCT_PACKAGES += \
libmm-omxcore \
libOmxCore \
libstagefrighthw \
libOmxVdec \
libOmxVenc \
libc2dcolorconvert
# Enable Codec 2.0
PRODUCT_PROPERTY_OVERRIDES += \
debug.media.codec2=2 \
# Disable OMX
PRODUCT_PROPERTY_OVERRIDES += \
vendor.media.omx=0 \
# Create input surface on the framework side
PRODUCT_PROPERTY_OVERRIDES += \
debug.stagefright.c2inputsurface=-1 \
@@ -460,16 +413,6 @@ PRODUCT_PACKAGES += \
android.hardware.camera.provider@2.4-service_64 \
camera.device@3.2-impl
# Google Camera HAL test libraries in debug builds
ifneq (,$(filter eng, $(TARGET_BUILD_VARIANT)))
PRODUCT_PACKAGES_DEBUG += \
libgoogle_camera_hal_proprietary_tests \
libgoogle_camera_hal_tests
endif
PRODUCT_PACKAGES += \
sensors.$(PRODUCT_HARDWARE)
PRODUCT_COPY_FILES += \
$(LOCAL_PATH)/sensors/hals.conf:vendor/etc/sensors/hals.conf
@@ -485,18 +428,12 @@ PRODUCT_PACKAGES += \
PRODUCT_PACKAGES += \
android.hardware.contexthub@1.2-service.generic
# CHRE tools
ifneq (,$(filter eng, $(TARGET_BUILD_VARIANT)))
PRODUCT_PACKAGES += \
chre_power_test_client \
chre_test_client
endif
# Boot control HAL
PRODUCT_PACKAGES += \
android.hardware.boot@1.2-impl-pixel-legacy \
android.hardware.boot@1.2-impl-pixel-legacy.recovery \
android.hardware.boot@1.2-service \
android.hardware.boot-service.qti \
android.hardware.boot-service.qti.recovery
$(call soong_config_set,QTI_GPT_UTILS,USE_BSG_FRAMEWORK,false)
# Vibrator HAL
PRODUCT_PACKAGES += \
@@ -517,25 +454,17 @@ USE_QCRIL_OEMHOOK := true
PRODUCT_COPY_FILES += \
$(LOCAL_PATH)/sec_config:$(TARGET_COPY_OUT_VENDOR)/etc/sec_config
HOSTAPD := hostapd
ifneq (,$(filter eng, $(TARGET_BUILD_VARIANT)))
HOSTAPD += hostapd_cli
endif
PRODUCT_PACKAGES += $(HOSTAPD)
WPA := wpa_supplicant.conf
WPA += wpa_supplicant
PRODUCT_PACKAGES += $(WPA)
ifneq (,$(filter eng, $(TARGET_BUILD_VARIANT)))
PRODUCT_PACKAGES += wpa_cli
endif
# Wifi
PRODUCT_PACKAGES += \
android.hardware.wifi-service \
wificond \
libwpa_client \
WifiOverlay
# Connectivity
@@ -564,15 +493,6 @@ PRODUCT_PACKAGES += \
android.hardware.bluetooth.audio@2.0-impl \
android.hardware.audio.service
ifneq (,$(filter eng, $(TARGET_BUILD_VARIANT)))
PRODUCT_PACKAGES += \
tinyplay \
tinycap \
tinymix \
tinypcminfo \
cplay
endif
PRODUCT_COPY_FILES += \
$(LOCAL_PATH)/audio_policy_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_configuration.xml \
$(LOCAL_PATH)/audio_policy_configuration_a2dp_offload_disabled.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_configuration_a2dp_offload_disabled.xml \
@@ -595,8 +515,7 @@ PRODUCT_COPY_FILES += \
PRODUCT_COPY_FILES += \
$(LOCAL_PATH)/media_codecs.xml:$(TARGET_COPY_OUT_VENDOR)/etc/media_codecs.xml \
$(LOCAL_PATH)/media_codecs_performance.xml:$(TARGET_COPY_OUT_VENDOR)/etc/media_codecs_performance.xml \
$(LOCAL_PATH)/media_profiles_V1_0.xml:$(TARGET_COPY_OUT_VENDOR)/etc/media_profiles_V1_0.xml \
$(LOCAL_PATH)/media_codecs_omx.xml:$(TARGET_COPY_OUT_VENDOR)/etc/media_codecs_omx.xml \
$(LOCAL_PATH)/media_profiles_V1_0.xml:$(TARGET_COPY_OUT_VENDOR)/etc/media_profiles_V1_0.xml
PRODUCT_PROPERTY_OVERRIDES += \
audio.snd_card.open.retries=50
@@ -608,27 +527,10 @@ PRODUCT_COPY_FILES += \
PRODUCT_COPY_FILES += \
$(LOCAL_PATH)/gps.conf:$(TARGET_COPY_OUT_VENDOR)/etc/gps.conf
# Vendor seccomp policy files for media components:
PRODUCT_COPY_FILES += \
$(LOCAL_PATH)/seccomp_policy/mediacodec.policy:$(TARGET_COPY_OUT_VENDOR)/etc/seccomp_policy/mediacodec.policy
ifneq (,$(filter eng, $(TARGET_BUILD_VARIANT)))
# Subsystem ramdump
PRODUCT_PROPERTY_OVERRIDES += \
persist.vendor.sys.ssr.enable_ramdumps=1
endif
# Subsystem silent restart
PRODUCT_PROPERTY_OVERRIDES += \
persist.vendor.sys.ssr.restart_level=modem,slpi,adsp
ifneq (,$(filter eng, $(TARGET_BUILD_VARIANT)))
# Sensor debug flag
PRODUCT_PROPERTY_OVERRIDES += \
persist.vendor.debug.ash.logger=0 \
persist.vendor.debug.ash.logger.time=0
endif
# setup dalvik vm configs
$(call inherit-product, frameworks/native/build/phone-xhdpi-4096-dalvik-heap.mk)
@@ -649,16 +551,6 @@ PRODUCT_COPY_FILES += \
PRODUCT_PACKAGES += \
charger_res_images
ifneq (,$(filter eng, $(TARGET_BUILD_VARIANT)))
# b/36703476: Set default log size to 1M
PRODUCT_PROPERTY_OVERRIDES += \
ro.logd.size=1M
# b/114766334: persist all logs by default rotating on 30 files of 1MiB
PRODUCT_PROPERTY_OVERRIDES += \
logd.logpersistd=logcatd \
logd.logpersistd.size=30
endif
# Dumpstate HAL
PRODUCT_PACKAGES += \
android.hardware.dumpstate@1.1-service.crosshatch
@@ -707,8 +599,6 @@ PRODUCT_COPY_FILES += \
device/google/crosshatch/vibrator/cs40l20/cs40l20.wmfw:$(TARGET_COPY_OUT_VENDOR)/firmware/cs40l20.wmfw \
device/google/crosshatch/vibrator/cs40l20/cs40l20.bin:$(TARGET_COPY_OUT_VENDOR)/firmware/cs40l20.bin
PRODUCT_VENDOR_KERNEL_HEADERS := device/google/crosshatch/sdm845/kernel-headers
# Audio ACDB data
PRODUCT_COPY_FILES += \
device/google/crosshatch/acdbdata/OEM/sdm845-tavil-snd-card/Bluetooth_cal.acdb:$(TARGET_COPY_OUT_VENDOR)/etc/acdbdata/OEM/sdm845-tavil-snd-card/Bluetooth_cal.acdb \
@@ -737,14 +627,6 @@ PRODUCT_COPY_FILES += \
device/google/crosshatch/acdbdata/OEM/sdm845-tavil-c1-snd-card/Codec_cal.acdb:$(TARGET_COPY_OUT_VENDOR)/etc/acdbdata/OEM/sdm845-tavil-c1-snd-card/Codec_cal.acdb \
device/google/crosshatch/acdbdata/adsp_avs_config.acdb:$(TARGET_COPY_OUT_VENDOR)/etc/acdbdata/adsp_avs_config.acdb
# Audio ACDB workspace files for QACT
ifneq (,$(filter eng, $(TARGET_BUILD_VARIANT)))
PRODUCT_COPY_FILES += \
device/google/crosshatch/acdbdata/OEM/sdm845-tavil-snd-card/workspaceFile.qwsp:$(TARGET_COPY_OUT_VENDOR)/etc/acdbdata/OEM/sdm845-tavil-snd-card/workspaceFile.qwsp \
device/google/crosshatch/acdbdata/OEM/sdm845-tavil-b1-snd-card/workspaceFile.qwsp:$(TARGET_COPY_OUT_VENDOR)/etc/acdbdata/OEM/sdm845-tavil-b1-snd-card/workspaceFile.qwsp \
device/google/crosshatch/acdbdata/OEM/sdm845-tavil-c1-snd-card/workspaceFile.qwsp:$(TARGET_COPY_OUT_VENDOR)/etc/acdbdata/OEM/sdm845-tavil-c1-snd-card/workspaceFile.qwsp
endif
# CS35L36 Speaker Tuning
PRODUCT_COPY_FILES += \
device/google/crosshatch/audio/crus_sp_config_b1_rx.bin:$(TARGET_COPY_OUT_VENDOR)/firmware/crus_sp_config_b1_rx.bin \
@@ -763,23 +645,11 @@ PRODUCT_PROPERTY_OVERRIDES += \
ro.radio.log_prefix="modem_log_"
# Enable modem logging for debug
ifneq (,$(filter eng, $(TARGET_BUILD_VARIANT)))
PRODUCT_PROPERTY_OVERRIDES += \
persist.vendor.sys.modem.diag.mdlog=true
else
PRODUCT_PROPERTY_OVERRIDES += \
persist.vendor.sys.modem.diag.mdlog=false
endif
PRODUCT_PROPERTY_OVERRIDES += \
persist.vendor.sys.modem.diag.mdlog_br_num=5
# Enable tcpdump_logger on eng
ifneq (,$(filter eng, $(TARGET_BUILD_VARIANT)))
PRODUCT_PROPERTY_OVERRIDES += \
persist.vendor.tcpdump.log.alwayson=false \
persist.vendor.tcpdump.log.br_num=5
endif
# Preopt SystemUI
PRODUCT_DEXPREOPT_SPEED_APPS += SystemUIGoogle # For internal
PRODUCT_DEXPREOPT_SPEED_APPS += SystemUI # For AOSP
@@ -793,12 +663,6 @@ TARGET_LMKD_STATS_LOG := true
PRODUCT_PRODUCT_PROPERTIES += \
ro.lmk.log_stats=true
# default usb oem functions
ifneq (,$(filter eng, $(TARGET_BUILD_VARIANT)))
PRODUCT_PROPERTY_OVERRIDES += \
persist.vendor.usb.usbradio.config=diag
endif
# Early phase offset configuration for SurfaceFlinger (b/75985430)
PRODUCT_PROPERTY_OVERRIDES += \
debug.sf.early_phase_offset_ns=500000
@@ -854,13 +718,8 @@ PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.surface_flinger.use_color_management=tr
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.surface_flinger.protected_contents=true
# Vendor verbose logging default property
ifneq (,$(filter eng, $(TARGET_BUILD_VARIANT)))
PRODUCT_PROPERTY_OVERRIDES += \
persist.vendor.verbose_logging_enabled=true
else
PRODUCT_PROPERTY_OVERRIDES += \
persist.vendor.verbose_logging_enabled=false
endif
# Pixel Logger
include hardware/google/pixel/PixelLogger/PixelLogger.mk

View File

@@ -1,5 +1,5 @@
//
// Copyright (C) 2018 The Android Open Source Project
// Copyright 2016 The Android Open Source Project
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
@@ -14,35 +14,34 @@
// limitations under the License.
//
package {
// See: http://go/android-license-faq
// A large-scale-change added 'default_applicable_licenses' to import
// all of the 'license_kinds' from "device_google_crosshatch_license"
// to get the below license kinds:
// SPDX-license-identifier-BSD
default_applicable_licenses: ["device_google_crosshatch_license"],
default_applicable_licenses: [
"Android-Apache-2.0",
],
}
cc_library {
name: "libgptutils.crosshatch",
vendor: true,
recovery_available: true,
cc_binary {
name: "android.hardware.dumpstate@1.1-service.crosshatch",
init_rc: ["android.hardware.dumpstate@1.1-service.crosshatch.rc"],
relative_install_path: "hw",
srcs: [
"DumpstateDevice.cpp",
"service.cpp",
],
shared_libs: [
"android.hardware.dumpstate@1.0",
"android.hardware.dumpstate@1.1",
"libbase",
"libcutils",
"libdumpstateutil",
"libhidlbase",
"liblog",
"libz",
"libutils",
],
cflags: [
"-Wall",
"-Werror",
"-Wall",
],
srcs: [
"gpt-utils.cpp",
],
owner: "qti",
header_libs: [
"device_kernel_headers",
],
export_include_dirs: ["."],
proprietary: true,
}

View File

@@ -1,44 +0,0 @@
#
# Copyright 2016 The Android Open Source Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
LOCAL_PATH:= $(call my-dir)
include $(CLEAR_VARS)
LOCAL_MODULE := android.hardware.dumpstate@1.1-service.crosshatch
LOCAL_LICENSE_KINDS := SPDX-license-identifier-Apache-2.0
LOCAL_LICENSE_CONDITIONS := notice
LOCAL_INIT_RC := android.hardware.dumpstate@1.1-service.crosshatch.rc
LOCAL_MODULE_RELATIVE_PATH := hw
LOCAL_SRC_FILES := \
DumpstateDevice.cpp \
service.cpp
LOCAL_SHARED_LIBRARIES := \
android.hardware.dumpstate@1.0 \
android.hardware.dumpstate@1.1 \
libbase \
libcutils \
libdumpstateutil \
libhidlbase \
liblog \
libutils
LOCAL_CFLAGS := -Werror -Wall
LOCAL_MODULE_TAGS := optional
LOCAL_PROPRIETARY_MODULE := true
include $(BUILD_EXECUTABLE)

View File

@@ -1,7 +1,9 @@
[
{
"repository": "device_google_gs-common",
"target_path": "device/google/gs-common"
"repository": "LineageOS/android_packages_apps_ElmyraService",
"target_path": "packages/apps/ElmyraService",
"remote": "github-non-los",
"branch": "lineage-22.2"
},
{
"repository": "kernel_google_b1c1",
@@ -16,15 +18,15 @@
"target_path": "vendor/google/blueline"
},
{
"repository": "Oneloutre/vendor_google_GoogleCamera",
"target_path": "vendor/google/GoogleCamera/b1c1",
"repository": "Oneloutre/vendor_Camera",
"target_path": "vendor/Camera/b1c1",
"remote": "github-non-los",
"branch": "b1c1"
},
{
"repository": "LineageOS/android_packages_apps_ElmyraService",
"target_path": "packages/apps/ElmyraService",
"repository": "LineageOS/android_device_google_gs-common",
"target_path": "device/google/gs-common",
"remote": "github-non-los",
"branch": "lineage-21.0"
"branch": "lineage-22.2"
}
]
]

13
extract-files.py Executable file
View File

@@ -0,0 +1,13 @@
#!/bin/bash
#
# SPDX-FileCopyrightText: 2024 The LineageOS Project
# SPDX-License-Identifier: Apache-2.0
#
set -e
MY_DIR="$(cd "$(dirname "${0}")"; pwd -P)"
pushd "${MY_DIR}/crosshatch"
./extract-files.py $@
popd

View File

@@ -1,13 +0,0 @@
#!/bin/bash
#
# Copyright (C) 2016 The CyanogenMod Project
# Copyright (C) 2017-2021 The LineageOS Project
#
# SPDX-License-Identifier: Apache-2.0
#
set -e
MY_DIR="$(cd "$(dirname "${0}")"; pwd -P)"
"${MY_DIR}/crosshatch/extract-files.sh" "$@"

File diff suppressed because it is too large Load Diff

View File

@@ -1,196 +0,0 @@
/*
* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* * Neither the name of The Linux Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __GPT_UTILS_H__
#define __GPT_UTILS_H__
#include <vector>
#include <string>
#include <map>
#ifdef __cplusplus
extern "C" {
#endif
#include <unistd.h>
#include <stdlib.h>
/******************************************************************************
* GPT HEADER DEFINES
******************************************************************************/
#define GPT_SIGNATURE "EFI PART"
#define HEADER_SIZE_OFFSET 12
#define HEADER_CRC_OFFSET 16
#define PRIMARY_HEADER_OFFSET 24
#define BACKUP_HEADER_OFFSET 32
#define FIRST_USABLE_LBA_OFFSET 40
#define LAST_USABLE_LBA_OFFSET 48
#define PENTRIES_OFFSET 72
#define PARTITION_COUNT_OFFSET 80
#define PENTRY_SIZE_OFFSET 84
#define PARTITION_CRC_OFFSET 88
#define TYPE_GUID_OFFSET 0
#define TYPE_GUID_SIZE 16
#define PTN_ENTRY_SIZE 128
#define UNIQUE_GUID_OFFSET 16
#define FIRST_LBA_OFFSET 32
#define LAST_LBA_OFFSET 40
#define ATTRIBUTE_FLAG_OFFSET 48
#define PARTITION_NAME_OFFSET 56
#define MAX_GPT_NAME_SIZE 72
/******************************************************************************
* AB RELATED DEFINES
******************************************************************************/
//Bit 48 onwords in the attribute field are the ones where we are allowed to
//store our AB attributes.
#define AB_FLAG_OFFSET (ATTRIBUTE_FLAG_OFFSET + 6)
#define GPT_DISK_INIT_MAGIC 0xABCD
#define AB_PARTITION_ATTR_SLOT_ACTIVE (0x1<<2)
#define AB_PARTITION_ATTR_BOOT_SUCCESSFUL (0x1<<6)
#define AB_PARTITION_ATTR_UNBOOTABLE (0x1<<7)
#define AB_SLOT_ACTIVE_VAL 0xF
#define AB_SLOT_INACTIVE_VAL 0x0
#define AB_SLOT_ACTIVE 1
#define AB_SLOT_INACTIVE 0
#define AB_SLOT_A_SUFFIX "_a"
#define AB_SLOT_B_SUFFIX "_b"
#define PTN_XBL "xbl"
#define PTN_SWAP_LIST PTN_XBL, \
"abl", "aop", "apdp", "cmnlib", "cmnlib64", \
"devcfg", "dtbo", "hyp", "keymaster", "msadp", \
"qupfw", "storsec", "tz", "vbmeta", "vbmeta_system", "xbl_config"
#define AB_PTN_LIST PTN_SWAP_LIST, "boot", "system", "vendor", "modem", "system_ext", "product"
#define BOOT_DEV_DIR "/dev/block/bootdevice/by-name"
/******************************************************************************
* HELPER MACROS
******************************************************************************/
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
/******************************************************************************
* TYPES
******************************************************************************/
enum boot_update_stage {
UPDATE_MAIN = 1,
UPDATE_BACKUP,
UPDATE_FINALIZE
};
enum gpt_instance {
PRIMARY_GPT = 0,
SECONDARY_GPT
};
enum boot_chain {
NORMAL_BOOT = 0,
BACKUP_BOOT
};
struct gpt_disk {
//GPT primary header
uint8_t *hdr;
//primary header crc
uint32_t hdr_crc;
//GPT backup header
uint8_t *hdr_bak;
//backup header crc
uint32_t hdr_bak_crc;
//Partition entries array
uint8_t *pentry_arr;
//Partition entries array for backup table
uint8_t *pentry_arr_bak;
//Size of the pentry array
uint32_t pentry_arr_size;
//Size of each element in the pentry array
uint32_t pentry_size;
//CRC of the partition entry array
uint32_t pentry_arr_crc;
//CRC of the backup partition entry array
uint32_t pentry_arr_bak_crc;
//Path to block dev representing the disk
char devpath[PATH_MAX];
//Block size of disk
uint32_t block_size;
uint32_t is_initialized;
};
/******************************************************************************
* FUNCTION PROTOTYPES
******************************************************************************/
int prepare_boot_update(enum boot_update_stage stage);
//GPT disk methods
struct gpt_disk* gpt_disk_alloc();
//Free previously allocated gpt_disk struct
void gpt_disk_free(struct gpt_disk *disk);
//Get the details of the disk holding the partition whose name
//is passed in via dev
int gpt_disk_get_disk_info(const char *dev, struct gpt_disk *disk);
//Get pointer to partition entry from a allocated gpt_disk structure
uint8_t* gpt_disk_get_pentry(struct gpt_disk *disk,
const char *partname,
enum gpt_instance instance);
//Update the crc fields of the modified disk structure
int gpt_disk_update_crc(struct gpt_disk *disk);
//Write the contents of struct gpt_disk back to the actual disk
int gpt_disk_commit(struct gpt_disk *disk);
//Return if the current device is UFS based or not
int gpt_utils_is_ufs_device();
//Swtich betwieen using either the primary or the backup
//boot LUN for boot. This is required since UFS boot partitions
//cannot have a backup GPT which is what we use for failsafe
//updates of the other 'critical' partitions. This function will
//not be invoked for emmc targets and on UFS targets is only required
//to be invoked for XBL.
//
//The algorithm to do this is as follows:
//- Find the real block device(eg: /dev/block/sdb) that corresponds
// to the /dev/block/bootdevice/by-name/xbl(bak) symlink
//
//- Once we have the block device 'node' name(sdb in the above example)
// use this node to to locate the scsi generic device that represents
// it by checking the file /sys/block/sdb/device/scsi_generic/sgY
//
//- Once we locate sgY we call the query ioctl on /dev/sgy to switch
//the boot lun to either LUNA or LUNB
int gpt_utils_set_xbl_boot_partition(enum boot_chain chain);
//Given a vector of partition names as a input and a reference to a map,
//populate the map to indicate which physical disk each of the partitions
//sits on. The key in the map is the path to the block device where the
//partition lies and the value is a vector of strings indicating which of
//the passed in partition names sits on that device.
int gpt_utils_get_partition_map(std::vector<std::string>& partition_list,
std::map<std::string,std::vector<std::string>>& partition_map);
#ifdef __cplusplus
}
#endif
#endif /* __GPT_UTILS_H__ */

View File

@@ -1,117 +0,0 @@
#
# Copyright (C) 2016 The Android Open-Source Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
on init
chmod 666 /dev/diag
on post-fs-data
# Modem logging collection
mkdir /data/vendor/radio 0777 radio radio
mkdir /data/vendor/radio/diag_logs 0777 system system
rm /data/vendor/radio/diag_logs/logs/diag_poweron_log.qmdl
# WLAN logging collection
mkdir /data/vendor/wifi 0777 system system
mkdir /data/vendor/wifi/cnss_diag 0777 system system
service diag_mdlog_start /vendor/bin/diag_mdlog
class late_start
user shell
group system diag media_rw
socket diag_router stream 0666 system system
disabled
oneshot
service diag_mdlog_stop /vendor/bin/diag_mdlog -k
class late_start
user shell
group system diag media_rw
disabled
oneshot
on boot && property:persist.vendor.sys.modem.diag.mdlog=*
rm /data/vendor/radio/diag_logs/diag_mdlog_pid
setprop vendor.sys.modem.diag.mdlog ${persist.vendor.sys.modem.diag.mdlog}
on property:vendor.sys.modem.diag.mdlog=true && property:persist.vendor.verbose_logging_enabled=true
start diag_mdlog_start
on property:vendor.sys.modem.diag.mdlog=false
start diag_mdlog_stop
on property:persist.vendor.sys.cnss.diag_qxdm=true
start vendor.cnss_diag
on property:persist.vendor.sys.cnss.diag_qxdm=false
stop vendor.cnss_diag
on property:persist.vendor.sys.cnss.diag_txt=true
start vendor.cnss_diag_txt
on property:persist.vendor.sys.cnss.diag_txt=false
stop vendor.cnss_diag_txt
service vendor.cnss_diag /vendor/bin/cnss_diag -q -u -w
class late_start
user system
group system
disabled
oneshot
service vendor.cnss_diag_txt /vendor/bin/cnss_diag -s -f -m /data/vendor/wifi/cnss_diag/cnss_diag.conf
class late_start
user system
group system
disabled
oneshot
on property:vendor.debug.ramdump.force_crash=true
write /proc/sysrq-trigger "c"
on property:ro.vendor.bluetooth.ftm_enabled=true
start ftmd
service ftmd /vendor/bin/ftmdaemon
class late_start
user root
group bluetooth net_bt_admin misc diag net_bt
disabled
oneshot
on property:vendor.sys.logger.bluetooth=true
setprop persist.vendor.service.bdroid.snooplog true
setprop persist.vendor.service.bdroid.fwsnoop true
on property:vendor.sys.logger.bluetooth=false
setprop persist.vendor.service.bdroid.snooplog false
setprop persist.vendor.service.bdroid.fwsnoop false
on property:persist.bluetooth.btsnoopenable=true
setprop persist.vendor.service.bdroid.soclog true
on property:persist.bluetooth.btsnoopenable=false
setprop persist.vendor.service.bdroid.soclog false
on property:vendor.usb.config=*
start usbd
on property:persist.vendor.usb.usbradio.config=*
start usbd
on property:power.battery_input.suspended=true
write /sys/class/power_supply/battery/input_suspend 1
on property:power.battery_input.suspended=false
write /sys/class/power_supply/battery/input_suspend 0

View File

@@ -1,11 +0,0 @@
on post-fs-data
# Modem Remote FS
mkdir /data/vendor/rfs 0770 vendor_rfs system
mkdir /data/vendor/rfs/mpss 0770 vendor_rfs system
mkdir /data/vendor/tombstones/rfs 0770 vendor_rfs system
write /data/vendor/rfs/mpss/mcfg_nv_list_flag "1"
chown vendor_rfs vendor_rfs /data/vendor/rfs/mpss/mcfg_nv_list_flag
chmod 0700 /data/vendor/rfs/mpss/mcfg_nv_list_flag
on property:vendor.sys.modem.diag.efsdump=true
chmod 0660 /data/vendor/rfs/mpss/modem_efs

View File

@@ -290,9 +290,6 @@ on post-fs-data
on zygote-start
# zygote is started in common init.rc
# and now we can continue initialize /data/
mkdir /data/vendor/ipa 0770 radio radio
chown radio radio /data/vendor/ipa
# Create the directories used by the Wireless subsystem
mkdir /data/vendor/wifi 0771 wifi wifi
mkdir /data/vendor/wifi/wpa 0770 wifi wifi
@@ -663,11 +660,6 @@ service cnss-daemon /vendor/bin/cnss-daemon -n -l
user system
group system inet wifi
service ipacm /vendor/bin/ipacm
class main
user radio
group radio inet
service loc_launcher /vendor/bin/loc_launcher
class late_start
group gps inet diag wifi

View File

@@ -1,24 +0,0 @@
#
# Copyright (C) 2018 The Android Open-Source Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
on property:sys.boot_completed=1 && property:persist.vendor.limit.wlc.current=1
write /sys/class/power_supply/dc/current_max 75000
on property:sys.boot_completed=1 && property:persist.vendor.limit.wlc.current=0
write /sys/class/power_supply/dc/current_max 1100000
on property:vendor.disable.wlc=1
write /sys/class/power_supply/wireless/online 0

View File

@@ -22,9 +22,8 @@ TARGET_SCREEN_HEIGHT := 2160
TARGET_SCREEN_WIDTH := 1080
PRODUCT_BUILD_PROP_OVERRIDES += \
TARGET_PRODUCT=blueline \
PRIVATE_BUILD_DESC="blueline-user 12 SP1A.210812.016.C2 8618562 release-keys"
BUILD_FINGERPRINT := google/blueline/blueline:12/SP1A.210812.016.C2/8618562:user/release-keys
BuildDesc="blueline-user 12 SP1A.210812.016.C2 8618562 release-keys" \
BuildFingerprint=google/blueline/blueline:12/SP1A.210812.016.C2/8618562:user/release-keys \
DeviceProduct=blueline
$(call inherit-product, vendor/google/blueline/blueline-vendor.mk)

View File

@@ -22,9 +22,8 @@ TARGET_SCREEN_HEIGHT := 2960
TARGET_SCREEN_WIDTH := 1440
PRODUCT_BUILD_PROP_OVERRIDES += \
TARGET_PRODUCT=crosshatch \
PRIVATE_BUILD_DESC="crosshatch-user 12 SP1A.210812.016.C2 8618562 release-keys"
BUILD_FINGERPRINT := google/crosshatch/crosshatch:12/SP1A.210812.016.C2/8618562:user/release-keys
BuildDesc="crosshatch-user 12 SP1A.210812.016.C2 8618562 release-keys" \
BuildFingerprint=google/crosshatch/crosshatch:12/SP1A.210812.016.C2/8618562:user/release-keys \
DeviceProduct=crosshatch
$(call inherit-product, vendor/google/crosshatch/crosshatch-vendor.mk)

View File

@@ -1,11 +0,0 @@
<manifest version="1.0" type="device">
<hal format="hidl">
<name>vendor.lineage.livedisplay</name>
<transport>hwbinder</transport>
<version>2.0</version>
<interface>
<name>IPictureAdjustment</name>
<instance>default</instance>
</interface>
</hal>
</manifest>

View File

@@ -148,28 +148,6 @@
<instance>default</instance>
</interface>
</hal>
<hal format="hidl">
<name>android.hardware.media.omx</name>
<transport>hwbinder</transport>
<version>1.0</version>
<interface>
<name>IOmx</name>
<instance>default</instance>
</interface>
<interface>
<name>IOmxStore</name>
<instance>default</instance>
</interface>
</hal>
<hal format="hidl">
<name>android.hardware.memtrack</name>
<transport>hwbinder</transport>
<version>1.0</version>
<interface>
<name>IMemtrack</name>
<instance>default</instance>
</interface>
</hal>
<hal format="hidl">
<name>android.hardware.neuralnetworks</name>
<transport>hwbinder</transport>
@@ -229,15 +207,6 @@
<instance>default</instance>
</interface>
</hal>
<hal format="hidl">
<name>android.hardware.renderscript</name>
<transport arch="32+64">passthrough</transport>
<version>1.0</version>
<interface>
<name>IDevice</name>
<instance>default</instance>
</interface>
</hal>
<hal format="hidl">
<name>android.hardware.sensors</name>
<transport>hwbinder</transport>
@@ -268,7 +237,7 @@
<hal format="hidl">
<name>android.hardware.tetheroffload.control</name>
<transport>hwbinder</transport>
<version>1.0</version>
<version>1.1</version>
<interface>
<name>IOffloadControl</name>
<instance>default</instance>

View File

@@ -16,7 +16,6 @@
<MediaCodecs>
<Include href="media_codecs_c2.xml" />
<Include href="media_codecs_omx.xml" />
<Settings>
<Setting name="max-video-encoder-input-buffers" value="11" />
<Domain name="telephony" enabled="true" />

View File

@@ -1,252 +0,0 @@
<?xml version="1.0" encoding="utf-8" ?>
<!-- Copyright (C) 2018 The Android Open Source Project
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
-->
<!--
845 Non-Secure decoder capabilities
_________________________________________________________
| Codec | W H fps Mbps MB/s |
|_____________|_________________________________________|
| h264 | 4096 2160 60 120 2073600 |
| | (4096) (2304) (30) (120) |
| hevc | 4096 2160 60 120 2073600 |
| | (4096) (2304) (30) (120) |
| mpeg4-sw | 1920 1088 30 40 244800 |
| vp8 | 4096 2160 30 120 1036800 |
| | (4096) (2304) (24) (120) |
| vp9 | 4096 2160 60 120 2073600 |
| | (4096) (2304) (30) (120) |
| vc1 | 1920 1088 30 20 244800 |
| div4/5/6-sw | 1920 1088 30 10 244800 |
| h263-sw | 864 480 30 16 48600 |
| mpeg2 | 1920 1088 30 40 244800 |
|_____________|_________________________________________|
845 Secure decoder capabilities
______________________________________________________
| Codec | W H fps Mbps MB/s |
|__________|_________________________________________|
| h264 | 4096 2160 60 40 2073600 |
| | (4096) (2304) (30) (40) |
| vp9 | 4096 2160 60 40 2073600 |
| | (4096) (2304) (30) (40) |
| hevc | 4096 2160 60 40 2073600 |
| | (4096) (2304) (30) (40) |
| mpeg2 | 1920 1088 30 40 244800 |
|__________|_________________________________________|
845 Non-Secure encoder capabilities (Secure not supported)
______________________________________________________
| Codec | W H fps Mbps MB/s |
|__________|_________________________________________|
| h264 | 4096 2160 60 120 2073600 |
| | (4096) (2304) (30) (120) |
| hevc | 4096 2160 60 120 2073600 |
| | (4096) (2304) (30) (120) |
| mpeg4-sw | 1280 720 30 6 108000 |
| vp8 | 4096 2160 30 120 1036800 |
| | (4096) (2304) (24) (120) |
| h263-sw | 864 480 30 2 48600 |
|__________|_________________________________________|
-->
<Included>
<Encoders>
<!-- OMX encoders -->
<MediaCodec name="OMX.qcom.video.encoder.avc" type="video/avc" >
<Quirk name="requires-allocate-on-input-ports" />
<Quirk name="requires-allocate-on-output-ports" />
<Quirk name="requires-loaded-to-idle-after-allocation" />
<Limit name="size" min="96x96" max="4096x2304" />
<Limit name="alignment" value="2x2" />
<Limit name="block-size" value="16x16" />
<Limit name="blocks-per-second" min="24" max="2073600" />
<Limit name="bitrate" range="1-120000000" />
<Limit name="frame-rate" range="1-480" />
<Limit name="concurrent-instances" max="16" />
<Limit name="performance-point-4096x2304" value="56" />
<Limit name="performance-point-3840x2160" value="60" />
<Limit name="performance-point-1920x1080" value="240" />
<Limit name="performance-point-1280x720" value="480" />
<!-- <Limit name="performance-point-720x480" value="480" /> -->
<Feature name="bitrate-modes" value="VBR,CBR" />
<Feature name="intra-refresh" />
</MediaCodec>
<MediaCodec name="OMX.qcom.video.encoder.hevc" type="video/hevc" >
<Quirk name="requires-allocate-on-input-ports" />
<Quirk name="requires-allocate-on-output-ports" />
<Quirk name="requires-loaded-to-idle-after-allocation" />
<Limit name="size" min="96x96" max="4096x2304" />
<Limit name="alignment" value="2x2" />
<Limit name="block-size" value="16x16" />
<Limit name="blocks-per-second" min="24" max="2073600" />
<Limit name="bitrate" range="1-120000000" />
<Limit name="frame-rate" range="1-480" />
<Limit name="concurrent-instances" max="16" />
<Limit name="quality" range="0-100" default="80" />
<Limit name="performance-point-4096x2304" value="56" />
<Limit name="performance-point-3840x2160" value="60" />
<Limit name="performance-point-1920x1080" value="240" />
<Limit name="performance-point-1280x720" value="480" />
<!-- <Limit name="performance-point-720x480" value="480" /> -->
<Feature name="bitrate-modes" value="VBR,CBR,CQ" />
<Feature name="intra-refresh" />
</MediaCodec>
<MediaCodec name="OMX.qcom.video.encoder.vp8" type="video/x-vnd.on2.vp8" >
<Quirk name="requires-allocate-on-input-ports" />
<Quirk name="requires-allocate-on-output-ports" />
<Quirk name="requires-loaded-to-idle-after-allocation" />
<Limit name="size" min="96x96" max="4096x2304" />
<Limit name="alignment" value="2x2" />
<Limit name="block-size" value="16x16" />
<Limit name="blocks-per-second" min="24" max="1036800" />
<Limit name="bitrate" range="1-120000000" />
<Limit name="frame-rate" range="1-240" />
<Limit name="concurrent-instances" max="16" />
<Limit name="performance-point-4096x2304" value="28" />
<Limit name="performance-point-3840x2160" value="30" />
<Limit name="performance-point-1920x1080" value="120" />
<Limit name="performance-point-1280x720" value="240" />
<!-- <Limit name="performance-point-720x480" value="240" /> -->
<Feature name="bitrate-modes" value="VBR,CBR" />
<Feature name="intra-refresh" />
</MediaCodec>
</Encoders>
<Decoders>
<!-- Video Hardware -->
<!-- OMX decoders -->
<MediaCodec name="OMX.qcom.video.decoder.avc" type="video/avc" >
<Quirk name="requires-allocate-on-input-ports" />
<Quirk name="requires-allocate-on-output-ports" />
<Limit name="size" min="96x96" max="4096x2304" />
<Limit name="alignment" value="2x2" />
<Limit name="block-size" value="16x16" />
<Limit name="blocks-per-second" range="24-2073600" />
<Limit name="bitrate" range="1-120000000" />
<Limit name="frame-rate" range="1-480" />
<Limit name="concurrent-instances" max="16" />
<Limit name="performance-point-4096x2304" value="56" />
<Limit name="performance-point-3840x2160" value="60" />
<Limit name="performance-point-1920x1080" value="240" />
<Limit name="performance-point-1280x720" value="480" />
<!-- <Limit name="performance-point-720x480" value="480" /> -->
<Feature name="adaptive-playback" />
</MediaCodec>
<MediaCodec name="OMX.qcom.video.decoder.avc.secure" type="video/avc" >
<Quirk name="requires-allocate-on-input-ports" />
<Quirk name="requires-allocate-on-output-ports" />
<Limit name="size" min="96x96" max="4096x2304" />
<Limit name="alignment" value="2x2" />
<Limit name="block-size" value="16x16" />
<Limit name="blocks-per-second" min="24" max="2073600" />
<Limit name="bitrate" range="1-40000000" />
<Limit name="frame-rate" range="1-60" />
<Limit name="concurrent-instances" max="6" />
<Limit name="performance-point-4096x2304" value="56" />
<Limit name="performance-point-3840x2160" value="60" />
<Limit name="performance-point-1920x1080" value="240" />
<Limit name="performance-point-1280x720" value="480" />
<!-- <Limit name="performance-point-720x480" value="480" /> -->
<Feature name="adaptive-playback" />
<Feature name="secure-playback" required="true" />
</MediaCodec>
<MediaCodec name="OMX.qcom.video.decoder.hevc" type="video/hevc" >
<Quirk name="requires-allocate-on-input-ports" />
<Quirk name="requires-allocate-on-output-ports" />
<Limit name="size" min="96x96" max="4096x2304" />
<Limit name="alignment" value="2x2" />
<Limit name="block-size" value="16x16" />
<Limit name="blocks-per-second" min="24" max="2073600" />
<Limit name="bitrate" range="1-120000000" />
<Limit name="frame-rate" range="1-480" />
<Limit name="concurrent-instances" max="16" />
<Limit name="performance-point-4096x2304" value="56" />
<Limit name="performance-point-3840x2160" value="60" />
<Limit name="performance-point-1920x1080" value="240" />
<Limit name="performance-point-1280x720" value="480" />
<!-- <Limit name="performance-point-720x480" value="480" /> -->
<Feature name="adaptive-playback" />
</MediaCodec>
<MediaCodec name="OMX.qcom.video.decoder.hevc.secure" type="video/hevc" >
<Quirk name="requires-allocate-on-input-ports" />
<Quirk name="requires-allocate-on-output-ports" />
<Limit name="size" min="96x96" max="4096x2304" />
<Limit name="alignment" value="2x2" />
<Limit name="block-size" value="16x16" />
<Limit name="blocks-per-second" min="24" max="2073600" />
<Limit name="bitrate" range="1-40000000" />
<Limit name="frame-rate" range="1-60" />
<Limit name="concurrent-instances" max="6" />
<Limit name="performance-point-4096x2304" value="56" />
<Limit name="performance-point-3840x2160" value="60" />
<Limit name="performance-point-1920x1080" value="240" />
<!-- <Limit name="performance-point-720x480" value="240" /> -->
<Feature name="adaptive-playback" />
<Feature name="secure-playback" required="true" />
</MediaCodec>
<MediaCodec name="OMX.qcom.video.decoder.vp8" type="video/x-vnd.on2.vp8" >
<Quirk name="requires-allocate-on-input-ports" />
<Quirk name="requires-allocate-on-output-ports" />
<Limit name="size" min="96x96" max="4096x2304" />
<Limit name="alignment" value="2x2" />
<Limit name="block-size" value="16x16" />
<Limit name="blocks-per-second" min="24" max="1036800" />
<Limit name="bitrate" range="1-120000000" />
<Limit name="frame-rate" range="1-240" />
<Limit name="concurrent-instances" max="16" />
<Limit name="performance-point-4096x2304" value="28" />
<Limit name="performance-point-3840x2160" value="30" />
<Limit name="performance-point-1920x1080" value="120" />
<Limit name="performance-point-1280x720" value="240" />
<!-- <Limit name="performance-point-720x480" value="240" /> -->
<Feature name="adaptive-playback" />
</MediaCodec>
<MediaCodec name="OMX.qcom.video.decoder.vp9" type="video/x-vnd.on2.vp9" >
<Quirk name="requires-allocate-on-input-ports" />
<Quirk name="requires-allocate-on-output-ports" />
<Limit name="size" min="96x96" max="4096x2304" />
<Limit name="alignment" value="2x2" />
<Limit name="block-size" value="16x16" />
<Limit name="blocks-per-second" min="24" max="2073600" />
<Limit name="bitrate" range="1-120000000" />
<Limit name="frame-rate" range="1-480" />
<Limit name="concurrent-instances" max="6" />
<Limit name="performance-point-4096x2304" value="56" />
<Limit name="performance-point-3840x2160" value="60" />
<Limit name="performance-point-1920x1080" value="240" />
<Limit name="performance-point-1280x720" value="480" />
<!-- <Limit name="performance-point-720x480" value="480" /> -->
<Feature name="adaptive-playback" />
</MediaCodec>
<MediaCodec name="OMX.qcom.video.decoder.vp9.secure" type="video/x-vnd.on2.vp9" >
<Quirk name="requires-allocate-on-input-ports" />
<Quirk name="requires-allocate-on-output-ports" />
<Limit name="size" min="96x96" max="4096x2304" />
<Limit name="alignment" value="2x2" />
<Limit name="block-size" value="16x16" />
<Limit name="blocks-per-second" min="24" max="2073600" />
<Limit name="bitrate" range="1-40000000" />
<Limit name="frame-rate" range="1-60" />
<Limit name="concurrent-instances" max="6" />
<Limit name="performance-point-4096x2304" value="56" />
<Limit name="performance-point-3840x2160" value="60" />
<Limit name="performance-point-1920x1080" value="240" />
<Limit name="performance-point-1280x720" value="480" />
<!-- <Limit name="performance-point-720x480" value="480" /> -->
<Feature name="adaptive-playback" />
<Feature name="secure-playback" required="true" />
</MediaCodec>
</Decoders>
</Included>

View File

@@ -20,12 +20,6 @@
<!-- measured 90%:707-978 med:734 SLOW -->
<Limit name="measured-frame-rate-176x144" range="734-831" /> <!-- N=24 v90%=1.2 -->
</MediaCodec>
<MediaCodec name="OMX.qcom.video.encoder.avc" type="video/avc" update="true">
<Limit name="measured-frame-rate-320x240" range="454-454" /> <!-- N=24 v90%=1.0 -->
<Limit name="measured-frame-rate-720x480" range="159-159" /> <!-- N=24 v90%=1.0 -->
<Limit name="measured-frame-rate-1280x720" range="62-62" /> <!-- N=24 v90%=1.0 -->
<Limit name="measured-frame-rate-1920x1080" range="54-54" /> <!-- N=24 v90%=1.0 -->
</MediaCodec>
<MediaCodec name="c2.android.avc.encoder" type="video/avc" update="true">
<Limit name="measured-frame-rate-320x240" range="384-384" /> <!-- N=24 v90%=1.1 -->
<Limit name="measured-frame-rate-720x480" range="122-122" /> <!-- N=24 v90%=1.0 -->
@@ -38,13 +32,6 @@
<Limit name="measured-frame-rate-1280x720" range="62-62" /> <!-- N=24 v90%=1.0 -->
<Limit name="measured-frame-rate-1920x1080" range="54-54" /> <!-- N=24 v90%=1.0 -->
</MediaCodec>
<MediaCodec name="OMX.qcom.video.encoder.hevc" type="video/hevc" update="true">
<Limit name="measured-frame-rate-320x240" range="394-400" /> <!-- N=22 v90%=1.0 -->
<Limit name="measured-frame-rate-720x480" range="117-117" /> <!-- N=24 v90%=1.0 -->
<Limit name="measured-frame-rate-1280x720" range="45-45" /> <!-- N=24 v90%=1.0 -->
<Limit name="measured-frame-rate-1920x1080" range="41-41" /> <!-- N=24 v90%=1.0 -->
<Limit name="measured-frame-rate-3840x2160" range="30-30" /> <!-- N=22 v90%=1.0 -->
</MediaCodec>
<MediaCodec name="c2.android.hevc.encoder" type="video/hevc" update="true">
<Limit name="measured-frame-rate-320x240" range="53-54" /> <!-- N=24 v90%=1.0 -->
</MediaCodec>
@@ -58,12 +45,6 @@
<MediaCodec name="c2.android.mpeg4.encoder" type="video/mp4v-es" update="true">
<Limit name="measured-frame-rate-176x144" range="776-843" /> <!-- N=24 v90%=1.2 -->
</MediaCodec>
<MediaCodec name="OMX.qcom.video.encoder.vp8" type="video/x-vnd.on2.vp8" update="true">
<Limit name="measured-frame-rate-320x180" range="332-336" /> <!-- N=24 v90%=1.0 -->
<Limit name="measured-frame-rate-640x360" range="187-187" /> <!-- N=24 v90%=1.0 -->
<Limit name="measured-frame-rate-1280x720" range="51-51" /> <!-- N=22 v90%=1.0 -->
<Limit name="measured-frame-rate-1920x1080" range="45-45" /> <!-- N=20 v90%=1.0 -->
</MediaCodec>
<MediaCodec name="c2.android.vp8.encoder" type="video/x-vnd.on2.vp8" update="true">
<Limit name="measured-frame-rate-320x180" range="234-260" /> <!-- MANUALLY ADJUSTED -->
<Limit name="measured-frame-rate-640x360" range="80-117" /> <!-- MANUALLY ADJUSTED -->
@@ -89,13 +70,6 @@
<Limit name="measured-frame-rate-176x144" range="167-168" /> <!-- N=28 v90%=1.1 -->
<Limit name="measured-frame-rate-352x288" range="167-286" /> <!-- N=94 v98%=1.8 -->
</MediaCodec>
<MediaCodec name="OMX.qcom.video.decoder.avc" type="video/avc" update="true">
<!-- measured 90%:169-286 med:186 SLOW -->
<Limit name="measured-frame-rate-320x240" range="186-220" /> <!-- N=28 v90%=1.3 -->
<Limit name="measured-frame-rate-720x480" range="179-179" /> <!-- N=28 v90%=1.1 -->
<Limit name="measured-frame-rate-1280x720" range="179-179" /> <!-- N=28 v90%=1.1 -->
<Limit name="measured-frame-rate-1920x1088" range="172-172" /> <!-- N=28 v90%=1.1 -->
</MediaCodec>
<MediaCodec name="c2.android.avc.decoder" type="video/avc" update="true">
<Limit name="measured-frame-rate-320x240" range="230-245" /> <!-- N=28 v90%=1.3 -->
<Limit name="measured-frame-rate-768x480" range="101-101" /> <!-- N=28 v90%=1.1 -->
@@ -109,14 +83,6 @@
<!-- measured 90%:157-264 med:177 SLOW -->
<Limit name="measured-frame-rate-1920x1088" range="177-204" /> <!-- N=28 v90%=1.3 -->
</MediaCodec>
<MediaCodec name="OMX.qcom.video.decoder.hevc" type="video/hevc" update="true">
<Limit name="measured-frame-rate-352x288" range="188-189" /> <!-- N=28 v90%=1.1 -->
<Limit name="measured-frame-rate-640x360" range="191-193" /> <!-- N=28 v90%=1.1 -->
<Limit name="measured-frame-rate-720x480" range="191-192" /> <!-- N=28 v90%=1.1 -->
<Limit name="measured-frame-rate-1280x720" range="190-190" /> <!-- N=28 v90%=1.1 -->
<Limit name="measured-frame-rate-1920x1080" range="155-155" /> <!-- N=28 v90%=1.3 -->
<Limit name="measured-frame-rate-3840x2160" range="23-25" /> <!-- N=28 v90%=1.2 -->
</MediaCodec>
<MediaCodec name="c2.android.hevc.decoder" type="video/hevc" update="true">
<Limit name="measured-frame-rate-384x288" range="266-266" /> <!-- N=28 v90%=1.1 -->
<Limit name="measured-frame-rate-640x360" range="201-201" /> <!-- N=28 v90%=1.3 -->
@@ -135,14 +101,6 @@
<MediaCodec name="c2.android.mpeg4.decoder" type="video/mp4v-es" update="true">
<Limit name="measured-frame-rate-176x144" range="162-167" /> <!-- N=28 v90%=1.1 -->
</MediaCodec>
<MediaCodec name="OMX.qcom.video.decoder.vp8" type="video/x-vnd.on2.vp8" update="true">
<!-- measured 90%:160-301 med:173 SLOW -->
<Limit name="measured-frame-rate-320x192" range="173-220" /> <!-- N=28 v90%=1.4 -->
<!-- measured 90%:169-304 med:179 SLOW -->
<Limit name="measured-frame-rate-640x368" range="178-227" /> <!-- N=28 v90%=1.3 -->
<Limit name="measured-frame-rate-1280x720" range="179-179" /> <!-- N=28 v90%=1.1 -->
<Limit name="measured-frame-rate-1920x1088" range="87-95" /> <!-- N=28 v90%=1.4 -->
</MediaCodec>
<MediaCodec name="c2.android.vp8.decoder" type="video/x-vnd.on2.vp8" update="true">
<Limit name="measured-frame-rate-320x180" range="168-174" /> <!-- N=28 v90%=1.1 -->
<Limit name="measured-frame-rate-640x360" range="417-418" /> <!-- N=28 v90%=1.0 -->
@@ -157,14 +115,6 @@
<!-- measured 93%:65-244 med:89 SLOW -->
<Limit name="measured-frame-rate-1920x1088" range="88-126" /> <!-- N=30 v93%=1.9 -->
</MediaCodec>
<MediaCodec name="OMX.qcom.video.decoder.vp9" type="video/x-vnd.on2.vp9" update="true">
<Limit name="measured-frame-rate-320x184" range="176-177" /> <!-- N=30 v93%=1.1 -->
<Limit name="measured-frame-rate-640x360" range="176-179" /> <!-- N=30 v93%=1.1 -->
<Limit name="measured-frame-rate-1280x720" range="170-176" /> <!-- N=30 v93%=1.2 -->
<!-- measured 93%:75-160 med:95 SLOW -->
<Limit name="measured-frame-rate-1920x1080" range="94-109" /> <!-- N=30 v93%=1.5 -->
<Limit name="measured-frame-rate-3840x2160" range="17-18" /> <!-- N=29 v90%=1.1 -->
</MediaCodec>
<MediaCodec name="c2.android.vp9.decoder" type="video/x-vnd.on2.vp9" update="true">
<!-- measured 93%:162-405 med:177 SLOW -->
<Limit name="measured-frame-rate-320x180" range="177-256" /> <!-- N=30 v93%=1.6 -->

View File

@@ -1,113 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef __ASM_GENERIC_IOCTLS_H
#define __ASM_GENERIC_IOCTLS_H
#include <linux/ioctl.h>
#define TCGETS 0x5401
#define TCSETS 0x5402
#define TCSETSW 0x5403
#define TCSETSF 0x5404
#define TCGETA 0x5405
#define TCSETA 0x5406
#define TCSETAW 0x5407
#define TCSETAF 0x5408
#define TCSBRK 0x5409
#define TCXONC 0x540A
#define TCFLSH 0x540B
#define TIOCEXCL 0x540C
#define TIOCNXCL 0x540D
#define TIOCSCTTY 0x540E
#define TIOCGPGRP 0x540F
#define TIOCSPGRP 0x5410
#define TIOCOUTQ 0x5411
#define TIOCSTI 0x5412
#define TIOCGWINSZ 0x5413
#define TIOCSWINSZ 0x5414
#define TIOCMGET 0x5415
#define TIOCMBIS 0x5416
#define TIOCMBIC 0x5417
#define TIOCMSET 0x5418
#define TIOCGSOFTCAR 0x5419
#define TIOCSSOFTCAR 0x541A
#define FIONREAD 0x541B
#define TIOCINQ FIONREAD
#define TIOCLINUX 0x541C
#define TIOCCONS 0x541D
#define TIOCGSERIAL 0x541E
#define TIOCSSERIAL 0x541F
#define TIOCPKT 0x5420
#define FIONBIO 0x5421
#define TIOCNOTTY 0x5422
#define TIOCSETD 0x5423
#define TIOCGETD 0x5424
#define TCSBRKP 0x5425
#define TIOCSBRK 0x5427
#define TIOCCBRK 0x5428
#define TIOCGSID 0x5429
#define TCGETS2 _IOR('T', 0x2A, struct termios2)
#define TCSETS2 _IOW('T', 0x2B, struct termios2)
#define TCSETSW2 _IOW('T', 0x2C, struct termios2)
#define TCSETSF2 _IOW('T', 0x2D, struct termios2)
#define TIOCGRS485 0x542E
#ifndef TIOCSRS485
#define TIOCSRS485 0x542F
#endif
#define TIOCGPTN _IOR('T', 0x30, unsigned int)
#define TIOCSPTLCK _IOW('T', 0x31, int)
#define TIOCGDEV _IOR('T', 0x32, unsigned int)
#define TCGETX 0x5432
#define TCSETX 0x5433
#define TCSETXF 0x5434
#define TCSETXW 0x5435
#define TIOCSIG _IOW('T', 0x36, int)
#define TIOCVHANGUP 0x5437
#define TIOCGPKT _IOR('T', 0x38, int)
#define TIOCGPTLCK _IOR('T', 0x39, int)
#define TIOCGEXCL _IOR('T', 0x40, int)
#define TIOCPMGET 0x5441
#define TIOCPMPUT 0x5442
#define TIOCPMACT 0x5443
#define FIONCLEX 0x5450
#define FIOCLEX 0x5451
#define FIOASYNC 0x5452
#define TIOCSERCONFIG 0x5453
#define TIOCSERGWILD 0x5454
#define TIOCSERSWILD 0x5455
#define TIOCGLCKTRMIOS 0x5456
#define TIOCSLCKTRMIOS 0x5457
#define TIOCSERGSTRUCT 0x5458
#define TIOCSERGETLSR 0x5459
#define TIOCSERGETMULTI 0x545A
#define TIOCSERSETMULTI 0x545B
#define TIOCMIWAIT 0x545C
#define TIOCGICOUNT 0x545D
#ifndef FIOQSIZE
#define FIOQSIZE 0x5460
#endif
#define TIOCPKT_DATA 0
#define TIOCPKT_FLUSHREAD 1
#define TIOCPKT_FLUSHWRITE 2
#define TIOCPKT_STOP 4
#define TIOCPKT_START 8
#define TIOCPKT_NOSTOP 16
#define TIOCPKT_DOSTOP 32
#define TIOCPKT_IOCTL 64
#define TIOCSER_TEMT 0x01
#endif

View File

@@ -1,217 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef __MSM_DRM_H__
#define __MSM_DRM_H__
#include "drm.h"
#include "sde_drm.h"
#ifdef __cplusplus
#endif
#define MSM_PIPE_NONE 0x00
#define MSM_PIPE_2D0 0x01
#define MSM_PIPE_2D1 0x02
#define MSM_PIPE_3D0 0x10
#define MSM_PIPE_ID_MASK 0xffff
#define MSM_PIPE_ID(x) ((x) & MSM_PIPE_ID_MASK)
#define MSM_PIPE_FLAGS(x) ((x) & ~MSM_PIPE_ID_MASK)
struct drm_msm_timespec {
__s64 tv_sec;
__s64 tv_nsec;
};
#define HDR_PRIMARIES_COUNT 3
#define HDR_EOTF_SDR_LUM_RANGE 0x0
#define HDR_EOTF_HDR_LUM_RANGE 0x1
#define HDR_EOTF_SMTPE_ST2084 0x2
#define HDR_EOTF_HLG 0x3
#define DRM_MSM_EXT_HDR_METADATA
struct drm_msm_ext_hdr_metadata {
__u32 hdr_state;
__u32 eotf;
__u32 hdr_supported;
__u32 display_primaries_x[HDR_PRIMARIES_COUNT];
__u32 display_primaries_y[HDR_PRIMARIES_COUNT];
__u32 white_point_x;
__u32 white_point_y;
__u32 max_luminance;
__u32 min_luminance;
__u32 max_content_light_level;
__u32 max_average_light_level;
};
#define DRM_MSM_EXT_HDR_PROPERTIES
struct drm_msm_ext_hdr_properties {
__u8 hdr_metadata_type_one;
__u32 hdr_supported;
__u32 hdr_eotf;
__u32 hdr_max_luminance;
__u32 hdr_avg_luminance;
__u32 hdr_min_luminance;
};
#define MSM_PARAM_GPU_ID 0x01
#define MSM_PARAM_GMEM_SIZE 0x02
#define MSM_PARAM_CHIP_ID 0x03
#define MSM_PARAM_MAX_FREQ 0x04
#define MSM_PARAM_TIMESTAMP 0x05
struct drm_msm_param {
__u32 pipe;
__u32 param;
__u64 value;
};
#define MSM_BO_SCANOUT 0x00000001
#define MSM_BO_GPU_READONLY 0x00000002
#define MSM_BO_CACHE_MASK 0x000f0000
#define MSM_BO_CACHED 0x00010000
#define MSM_BO_WC 0x00020000
#define MSM_BO_UNCACHED 0x00040000
#define MSM_BO_FLAGS (MSM_BO_SCANOUT | MSM_BO_GPU_READONLY | MSM_BO_CACHED | MSM_BO_WC | MSM_BO_UNCACHED)
struct drm_msm_gem_new {
__u64 size;
__u32 flags;
__u32 handle;
};
struct drm_msm_gem_info {
__u32 handle;
__u32 pad;
__u64 offset;
};
#define MSM_PREP_READ 0x01
#define MSM_PREP_WRITE 0x02
#define MSM_PREP_NOSYNC 0x04
#define MSM_PREP_FLAGS (MSM_PREP_READ | MSM_PREP_WRITE | MSM_PREP_NOSYNC)
struct drm_msm_gem_cpu_prep {
__u32 handle;
__u32 op;
struct drm_msm_timespec timeout;
};
struct drm_msm_gem_cpu_fini {
__u32 handle;
};
struct drm_msm_gem_submit_reloc {
__u32 submit_offset;
__u32 or;
__s32 shift;
__u32 reloc_idx;
__u64 reloc_offset;
};
#define MSM_SUBMIT_CMD_BUF 0x0001
#define MSM_SUBMIT_CMD_IB_TARGET_BUF 0x0002
#define MSM_SUBMIT_CMD_CTX_RESTORE_BUF 0x0003
struct drm_msm_gem_submit_cmd {
__u32 type;
__u32 submit_idx;
__u32 submit_offset;
__u32 size;
__u32 pad;
__u32 nr_relocs;
__u64 relocs;
};
#define MSM_SUBMIT_BO_READ 0x0001
#define MSM_SUBMIT_BO_WRITE 0x0002
#define MSM_SUBMIT_BO_FLAGS (MSM_SUBMIT_BO_READ | MSM_SUBMIT_BO_WRITE)
struct drm_msm_gem_submit_bo {
__u32 flags;
__u32 handle;
__u64 presumed;
};
#define MSM_SUBMIT_NO_IMPLICIT 0x80000000
#define MSM_SUBMIT_FENCE_FD_IN 0x40000000
#define MSM_SUBMIT_FENCE_FD_OUT 0x20000000
#define MSM_SUBMIT_FLAGS (MSM_SUBMIT_NO_IMPLICIT | MSM_SUBMIT_FENCE_FD_IN | MSM_SUBMIT_FENCE_FD_OUT | 0)
struct drm_msm_gem_submit {
__u32 flags;
__u32 fence;
__u32 nr_bos;
__u32 nr_cmds;
__u64 bos;
__u64 cmds;
__s32 fence_fd;
};
struct drm_msm_wait_fence {
__u32 fence;
__u32 pad;
struct drm_msm_timespec timeout;
};
#define MSM_MADV_WILLNEED 0
#define MSM_MADV_DONTNEED 1
#define __MSM_MADV_PURGED 2
struct drm_msm_gem_madvise {
__u32 handle;
__u32 madv;
__u32 retained;
};
#define DISPLAY_PRIMARIES_WX 0
#define DISPLAY_PRIMARIES_WY 1
#define DISPLAY_PRIMARIES_RX 2
#define DISPLAY_PRIMARIES_RY 3
#define DISPLAY_PRIMARIES_GX 4
#define DISPLAY_PRIMARIES_GY 5
#define DISPLAY_PRIMARIES_BX 6
#define DISPLAY_PRIMARIES_BY 7
#define DISPLAY_PRIMARIES_MAX 8
struct drm_panel_hdr_properties {
__u32 hdr_enabled;
__u32 display_primaries[DISPLAY_PRIMARIES_MAX];
__u32 peak_brightness;
__u32 blackness_level;
};
struct drm_msm_event_req {
__u32 object_id;
__u32 object_type;
__u32 event;
__u64 client_context;
__u32 index;
};
struct drm_msm_event_resp {
struct drm_event base;
struct drm_msm_event_req info;
__u8 data[];
};
#define DRM_MSM_GET_PARAM 0x00
#define DRM_MSM_GEM_NEW 0x02
#define DRM_MSM_GEM_INFO 0x03
#define DRM_MSM_GEM_CPU_PREP 0x04
#define DRM_MSM_GEM_CPU_FINI 0x05
#define DRM_MSM_GEM_SUBMIT 0x06
#define DRM_MSM_WAIT_FENCE 0x07
#define DRM_MSM_GEM_MADVISE 0x08
#define DRM_SDE_WB_CONFIG 0x40
#define DRM_MSM_REGISTER_EVENT 0x41
#define DRM_MSM_DEREGISTER_EVENT 0x42
#define DRM_MSM_RMFB2 0x43
#define DRM_EVENT_HISTOGRAM 0x80000000
#define DRM_EVENT_AD_BACKLIGHT 0x80000001
#define DRM_EVENT_CRTC_POWER 0x80000002
#define DRM_EVENT_SYS_BACKLIGHT 0x80000003
#define DRM_EVENT_SDE_POWER 0x80000004
#define DRM_EVENT_IDLE_NOTIFY 0x80000005
#define DRM_EVENT_PANEL_DEAD 0x80000006
#define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)
#define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new)
#define DRM_IOCTL_MSM_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_INFO, struct drm_msm_gem_info)
#define DRM_IOCTL_MSM_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_PREP, struct drm_msm_gem_cpu_prep)
#define DRM_IOCTL_MSM_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm_msm_gem_cpu_fini)
#define DRM_IOCTL_MSM_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_SUBMIT, struct drm_msm_gem_submit)
#define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait_fence)
#define DRM_IOCTL_MSM_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_MADVISE, struct drm_msm_gem_madvise)
#define DRM_IOCTL_SDE_WB_CONFIG DRM_IOW((DRM_COMMAND_BASE + DRM_SDE_WB_CONFIG), struct sde_drm_wb_cfg)
#define DRM_IOCTL_MSM_REGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + DRM_MSM_REGISTER_EVENT), struct drm_msm_event_req)
#define DRM_IOCTL_MSM_DEREGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + DRM_MSM_DEREGISTER_EVENT), struct drm_msm_event_req)
#define DRM_IOCTL_MSM_RMFB2 DRM_IOW((DRM_COMMAND_BASE + DRM_MSM_RMFB2), unsigned int)
#ifdef __cplusplus
#endif
#endif

View File

@@ -1,297 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_DRM_PP_H_
#define _MSM_DRM_PP_H_
#include <linux/types.h>
struct drm_msm_pcc_coeff {
__u32 c;
__u32 r;
__u32 g;
__u32 b;
__u32 rg;
__u32 gb;
__u32 rb;
__u32 rgb;
};
#define DRM_MSM_PCC3
struct drm_msm_pcc {
__u64 flags;
struct drm_msm_pcc_coeff r;
struct drm_msm_pcc_coeff g;
struct drm_msm_pcc_coeff b;
__u32 r_rr;
__u32 r_gg;
__u32 r_bb;
__u32 g_rr;
__u32 g_gg;
__u32 g_bb;
__u32 b_rr;
__u32 b_gg;
__u32 b_bb;
};
#define PA_VLUT_SIZE 256
struct drm_msm_pa_vlut {
__u64 flags;
__u32 val[PA_VLUT_SIZE];
};
#define PA_HSIC_HUE_ENABLE (1 << 0)
#define PA_HSIC_SAT_ENABLE (1 << 1)
#define PA_HSIC_VAL_ENABLE (1 << 2)
#define PA_HSIC_CONT_ENABLE (1 << 3)
#define DRM_MSM_PA_HSIC
struct drm_msm_pa_hsic {
__u64 flags;
__u32 hue;
__u32 saturation;
__u32 value;
__u32 contrast;
};
#define MEMCOL_PROT_HUE (1 << 0)
#define MEMCOL_PROT_SAT (1 << 1)
#define MEMCOL_PROT_VAL (1 << 2)
#define MEMCOL_PROT_CONT (1 << 3)
#define MEMCOL_PROT_SIXZONE (1 << 4)
#define MEMCOL_PROT_BLEND (1 << 5)
#define DRM_MSM_MEMCOL
struct drm_msm_memcol {
__u64 prot_flags;
__u32 color_adjust_p0;
__u32 color_adjust_p1;
__u32 color_adjust_p2;
__u32 blend_gain;
__u32 sat_hold;
__u32 val_hold;
__u32 hue_region;
__u32 sat_region;
__u32 val_region;
};
#define DRM_MSM_SIXZONE
#define SIXZONE_LUT_SIZE 384
#define SIXZONE_HUE_ENABLE (1 << 0)
#define SIXZONE_SAT_ENABLE (1 << 1)
#define SIXZONE_VAL_ENABLE (1 << 2)
struct drm_msm_sixzone_curve {
__u32 p1;
__u32 p0;
};
struct drm_msm_sixzone {
__u64 flags;
__u32 threshold;
__u32 adjust_p0;
__u32 adjust_p1;
__u32 sat_hold;
__u32 val_hold;
struct drm_msm_sixzone_curve curve[SIXZONE_LUT_SIZE];
};
#define GAMUT_3D_MODE_17 1
#define GAMUT_3D_MODE_5 2
#define GAMUT_3D_MODE_13 3
#define GAMUT_3D_MODE17_TBL_SZ 1229
#define GAMUT_3D_MODE5_TBL_SZ 32
#define GAMUT_3D_MODE13_TBL_SZ 550
#define GAMUT_3D_SCALE_OFF_SZ 16
#define GAMUT_3D_SCALEB_OFF_SZ 12
#define GAMUT_3D_TBL_NUM 4
#define GAMUT_3D_SCALE_OFF_TBL_NUM 3
#define GAMUT_3D_MAP_EN (1 << 0)
struct drm_msm_3d_col {
__u32 c2_c1;
__u32 c0;
};
struct drm_msm_3d_gamut {
__u64 flags;
__u32 mode;
__u32 scale_off[GAMUT_3D_SCALE_OFF_TBL_NUM][GAMUT_3D_SCALE_OFF_SZ];
struct drm_msm_3d_col col[GAMUT_3D_TBL_NUM][GAMUT_3D_MODE17_TBL_SZ];
};
#define PGC_TBL_LEN 512
#define PGC_8B_ROUND (1 << 0)
struct drm_msm_pgc_lut {
__u64 flags;
__u32 c0[PGC_TBL_LEN];
__u32 c1[PGC_TBL_LEN];
__u32 c2[PGC_TBL_LEN];
};
#define IGC_TBL_LEN 256
#define IGC_DITHER_ENABLE (1 << 0)
struct drm_msm_igc_lut {
__u64 flags;
__u32 c0[IGC_TBL_LEN];
__u32 c1[IGC_TBL_LEN];
__u32 c2[IGC_TBL_LEN];
__u32 strength;
};
#define HIST_V_SIZE 256
struct drm_msm_hist {
__u64 flags;
__u32 data[HIST_V_SIZE];
};
#define AD4_LUT_GRP0_SIZE 33
#define AD4_LUT_GRP1_SIZE 32
struct drm_msm_ad4_init {
__u32 init_param_001[AD4_LUT_GRP0_SIZE];
__u32 init_param_002[AD4_LUT_GRP0_SIZE];
__u32 init_param_003[AD4_LUT_GRP0_SIZE];
__u32 init_param_004[AD4_LUT_GRP0_SIZE];
__u32 init_param_005[AD4_LUT_GRP1_SIZE];
__u32 init_param_006[AD4_LUT_GRP1_SIZE];
__u32 init_param_007[AD4_LUT_GRP0_SIZE];
__u32 init_param_008[AD4_LUT_GRP0_SIZE];
__u32 init_param_009;
__u32 init_param_010;
__u32 init_param_011;
__u32 init_param_012;
__u32 init_param_013;
__u32 init_param_014;
__u32 init_param_015;
__u32 init_param_016;
__u32 init_param_017;
__u32 init_param_018;
__u32 init_param_019;
__u32 init_param_020;
__u32 init_param_021;
__u32 init_param_022;
__u32 init_param_023;
__u32 init_param_024;
__u32 init_param_025;
__u32 init_param_026;
__u32 init_param_027;
__u32 init_param_028;
__u32 init_param_029;
__u32 init_param_030;
__u32 init_param_031;
__u32 init_param_032;
__u32 init_param_033;
__u32 init_param_034;
__u32 init_param_035;
__u32 init_param_036;
__u32 init_param_037;
__u32 init_param_038;
__u32 init_param_039;
__u32 init_param_040;
__u32 init_param_041;
__u32 init_param_042;
__u32 init_param_043;
__u32 init_param_044;
__u32 init_param_045;
__u32 init_param_046;
__u32 init_param_047;
__u32 init_param_048;
__u32 init_param_049;
__u32 init_param_050;
__u32 init_param_051;
__u32 init_param_052;
__u32 init_param_053;
__u32 init_param_054;
__u32 init_param_055;
__u32 init_param_056;
__u32 init_param_057;
__u32 init_param_058;
__u32 init_param_059;
__u32 init_param_060;
__u32 init_param_061;
__u32 init_param_062;
__u32 init_param_063;
__u32 init_param_064;
__u32 init_param_065;
__u32 init_param_066;
__u32 init_param_067;
__u32 init_param_068;
__u32 init_param_069;
__u32 init_param_070;
__u32 init_param_071;
__u32 init_param_072;
__u32 init_param_073;
__u32 init_param_074;
__u32 init_param_075;
};
struct drm_msm_ad4_cfg {
__u32 cfg_param_001;
__u32 cfg_param_002;
__u32 cfg_param_003;
__u32 cfg_param_004;
__u32 cfg_param_005;
__u32 cfg_param_006;
__u32 cfg_param_007;
__u32 cfg_param_008;
__u32 cfg_param_009;
__u32 cfg_param_010;
__u32 cfg_param_011;
__u32 cfg_param_012;
__u32 cfg_param_013;
__u32 cfg_param_014;
__u32 cfg_param_015;
__u32 cfg_param_016;
__u32 cfg_param_017;
__u32 cfg_param_018;
__u32 cfg_param_019;
__u32 cfg_param_020;
__u32 cfg_param_021;
__u32 cfg_param_022;
__u32 cfg_param_023;
__u32 cfg_param_024;
__u32 cfg_param_025;
__u32 cfg_param_026;
__u32 cfg_param_027;
__u32 cfg_param_028;
__u32 cfg_param_029;
__u32 cfg_param_030;
__u32 cfg_param_031;
__u32 cfg_param_032;
__u32 cfg_param_033;
__u32 cfg_param_034;
__u32 cfg_param_035;
__u32 cfg_param_036;
__u32 cfg_param_037;
__u32 cfg_param_038;
__u32 cfg_param_039;
__u32 cfg_param_040;
__u32 cfg_param_041;
__u32 cfg_param_042;
__u32 cfg_param_043;
__u32 cfg_param_044;
__u32 cfg_param_045;
__u32 cfg_param_046;
__u32 cfg_param_047;
__u32 cfg_param_048;
__u32 cfg_param_049;
__u32 cfg_param_050;
__u32 cfg_param_051;
__u32 cfg_param_052;
__u32 cfg_param_053;
};
#define DITHER_MATRIX_SZ 16
struct drm_msm_dither {
__u64 flags;
__u32 temporal_en;
__u32 c0_bitdepth;
__u32 c1_bitdepth;
__u32 c2_bitdepth;
__u32 c3_bitdepth;
__u32 matrix[DITHER_MATRIX_SZ];
};
#define DRM_MSM_PA_DITHER
struct drm_msm_pa_dither {
__u64 flags;
__u32 strength;
__u32 offset_en;
__u32 matrix[DITHER_MATRIX_SZ];
};
#endif

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@@ -1,181 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _SDE_DRM_H_
#define _SDE_DRM_H_
#include "drm.h"
#define SDE_MAX_PLANES 4
#define SDE_MAX_DE_CURVES 3
#define FILTER_EDGE_DIRECTED_2D 0x0
#define FILTER_CIRCULAR_2D 0x1
#define FILTER_SEPARABLE_1D 0x2
#define FILTER_BILINEAR 0x3
#define FILTER_ALPHA_DROP_REPEAT 0x0
#define FILTER_ALPHA_BILINEAR 0x1
#define FILTER_ALPHA_2D 0x3
#define FILTER_BLEND_CIRCULAR_2D 0x0
#define FILTER_BLEND_SEPARABLE_1D 0x1
#define SCALER_LUT_SWAP 0x1
#define SCALER_LUT_DIR_WR 0x2
#define SCALER_LUT_Y_CIR_WR 0x4
#define SCALER_LUT_UV_CIR_WR 0x8
#define SCALER_LUT_Y_SEP_WR 0x10
#define SCALER_LUT_UV_SEP_WR 0x20
#define SDE_DRM_BLEND_OP_NOT_DEFINED 0
#define SDE_DRM_BLEND_OP_OPAQUE 1
#define SDE_DRM_BLEND_OP_PREMULTIPLIED 2
#define SDE_DRM_BLEND_OP_COVERAGE 3
#define SDE_DRM_BLEND_OP_MAX 4
#define SDE_DRM_DEINTERLACE 0
#define SDE_DRM_BITMASK_COUNT 64
#define SDE_DRM_FB_NON_SEC 0
#define SDE_DRM_FB_SEC 1
#define SDE_DRM_FB_NON_SEC_DIR_TRANS 2
#define SDE_DRM_FB_SEC_DIR_TRANS 3
#define SDE_DRM_SEC_NON_SEC 0
#define SDE_DRM_SEC_ONLY 1
struct sde_drm_pix_ext_v1 {
int32_t num_ext_pxls_lr[SDE_MAX_PLANES];
int32_t num_ext_pxls_tb[SDE_MAX_PLANES];
int32_t left_ftch[SDE_MAX_PLANES];
int32_t right_ftch[SDE_MAX_PLANES];
int32_t top_ftch[SDE_MAX_PLANES];
int32_t btm_ftch[SDE_MAX_PLANES];
int32_t left_rpt[SDE_MAX_PLANES];
int32_t right_rpt[SDE_MAX_PLANES];
int32_t top_rpt[SDE_MAX_PLANES];
int32_t btm_rpt[SDE_MAX_PLANES];
};
struct sde_drm_scaler_v1 {
struct sde_drm_pix_ext_v1 pe;
int32_t init_phase_x[SDE_MAX_PLANES];
int32_t phase_step_x[SDE_MAX_PLANES];
int32_t init_phase_y[SDE_MAX_PLANES];
int32_t phase_step_y[SDE_MAX_PLANES];
uint32_t horz_filter[SDE_MAX_PLANES];
uint32_t vert_filter[SDE_MAX_PLANES];
};
struct sde_drm_de_v1 {
uint32_t enable;
int16_t sharpen_level1;
int16_t sharpen_level2;
uint16_t clip;
uint16_t limit;
uint16_t thr_quiet;
uint16_t thr_dieout;
uint16_t thr_low;
uint16_t thr_high;
uint16_t prec_shift;
int16_t adjust_a[SDE_MAX_DE_CURVES];
int16_t adjust_b[SDE_MAX_DE_CURVES];
int16_t adjust_c[SDE_MAX_DE_CURVES];
};
struct sde_drm_scaler_v2 {
uint32_t enable;
uint32_t dir_en;
struct sde_drm_pix_ext_v1 pe;
uint32_t horz_decimate;
uint32_t vert_decimate;
int32_t init_phase_x[SDE_MAX_PLANES];
int32_t phase_step_x[SDE_MAX_PLANES];
int32_t init_phase_y[SDE_MAX_PLANES];
int32_t phase_step_y[SDE_MAX_PLANES];
uint32_t preload_x[SDE_MAX_PLANES];
uint32_t preload_y[SDE_MAX_PLANES];
uint32_t src_width[SDE_MAX_PLANES];
uint32_t src_height[SDE_MAX_PLANES];
uint32_t dst_width;
uint32_t dst_height;
uint32_t y_rgb_filter_cfg;
uint32_t uv_filter_cfg;
uint32_t alpha_filter_cfg;
uint32_t blend_cfg;
uint32_t lut_flag;
uint32_t dir_lut_idx;
uint32_t y_rgb_cir_lut_idx;
uint32_t uv_cir_lut_idx;
uint32_t y_rgb_sep_lut_idx;
uint32_t uv_sep_lut_idx;
struct sde_drm_de_v1 de;
};
#define SDE_MAX_DS_COUNT 2
#define SDE_DRM_DESTSCALER_ENABLE 0x1
#define SDE_DRM_DESTSCALER_SCALE_UPDATE 0x2
#define SDE_DRM_DESTSCALER_ENHANCER_UPDATE 0x4
#define SDE_DRM_DESTSCALER_PU_ENABLE 0x8
struct sde_drm_dest_scaler_cfg {
uint32_t flags;
uint32_t index;
uint32_t lm_width;
uint32_t lm_height;
uint64_t scaler_cfg;
};
struct sde_drm_dest_scaler_data {
uint32_t num_dest_scaler;
struct sde_drm_dest_scaler_cfg ds_cfg[SDE_MAX_DS_COUNT];
};
#define SDE_CSC_MATRIX_COEFF_SIZE 9
#define SDE_CSC_CLAMP_SIZE 6
#define SDE_CSC_BIAS_SIZE 3
struct sde_drm_csc_v1 {
int64_t ctm_coeff[SDE_CSC_MATRIX_COEFF_SIZE];
uint32_t pre_bias[SDE_CSC_BIAS_SIZE];
uint32_t post_bias[SDE_CSC_BIAS_SIZE];
uint32_t pre_clamp[SDE_CSC_CLAMP_SIZE];
uint32_t post_clamp[SDE_CSC_CLAMP_SIZE];
};
struct sde_drm_color {
uint32_t color_0;
uint32_t color_1;
uint32_t color_2;
uint32_t color_3;
};
#define SDE_MAX_DIM_LAYERS 7
#define SDE_DRM_DIM_LAYER_INCLUSIVE 0x1
#define SDE_DRM_DIM_LAYER_EXCLUSIVE 0x2
struct sde_drm_dim_layer_cfg {
uint32_t flags;
uint32_t stage;
struct sde_drm_color color_fill;
struct drm_clip_rect rect;
};
struct sde_drm_dim_layer_v1 {
uint32_t num_layers;
struct sde_drm_dim_layer_cfg layer_cfg[SDE_MAX_DIM_LAYERS];
};
#define SDE_DRM_WB_CFG 0x1
#define SDE_DRM_WB_CFG_FLAGS_CONNECTED (1 << 0)
struct sde_drm_wb_cfg {
uint32_t flags;
uint32_t connector_id;
uint32_t count_modes;
uint64_t modes;
};
#define SDE_MAX_ROI_V1 4
struct sde_drm_roi_v1 {
uint32_t num_rects;
struct drm_clip_rect roi[SDE_MAX_ROI_V1];
};
#define SDE_MODE_DPMS_ON 0
#define SDE_MODE_DPMS_LP1 1
#define SDE_MODE_DPMS_LP2 2
#define SDE_MODE_DPMS_STANDBY 3
#define SDE_MODE_DPMS_SUSPEND 4
#define SDE_MODE_DPMS_OFF 5
#endif

View File

@@ -1,25 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _AVTIMER_H
#define _AVTIMER_H
#include <linux/ioctl.h>
#define MAJOR_NUM 100
#define IOCTL_GET_AVTIMER_TICK _IOR(MAJOR_NUM, 0, uint64_t)
#endif

View File

@@ -1,74 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _ESOC_CTRL_H_
#define _ESOC_CTRL_H_
#include <linux/types.h>
#define ESOC_CODE 0xCC
#define ESOC_CMD_EXE _IOW(ESOC_CODE, 1, unsigned int)
#define ESOC_WAIT_FOR_REQ _IOR(ESOC_CODE, 2, unsigned int)
#define ESOC_NOTIFY _IOW(ESOC_CODE, 3, unsigned int)
#define ESOC_GET_STATUS _IOR(ESOC_CODE, 4, unsigned int)
#define ESOC_GET_ERR_FATAL _IOR(ESOC_CODE, 5, unsigned int)
#define ESOC_WAIT_FOR_CRASH _IOR(ESOC_CODE, 6, unsigned int)
#define ESOC_REG_REQ_ENG _IO(ESOC_CODE, 7)
#define ESOC_REG_CMD_ENG _IO(ESOC_CODE, 8)
#define HSIC "HSIC"
#define HSICPCIe "HSIC+PCIe"
#define PCIe "PCIe"
#define ESOC_REQ_SEND_SHUTDOWN ESOC_REQ_SEND_SHUTDOWN
enum esoc_evt {
ESOC_RUN_STATE = 0x1,
ESOC_UNEXPECTED_RESET,
ESOC_ERR_FATAL,
ESOC_IN_DEBUG,
ESOC_REQ_ENG_ON,
ESOC_REQ_ENG_OFF,
ESOC_CMD_ENG_ON,
ESOC_CMD_ENG_OFF,
ESOC_INVALID_STATE,
};
enum esoc_cmd {
ESOC_PWR_ON = 1,
ESOC_PWR_OFF,
ESOC_FORCE_PWR_OFF,
ESOC_RESET,
ESOC_PREPARE_DEBUG,
ESOC_EXE_DEBUG,
ESOC_EXIT_DEBUG,
};
enum esoc_notify {
ESOC_IMG_XFER_DONE = 1,
ESOC_BOOT_DONE,
ESOC_BOOT_FAIL,
ESOC_IMG_XFER_RETRY,
ESOC_IMG_XFER_FAIL,
ESOC_UPGRADE_AVAILABLE,
ESOC_DEBUG_DONE,
ESOC_DEBUG_FAIL,
ESOC_PRIMARY_CRASH,
ESOC_PRIMARY_REBOOT,
};
enum esoc_req {
ESOC_REQ_IMG = 1,
ESOC_REQ_DEBUG,
ESOC_REQ_SHUTDOWN,
ESOC_REQ_SEND_SHUTDOWN,
};
#endif

View File

@@ -1,67 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _LINUX_ION_H
#define _LINUX_ION_H
#include <linux/ioctl.h>
#include <linux/types.h>
typedef int ion_user_handle_t;
enum ion_heap_type {
ION_HEAP_TYPE_SYSTEM,
ION_HEAP_TYPE_SYSTEM_CONTIG,
ION_HEAP_TYPE_CARVEOUT,
ION_HEAP_TYPE_CHUNK,
ION_HEAP_TYPE_DMA,
ION_HEAP_TYPE_CUSTOM,
ION_NUM_HEAPS = 16,
};
#define ION_HEAP_SYSTEM_MASK ((1 << ION_HEAP_TYPE_SYSTEM))
#define ION_HEAP_SYSTEM_CONTIG_MASK ((1 << ION_HEAP_TYPE_SYSTEM_CONTIG))
#define ION_HEAP_CARVEOUT_MASK ((1 << ION_HEAP_TYPE_CARVEOUT))
#define ION_HEAP_TYPE_DMA_MASK ((1 << ION_HEAP_TYPE_DMA))
#define ION_NUM_HEAP_IDS (sizeof(unsigned int) * 8)
#define ION_FLAG_CACHED 1
#define ION_FLAG_CACHED_NEEDS_SYNC 2
struct ion_allocation_data {
size_t len;
size_t align;
unsigned int heap_id_mask;
unsigned int flags;
ion_user_handle_t handle;
};
struct ion_fd_data {
ion_user_handle_t handle;
int fd;
};
struct ion_handle_data {
ion_user_handle_t handle;
};
struct ion_custom_data {
unsigned int cmd;
unsigned long arg;
};
#define ION_IOC_MAGIC 'I'
#define ION_IOC_ALLOC _IOWR(ION_IOC_MAGIC, 0, struct ion_allocation_data)
#define ION_IOC_FREE _IOWR(ION_IOC_MAGIC, 1, struct ion_handle_data)
#define ION_IOC_MAP _IOWR(ION_IOC_MAGIC, 2, struct ion_fd_data)
#define ION_IOC_SHARE _IOWR(ION_IOC_MAGIC, 4, struct ion_fd_data)
#define ION_IOC_IMPORT _IOWR(ION_IOC_MAGIC, 5, struct ion_fd_data)
#define ION_IOC_SYNC _IOWR(ION_IOC_MAGIC, 7, struct ion_fd_data)
#define ION_IOC_CUSTOM _IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data)
#endif

View File

@@ -1,610 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef IPA_QMI_SERVICE_V01_H
#define IPA_QMI_SERVICE_V01_H
#define QMI_IPA_IPFLTR_NUM_IHL_RANGE_16_EQNS_V01 2
#define QMI_IPA_IPFLTR_NUM_MEQ_32_EQNS_V01 2
#define QMI_IPA_IPFLTR_NUM_IHL_MEQ_32_EQNS_V01 2
#define QMI_IPA_IPFLTR_NUM_MEQ_128_EQNS_V01 2
#define QMI_IPA_MAX_FILTERS_V01 64
#define QMI_IPA_MAX_FILTERS_EX_V01 128
#define QMI_IPA_MAX_PIPES_V01 20
#define QMI_IPA_MAX_APN_V01 8
#define QMI_IPA_MAX_PER_CLIENTS_V01 64
#define QMI_IPA_MAX_CLIENT_DST_PIPES_V01 8
#define QMI_IPA_MAX_UL_FIREWALL_RULES_V01 64
#define IPA_QMI_SUPPORTS_STATS
#define IPA_INT_MAX ((int) (~0U >> 1))
#define IPA_INT_MIN (- IPA_INT_MAX - 1)
enum ipa_qmi_result_type_v01 {
IPA_QMI_RESULT_TYPE_MIN_ENUM_VAL_V01 = IPA_INT_MIN,
IPA_QMI_RESULT_SUCCESS_V01 = 0,
IPA_QMI_RESULT_FAILURE_V01 = 1,
IPA_QMI_RESULT_TYPE_MAX_ENUM_VAL_V01 = IPA_INT_MAX,
};
enum ipa_qmi_error_type_v01 {
IPA_QMI_ERROR_TYPE_MIN_ENUM_VAL_V01 = IPA_INT_MIN,
IPA_QMI_ERR_NONE_V01 = 0x0000,
IPA_QMI_ERR_MALFORMED_MSG_V01 = 0x0001,
IPA_QMI_ERR_NO_MEMORY_V01 = 0x0002,
IPA_QMI_ERR_INTERNAL_V01 = 0x0003,
IPA_QMI_ERR_CLIENT_IDS_EXHAUSTED_V01 = 0x0005,
IPA_QMI_ERR_INVALID_ID_V01 = 0x0029,
IPA_QMI_ERR_ENCODING_V01 = 0x003A,
IPA_QMI_ERR_INCOMPATIBLE_STATE_V01 = 0x005A,
IPA_QMI_ERR_NOT_SUPPORTED_V01 = 0x005E,
IPA_QMI_ERROR_TYPE_MAX_ENUM_VAL_V01 = IPA_INT_MAX,
};
struct ipa_qmi_response_type_v01 {
enum ipa_qmi_result_type_v01 result;
enum ipa_qmi_error_type_v01 error;
};
enum ipa_platform_type_enum_v01 {
IPA_PLATFORM_TYPE_ENUM_MIN_ENUM_VAL_V01 = - 2147483647,
QMI_IPA_PLATFORM_TYPE_INVALID_V01 = 0,
QMI_IPA_PLATFORM_TYPE_TN_V01 = 1,
QMI_IPA_PLATFORM_TYPE_LE_V01 = 2,
QMI_IPA_PLATFORM_TYPE_MSM_ANDROID_V01 = 3,
QMI_IPA_PLATFORM_TYPE_MSM_WINDOWS_V01 = 4,
QMI_IPA_PLATFORM_TYPE_MSM_QNX_V01 = 5,
IPA_PLATFORM_TYPE_ENUM_MAX_ENUM_VAL_V01 = 2147483647
};
struct ipa_hdr_tbl_info_type_v01 {
uint32_t modem_offset_start;
uint32_t modem_offset_end;
};
struct ipa_route_tbl_info_type_v01 {
uint32_t route_tbl_start_addr;
uint32_t num_indices;
};
struct ipa_modem_mem_info_type_v01 {
uint32_t block_start_addr;
uint32_t size;
};
struct ipa_hdr_proc_ctx_tbl_info_type_v01 {
uint32_t modem_offset_start;
uint32_t modem_offset_end;
};
struct ipa_zip_tbl_info_type_v01 {
uint32_t modem_offset_start;
uint32_t modem_offset_end;
};
struct ipa_init_modem_driver_req_msg_v01 {
uint8_t platform_type_valid;
enum ipa_platform_type_enum_v01 platform_type;
uint8_t hdr_tbl_info_valid;
struct ipa_hdr_tbl_info_type_v01 hdr_tbl_info;
uint8_t v4_route_tbl_info_valid;
struct ipa_route_tbl_info_type_v01 v4_route_tbl_info;
uint8_t v6_route_tbl_info_valid;
struct ipa_route_tbl_info_type_v01 v6_route_tbl_info;
uint8_t v4_filter_tbl_start_addr_valid;
uint32_t v4_filter_tbl_start_addr;
uint8_t v6_filter_tbl_start_addr_valid;
uint32_t v6_filter_tbl_start_addr;
uint8_t modem_mem_info_valid;
struct ipa_modem_mem_info_type_v01 modem_mem_info;
uint8_t ctrl_comm_dest_end_pt_valid;
uint32_t ctrl_comm_dest_end_pt;
uint8_t is_ssr_bootup_valid;
uint8_t is_ssr_bootup;
uint8_t hdr_proc_ctx_tbl_info_valid;
struct ipa_hdr_proc_ctx_tbl_info_type_v01 hdr_proc_ctx_tbl_info;
uint8_t zip_tbl_info_valid;
struct ipa_zip_tbl_info_type_v01 zip_tbl_info;
uint8_t v4_hash_route_tbl_info_valid;
struct ipa_route_tbl_info_type_v01 v4_hash_route_tbl_info;
uint8_t v6_hash_route_tbl_info_valid;
struct ipa_route_tbl_info_type_v01 v6_hash_route_tbl_info;
uint8_t v4_hash_filter_tbl_start_addr_valid;
uint32_t v4_hash_filter_tbl_start_addr;
uint8_t v6_hash_filter_tbl_start_addr_valid;
uint32_t v6_hash_filter_tbl_start_addr;
uint8_t hw_stats_quota_base_addr_valid;
uint32_t hw_stats_quota_base_addr;
uint8_t hw_stats_quota_size_valid;
uint32_t hw_stats_quota_size;
uint8_t hw_drop_stats_base_addr_valid;
uint32_t hw_drop_stats_base_addr;
uint8_t hw_drop_stats_table_size_valid;
uint32_t hw_drop_stats_table_size;
};
struct ipa_init_modem_driver_resp_msg_v01 {
struct ipa_qmi_response_type_v01 resp;
uint8_t ctrl_comm_dest_end_pt_valid;
uint32_t ctrl_comm_dest_end_pt;
uint8_t default_end_pt_valid;
uint32_t default_end_pt;
uint8_t modem_driver_init_pending_valid;
uint8_t modem_driver_init_pending;
};
struct ipa_init_modem_driver_cmplt_req_msg_v01 {
uint8_t status;
};
struct ipa_init_modem_driver_cmplt_resp_msg_v01 {
struct ipa_qmi_response_type_v01 resp;
};
struct ipa_indication_reg_req_msg_v01 {
uint8_t master_driver_init_complete_valid;
uint8_t master_driver_init_complete;
uint8_t data_usage_quota_reached_valid;
uint8_t data_usage_quota_reached;
};
struct ipa_indication_reg_resp_msg_v01 {
struct ipa_qmi_response_type_v01 resp;
};
struct ipa_master_driver_init_complt_ind_msg_v01 {
struct ipa_qmi_response_type_v01 master_driver_init_status;
};
struct ipa_ipfltr_range_eq_16_type_v01 {
uint8_t offset;
uint16_t range_low;
uint16_t range_high;
};
struct ipa_ipfltr_mask_eq_32_type_v01 {
uint8_t offset;
uint32_t mask;
uint32_t value;
};
struct ipa_ipfltr_eq_16_type_v01 {
uint8_t offset;
uint16_t value;
};
struct ipa_ipfltr_eq_32_type_v01 {
uint8_t offset;
uint32_t value;
};
struct ipa_ipfltr_mask_eq_128_type_v01 {
uint8_t offset;
uint8_t mask[16];
uint8_t value[16];
};
struct ipa_filter_rule_type_v01 {
uint16_t rule_eq_bitmap;
uint8_t tos_eq_present;
uint8_t tos_eq;
uint8_t protocol_eq_present;
uint8_t protocol_eq;
uint8_t num_ihl_offset_range_16;
struct ipa_ipfltr_range_eq_16_type_v01 ihl_offset_range_16[QMI_IPA_IPFLTR_NUM_IHL_RANGE_16_EQNS_V01];
uint8_t num_offset_meq_32;
struct ipa_ipfltr_mask_eq_32_type_v01 offset_meq_32[QMI_IPA_IPFLTR_NUM_MEQ_32_EQNS_V01];
uint8_t tc_eq_present;
uint8_t tc_eq;
uint8_t flow_eq_present;
uint32_t flow_eq;
uint8_t ihl_offset_eq_16_present;
struct ipa_ipfltr_eq_16_type_v01 ihl_offset_eq_16;
uint8_t ihl_offset_eq_32_present;
struct ipa_ipfltr_eq_32_type_v01 ihl_offset_eq_32;
uint8_t num_ihl_offset_meq_32;
struct ipa_ipfltr_mask_eq_32_type_v01 ihl_offset_meq_32[QMI_IPA_IPFLTR_NUM_IHL_MEQ_32_EQNS_V01];
uint8_t num_offset_meq_128;
struct ipa_ipfltr_mask_eq_128_type_v01 offset_meq_128[QMI_IPA_IPFLTR_NUM_MEQ_128_EQNS_V01];
uint8_t metadata_meq32_present;
struct ipa_ipfltr_mask_eq_32_type_v01 metadata_meq32;
uint8_t ipv4_frag_eq_present;
};
enum ipa_ip_type_enum_v01 {
IPA_IP_TYPE_ENUM_MIN_ENUM_VAL_V01 = - 2147483647,
QMI_IPA_IP_TYPE_INVALID_V01 = 0,
QMI_IPA_IP_TYPE_V4_V01 = 1,
QMI_IPA_IP_TYPE_V6_V01 = 2,
QMI_IPA_IP_TYPE_V4V6_V01 = 3,
IPA_IP_TYPE_ENUM_MAX_ENUM_VAL_V01 = 2147483647
};
enum ipa_filter_action_enum_v01 {
IPA_FILTER_ACTION_ENUM_MIN_ENUM_VAL_V01 = - 2147483647,
QMI_IPA_FILTER_ACTION_INVALID_V01 = 0,
QMI_IPA_FILTER_ACTION_SRC_NAT_V01 = 1,
QMI_IPA_FILTER_ACTION_DST_NAT_V01 = 2,
QMI_IPA_FILTER_ACTION_ROUTING_V01 = 3,
QMI_IPA_FILTER_ACTION_EXCEPTION_V01 = 4,
IPA_FILTER_ACTION_ENUM_MAX_ENUM_VAL_V01 = 2147483647
};
struct ipa_filter_spec_type_v01 {
uint32_t filter_spec_identifier;
enum ipa_ip_type_enum_v01 ip_type;
struct ipa_filter_rule_type_v01 filter_rule;
enum ipa_filter_action_enum_v01 filter_action;
uint8_t is_routing_table_index_valid;
uint32_t route_table_index;
uint8_t is_mux_id_valid;
uint32_t mux_id;
};
struct ipa_filter_spec_ex_type_v01 {
enum ipa_ip_type_enum_v01 ip_type;
struct ipa_filter_rule_type_v01 filter_rule;
enum ipa_filter_action_enum_v01 filter_action;
uint8_t is_routing_table_index_valid;
uint32_t route_table_index;
uint8_t is_mux_id_valid;
uint32_t mux_id;
uint32_t rule_id;
uint8_t is_rule_hashable;
};
struct ipa_install_fltr_rule_req_msg_v01 {
uint8_t filter_spec_list_valid;
uint32_t filter_spec_list_len;
struct ipa_filter_spec_type_v01 filter_spec_list[QMI_IPA_MAX_FILTERS_V01];
uint8_t source_pipe_index_valid;
uint32_t source_pipe_index;
uint8_t num_ipv4_filters_valid;
uint32_t num_ipv4_filters;
uint8_t num_ipv6_filters_valid;
uint32_t num_ipv6_filters;
uint8_t xlat_filter_indices_list_valid;
uint32_t xlat_filter_indices_list_len;
uint32_t xlat_filter_indices_list[QMI_IPA_MAX_FILTERS_V01];
uint8_t filter_spec_ex_list_valid;
uint32_t filter_spec_ex_list_len;
struct ipa_filter_spec_ex_type_v01 filter_spec_ex_list[QMI_IPA_MAX_FILTERS_V01];
};
struct ipa_filter_rule_identifier_to_handle_map_v01 {
uint32_t filter_spec_identifier;
uint32_t filter_handle;
};
struct ipa_install_fltr_rule_resp_msg_v01 {
struct ipa_qmi_response_type_v01 resp;
uint8_t filter_handle_list_valid;
uint32_t filter_handle_list_len;
struct ipa_filter_rule_identifier_to_handle_map_v01 filter_handle_list[QMI_IPA_MAX_FILTERS_V01];
uint8_t rule_id_valid;
uint32_t rule_id_len;
uint32_t rule_id[QMI_IPA_MAX_FILTERS_V01];
};
struct ipa_filter_handle_to_index_map_v01 {
uint32_t filter_handle;
uint32_t filter_index;
};
struct ipa_fltr_installed_notif_req_msg_v01 {
uint32_t source_pipe_index;
enum ipa_qmi_result_type_v01 install_status;
uint32_t filter_index_list_len;
struct ipa_filter_handle_to_index_map_v01 filter_index_list[QMI_IPA_MAX_FILTERS_V01];
uint8_t embedded_pipe_index_valid;
uint32_t embedded_pipe_index;
uint8_t retain_header_valid;
uint8_t retain_header;
uint8_t embedded_call_mux_id_valid;
uint32_t embedded_call_mux_id;
uint8_t num_ipv4_filters_valid;
uint32_t num_ipv4_filters;
uint8_t num_ipv6_filters_valid;
uint32_t num_ipv6_filters;
uint8_t start_ipv4_filter_idx_valid;
uint32_t start_ipv4_filter_idx;
uint8_t start_ipv6_filter_idx_valid;
uint32_t start_ipv6_filter_idx;
uint8_t rule_id_valid;
uint32_t rule_id_len;
uint32_t rule_id[QMI_IPA_MAX_FILTERS_V01];
uint8_t dst_pipe_id_valid;
uint32_t dst_pipe_id_len;
uint32_t dst_pipe_id[QMI_IPA_MAX_CLIENT_DST_PIPES_V01];
};
struct ipa_fltr_installed_notif_resp_msg_v01 {
struct ipa_qmi_response_type_v01 resp;
};
struct ipa_enable_force_clear_datapath_req_msg_v01 {
uint32_t source_pipe_bitmask;
uint32_t request_id;
uint8_t throttle_source_valid;
uint8_t throttle_source;
};
struct ipa_enable_force_clear_datapath_resp_msg_v01 {
struct ipa_qmi_response_type_v01 resp;
};
struct ipa_disable_force_clear_datapath_req_msg_v01 {
uint32_t request_id;
};
struct ipa_disable_force_clear_datapath_resp_msg_v01 {
struct ipa_qmi_response_type_v01 resp;
};
enum ipa_peripheral_speed_enum_v01 {
IPA_PERIPHERAL_SPEED_ENUM_MIN_ENUM_VAL_V01 = - 2147483647,
QMI_IPA_PER_USB_FS_V01 = 1,
QMI_IPA_PER_USB_HS_V01 = 2,
QMI_IPA_PER_USB_SS_V01 = 3,
QMI_IPA_PER_WLAN_V01 = 4,
IPA_PERIPHERAL_SPEED_ENUM_MAX_ENUM_VAL_V01 = 2147483647
};
enum ipa_pipe_mode_enum_v01 {
IPA_PIPE_MODE_ENUM_MIN_ENUM_VAL_V01 = - 2147483647,
QMI_IPA_PIPE_MODE_HW_V01 = 1,
QMI_IPA_PIPE_MODE_SW_V01 = 2,
IPA_PIPE_MODE_ENUM_MAX_ENUM_VAL_V01 = 2147483647
};
enum ipa_peripheral_type_enum_v01 {
IPA_PERIPHERAL_TYPE_ENUM_MIN_ENUM_VAL_V01 = - 2147483647,
QMI_IPA_PERIPHERAL_USB_V01 = 1,
QMI_IPA_PERIPHERAL_HSIC_V01 = 2,
QMI_IPA_PERIPHERAL_PCIE_V01 = 3,
IPA_PERIPHERAL_TYPE_ENUM_MAX_ENUM_VAL_V01 = 2147483647
};
struct ipa_config_req_msg_v01 {
uint8_t peripheral_type_valid;
enum ipa_peripheral_type_enum_v01 peripheral_type;
uint8_t hw_deaggr_supported_valid;
uint8_t hw_deaggr_supported;
uint8_t max_aggr_frame_size_valid;
uint32_t max_aggr_frame_size;
uint8_t ipa_ingress_pipe_mode_valid;
enum ipa_pipe_mode_enum_v01 ipa_ingress_pipe_mode;
uint8_t peripheral_speed_info_valid;
enum ipa_peripheral_speed_enum_v01 peripheral_speed_info;
uint8_t dl_accumulation_time_limit_valid;
uint32_t dl_accumulation_time_limit;
uint8_t dl_accumulation_pkt_limit_valid;
uint32_t dl_accumulation_pkt_limit;
uint8_t dl_accumulation_byte_limit_valid;
uint32_t dl_accumulation_byte_limit;
uint8_t ul_accumulation_time_limit_valid;
uint32_t ul_accumulation_time_limit;
uint8_t hw_control_flags_valid;
uint32_t hw_control_flags;
uint8_t ul_msi_event_threshold_valid;
uint32_t ul_msi_event_threshold;
uint8_t dl_msi_event_threshold_valid;
uint32_t dl_msi_event_threshold;
uint8_t ul_fifo_size_valid;
uint32_t ul_fifo_size;
uint8_t dl_fifo_size_valid;
uint32_t dl_fifo_size;
uint8_t dl_buf_size_valid;
uint32_t dl_buf_size;
};
struct ipa_config_resp_msg_v01 {
struct ipa_qmi_response_type_v01 resp;
};
enum ipa_stats_type_enum_v01 {
IPA_STATS_TYPE_ENUM_MIN_ENUM_VAL_V01 = - 2147483647,
QMI_IPA_STATS_TYPE_INVALID_V01 = 0,
QMI_IPA_STATS_TYPE_PIPE_V01 = 1,
QMI_IPA_STATS_TYPE_FILTER_RULES_V01 = 2,
IPA_STATS_TYPE_ENUM_MAX_ENUM_VAL_V01 = 2147483647
};
struct ipa_pipe_stats_info_type_v01 {
uint32_t pipe_index;
uint64_t num_ipv4_packets;
uint64_t num_ipv4_bytes;
uint64_t num_ipv6_packets;
uint64_t num_ipv6_bytes;
};
struct ipa_stats_type_filter_rule_v01 {
uint32_t filter_rule_index;
uint64_t num_packets;
};
struct ipa_get_data_stats_req_msg_v01 {
enum ipa_stats_type_enum_v01 ipa_stats_type;
uint8_t reset_stats_valid;
uint8_t reset_stats;
};
struct ipa_get_data_stats_resp_msg_v01 {
struct ipa_qmi_response_type_v01 resp;
uint8_t ipa_stats_type_valid;
enum ipa_stats_type_enum_v01 ipa_stats_type;
uint8_t ul_src_pipe_stats_list_valid;
uint32_t ul_src_pipe_stats_list_len;
struct ipa_pipe_stats_info_type_v01 ul_src_pipe_stats_list[QMI_IPA_MAX_PIPES_V01];
uint8_t dl_dst_pipe_stats_list_valid;
uint32_t dl_dst_pipe_stats_list_len;
struct ipa_pipe_stats_info_type_v01 dl_dst_pipe_stats_list[QMI_IPA_MAX_PIPES_V01];
uint8_t dl_filter_rule_stats_list_valid;
uint32_t dl_filter_rule_stats_list_len;
struct ipa_stats_type_filter_rule_v01 dl_filter_rule_stats_list[QMI_IPA_MAX_FILTERS_V01];
};
struct ipa_apn_data_stats_info_type_v01 {
uint32_t mux_id;
uint64_t num_ul_packets;
uint64_t num_ul_bytes;
uint64_t num_dl_packets;
uint64_t num_dl_bytes;
};
struct ipa_get_apn_data_stats_req_msg_v01 {
uint8_t mux_id_list_valid;
uint32_t mux_id_list_len;
uint32_t mux_id_list[QMI_IPA_MAX_APN_V01];
};
struct ipa_get_apn_data_stats_resp_msg_v01 {
struct ipa_qmi_response_type_v01 resp;
uint8_t apn_data_stats_list_valid;
uint32_t apn_data_stats_list_len;
struct ipa_apn_data_stats_info_type_v01 apn_data_stats_list[QMI_IPA_MAX_APN_V01];
};
struct ipa_data_usage_quota_info_type_v01 {
uint32_t mux_id;
uint64_t num_Mbytes;
};
struct ipa_set_data_usage_quota_req_msg_v01 {
uint8_t apn_quota_list_valid;
uint32_t apn_quota_list_len;
struct ipa_data_usage_quota_info_type_v01 apn_quota_list[QMI_IPA_MAX_APN_V01];
};
struct ipa_set_data_usage_quota_resp_msg_v01 {
struct ipa_qmi_response_type_v01 resp;
};
struct ipa_data_usage_quota_reached_ind_msg_v01 {
struct ipa_data_usage_quota_info_type_v01 apn;
};
struct ipa_stop_data_usage_quota_req_msg_v01 {
char __placeholder;
};
struct ipa_stop_data_usage_quota_resp_msg_v01 {
struct ipa_qmi_response_type_v01 resp;
};
struct ipa_install_fltr_rule_req_ex_msg_v01 {
uint8_t filter_spec_ex_list_valid;
uint32_t filter_spec_ex_list_len;
struct ipa_filter_spec_ex_type_v01 filter_spec_ex_list[QMI_IPA_MAX_FILTERS_EX_V01];
uint8_t source_pipe_index_valid;
uint32_t source_pipe_index;
uint8_t num_ipv4_filters_valid;
uint32_t num_ipv4_filters;
uint8_t num_ipv6_filters_valid;
uint32_t num_ipv6_filters;
uint8_t xlat_filter_indices_list_valid;
uint32_t xlat_filter_indices_list_len;
uint32_t xlat_filter_indices_list[QMI_IPA_MAX_FILTERS_EX_V01];
};
struct ipa_install_fltr_rule_resp_ex_msg_v01 {
struct ipa_qmi_response_type_v01 resp;
uint8_t rule_id_valid;
uint32_t rule_id_len;
uint32_t rule_id[QMI_IPA_MAX_FILTERS_EX_V01];
};
struct ipa_enable_per_client_stats_req_msg_v01 {
uint8_t enable_per_client_stats;
};
struct ipa_enable_per_client_stats_resp_msg_v01 {
struct ipa_qmi_response_type_v01 resp;
};
struct ipa_per_client_stats_info_type_v01 {
uint32_t client_id;
uint32_t src_pipe_id;
uint64_t num_ul_ipv4_bytes;
uint64_t num_ul_ipv6_bytes;
uint64_t num_dl_ipv4_bytes;
uint64_t num_dl_ipv6_bytes;
uint32_t num_ul_ipv4_pkts;
uint32_t num_ul_ipv6_pkts;
uint32_t num_dl_ipv4_pkts;
uint32_t num_dl_ipv6_pkts;
};
struct ipa_get_stats_per_client_req_msg_v01 {
uint32_t client_id;
uint32_t src_pipe_id;
uint8_t reset_stats_valid;
uint8_t reset_stats;
};
struct ipa_get_stats_per_client_resp_msg_v01 {
struct ipa_qmi_response_type_v01 resp;
uint8_t per_client_stats_list_valid;
uint32_t per_client_stats_list_len;
struct ipa_per_client_stats_info_type_v01 per_client_stats_list[QMI_IPA_MAX_PER_CLIENTS_V01];
};
struct ipa_ul_firewall_rule_type_v01 {
enum ipa_ip_type_enum_v01 ip_type;
struct ipa_filter_rule_type_v01 filter_rule;
};
struct ipa_configure_ul_firewall_rules_req_msg_v01 {
uint32_t firewall_rules_list_len;
struct ipa_ul_firewall_rule_type_v01 firewall_rules_list[QMI_IPA_MAX_UL_FIREWALL_RULES_V01];
uint32_t mux_id;
uint8_t disable_valid;
uint8_t disable;
uint8_t are_blacklist_filters_valid;
uint8_t are_blacklist_filters;
};
struct ipa_configure_ul_firewall_rules_resp_msg_v01 {
struct ipa_qmi_response_type_v01 resp;
};
enum ipa_ul_firewall_status_enum_v01 {
IPA_UL_FIREWALL_STATUS_ENUM_MIN_ENUM_VAL_V01 = - 2147483647,
QMI_IPA_UL_FIREWALL_STATUS_SUCCESS_V01 = 0,
QMI_IPA_UL_FIREWALL_STATUS_FAILURE_V01 = 1,
IPA_UL_FIREWALL_STATUS_ENUM_MAX_ENUM_VAL_V01 = 2147483647
};
struct ipa_ul_firewall_config_result_type_v01 {
enum ipa_ul_firewall_status_enum_v01 is_success;
uint32_t mux_id;
};
struct ipa_configure_ul_firewall_rules_ind_msg_v01 {
struct ipa_ul_firewall_config_result_type_v01 result;
};
#define QMI_IPA_INDICATION_REGISTER_REQ_V01 0x0020
#define QMI_IPA_INDICATION_REGISTER_RESP_V01 0x0020
#define QMI_IPA_INIT_MODEM_DRIVER_REQ_V01 0x0021
#define QMI_IPA_INIT_MODEM_DRIVER_RESP_V01 0x0021
#define QMI_IPA_MASTER_DRIVER_INIT_COMPLETE_IND_V01 0x0022
#define QMI_IPA_INSTALL_FILTER_RULE_REQ_V01 0x0023
#define QMI_IPA_INSTALL_FILTER_RULE_RESP_V01 0x0023
#define QMI_IPA_FILTER_INSTALLED_NOTIF_REQ_V01 0x0024
#define QMI_IPA_FILTER_INSTALLED_NOTIF_RESP_V01 0x0024
#define QMI_IPA_ENABLE_FORCE_CLEAR_DATAPATH_REQ_V01 0x0025
#define QMI_IPA_ENABLE_FORCE_CLEAR_DATAPATH_RESP_V01 0x0025
#define QMI_IPA_DISABLE_FORCE_CLEAR_DATAPATH_REQ_V01 0x0026
#define QMI_IPA_DISABLE_FORCE_CLEAR_DATAPATH_RESP_V01 0x0026
#define QMI_IPA_CONFIG_REQ_V01 0x0027
#define QMI_IPA_CONFIG_RESP_V01 0x0027
#define QMI_IPA_DISABLE_LINK_LOW_PWR_STATE_REQ_V01 0x0028
#define QMI_IPA_DISABLE_LINK_LOW_PWR_STATE_RESP_V01 0x0028
#define QMI_IPA_ENABLE_LINK_LOW_PWR_STATE_REQ_V01 0x0029
#define QMI_IPA_ENABLE_LINK_LOW_PWR_STATE_RESP_V01 0x0029
#define QMI_IPA_GET_DATA_STATS_REQ_V01 0x0030
#define QMI_IPA_GET_DATA_STATS_RESP_V01 0x0030
#define QMI_IPA_GET_APN_DATA_STATS_REQ_V01 0x0031
#define QMI_IPA_GET_APN_DATA_STATS_RESP_V01 0x0031
#define QMI_IPA_SET_DATA_USAGE_QUOTA_REQ_V01 0x0032
#define QMI_IPA_SET_DATA_USAGE_QUOTA_RESP_V01 0x0032
#define QMI_IPA_DATA_USAGE_QUOTA_REACHED_IND_V01 0x0033
#define QMI_IPA_STOP_DATA_USAGE_QUOTA_REQ_V01 0x0034
#define QMI_IPA_STOP_DATA_USAGE_QUOTA_RESP_V01 0x0034
#define QMI_IPA_INIT_MODEM_DRIVER_CMPLT_REQ_V01 0x0035
#define QMI_IPA_INIT_MODEM_DRIVER_CMPLT_RESP_V01 0x0035
#define QMI_IPA_INSTALL_FILTER_RULE_EX_REQ_V01 0x0037
#define QMI_IPA_INSTALL_FILTER_RULE_EX_RESP_V01 0x0037
#define QMI_IPA_ENABLE_PER_CLIENT_STATS_REQ_V01 0x0038
#define QMI_IPA_ENABLE_PER_CLIENT_STATS_RESP_V01 0x0038
#define QMI_IPA_GET_STATS_PER_CLIENT_REQ_V01 0x0039
#define QMI_IPA_GET_STATS_PER_CLIENT_RESP_V01 0x0039
#define QMI_IPA_INSTALL_UL_FIREWALL_RULES_REQ_V01 0x003A
#define QMI_IPA_INSTALL_UL_FIREWALL_RULES_RESP_V01 0x003A
#define QMI_IPA_INSTALL_UL_FIREWALL_RULES_IND_V01 0x003A
#define QMI_IPA_INIT_MODEM_DRIVER_REQ_MAX_MSG_LEN_V01 162
#define QMI_IPA_INIT_MODEM_DRIVER_RESP_MAX_MSG_LEN_V01 25
#define QMI_IPA_INDICATION_REGISTER_REQ_MAX_MSG_LEN_V01 8
#define QMI_IPA_INDICATION_REGISTER_RESP_MAX_MSG_LEN_V01 7
#define QMI_IPA_INSTALL_FILTER_RULE_REQ_MAX_MSG_LEN_V01 22369
#define QMI_IPA_INSTALL_FILTER_RULE_RESP_MAX_MSG_LEN_V01 783
#define QMI_IPA_FILTER_INSTALLED_NOTIF_REQ_MAX_MSG_LEN_V01 870
#define QMI_IPA_FILTER_INSTALLED_NOTIF_RESP_MAX_MSG_LEN_V01 7
#define QMI_IPA_MASTER_DRIVER_INIT_COMPLETE_IND_MAX_MSG_LEN_V01 7
#define QMI_IPA_DATA_USAGE_QUOTA_REACHED_IND_MAX_MSG_LEN_V01 15
#define QMI_IPA_ENABLE_FORCE_CLEAR_DATAPATH_REQ_MAX_MSG_LEN_V01 18
#define QMI_IPA_DISABLE_FORCE_CLEAR_DATAPATH_REQ_MAX_MSG_LEN_V01 7
#define QMI_IPA_ENABLE_FORCE_CLEAR_DATAPATH_RESP_MAX_MSG_LEN_V01 7
#define QMI_IPA_DISABLE_FORCE_CLEAR_DATAPATH_RESP_MAX_MSG_LEN_V01 7
#define QMI_IPA_CONFIG_REQ_MAX_MSG_LEN_V01 102
#define QMI_IPA_CONFIG_RESP_MAX_MSG_LEN_V01 7
#define QMI_IPA_DISABLE_LINK_LOW_PWR_STATE_REQ_MAX_MSG_LEN_V01 18
#define QMI_IPA_DISABLE_LINK_LOW_PWR_STATE_RESP_MAX_MSG_LEN_V01 7
#define QMI_IPA_ENABLE_LINK_LOW_PWR_STATE_REQ_MAX_MSG_LEN_V01 7
#define QMI_IPA_ENABLE_LINK_LOW_PWR_STATE_RESP_MAX_MSG_LEN_V01 7
#define QMI_IPA_GET_DATA_STATS_REQ_MAX_MSG_LEN_V01 11
#define QMI_IPA_GET_DATA_STATS_RESP_MAX_MSG_LEN_V01 2234
#define QMI_IPA_GET_APN_DATA_STATS_REQ_MAX_MSG_LEN_V01 36
#define QMI_IPA_GET_APN_DATA_STATS_RESP_MAX_MSG_LEN_V01 299
#define QMI_IPA_SET_DATA_USAGE_QUOTA_REQ_MAX_MSG_LEN_V01 100
#define QMI_IPA_SET_DATA_USAGE_QUOTA_RESP_MAX_MSG_LEN_V01 7
#define QMI_IPA_STOP_DATA_USAGE_QUOTA_REQ_MAX_MSG_LEN_V01 0
#define QMI_IPA_STOP_DATA_USAGE_QUOTA_RESP_MAX_MSG_LEN_V01 7
#define QMI_IPA_INIT_MODEM_DRIVER_CMPLT_REQ_MAX_MSG_LEN_V01 4
#define QMI_IPA_INIT_MODEM_DRIVER_CMPLT_RESP_MAX_MSG_LEN_V01 7
#define QMI_IPA_INSTALL_FILTER_RULE_EX_REQ_MAX_MSG_LEN_V01 22685
#define QMI_IPA_INSTALL_FILTER_RULE_EX_RESP_MAX_MSG_LEN_V01 523
#define QMI_IPA_ENABLE_PER_CLIENT_STATS_REQ_MAX_MSG_LEN_V01 4
#define QMI_IPA_ENABLE_PER_CLIENT_STATS_RESP_MAX_MSG_LEN_V01 7
#define QMI_IPA_GET_STATS_PER_CLIENT_REQ_MAX_MSG_LEN_V01 18
#define QMI_IPA_GET_STATS_PER_CLIENT_RESP_MAX_MSG_LEN_V01 3595
#define QMI_IPA_INSTALL_UL_FIREWALL_RULES_REQ_MAX_MSG_LEN_V01 9875
#define QMI_IPA_INSTALL_UL_FIREWALL_RULES_RESP_MAX_MSG_LEN_V01 7
#define QMI_IPA_INSTALL_UL_FIREWALL_RULES_IND_MAX_MSG_LEN_V01 11
#endif

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@@ -1,73 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MDSS_ROTATOR_H_
#define _MDSS_ROTATOR_H_
#include <linux/msm_mdp_ext.h>
#define MDSS_ROTATOR_IOCTL_MAGIC 'w'
#define MDSS_ROTATION_OPEN _IOWR(MDSS_ROTATOR_IOCTL_MAGIC, 1, struct mdp_rotation_config *)
#define MDSS_ROTATION_CONFIG _IOWR(MDSS_ROTATOR_IOCTL_MAGIC, 2, struct mdp_rotation_config *)
#define MDSS_ROTATION_REQUEST _IOWR(MDSS_ROTATOR_IOCTL_MAGIC, 3, struct mdp_rotation_request *)
#define MDSS_ROTATION_CLOSE _IOW(MDSS_ROTATOR_IOCTL_MAGIC, 4, unsigned int)
#define MDP_ROTATION_NOP 0x01
#define MDP_ROTATION_FLIP_LR 0x02
#define MDP_ROTATION_FLIP_UD 0x04
#define MDP_ROTATION_90 0x08
#define MDP_ROTATION_180 (MDP_ROTATION_FLIP_LR | MDP_ROTATION_FLIP_UD)
#define MDP_ROTATION_270 (MDP_ROTATION_90 | MDP_ROTATION_180)
#define MDP_ROTATION_DEINTERLACE 0x10
#define MDP_ROTATION_BWC_EN 0x40
#define MDP_ROTATION_SECURE 0x80
#define MDSS_ROTATION_REQUEST_VALIDATE 0x01
#define MDP_ROTATION_REQUEST_VERSION_1_0 0x00010000
#define MDSS_ROTATION_HW_ANY 0xFFFFFFFF
struct mdp_rotation_buf_info {
uint32_t width;
uint32_t height;
uint32_t format;
struct mult_factor comp_ratio;
};
struct mdp_rotation_config {
uint32_t version;
uint32_t session_id;
struct mdp_rotation_buf_info input;
struct mdp_rotation_buf_info output;
uint32_t frame_rate;
uint32_t flags;
uint32_t reserved[6];
};
struct mdp_rotation_item {
uint32_t flags;
struct mdp_rect src_rect;
struct mdp_rect dst_rect;
struct mdp_layer_buffer input;
struct mdp_layer_buffer output;
uint32_t pipe_idx;
uint32_t wb_idx;
uint32_t session_id;
uint32_t reserved[6];
};
struct mdp_rotation_request {
uint32_t version;
uint32_t flags;
uint32_t count;
struct mdp_rotation_item * list;
uint32_t reserved[6];
};
#endif

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@@ -1,80 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef __UAPI_MFD_MSM_ADIE_CODEC_H
#define __UAPI_MFD_MSM_ADIE_CODEC_H
#include <linux/types.h>
#define ADIE_CODEC_ACTION_ENTRY 0x1
#define ADIE_CODEC_ACTION_DELAY_WAIT 0x2
#define ADIE_CODEC_ACTION_STAGE_REACHED 0x3
#define ADIE_CODEC_PATH_OFF 0x0050
#define ADIE_CODEC_DIGITAL_READY 0x0100
#define ADIE_CODEC_DIGITAL_ANALOG_READY 0x1000
#define ADIE_CODEC_ANALOG_OFF 0x0750
#define ADIE_CODEC_DIGITAL_OFF 0x0600
#define ADIE_CODEC_FLASH_IMAGE 0x0001
#define ADIE_CODEC_RX 0
#define ADIE_CODEC_TX 1
#define ADIE_CODEC_LB 3
#define ADIE_CODEC_MAX 4
#define ADIE_CODEC_PACK_ENTRY(reg,mask,val) ((val) | (mask << 8) | (reg << 16))
#define ADIE_CODEC_UNPACK_ENTRY(packed,reg,mask,val) do { ((reg) = ((packed >> 16) & (0xff))); ((mask) = ((packed >> 8) & (0xff))); ((val) = ((packed) & (0xff))); } while(0);
struct adie_codec_action_unit {
u32 type;
u32 action;
};
struct adie_codec_hwsetting_entry {
struct adie_codec_action_unit * actions;
u32 action_sz;
u32 freq_plan;
u32 osr;
};
struct adie_codec_dev_profile {
u32 path_type;
u32 setting_sz;
struct adie_codec_hwsetting_entry * settings;
};
struct adie_codec_register {
u8 reg;
u8 mask;
u8 val;
};
struct adie_codec_register_image {
struct adie_codec_register * regs;
u32 img_sz;
};
struct adie_codec_path;
struct adie_codec_anc_data {
u32 size;
u32 writes[];
};
struct adie_codec_operations {
int codec_id;
int(* codec_open) (struct adie_codec_dev_profile * profile, struct adie_codec_path * * path_pptr);
int(* codec_close) (struct adie_codec_path * path_ptr);
int(* codec_setpath) (struct adie_codec_path * path_ptr, u32 freq_plan, u32 osr);
int(* codec_proceed_stage) (struct adie_codec_path * path_ptr, u32 state);
u32(* codec_freq_supported) (struct adie_codec_dev_profile * profile, u32 requested_freq);
int(* codec_enable_sidetone) (struct adie_codec_path * rx_path_ptr, u32 enable);
int(* codec_enable_anc) (struct adie_codec_path * rx_path_ptr, u32 enable, struct adie_codec_anc_data * calibration_writes);
int(* codec_set_device_digital_volume) (struct adie_codec_path * path_ptr, u32 num_channels, u32 vol_percentage);
int(* codec_set_device_analog_volume) (struct adie_codec_path * path_ptr, u32 num_channels, u32 volume);
int(* codec_set_master_mode) (struct adie_codec_path * path_ptr, u8 master);
};
#endif

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@@ -1,364 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef WCD9XXX_CODEC_DIGITAL_H
#define WCD9XXX_CODEC_DIGITAL_H
#define WCD9XXX_A_CHIP_CTL (0x00)
#define WCD9XXX_A_CHIP_CTL__POR (0x00000000)
#define WCD9XXX_A_CHIP_STATUS (0x01)
#define WCD9XXX_A_CHIP_STATUS__POR (0x00000000)
#define WCD9XXX_A_CHIP_ID_BYTE_0 (0x04)
#define WCD9XXX_A_CHIP_ID_BYTE_0__POR (0x00000000)
#define WCD9XXX_A_CHIP_ID_BYTE_1 (0x05)
#define WCD9XXX_A_CHIP_ID_BYTE_1__POR (0x00000000)
#define WCD9XXX_A_CHIP_ID_BYTE_2 (0x06)
#define WCD9XXX_A_CHIP_ID_BYTE_2__POR (0x00000000)
#define WCD9XXX_A_CHIP_ID_BYTE_3 (0x07)
#define WCD9XXX_A_CHIP_ID_BYTE_3__POR (0x00000001)
#define WCD9XXX_A_CHIP_VERSION (0x08)
#define WCD9XXX_A_CHIP_VERSION__POR (0x00000020)
#define WCD9XXX_A_SB_VERSION (0x09)
#define WCD9XXX_A_SB_VERSION__POR (0x00000010)
#define WCD9XXX_A_SLAVE_ID_1 (0x0C)
#define WCD9XXX_A_SLAVE_ID_1__POR (0x00000077)
#define WCD9XXX_A_SLAVE_ID_2 (0x0D)
#define WCD9XXX_A_SLAVE_ID_2__POR (0x00000066)
#define WCD9XXX_A_SLAVE_ID_3 (0x0E)
#define WCD9XXX_A_SLAVE_ID_3__POR (0x00000055)
#define WCD9XXX_A_CDC_CTL (0x80)
#define WCD9XXX_A_CDC_CTL__POR (0x00000000)
#define WCD9XXX_A_LEAKAGE_CTL (0x88)
#define WCD9XXX_A_LEAKAGE_CTL__POR (0x00000004)
#define WCD9XXX_A_INTR_MODE (0x90)
#define WCD9XXX_A_INTR_MASK0 (0x94)
#define WCD9XXX_A_INTR_STATUS0 (0x98)
#define WCD9XXX_A_INTR_CLEAR0 (0x9C)
#define WCD9XXX_A_INTR_LEVEL0 (0xA0)
#define WCD9XXX_A_INTR_LEVEL1 (0xA1)
#define WCD9XXX_A_INTR_LEVEL2 (0xA2)
#define WCD9XXX_A_RX_HPH_CNP_EN (0x1AB)
#define WCD9XXX_A_RX_HPH_CNP_EN__POR (0x80)
#define WCD9XXX_A_RX_HPH_CNP_EN (0x1AB)
#define WCD9XXX_A_RX_HPH_CNP_EN__POR (0x80)
#define WCD9XXX_A_BIAS_CENTRAL_BG_CTL (0x101)
#define WCD9XXX_A_BIAS_CENTRAL_BG_CTL__POR (0x50)
#define WCD9XXX_A_CLK_BUFF_EN1 (0x108)
#define WCD9XXX_A_CLK_BUFF_EN1__POR (0x04)
#define WCD9XXX_A_CLK_BUFF_EN2 (0x109)
#define WCD9XXX_A_CLK_BUFF_EN2__POR (0x02)
#define WCD9XXX_A_RX_COM_BIAS (0x1A2)
#define WCD9XXX_A_RX_COM_BIAS__POR (0x00)
#define WCD9XXX_A_RC_OSC_FREQ (0x1FA)
#define WCD9XXX_A_RC_OSC_FREQ__POR (0x46)
#define WCD9XXX_A_BIAS_OSC_BG_CTL (0x105)
#define WCD9XXX_A_BIAS_OSC_BG_CTL__POR (0x16)
#define WCD9XXX_A_RC_OSC_TEST (0x1FB)
#define WCD9XXX_A_RC_OSC_TEST__POR (0x0A)
#define WCD9XXX_A_CDC_CLK_MCLK_CTL (0x311)
#define WCD9XXX_A_CDC_CLK_MCLK_CTL__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_EN_CTL (0x3C0)
#define WCD9XXX_A_CDC_MBHC_EN_CTL__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_FIR_B1_CFG (0x3C1)
#define WCD9XXX_A_CDC_MBHC_FIR_B1_CFG__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_FIR_B2_CFG (0x3C2)
#define WCD9XXX_A_CDC_MBHC_FIR_B2_CFG__POR (0x06)
#define WCD9XXX_A_CDC_MBHC_TIMER_B1_CTL (0x3C3)
#define WCD9XXX_A_CDC_MBHC_TIMER_B1_CTL__POR (0x03)
#define WCD9XXX_A_CDC_MBHC_TIMER_B2_CTL (0x3C4)
#define WCD9XXX_A_CDC_MBHC_TIMER_B2_CTL__POR (0x09)
#define WCD9XXX_A_CDC_MBHC_TIMER_B3_CTL (0x3C5)
#define WCD9XXX_A_CDC_MBHC_TIMER_B3_CTL__POR (0x1E)
#define WCD9XXX_A_CDC_MBHC_TIMER_B4_CTL (0x3C6)
#define WCD9XXX_A_CDC_MBHC_TIMER_B4_CTL__POR (0x45)
#define WCD9XXX_A_CDC_MBHC_TIMER_B5_CTL (0x3C7)
#define WCD9XXX_A_CDC_MBHC_TIMER_B5_CTL__POR (0x04)
#define WCD9XXX_A_CDC_MBHC_TIMER_B6_CTL (0x3C8)
#define WCD9XXX_A_CDC_MBHC_TIMER_B6_CTL__POR (0x78)
#define WCD9XXX_A_CDC_MBHC_B1_STATUS (0x3C9)
#define WCD9XXX_A_CDC_MBHC_B1_STATUS__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_B2_STATUS (0x3CA)
#define WCD9XXX_A_CDC_MBHC_B2_STATUS__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_B3_STATUS (0x3CB)
#define WCD9XXX_A_CDC_MBHC_B3_STATUS__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_B4_STATUS (0x3CC)
#define WCD9XXX_A_CDC_MBHC_B4_STATUS__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_B5_STATUS (0x3CD)
#define WCD9XXX_A_CDC_MBHC_B5_STATUS__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_B1_CTL (0x3CE)
#define WCD9XXX_A_CDC_MBHC_B1_CTL__POR (0xC0)
#define WCD9XXX_A_CDC_MBHC_B2_CTL (0x3CF)
#define WCD9XXX_A_CDC_MBHC_B2_CTL__POR (0x5D)
#define WCD9XXX_A_CDC_MBHC_VOLT_B1_CTL (0x3D0)
#define WCD9XXX_A_CDC_MBHC_VOLT_B1_CTL__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_VOLT_B2_CTL (0x3D1)
#define WCD9XXX_A_CDC_MBHC_VOLT_B2_CTL__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_VOLT_B3_CTL (0x3D2)
#define WCD9XXX_A_CDC_MBHC_VOLT_B3_CTL__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_VOLT_B4_CTL (0x3D3)
#define WCD9XXX_A_CDC_MBHC_VOLT_B4_CTL__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_VOLT_B5_CTL (0x3D4)
#define WCD9XXX_A_CDC_MBHC_VOLT_B5_CTL__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_VOLT_B6_CTL (0x3D5)
#define WCD9XXX_A_CDC_MBHC_VOLT_B6_CTL__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_VOLT_B7_CTL (0x3D6)
#define WCD9XXX_A_CDC_MBHC_VOLT_B7_CTL__POR (0xFF)
#define WCD9XXX_A_CDC_MBHC_VOLT_B8_CTL (0x3D7)
#define WCD9XXX_A_CDC_MBHC_VOLT_B8_CTL__POR (0x07)
#define WCD9XXX_A_CDC_MBHC_VOLT_B9_CTL (0x3D8)
#define WCD9XXX_A_CDC_MBHC_VOLT_B9_CTL__POR (0xFF)
#define WCD9XXX_A_CDC_MBHC_VOLT_B10_CTL (0x3D9)
#define WCD9XXX_A_CDC_MBHC_VOLT_B10_CTL__POR (0x7F)
#define WCD9XXX_A_CDC_MBHC_VOLT_B11_CTL (0x3DA)
#define WCD9XXX_A_CDC_MBHC_VOLT_B11_CTL__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_VOLT_B12_CTL (0x3DB)
#define WCD9XXX_A_CDC_MBHC_VOLT_B12_CTL__POR (0x80)
#define WCD9XXX_A_CDC_MBHC_CLK_CTL (0x3DC)
#define WCD9XXX_A_CDC_MBHC_CLK_CTL__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_INT_CTL (0x3DD)
#define WCD9XXX_A_CDC_MBHC_INT_CTL__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_DEBUG_CTL (0x3DE)
#define WCD9XXX_A_CDC_MBHC_DEBUG_CTL__POR (0x00)
#define WCD9XXX_A_CDC_MBHC_SPARE (0x3DF)
#define WCD9XXX_A_CDC_MBHC_SPARE__POR (0x00)
#define WCD9XXX_A_MBHC_SCALING_MUX_1 (0x14E)
#define WCD9XXX_A_MBHC_SCALING_MUX_1__POR (0x00)
#define WCD9XXX_A_RX_HPH_OCP_CTL (0x1AA)
#define WCD9XXX_A_RX_HPH_OCP_CTL__POR (0x68)
#define WCD9XXX_A_MICB_1_CTL (0x12B)
#define WCD9XXX_A_MICB_1_CTL__POR (0x16)
#define WCD9XXX_A_MICB_1_INT_RBIAS (0x12C)
#define WCD9XXX_A_MICB_1_INT_RBIAS__POR (0x24)
#define WCD9XXX_A_MICB_1_MBHC (0x12D)
#define WCD9XXX_A_MICB_1_MBHC__POR (0x01)
#define WCD9XXX_A_MICB_CFILT_2_CTL (0x12E)
#define WCD9XXX_A_MICB_CFILT_2_CTL__POR (0x40)
#define WCD9XXX_A_MICB_CFILT_2_VAL (0x12F)
#define WCD9XXX_A_MICB_CFILT_2_VAL__POR (0x80)
#define WCD9XXX_A_MICB_CFILT_2_PRECHRG (0x130)
#define WCD9XXX_A_MICB_CFILT_2_PRECHRG__POR (0x38)
#define WCD9XXX_A_MICB_2_CTL (0x131)
#define WCD9XXX_A_MICB_2_CTL__POR (0x16)
#define WCD9XXX_A_MICB_2_INT_RBIAS (0x132)
#define WCD9XXX_A_MICB_2_INT_RBIAS__POR (0x24)
#define WCD9XXX_A_MICB_2_MBHC (0x133)
#define WCD9XXX_A_MICB_2_MBHC__POR (0x02)
#define WCD9XXX_A_MICB_CFILT_3_CTL (0x134)
#define WCD9XXX_A_MICB_CFILT_3_CTL__POR (0x40)
#define WCD9XXX_A_MICB_CFILT_3_VAL (0x135)
#define WCD9XXX_A_MICB_CFILT_3_VAL__POR (0x80)
#define WCD9XXX_A_MICB_CFILT_3_PRECHRG (0x136)
#define WCD9XXX_A_MICB_CFILT_3_PRECHRG__POR (0x38)
#define WCD9XXX_A_MICB_3_CTL (0x137)
#define WCD9XXX_A_MICB_3_CTL__POR (0x16)
#define WCD9XXX_A_MICB_3_INT_RBIAS (0x138)
#define WCD9XXX_A_MICB_3_INT_RBIAS__POR (0x24)
#define WCD9XXX_A_MICB_3_MBHC (0x139)
#define WCD9XXX_A_MICB_3_MBHC__POR (0x00)
#define WCD9XXX_A_MICB_4_CTL (0x13D)
#define WCD9XXX_A_MICB_4_CTL__POR (0x16)
#define WCD9XXX_A_MICB_4_INT_RBIAS (0x13E)
#define WCD9XXX_A_MICB_4_INT_RBIAS__POR (0x24)
#define WCD9XXX_A_MICB_4_MBHC (0x13F)
#define WCD9XXX_A_MICB_4_MBHC__POR (0x01)
#define WCD9XXX_A_MICB_CFILT_1_VAL (0x129)
#define WCD9XXX_A_MICB_CFILT_1_VAL__POR (0x80)
#define WCD9XXX_A_RX_HPH_L_STATUS (0x1B3)
#define WCD9XXX_A_RX_HPH_L_STATUS__POR (0x00)
#define WCD9XXX_A_MBHC_HPH (0x1FE)
#define WCD9XXX_A_MBHC_HPH__POR (0x44)
#define WCD9XXX_A_RX_HPH_CNP_WG_TIME (0x1AD)
#define WCD9XXX_A_RX_HPH_CNP_WG_TIME__POR (0x2A)
#define WCD9XXX_A_RX_HPH_R_DAC_CTL (0x1B7)
#define WCD9XXX_A_RX_HPH_R_DAC_CTL__POR (0x00)
#define WCD9XXX_A_RX_HPH_L_DAC_CTL (0x1B1)
#define WCD9XXX_A_RX_HPH_L_DAC_CTL__POR (0x00)
#define WCD9XXX_A_TX_7_MBHC_EN (0x171)
#define WCD9XXX_A_TX_7_MBHC_EN__POR (0x0C)
#define WCD9XXX_A_PIN_CTL_OE0 (0x010)
#define WCD9XXX_A_PIN_CTL_OE0__POR (0x00)
#define WCD9XXX_A_PIN_CTL_OE1 (0x011)
#define WCD9XXX_A_PIN_CTL_OE1__POR (0x00)
#define WCD9XXX_A_MICB_CFILT_1_CTL (0x128)
#define WCD9XXX_A_LDO_H_MODE_1 (0x110)
#define WCD9XXX_A_LDO_H_MODE_1__POR (0x65)
#define WCD9XXX_A_MICB_CFILT_1_CTL__POR (0x40)
#define WCD9XXX_A_TX_7_MBHC_TEST_CTL (0x174)
#define WCD9XXX_A_TX_7_MBHC_TEST_CTL__POR (0x38)
#define WCD9XXX_A_MBHC_SCALING_MUX_2 (0x14F)
#define WCD9XXX_A_MBHC_SCALING_MUX_2__POR (0x80)
#define WCD9XXX_A_TX_COM_BIAS (0x14C)
#define WCD9XXX_A_TX_COM_BIAS__POR (0xF0)
#define WCD9XXX_A_MBHC_INSERT_DETECT (0x14A)
#define WCD9XXX_A_MBHC_INSERT_DETECT__POR (0x00)
#define WCD9XXX_A_MBHC_INSERT_DET_STATUS (0x14B)
#define WCD9XXX_A_MBHC_INSERT_DET_STATUS__POR (0x00)
#define WCD9XXX_A_MAD_ANA_CTRL (0x150)
#define WCD9XXX_A_MAD_ANA_CTRL__POR (0xF1)
#define WCD9XXX_A_CDC_CLK_OTHR_CTL (0x30C)
#define WCD9XXX_A_CDC_CLK_OTHR_CTL__POR (0x00)
#define WCD9XXX_A_BUCK_MODE_1 (0x181)
#define WCD9XXX_A_BUCK_MODE_1__POR (0x21)
#define WCD9XXX_A_BUCK_MODE_2 (0x182)
#define WCD9XXX_A_BUCK_MODE_2__POR (0xFF)
#define WCD9XXX_A_BUCK_MODE_3 (0x183)
#define WCD9XXX_A_BUCK_MODE_3__POR (0xCC)
#define WCD9XXX_A_BUCK_MODE_4 (0x184)
#define WCD9XXX_A_BUCK_MODE_4__POR (0x3A)
#define WCD9XXX_A_BUCK_MODE_5 (0x185)
#define WCD9XXX_A_BUCK_MODE_5__POR (0x00)
#define WCD9XXX_A_BUCK_CTRL_VCL_1 (0x186)
#define WCD9XXX_A_BUCK_CTRL_VCL_1__POR (0x48)
#define WCD9XXX_A_BUCK_CTRL_VCL_2 (0x187)
#define WCD9XXX_A_BUCK_CTRL_VCL_2__POR (0xA3)
#define WCD9XXX_A_BUCK_CTRL_VCL_3 (0x188)
#define WCD9XXX_A_BUCK_CTRL_VCL_3__POR (0x82)
#define WCD9XXX_A_BUCK_CTRL_CCL_1 (0x189)
#define WCD9XXX_A_BUCK_CTRL_CCL_1__POR (0xAB)
#define WCD9XXX_A_BUCK_CTRL_CCL_2 (0x18A)
#define WCD9XXX_A_BUCK_CTRL_CCL_2__POR (0xDC)
#define WCD9XXX_A_BUCK_CTRL_CCL_3 (0x18B)
#define WCD9XXX_A_BUCK_CTRL_CCL_3__POR (0x6A)
#define WCD9XXX_A_BUCK_CTRL_CCL_4 (0x18C)
#define WCD9XXX_A_BUCK_CTRL_CCL_4__POR (0x58)
#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_1 (0x18D)
#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_1__POR (0x50)
#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_2 (0x18E)
#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_2__POR (0x64)
#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_3 (0x18F)
#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_3__POR (0x77)
#define WCD9XXX_A_BUCK_TMUX_A_D (0x190)
#define WCD9XXX_A_BUCK_TMUX_A_D__POR (0x00)
#define WCD9XXX_A_NCP_EN (0x192)
#define WCD9XXX_A_NCP_EN__POR (0xFE)
#define WCD9XXX_A_NCP_STATIC (0x194)
#define WCD9XXX_A_NCP_STATIC__POR (0x28)
#define WCD9XXX_A_NCP_BUCKREF (0x191)
#define WCD9XXX_A_NCP_BUCKREF__POR (0x00)
#define WCD9XXX_A_CDC_CLSH_B1_CTL (0x320)
#define WCD9XXX_A_CDC_CLSH_B1_CTL__POR (0xE4)
#define WCD9XXX_A_CDC_CLSH_B2_CTL (0x321)
#define WCD9XXX_A_CDC_CLSH_B2_CTL__POR (0x00)
#define WCD9XXX_A_CDC_CLSH_B3_CTL (0x322)
#define WCD9XXX_A_CDC_CLSH_B3_CTL__POR (0x00)
#define WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS (0x323)
#define WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS__POR (0x00)
#define WCD9XXX_A_CDC_CLSH_IDLE_HPH_THSD (0x324)
#define WCD9XXX_A_CDC_CLSH_IDLE_HPH_THSD__POR (0x12)
#define WCD9XXX_A_CDC_CLSH_IDLE_EAR_THSD (0x325)
#define WCD9XXX_A_CDC_CLSH_IDLE_EAR_THSD__POR (0x0C)
#define WCD9XXX_A_CDC_CLSH_FCLKONLY_HPH_THSD (0x326)
#define WCD9XXX_A_CDC_CLSH_FCLKONLY_HPH_THSD__POR (0x18)
#define WCD9XXX_A_CDC_CLSH_FCLKONLY_EAR_THSD (0x327)
#define WCD9XXX_A_CDC_CLSH_FCLKONLY_EAR_THSD__POR (0x23)
#define WCD9XXX_A_CDC_CLSH_K_ADDR (0x328)
#define WCD9XXX_A_CDC_CLSH_K_ADDR__POR (0x00)
#define WCD9XXX_A_CDC_CLSH_K_DATA (0x329)
#define WCD9XXX_A_CDC_CLSH_K_DATA__POR (0xA4)
#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_L (0x32A)
#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_L__POR (0xD7)
#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_U (0x32B)
#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_U__POR (0x05)
#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_L (0x32C)
#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_L__POR (0x60)
#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_U (0x32D)
#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_U__POR (0x09)
#define WCD9XXX_A_CDC_CLSH_V_PA_HD_EAR (0x32E)
#define WCD9XXX_A_CDC_CLSH_V_PA_HD_EAR__POR (0x00)
#define WCD9XXX_A_CDC_CLSH_V_PA_HD_HPH (0x32F)
#define WCD9XXX_A_CDC_CLSH_V_PA_HD_HPH__POR (0x00)
#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_EAR (0x330)
#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_EAR__POR (0x00)
#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_HPH (0x331)
#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_HPH__POR (0x00)
#define WCD9XXX_A_CDC_RX1_B6_CTL (0x2B5)
#define WCD9XXX_A_CDC_RX1_B6_CTL__POR (0x80)
#define WCD9XXX_A_CDC_RX2_B6_CTL (0x2BD)
#define WCD9XXX_A_CDC_RX2_B6_CTL__POR (0x80)
#define WCD9XXX_A_RX_HPH_L_GAIN (0x1AE)
#define WCD9XXX_A_RX_HPH_L_GAIN__POR (0x00)
#define WCD9XXX_A_RX_HPH_R_GAIN (0x1B4)
#define WCD9XXX_A_RX_HPH_R_GAIN__POR (0x00)
#define WCD9XXX_A_RX_HPH_CHOP_CTL (0x1A5)
#define WCD9XXX_A_RX_HPH_CHOP_CTL__POR (0xB4)
#define WCD9XXX_A_RX_HPH_BIAS_PA (0x1A6)
#define WCD9XXX_A_RX_HPH_BIAS_PA__POR (0x7A)
#define WCD9XXX_A_RX_HPH_L_TEST (0x1AF)
#define WCD9XXX_A_RX_HPH_L_TEST__POR (0x00)
#define WCD9XXX_A_RX_HPH_R_TEST (0x1B5)
#define WCD9XXX_A_RX_HPH_R_TEST__POR (0x00)
#define WCD9XXX_A_CDC_CLK_RX_B1_CTL (0x30F)
#define WCD9XXX_A_CDC_CLK_RX_B1_CTL__POR (0x00)
#define WCD9XXX_A_NCP_CLK (0x193)
#define WCD9XXX_A_NCP_CLK__POR (0x94)
#define WCD9XXX_A_RX_HPH_BIAS_WG_OCP (0x1A9)
#define WCD9XXX_A_RX_HPH_BIAS_WG_OCP__POR (0x2A)
#define WCD9XXX_A_RX_HPH_CNP_WG_CTL (0x1AC)
#define WCD9XXX_A_RX_HPH_CNP_WG_CTL__POR (0xDE)
#define WCD9XXX_A_RX_HPH_L_PA_CTL (0x1B0)
#define WCD9XXX_A_RX_HPH_L_PA_CTL__POR (0x42)
#define WCD9XXX_A_RX_HPH_R_PA_CTL (0x1B6)
#define WCD9XXX_A_RX_HPH_R_PA_CTL__POR (0x42)
#define WCD9XXX_A_CDC_CONN_RX2_B1_CTL (0x383)
#define WCD9XXX_A_CDC_CONN_RX2_B1_CTL__POR (0x00)
#define WCD9XXX_A_CDC_PA_RAMP_B1_CTL (0x361)
#define WCD9XXX_A_CDC_PA_RAMP_B1_CTL__POR (0x00)
#define WCD9XXX_A_CDC_PA_RAMP_B2_CTL (0x362)
#define WCD9XXX_A_CDC_PA_RAMP_B2_CTL__POR (0x00)
#define WCD9XXX_A_CDC_PA_RAMP_B3_CTL (0x363)
#define WCD9XXX_A_CDC_PA_RAMP_B3_CTL__POR (0x00)
#define WCD9XXX_A_CDC_PA_RAMP_B4_CTL (0x364)
#define WCD9XXX_A_CDC_PA_RAMP_B4_CTL__POR (0x00)
#define WCD9330_A_LEAKAGE_CTL (0x03C)
#define WCD9330_A_LEAKAGE_CTL__POR (0x04)
#define WCD9330_A_CDC_CTL (0x034)
#define WCD9330_A_CDC_CTL__POR (0x00)
#define WCD9XXX_A_CDC_RX0_RX_PATH_CFG0 (0xB42)
#define WCD9XXX_A_CDC_RX1_RX_PATH_CFG0 (0xB56)
#define WCD9XXX_A_CDC_RX2_RX_PATH_CFG0 (0xB6A)
#define WCD9XXX_A_CDC_CLSH_K1_MSB (0xC08)
#define WCD9XXX_A_CDC_CLSH_K1_LSB (0xC09)
#define WCD9XXX_A_ANA_RX_SUPPLIES (0x608)
#define WCD9XXX_A_ANA_HPH (0x609)
#define WCD9XXX_A_CDC_CLSH_CRC (0xC01)
#define WCD9XXX_FLYBACK_EN (0x6A4)
#define WCD9XXX_FLYBACK_VNEG_CTRL_1 (0x6A5)
#define WCD9XXX_FLYBACK_VNEGDAC_CTRL_2 (0x6AF)
#define WCD9XXX_RX_BIAS_FLYB_BUFF (0x6C7)
#define WCD9XXX_HPH_L_EN (0x6D3)
#define WCD9XXX_HPH_R_EN (0x6D6)
#define WCD9XXX_HPH_REFBUFF_UHQA_CTL (0x6DD)
#define WCD9XXX_CLASSH_CTRL_VCL_2 (0x69B)
#define WCD9XXX_CDC_CLSH_HPH_V_PA (0xC04)
#define WCD9XXX_CDC_RX0_RX_PATH_SEC0 (0xB49)
#define WCD9XXX_CDC_RX1_RX_PATH_CTL (0xB55)
#define WCD9XXX_CDC_RX2_RX_PATH_CTL (0xB69)
#define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_CONTROL (0xD41)
#define WCD9XXX_CLASSH_CTRL_CCL_1 (0x69C)
#define WCD9XXX_CDC_RX1_RX_VOL_CTL (0xB59)
#define WCD9XXX_CDC_RX1_RX_VOL_MIX_CTL (0xB5C)
#define WCD9XXX_CDC_RX1_RX_PATH_SEC1 (0xB5E)
#define WCD9XXX_CDC_RX2_RX_VOL_CTL (0xB6D)
#define WCD9XXX_CDC_RX2_RX_VOL_MIX_CTL (0xB70)
#define WCD9XXX_CDC_RX2_RX_PATH_SEC1 (0xB72)
#define WCD9XXX_HPH_CNP_WG_CTL (0x06cc)
#define WCD9XXX_FLYBACK_VNEG_CTRL_4 (0x06a8)
#define WCD9XXX_HPH_NEW_INT_PA_MISC2 (0x0738)
#define WCD9XXX_RX_BIAS_HPH_LOWPOWER (0x06bf)
#define WCD9XXX_HPH_PA_CTL1 (0x06d1)
#endif

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@@ -1,39 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef __MSM_CORE_LIB_H__
#define __MSM_CORE_LIB_H__
#include <linux/ioctl.h>
#define TEMP_DATA_POINTS 13
#define MAX_NUM_FREQ 200
enum msm_core_ioctl_params {
MSM_CORE_LEAKAGE,
MSM_CORE_VOLTAGE,
};
#define MSM_CORE_MAGIC 0x9D
struct sched_params {
uint32_t cpumask;
uint32_t cluster;
uint32_t power[TEMP_DATA_POINTS][MAX_NUM_FREQ];
uint32_t voltage[MAX_NUM_FREQ];
uint32_t freq[MAX_NUM_FREQ];
};
#define EA_LEAKAGE _IOWR(MSM_CORE_MAGIC, MSM_CORE_LEAKAGE, struct sched_params)
#define EA_VOLT _IOWR(MSM_CORE_MAGIC, MSM_CORE_VOLTAGE, struct sched_params)
#endif

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@@ -1,49 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _LINUX_MSM_ADSP_H
#define _LINUX_MSM_ADSP_H
#include <linux/types.h>
#include <linux/ioctl.h>
#define ADSP_IOCTL_MAGIC 'q'
struct adsp_command_t {
uint16_t queue;
uint32_t len;
uint8_t * data;
};
struct adsp_event_t {
uint16_t type;
uint32_t timeout_ms;
uint16_t msg_id;
uint16_t flags;
uint32_t len;
uint8_t * data;
};
#define ADSP_IOCTL_ENABLE _IOR(ADSP_IOCTL_MAGIC, 1, unsigned)
#define ADSP_IOCTL_DISABLE _IOR(ADSP_IOCTL_MAGIC, 2, unsigned)
#define ADSP_IOCTL_DISABLE_ACK _IOR(ADSP_IOCTL_MAGIC, 3, unsigned)
#define ADSP_IOCTL_WRITE_COMMAND _IOR(ADSP_IOCTL_MAGIC, 4, struct adsp_command_t *)
#define ADSP_IOCTL_GET_EVENT _IOWR(ADSP_IOCTL_MAGIC, 5, struct adsp_event_data_t *)
#define ADSP_IOCTL_SET_CLKRATE _IOR(ADSP_IOCTL_MAGIC, 6, unsigned)
#define ADSP_IOCTL_DISABLE_EVENT_RSP _IOR(ADSP_IOCTL_MAGIC, 10, unsigned)
#define ADSP_IOCTL_REGISTER_PMEM _IOW(ADSP_IOCTL_MAGIC, 13, unsigned)
#define ADSP_IOCTL_UNREGISTER_PMEM _IOW(ADSP_IOCTL_MAGIC, 14, unsigned)
#define ADSP_IOCTL_ABORT_EVENT_READ _IOW(ADSP_IOCTL_MAGIC, 15, unsigned)
#define ADSP_IOCTL_LINK_TASK _IOW(ADSP_IOCTL_MAGIC, 16, unsigned)
#endif

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@@ -1,353 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _LINUX_MSM_AUDIO_H
#define _LINUX_MSM_AUDIO_H
#include <linux/types.h>
#include <linux/ioctl.h>
#define AUDIO_IOCTL_MAGIC 'a'
#define AUDIO_START _IOW(AUDIO_IOCTL_MAGIC, 0, unsigned int)
#define AUDIO_STOP _IOW(AUDIO_IOCTL_MAGIC, 1, unsigned int)
#define AUDIO_FLUSH _IOW(AUDIO_IOCTL_MAGIC, 2, unsigned int)
#define AUDIO_GET_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 3, struct msm_audio_config)
#define AUDIO_SET_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 4, struct msm_audio_config)
#define AUDIO_GET_STATS _IOR(AUDIO_IOCTL_MAGIC, 5, struct msm_audio_stats)
#define AUDIO_ENABLE_AUDPP _IOW(AUDIO_IOCTL_MAGIC, 6, unsigned int)
#define AUDIO_SET_ADRC _IOW(AUDIO_IOCTL_MAGIC, 7, unsigned int)
#define AUDIO_SET_EQ _IOW(AUDIO_IOCTL_MAGIC, 8, unsigned int)
#define AUDIO_SET_RX_IIR _IOW(AUDIO_IOCTL_MAGIC, 9, unsigned int)
#define AUDIO_SET_VOLUME _IOW(AUDIO_IOCTL_MAGIC, 10, unsigned int)
#define AUDIO_PAUSE _IOW(AUDIO_IOCTL_MAGIC, 11, unsigned int)
#define AUDIO_PLAY_DTMF _IOW(AUDIO_IOCTL_MAGIC, 12, unsigned int)
#define AUDIO_GET_EVENT _IOR(AUDIO_IOCTL_MAGIC, 13, struct msm_audio_event)
#define AUDIO_ABORT_GET_EVENT _IOW(AUDIO_IOCTL_MAGIC, 14, unsigned int)
#define AUDIO_REGISTER_PMEM _IOW(AUDIO_IOCTL_MAGIC, 15, unsigned int)
#define AUDIO_DEREGISTER_PMEM _IOW(AUDIO_IOCTL_MAGIC, 16, unsigned int)
#define AUDIO_ASYNC_WRITE _IOW(AUDIO_IOCTL_MAGIC, 17, struct msm_audio_aio_buf)
#define AUDIO_ASYNC_READ _IOW(AUDIO_IOCTL_MAGIC, 18, struct msm_audio_aio_buf)
#define AUDIO_SET_INCALL _IOW(AUDIO_IOCTL_MAGIC, 19, struct msm_voicerec_mode)
#define AUDIO_GET_NUM_SND_DEVICE _IOR(AUDIO_IOCTL_MAGIC, 20, unsigned int)
#define AUDIO_GET_SND_DEVICES _IOWR(AUDIO_IOCTL_MAGIC, 21, struct msm_snd_device_list)
#define AUDIO_ENABLE_SND_DEVICE _IOW(AUDIO_IOCTL_MAGIC, 22, unsigned int)
#define AUDIO_DISABLE_SND_DEVICE _IOW(AUDIO_IOCTL_MAGIC, 23, unsigned int)
#define AUDIO_ROUTE_STREAM _IOW(AUDIO_IOCTL_MAGIC, 24, struct msm_audio_route_config)
#define AUDIO_GET_PCM_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 30, unsigned int)
#define AUDIO_SET_PCM_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 31, unsigned int)
#define AUDIO_SWITCH_DEVICE _IOW(AUDIO_IOCTL_MAGIC, 32, unsigned int)
#define AUDIO_SET_MUTE _IOW(AUDIO_IOCTL_MAGIC, 33, unsigned int)
#define AUDIO_UPDATE_ACDB _IOW(AUDIO_IOCTL_MAGIC, 34, unsigned int)
#define AUDIO_START_VOICE _IOW(AUDIO_IOCTL_MAGIC, 35, unsigned int)
#define AUDIO_STOP_VOICE _IOW(AUDIO_IOCTL_MAGIC, 36, unsigned int)
#define AUDIO_REINIT_ACDB _IOW(AUDIO_IOCTL_MAGIC, 39, unsigned int)
#define AUDIO_OUTPORT_FLUSH _IOW(AUDIO_IOCTL_MAGIC, 40, unsigned short)
#define AUDIO_SET_ERR_THRESHOLD_VALUE _IOW(AUDIO_IOCTL_MAGIC, 41, unsigned short)
#define AUDIO_GET_BITSTREAM_ERROR_INFO _IOR(AUDIO_IOCTL_MAGIC, 42, struct msm_audio_bitstream_error_info)
#define AUDIO_SET_SRS_TRUMEDIA_PARAM _IOW(AUDIO_IOCTL_MAGIC, 43, unsigned int)
#define AUDIO_SET_STREAM_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 80, struct msm_audio_stream_config)
#define AUDIO_GET_STREAM_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 81, struct msm_audio_stream_config)
#define AUDIO_GET_SESSION_ID _IOR(AUDIO_IOCTL_MAGIC, 82, unsigned short)
#define AUDIO_GET_STREAM_INFO _IOR(AUDIO_IOCTL_MAGIC, 83, struct msm_audio_bitstream_info)
#define AUDIO_SET_PAN _IOW(AUDIO_IOCTL_MAGIC, 84, unsigned int)
#define AUDIO_SET_QCONCERT_PLUS _IOW(AUDIO_IOCTL_MAGIC, 85, unsigned int)
#define AUDIO_SET_MBADRC _IOW(AUDIO_IOCTL_MAGIC, 86, unsigned int)
#define AUDIO_SET_VOLUME_PATH _IOW(AUDIO_IOCTL_MAGIC, 87, struct msm_vol_info)
#define AUDIO_SET_MAX_VOL_ALL _IOW(AUDIO_IOCTL_MAGIC, 88, unsigned int)
#define AUDIO_ENABLE_AUDPRE _IOW(AUDIO_IOCTL_MAGIC, 89, unsigned int)
#define AUDIO_SET_AGC _IOW(AUDIO_IOCTL_MAGIC, 90, unsigned int)
#define AUDIO_SET_NS _IOW(AUDIO_IOCTL_MAGIC, 91, unsigned int)
#define AUDIO_SET_TX_IIR _IOW(AUDIO_IOCTL_MAGIC, 92, unsigned int)
#define AUDIO_GET_BUF_CFG _IOW(AUDIO_IOCTL_MAGIC, 93, struct msm_audio_buf_cfg)
#define AUDIO_SET_BUF_CFG _IOW(AUDIO_IOCTL_MAGIC, 94, struct msm_audio_buf_cfg)
#define AUDIO_SET_ACDB_BLK _IOW(AUDIO_IOCTL_MAGIC, 95, struct msm_acdb_cmd_device)
#define AUDIO_GET_ACDB_BLK _IOW(AUDIO_IOCTL_MAGIC, 96, struct msm_acdb_cmd_device)
#define AUDIO_REGISTER_ION _IOW(AUDIO_IOCTL_MAGIC, 97, struct msm_audio_ion_info)
#define AUDIO_DEREGISTER_ION _IOW(AUDIO_IOCTL_MAGIC, 98, struct msm_audio_ion_info)
#define AUDIO_SET_EFFECTS_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 99, struct msm_hwacc_effects_config)
#define AUDIO_EFFECTS_SET_BUF_LEN _IOW(AUDIO_IOCTL_MAGIC, 100, struct msm_hwacc_buf_cfg)
#define AUDIO_EFFECTS_GET_BUF_AVAIL _IOW(AUDIO_IOCTL_MAGIC, 101, struct msm_hwacc_buf_avail)
#define AUDIO_EFFECTS_WRITE _IOW(AUDIO_IOCTL_MAGIC, 102, void *)
#define AUDIO_EFFECTS_READ _IOWR(AUDIO_IOCTL_MAGIC, 103, void *)
#define AUDIO_EFFECTS_SET_PP_PARAMS _IOW(AUDIO_IOCTL_MAGIC, 104, void *)
#define AUDIO_PM_AWAKE _IOW(AUDIO_IOCTL_MAGIC, 105, unsigned int)
#define AUDIO_PM_RELAX _IOW(AUDIO_IOCTL_MAGIC, 106, unsigned int)
#define AUDIO_MAX_COMMON_IOCTL_NUM 107
#define HANDSET_MIC 0x01
#define HANDSET_SPKR 0x02
#define HEADSET_MIC 0x03
#define HEADSET_SPKR_MONO 0x04
#define HEADSET_SPKR_STEREO 0x05
#define SPKR_PHONE_MIC 0x06
#define SPKR_PHONE_MONO 0x07
#define SPKR_PHONE_STEREO 0x08
#define BT_SCO_MIC 0x09
#define BT_SCO_SPKR 0x0A
#define BT_A2DP_SPKR 0x0B
#define TTY_HEADSET_MIC 0x0C
#define TTY_HEADSET_SPKR 0x0D
#define DEFAULT_TX 0x0E
#define DEFAULT_RX 0x0F
#define BT_A2DP_TX 0x10
#define HEADSET_MONO_PLUS_SPKR_MONO_RX 0x11
#define HEADSET_MONO_PLUS_SPKR_STEREO_RX 0x12
#define HEADSET_STEREO_PLUS_SPKR_MONO_RX 0x13
#define HEADSET_STEREO_PLUS_SPKR_STEREO_RX 0x14
#define I2S_RX 0x20
#define I2S_TX 0x21
#define ADRC_ENABLE 0x0001
#define EQUALIZER_ENABLE 0x0002
#define IIR_ENABLE 0x0004
#define QCONCERT_PLUS_ENABLE 0x0008
#define MBADRC_ENABLE 0x0010
#define SRS_ENABLE 0x0020
#define SRS_DISABLE 0x0040
#define AGC_ENABLE 0x0001
#define NS_ENABLE 0x0002
#define TX_IIR_ENABLE 0x0004
#define FLUENCE_ENABLE 0x0008
#define VOC_REC_UPLINK 0x00
#define VOC_REC_DOWNLINK 0x01
#define VOC_REC_BOTH 0x02
struct msm_audio_config {
uint32_t buffer_size;
uint32_t buffer_count;
uint32_t channel_count;
uint32_t sample_rate;
uint32_t type;
uint32_t meta_field;
uint32_t bits;
uint32_t unused[3];
};
struct msm_audio_stream_config {
uint32_t buffer_size;
uint32_t buffer_count;
};
struct msm_audio_buf_cfg {
uint32_t meta_info_enable;
uint32_t frames_per_buf;
};
struct msm_audio_stats {
uint32_t byte_count;
uint32_t sample_count;
uint32_t unused[2];
};
struct msm_audio_ion_info {
int fd;
void * vaddr;
};
struct msm_audio_pmem_info {
int fd;
void * vaddr;
};
struct msm_audio_aio_buf {
void * buf_addr;
uint32_t buf_len;
uint32_t data_len;
void * private_data;
unsigned short mfield_sz;
};
#define SND_IOCTL_MAGIC 's'
#define SND_MUTE_UNMUTED 0
#define SND_MUTE_MUTED 1
struct msm_mute_info {
uint32_t mute;
uint32_t path;
};
struct msm_vol_info {
uint32_t vol;
uint32_t path;
};
struct msm_voicerec_mode {
uint32_t rec_mode;
};
struct msm_snd_device_config {
uint32_t device;
uint32_t ear_mute;
uint32_t mic_mute;
};
#define SND_SET_DEVICE _IOW(SND_IOCTL_MAGIC, 2, struct msm_device_config *)
enum cad_device_path_type {
CAD_DEVICE_PATH_RX,
CAD_DEVICE_PATH_TX,
CAD_DEVICE_PATH_RX_TX,
CAD_DEVICE_PATH_LB,
CAD_DEVICE_PATH_MAX
};
struct cad_devices_type {
uint32_t rx_device;
uint32_t tx_device;
enum cad_device_path_type pathtype;
};
struct msm_cad_device_config {
struct cad_devices_type device;
uint32_t ear_mute;
uint32_t mic_mute;
};
#define CAD_SET_DEVICE _IOW(SND_IOCTL_MAGIC, 2, struct msm_cad_device_config *)
#define SND_METHOD_VOICE 0
#define SND_METHOD_MIDI 4
struct msm_snd_volume_config {
uint32_t device;
uint32_t method;
uint32_t volume;
};
#define SND_SET_VOLUME _IOW(SND_IOCTL_MAGIC, 3, struct msm_snd_volume_config *)
struct msm_cad_volume_config {
struct cad_devices_type device;
uint32_t method;
uint32_t volume;
};
#define CAD_SET_VOLUME _IOW(SND_IOCTL_MAGIC, 3, struct msm_cad_volume_config *)
#define SND_GET_NUM_ENDPOINTS _IOR(SND_IOCTL_MAGIC, 4, unsigned int *)
struct msm_snd_endpoint {
int id;
char name[64];
};
#define SND_GET_ENDPOINT _IOWR(SND_IOCTL_MAGIC, 5, struct msm_snd_endpoint *)
#define SND_AVC_CTL _IOW(SND_IOCTL_MAGIC, 6, unsigned int *)
#define SND_AGC_CTL _IOW(SND_IOCTL_MAGIC, 7, unsigned int *)
#define CAD_GET_NUM_ENDPOINTS _IOR(SND_IOCTL_MAGIC, 4, unsigned int *)
struct msm_cad_endpoint {
int id;
char name[64];
};
#define CAD_GET_ENDPOINT _IOWR(SND_IOCTL_MAGIC, 5, struct msm_cad_endpoint *)
struct msm_audio_pcm_config {
uint32_t pcm_feedback;
uint32_t buffer_count;
uint32_t buffer_size;
};
#define AUDIO_EVENT_SUSPEND 0
#define AUDIO_EVENT_RESUME 1
#define AUDIO_EVENT_WRITE_DONE 2
#define AUDIO_EVENT_READ_DONE 3
#define AUDIO_EVENT_STREAM_INFO 4
#define AUDIO_EVENT_BITSTREAM_ERROR_INFO 5
#define AUDIO_CODEC_TYPE_MP3 0
#define AUDIO_CODEC_TYPE_AAC 1
struct msm_audio_bitstream_info {
uint32_t codec_type;
uint32_t chan_info;
uint32_t sample_rate;
uint32_t bit_stream_info;
uint32_t bit_rate;
uint32_t unused[3];
};
struct msm_audio_bitstream_error_info {
uint32_t dec_id;
uint32_t err_msg_indicator;
uint32_t err_type;
};
union msm_audio_event_payload {
struct msm_audio_aio_buf aio_buf;
struct msm_audio_bitstream_info stream_info;
struct msm_audio_bitstream_error_info error_info;
int reserved;
};
struct msm_audio_event {
int event_type;
int timeout_ms;
union msm_audio_event_payload event_payload;
};
#define MSM_SNDDEV_CAP_RX 0x1
#define MSM_SNDDEV_CAP_TX 0x2
#define MSM_SNDDEV_CAP_VOICE 0x4
struct msm_snd_device_info {
uint32_t dev_id;
uint32_t dev_cap;
char dev_name[64];
};
struct msm_snd_device_list {
uint32_t num_dev;
struct msm_snd_device_info * list;
};
struct msm_dtmf_config {
uint16_t path;
uint16_t dtmf_hi;
uint16_t dtmf_low;
uint16_t duration;
uint16_t tx_gain;
uint16_t rx_gain;
uint16_t mixing;
};
#define AUDIO_ROUTE_STREAM_VOICE_RX 0
#define AUDIO_ROUTE_STREAM_VOICE_TX 1
#define AUDIO_ROUTE_STREAM_PLAYBACK 2
#define AUDIO_ROUTE_STREAM_REC 3
struct msm_audio_route_config {
uint32_t stream_type;
uint32_t stream_id;
uint32_t dev_id;
};
#define AUDIO_MAX_EQ_BANDS 12
struct msm_audio_eq_band {
uint16_t band_idx;
uint32_t filter_type;
uint32_t center_freq_hz;
uint32_t filter_gain;
uint32_t q_factor;
} __attribute__((packed));
struct msm_audio_eq_stream_config {
uint32_t enable;
uint32_t num_bands;
struct msm_audio_eq_band eq_bands[AUDIO_MAX_EQ_BANDS];
} __attribute__((packed));
struct msm_acdb_cmd_device {
uint32_t command_id;
uint32_t device_id;
uint32_t network_id;
uint32_t sample_rate_id;
uint32_t interface_id;
uint32_t algorithm_block_id;
uint32_t total_bytes;
uint32_t * phys_buf;
};
struct msm_hwacc_data_config {
__u32 buf_size;
__u32 num_buf;
__u32 num_channels;
__u8 channel_map[8];
__u32 sample_rate;
__u32 bits_per_sample;
};
struct msm_hwacc_buf_cfg {
__u32 input_len;
__u32 output_len;
};
struct msm_hwacc_buf_avail {
__u32 input_num_avail;
__u32 output_num_avail;
};
struct msm_hwacc_effects_config {
struct msm_hwacc_data_config input;
struct msm_hwacc_data_config output;
struct msm_hwacc_buf_cfg buf_cfg;
__u32 meta_mode_enabled;
__u32 overwrite_topology;
__s32 topology;
};
#define ADSP_STREAM_PP_EVENT 0
#define ADSP_STREAM_ENCDEC_EVENT 1
#define ADSP_STREAM_IEC_61937_FMT_UPDATE_EVENT 2
#define ADSP_STREAM_EVENT_MAX 3
struct msm_adsp_event_data {
__u32 event_type;
__u32 payload_len;
__u8 payload[0];
};
#endif

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@@ -1,70 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_AUDIO_AAC_H
#define _MSM_AUDIO_AAC_H
#include <linux/msm_audio.h>
#define AUDIO_SET_AAC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 0), struct msm_audio_aac_config)
#define AUDIO_GET_AAC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 1), struct msm_audio_aac_config)
#define AUDIO_SET_AAC_ENC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 3), struct msm_audio_aac_enc_config)
#define AUDIO_GET_AAC_ENC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 4), struct msm_audio_aac_enc_config)
#define AUDIO_SET_AAC_MIX_CONFIG _IOR(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 5), uint32_t)
#define AUDIO_AAC_FORMAT_ADTS - 1
#define AUDIO_AAC_FORMAT_RAW 0x0000
#define AUDIO_AAC_FORMAT_PSUEDO_RAW 0x0001
#define AUDIO_AAC_FORMAT_LOAS 0x0002
#define AUDIO_AAC_FORMAT_ADIF 0x0003
#define AUDIO_AAC_OBJECT_LC 0x0002
#define AUDIO_AAC_OBJECT_LTP 0x0004
#define AUDIO_AAC_OBJECT_ERLC 0x0011
#define AUDIO_AAC_OBJECT_BSAC 0x0016
#define AUDIO_AAC_SEC_DATA_RES_ON 0x0001
#define AUDIO_AAC_SEC_DATA_RES_OFF 0x0000
#define AUDIO_AAC_SCA_DATA_RES_ON 0x0001
#define AUDIO_AAC_SCA_DATA_RES_OFF 0x0000
#define AUDIO_AAC_SPEC_DATA_RES_ON 0x0001
#define AUDIO_AAC_SPEC_DATA_RES_OFF 0x0000
#define AUDIO_AAC_SBR_ON_FLAG_ON 0x0001
#define AUDIO_AAC_SBR_ON_FLAG_OFF 0x0000
#define AUDIO_AAC_SBR_PS_ON_FLAG_ON 0x0001
#define AUDIO_AAC_SBR_PS_ON_FLAG_OFF 0x0000
#define AUDIO_AAC_DUAL_MONO_PL_PR 0
#define AUDIO_AAC_DUAL_MONO_SL_SR 1
#define AUDIO_AAC_DUAL_MONO_SL_PR 2
#define AUDIO_AAC_DUAL_MONO_PL_SR 3
struct msm_audio_aac_config {
signed short format;
unsigned short audio_object;
unsigned short ep_config;
unsigned short aac_section_data_resilience_flag;
unsigned short aac_scalefactor_data_resilience_flag;
unsigned short aac_spectral_data_resilience_flag;
unsigned short sbr_on_flag;
unsigned short sbr_ps_on_flag;
unsigned short dual_mono_mode;
unsigned short channel_configuration;
unsigned short sample_rate;
};
struct msm_audio_aac_enc_config {
uint32_t channels;
uint32_t sample_rate;
uint32_t bit_rate;
uint32_t stream_format;
};
#endif

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@@ -1,53 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_AUDIO_AC3_H
#define _MSM_AUDIO_AC3_H
#include <linux/msm_audio.h>
#define AUDIO_SET_AC3_CONFIG _IOW(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 0), unsigned int)
#define AUDIO_GET_AC3_CONFIG _IOR(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 1), unsigned int)
#define AUDAC3_DEF_WORDSIZE 0
#define AUDAC3_DEF_USER_DOWNMIX_FLAG 0x0
#define AUDAC3_DEF_USER_KARAOKE_FLAG 0x0
#define AUDAC3_DEF_ERROR_CONCEALMENT 0
#define AUDAC3_DEF_MAX_REPEAT_COUNT 0
struct msm_audio_ac3_config {
unsigned short numChans;
unsigned short wordSize;
unsigned short kCapableMode;
unsigned short compMode;
unsigned short outLfeOn;
unsigned short outputMode;
unsigned short stereoMode;
unsigned short dualMonoMode;
unsigned short fsCod;
unsigned short pcmScaleFac;
unsigned short dynRngScaleHi;
unsigned short dynRngScaleLow;
unsigned short user_downmix_flag;
unsigned short user_karaoke_flag;
unsigned short dm_address_high;
unsigned short dm_address_low;
unsigned short ko_address_high;
unsigned short ko_address_low;
unsigned short error_concealment;
unsigned short max_rep_count;
unsigned short channel_routing_mode[6];
};
#endif

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@@ -1,38 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_AUDIO_ALAC_H
#define _MSM_AUDIO_ALAC_H
#define AUDIO_GET_ALAC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 0), struct msm_audio_alac_config)
#define AUDIO_SET_ALAC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 1), struct msm_audio_alac_config)
struct msm_audio_alac_config {
uint32_t frameLength;
uint8_t compatVersion;
uint8_t bitDepth;
uint8_t pb;
uint8_t mb;
uint8_t kb;
uint8_t channelCount;
uint16_t maxRun;
uint32_t maxSize;
uint32_t averageBitRate;
uint32_t sampleRate;
uint32_t channelLayout;
};
#endif

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@@ -1,41 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_AUDIO_AMRNB_H
#define _MSM_AUDIO_AMRNB_H
#include <linux/msm_audio.h>
#define AUDIO_GET_AMRNB_ENC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 0), unsigned int)
#define AUDIO_SET_AMRNB_ENC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 1), unsigned int)
#define AUDIO_GET_AMRNB_ENC_CONFIG_V2 _IOW(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 2), struct msm_audio_amrnb_enc_config_v2)
#define AUDIO_SET_AMRNB_ENC_CONFIG_V2 _IOR(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 3), struct msm_audio_amrnb_enc_config_v2)
struct msm_audio_amrnb_enc_config {
unsigned short voicememoencweight1;
unsigned short voicememoencweight2;
unsigned short voicememoencweight3;
unsigned short voicememoencweight4;
unsigned short dtx_mode_enable;
unsigned short test_mode_enable;
unsigned short enc_mode;
};
struct msm_audio_amrnb_enc_config_v2 {
uint32_t band_mode;
uint32_t dtx_enable;
uint32_t frame_format;
};
#endif

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@@ -1,30 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_AUDIO_AMRWB_H
#define _MSM_AUDIO_AMRWB_H
#include <linux/msm_audio.h>
#define AUDIO_GET_AMRWB_ENC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 0), struct msm_audio_amrwb_enc_config)
#define AUDIO_SET_AMRWB_ENC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 1), struct msm_audio_amrwb_enc_config)
struct msm_audio_amrwb_enc_config {
uint32_t band_mode;
uint32_t dtx_enable;
uint32_t frame_format;
};
#endif

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@@ -1,33 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_AUDIO_AMR_WB_PLUS_H
#define _MSM_AUDIO_AMR_WB_PLUS_H
#define AUDIO_GET_AMRWBPLUS_CONFIG_V2 _IOR(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 2), struct msm_audio_amrwbplus_config_v2)
#define AUDIO_SET_AMRWBPLUS_CONFIG_V2 _IOW(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 3), struct msm_audio_amrwbplus_config_v2)
struct msm_audio_amrwbplus_config_v2 {
unsigned int size_bytes;
unsigned int version;
unsigned int num_channels;
unsigned int amr_band_mode;
unsigned int amr_dtx_mode;
unsigned int amr_frame_fmt;
unsigned int amr_lsf_idx;
};
#endif

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@@ -1,36 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_AUDIO_APE_H
#define _MSM_AUDIO_APE_H
#define AUDIO_GET_APE_CONFIG _IOR(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 0), struct msm_audio_ape_config)
#define AUDIO_SET_APE_CONFIG _IOW(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 1), struct msm_audio_ape_config)
struct msm_audio_ape_config {
uint16_t compatibleVersion;
uint16_t compressionLevel;
uint32_t formatFlags;
uint32_t blocksPerFrame;
uint32_t finalFrameBlocks;
uint32_t totalFrames;
uint16_t bitsPerSample;
uint16_t numChannels;
uint32_t sampleRate;
uint32_t seekTablePresent;
};
#endif

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@@ -1,583 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_AUDIO_CALIBRATION_H
#define _MSM_AUDIO_CALIBRATION_H
#include <linux/types.h>
#include <linux/ioctl.h>
#define CAL_IOCTL_MAGIC 'a'
#define AUDIO_ALLOCATE_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, 200, void *)
#define AUDIO_DEALLOCATE_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, 201, void *)
#define AUDIO_PREPARE_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, 202, void *)
#define AUDIO_SET_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, 203, void *)
#define AUDIO_GET_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, 204, void *)
#define AUDIO_POST_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, 205, void *)
#define AUDIO_GET_RTAC_ADM_INFO _IOR(CAL_IOCTL_MAGIC, 207, void *)
#define AUDIO_GET_RTAC_VOICE_INFO _IOR(CAL_IOCTL_MAGIC, 208, void *)
#define AUDIO_GET_RTAC_ADM_CAL _IOWR(CAL_IOCTL_MAGIC, 209, void *)
#define AUDIO_SET_RTAC_ADM_CAL _IOWR(CAL_IOCTL_MAGIC, 210, void *)
#define AUDIO_GET_RTAC_ASM_CAL _IOWR(CAL_IOCTL_MAGIC, 211, void *)
#define AUDIO_SET_RTAC_ASM_CAL _IOWR(CAL_IOCTL_MAGIC, 212, void *)
#define AUDIO_GET_RTAC_CVS_CAL _IOWR(CAL_IOCTL_MAGIC, 213, void *)
#define AUDIO_SET_RTAC_CVS_CAL _IOWR(CAL_IOCTL_MAGIC, 214, void *)
#define AUDIO_GET_RTAC_CVP_CAL _IOWR(CAL_IOCTL_MAGIC, 215, void *)
#define AUDIO_SET_RTAC_CVP_CAL _IOWR(CAL_IOCTL_MAGIC, 216, void *)
#define AUDIO_GET_RTAC_AFE_CAL _IOWR(CAL_IOCTL_MAGIC, 217, void *)
#define AUDIO_SET_RTAC_AFE_CAL _IOWR(CAL_IOCTL_MAGIC, 218, void *)
enum {
CVP_VOC_RX_TOPOLOGY_CAL_TYPE = 0,
CVP_VOC_TX_TOPOLOGY_CAL_TYPE,
CVP_VOCPROC_STATIC_CAL_TYPE,
CVP_VOCPROC_DYNAMIC_CAL_TYPE,
CVS_VOCSTRM_STATIC_CAL_TYPE,
CVP_VOCDEV_CFG_CAL_TYPE,
CVP_VOCPROC_STATIC_COL_CAL_TYPE,
CVP_VOCPROC_DYNAMIC_COL_CAL_TYPE,
CVS_VOCSTRM_STATIC_COL_CAL_TYPE,
ADM_TOPOLOGY_CAL_TYPE,
ADM_CUST_TOPOLOGY_CAL_TYPE,
ADM_AUDPROC_CAL_TYPE,
ADM_AUDVOL_CAL_TYPE,
ASM_TOPOLOGY_CAL_TYPE,
ASM_CUST_TOPOLOGY_CAL_TYPE,
ASM_AUDSTRM_CAL_TYPE,
AFE_COMMON_RX_CAL_TYPE,
AFE_COMMON_TX_CAL_TYPE,
AFE_ANC_CAL_TYPE,
AFE_AANC_CAL_TYPE,
AFE_FB_SPKR_PROT_CAL_TYPE,
AFE_HW_DELAY_CAL_TYPE,
AFE_SIDETONE_CAL_TYPE,
AFE_TOPOLOGY_CAL_TYPE,
AFE_CUST_TOPOLOGY_CAL_TYPE,
LSM_CUST_TOPOLOGY_CAL_TYPE,
LSM_TOPOLOGY_CAL_TYPE,
LSM_CAL_TYPE,
ADM_RTAC_INFO_CAL_TYPE,
VOICE_RTAC_INFO_CAL_TYPE,
ADM_RTAC_APR_CAL_TYPE,
ASM_RTAC_APR_CAL_TYPE,
VOICE_RTAC_APR_CAL_TYPE,
MAD_CAL_TYPE,
ULP_AFE_CAL_TYPE,
ULP_LSM_CAL_TYPE,
DTS_EAGLE_CAL_TYPE,
AUDIO_CORE_METAINFO_CAL_TYPE,
SRS_TRUMEDIA_CAL_TYPE,
CORE_CUSTOM_TOPOLOGIES_CAL_TYPE,
ADM_RTAC_AUDVOL_CAL_TYPE,
ULP_LSM_TOPOLOGY_ID_CAL_TYPE,
AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE,
AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE,
AFE_SIDETONE_IIR_CAL_TYPE,
AFE_LSM_TOPOLOGY_CAL_TYPE,
AFE_LSM_TX_CAL_TYPE,
ADM_LSM_TOPOLOGY_CAL_TYPE,
ADM_LSM_AUDPROC_CAL_TYPE,
MAX_CAL_TYPES,
};
#define AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE
#define AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE
#define AFE_SIDETONE_IIR_CAL_TYPE AFE_SIDETONE_IIR_CAL_TYPE
#define AFE_LSM_TOPOLOGY_CAL_TYPE AFE_LSM_TOPOLOGY_CAL_TYPE
#define AFE_LSM_TX_CAL_TYPE AFE_LSM_TX_CAL_TYPE
#define ADM_LSM_TOPOLOGY_CAL_TYPE ADM_LSM_TOPOLOGY_CAL_TYPE
#define ADM_LSM_AUDPROC_CAL_TYPE ADM_LSM_AUDPROC_CAL_TYPE
#define LSM_CAL_TYPES
#define TOPOLOGY_SPECIFIC_CHANNEL_INFO
#define MSM_SPKR_PROT_SPV3
enum {
VERSION_0_0,
};
enum {
PER_VOCODER_CAL_BIT_MASK = 0x10000,
};
#define MAX_IOCTL_CMD_SIZE 512
struct audio_cal_header {
int32_t data_size;
int32_t version;
int32_t cal_type;
int32_t cal_type_size;
};
struct audio_cal_type_header {
int32_t version;
int32_t buffer_number;
};
struct audio_cal_data {
int32_t cal_size;
int32_t mem_handle;
};
struct audio_cal_type_alloc {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
};
struct audio_cal_alloc {
struct audio_cal_header hdr;
struct audio_cal_type_alloc cal_type;
};
struct audio_cal_type_dealloc {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
};
struct audio_cal_dealloc {
struct audio_cal_header hdr;
struct audio_cal_type_dealloc cal_type;
};
struct audio_cal_type_prepare {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
};
struct audio_cal_prepare {
struct audio_cal_header hdr;
struct audio_cal_type_prepare cal_type;
};
struct audio_cal_type_post {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
};
struct audio_cal_post {
struct audio_cal_header hdr;
struct audio_cal_type_post cal_type;
};
struct audio_cal_info_metainfo {
uint32_t nKey;
};
enum {
RX_DEVICE,
TX_DEVICE,
MAX_PATH_TYPE
};
struct audio_cal_info_adm_top {
int32_t topology;
int32_t acdb_id;
int32_t path;
int32_t app_type;
int32_t sample_rate;
};
struct audio_cal_info_audproc {
int32_t acdb_id;
int32_t path;
int32_t app_type;
int32_t sample_rate;
};
struct audio_cal_info_audvol {
int32_t acdb_id;
int32_t path;
int32_t app_type;
int32_t vol_index;
};
struct audio_cal_info_afe {
int32_t acdb_id;
int32_t path;
int32_t sample_rate;
};
struct audio_cal_info_afe_top {
int32_t topology;
int32_t acdb_id;
int32_t path;
int32_t sample_rate;
};
struct audio_cal_info_asm_top {
int32_t topology;
int32_t app_type;
};
struct audio_cal_info_audstrm {
int32_t app_type;
};
struct audio_cal_info_aanc {
int32_t acdb_id;
};
#define MAX_HW_DELAY_ENTRIES 25
struct audio_cal_hw_delay_entry {
uint32_t sample_rate;
uint32_t delay_usec;
};
struct audio_cal_hw_delay_data {
uint32_t num_entries;
struct audio_cal_hw_delay_entry entry[MAX_HW_DELAY_ENTRIES];
};
struct audio_cal_info_hw_delay {
int32_t acdb_id;
int32_t path;
int32_t property_type;
struct audio_cal_hw_delay_data data;
};
enum msm_spkr_prot_states {
MSM_SPKR_PROT_CALIBRATED,
MSM_SPKR_PROT_CALIBRATION_IN_PROGRESS,
MSM_SPKR_PROT_DISABLED,
MSM_SPKR_PROT_NOT_CALIBRATED,
MSM_SPKR_PROT_PRE_CALIBRATED,
MSM_SPKR_PROT_IN_FTM_MODE
};
#define MSM_SPKR_PROT_IN_FTM_MODE MSM_SPKR_PROT_IN_FTM_MODE
enum msm_spkr_count {
SP_V2_SPKR_1,
SP_V2_SPKR_2,
SP_V2_NUM_MAX_SPKRS
};
struct audio_cal_info_spk_prot_cfg {
int32_t r0[SP_V2_NUM_MAX_SPKRS];
int32_t t0[SP_V2_NUM_MAX_SPKRS];
uint32_t quick_calib_flag;
uint32_t mode;
#ifdef MSM_SPKR_PROT_SPV3
uint32_t sp_version;
int32_t limiter_th[SP_V2_NUM_MAX_SPKRS];
#endif
};
struct audio_cal_info_sp_th_vi_ftm_cfg {
uint32_t wait_time[SP_V2_NUM_MAX_SPKRS];
uint32_t ftm_time[SP_V2_NUM_MAX_SPKRS];
uint32_t mode;
};
struct audio_cal_info_sp_ex_vi_ftm_cfg {
uint32_t wait_time[SP_V2_NUM_MAX_SPKRS];
uint32_t ftm_time[SP_V2_NUM_MAX_SPKRS];
uint32_t mode;
};
struct audio_cal_info_sp_ex_vi_param {
int32_t freq_q20[SP_V2_NUM_MAX_SPKRS];
int32_t resis_q24[SP_V2_NUM_MAX_SPKRS];
int32_t qmct_q24[SP_V2_NUM_MAX_SPKRS];
int32_t status[SP_V2_NUM_MAX_SPKRS];
};
struct audio_cal_info_sp_th_vi_param {
int32_t r_dc_q24[SP_V2_NUM_MAX_SPKRS];
int32_t temp_q22[SP_V2_NUM_MAX_SPKRS];
int32_t status[SP_V2_NUM_MAX_SPKRS];
};
struct audio_cal_info_msm_spk_prot_status {
int32_t r0[SP_V2_NUM_MAX_SPKRS];
int32_t status;
};
struct audio_cal_info_sidetone {
uint16_t enable;
uint16_t gain;
int32_t tx_acdb_id;
int32_t rx_acdb_id;
int32_t mid;
int32_t pid;
};
#define MAX_SIDETONE_IIR_DATA_SIZE 224
#define MAX_NO_IIR_FILTER_STAGE 10
struct audio_cal_info_sidetone_iir {
uint16_t iir_enable;
uint16_t num_biquad_stages;
uint16_t pregain;
int32_t tx_acdb_id;
int32_t rx_acdb_id;
int32_t mid;
int32_t pid;
uint8_t iir_config[MAX_SIDETONE_IIR_DATA_SIZE];
};
struct audio_cal_info_lsm_top {
int32_t topology;
int32_t acdb_id;
int32_t app_type;
};
struct audio_cal_info_lsm {
int32_t acdb_id;
int32_t path;
int32_t app_type;
};
#define VSS_NUM_CHANNELS_MAX 8
struct audio_cal_info_voc_top {
int32_t topology;
int32_t acdb_id;
#ifdef TOPOLOGY_SPECIFIC_CHANNEL_INFO
uint32_t num_channels;
uint8_t channel_mapping[VSS_NUM_CHANNELS_MAX];
#endif
};
struct audio_cal_info_vocproc {
int32_t tx_acdb_id;
int32_t rx_acdb_id;
int32_t tx_sample_rate;
int32_t rx_sample_rate;
};
enum {
DEFAULT_FEATURE_SET,
VOL_BOOST_FEATURE_SET,
};
struct audio_cal_info_vocvol {
int32_t tx_acdb_id;
int32_t rx_acdb_id;
int32_t feature_set;
};
struct audio_cal_info_vocdev_cfg {
int32_t tx_acdb_id;
int32_t rx_acdb_id;
};
#define MAX_VOICE_COLUMNS 20
union audio_cal_col_na {
uint8_t val8;
uint16_t val16;
uint32_t val32;
uint64_t val64;
} __attribute__((packed));
struct audio_cal_col {
uint32_t id;
uint32_t type;
union audio_cal_col_na na_value;
} __attribute__((packed));
struct audio_cal_col_data {
uint32_t num_columns;
struct audio_cal_col column[MAX_VOICE_COLUMNS];
} __attribute__((packed));
struct audio_cal_info_voc_col {
int32_t table_id;
int32_t tx_acdb_id;
int32_t rx_acdb_id;
struct audio_cal_col_data data;
};
struct audio_cal_type_basic {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
};
struct audio_cal_basic {
struct audio_cal_header hdr;
struct audio_cal_type_basic cal_type;
};
struct audio_cal_type_adm_top {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_adm_top cal_info;
};
struct audio_cal_adm_top {
struct audio_cal_header hdr;
struct audio_cal_type_adm_top cal_type;
};
struct audio_cal_type_metainfo {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_metainfo cal_info;
};
struct audio_core_metainfo {
struct audio_cal_header hdr;
struct audio_cal_type_metainfo cal_type;
};
struct audio_cal_type_audproc {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_audproc cal_info;
};
struct audio_cal_audproc {
struct audio_cal_header hdr;
struct audio_cal_type_audproc cal_type;
};
struct audio_cal_type_audvol {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_audvol cal_info;
};
struct audio_cal_audvol {
struct audio_cal_header hdr;
struct audio_cal_type_audvol cal_type;
};
struct audio_cal_type_asm_top {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_asm_top cal_info;
};
struct audio_cal_asm_top {
struct audio_cal_header hdr;
struct audio_cal_type_asm_top cal_type;
};
struct audio_cal_type_audstrm {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_audstrm cal_info;
};
struct audio_cal_audstrm {
struct audio_cal_header hdr;
struct audio_cal_type_audstrm cal_type;
};
struct audio_cal_type_afe {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_afe cal_info;
};
struct audio_cal_afe {
struct audio_cal_header hdr;
struct audio_cal_type_afe cal_type;
};
struct audio_cal_type_afe_top {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_afe_top cal_info;
};
struct audio_cal_afe_top {
struct audio_cal_header hdr;
struct audio_cal_type_afe_top cal_type;
};
struct audio_cal_type_aanc {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_aanc cal_info;
};
struct audio_cal_aanc {
struct audio_cal_header hdr;
struct audio_cal_type_aanc cal_type;
};
struct audio_cal_type_fb_spk_prot_cfg {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_spk_prot_cfg cal_info;
};
struct audio_cal_fb_spk_prot_cfg {
struct audio_cal_header hdr;
struct audio_cal_type_fb_spk_prot_cfg cal_type;
};
struct audio_cal_type_sp_th_vi_ftm_cfg {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_sp_th_vi_ftm_cfg cal_info;
};
struct audio_cal_sp_th_vi_ftm_cfg {
struct audio_cal_header hdr;
struct audio_cal_type_sp_th_vi_ftm_cfg cal_type;
};
struct audio_cal_type_sp_ex_vi_ftm_cfg {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_sp_ex_vi_ftm_cfg cal_info;
};
struct audio_cal_sp_ex_vi_ftm_cfg {
struct audio_cal_header hdr;
struct audio_cal_type_sp_ex_vi_ftm_cfg cal_type;
};
struct audio_cal_type_hw_delay {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_hw_delay cal_info;
};
struct audio_cal_hw_delay {
struct audio_cal_header hdr;
struct audio_cal_type_hw_delay cal_type;
};
struct audio_cal_type_sidetone {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_sidetone cal_info;
};
struct audio_cal_sidetone {
struct audio_cal_header hdr;
struct audio_cal_type_sidetone cal_type;
};
struct audio_cal_type_sidetone_iir {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_sidetone_iir cal_info;
};
struct audio_cal_sidetone_iir {
struct audio_cal_header hdr;
struct audio_cal_type_sidetone_iir cal_type;
};
struct audio_cal_type_lsm_top {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_lsm_top cal_info;
};
struct audio_cal_lsm_top {
struct audio_cal_header hdr;
struct audio_cal_type_lsm_top cal_type;
};
struct audio_cal_type_lsm {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_lsm cal_info;
};
struct audio_cal_lsm {
struct audio_cal_header hdr;
struct audio_cal_type_lsm cal_type;
};
struct audio_cal_type_voc_top {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_voc_top cal_info;
};
struct audio_cal_voc_top {
struct audio_cal_header hdr;
struct audio_cal_type_voc_top cal_type;
};
struct audio_cal_type_vocproc {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_vocproc cal_info;
};
struct audio_cal_vocproc {
struct audio_cal_header hdr;
struct audio_cal_type_vocproc cal_type;
};
struct audio_cal_type_vocvol {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_vocvol cal_info;
};
struct audio_cal_vocvol {
struct audio_cal_header hdr;
struct audio_cal_type_vocvol cal_type;
};
struct audio_cal_type_vocdev_cfg {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_vocdev_cfg cal_info;
};
struct audio_cal_vocdev_cfg {
struct audio_cal_header hdr;
struct audio_cal_type_vocdev_cfg cal_type;
};
struct audio_cal_type_voc_col {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_voc_col cal_info;
};
struct audio_cal_voc_col {
struct audio_cal_header hdr;
struct audio_cal_type_voc_col cal_type;
};
struct audio_cal_type_fb_spk_prot_status {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_msm_spk_prot_status cal_info;
};
struct audio_cal_fb_spk_prot_status {
struct audio_cal_header hdr;
struct audio_cal_type_fb_spk_prot_status cal_type;
};
struct audio_cal_type_sp_th_vi_param {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_sp_th_vi_param cal_info;
};
struct audio_cal_sp_th_vi_param {
struct audio_cal_header hdr;
struct audio_cal_type_sp_th_vi_param cal_type;
};
struct audio_cal_type_sp_ex_vi_param {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_sp_ex_vi_param cal_info;
};
struct audio_cal_sp_ex_vi_param {
struct audio_cal_header hdr;
struct audio_cal_type_sp_ex_vi_param cal_type;
};
#endif

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@@ -1,146 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_AUDIO_MVS_H
#define _MSM_AUDIO_MVS_H
#include <linux/msm_audio.h>
#define AUDIO_GET_MVS_CONFIG _IOW(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 0), unsigned int)
#define AUDIO_SET_MVS_CONFIG _IOR(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 1), unsigned int)
#define MVS_MODE_IS733 0x1
#define MVS_MODE_IS127 0x2
#define MVS_MODE_4GV_NB 0x3
#define MVS_MODE_4GV_WB 0x4
#define MVS_MODE_AMR 0x5
#define MVS_MODE_EFR 0x6
#define MVS_MODE_FR 0x7
#define MVS_MODE_HR 0x8
#define MVS_MODE_LINEAR_PCM 0x9
#define MVS_MODE_G711 0xA
#define MVS_MODE_PCM 0xC
#define MVS_MODE_AMR_WB 0xD
#define MVS_MODE_G729A 0xE
#define MVS_MODE_G711A 0xF
#define MVS_MODE_G722 0x10
#define MVS_MODE_PCM_WB 0x12
enum msm_audio_amr_mode {
MVS_AMR_MODE_0475,
MVS_AMR_MODE_0515,
MVS_AMR_MODE_0590,
MVS_AMR_MODE_0670,
MVS_AMR_MODE_0740,
MVS_AMR_MODE_0795,
MVS_AMR_MODE_1020,
MVS_AMR_MODE_1220,
MVS_AMR_MODE_0660,
MVS_AMR_MODE_0885,
MVS_AMR_MODE_1265,
MVS_AMR_MODE_1425,
MVS_AMR_MODE_1585,
MVS_AMR_MODE_1825,
MVS_AMR_MODE_1985,
MVS_AMR_MODE_2305,
MVS_AMR_MODE_2385,
MVS_AMR_MODE_UNDEF
};
enum msm_audio_voc_rate {
MVS_VOC_0_RATE,
MVS_VOC_8_RATE,
MVS_VOC_4_RATE,
MVS_VOC_2_RATE,
MVS_VOC_1_RATE,
MVS_VOC_ERASURE,
MVS_VOC_RATE_MAX,
MVS_VOC_RATE_UNDEF = MVS_VOC_RATE_MAX
};
enum msm_audio_amr_frame_type {
MVS_AMR_SPEECH_GOOD,
MVS_AMR_SPEECH_DEGRADED,
MVS_AMR_ONSET,
MVS_AMR_SPEECH_BAD,
MVS_AMR_SID_FIRST,
MVS_AMR_SID_UPDATE,
MVS_AMR_SID_BAD,
MVS_AMR_NO_DATA,
MVS_AMR_SPEECH_LOST
};
enum msm_audio_g711a_mode {
MVS_G711A_MODE_MULAW,
MVS_G711A_MODE_ALAW
};
enum msm_audio_g711_mode {
MVS_G711_MODE_MULAW,
MVS_G711_MODE_ALAW
};
enum mvs_g722_mode_type {
MVS_G722_MODE_01,
MVS_G722_MODE_02,
MVS_G722_MODE_03,
MVS_G722_MODE_MAX,
MVS_G722_MODE_UNDEF
};
enum msm_audio_g711a_frame_type {
MVS_G711A_SPEECH_GOOD,
MVS_G711A_SID,
MVS_G711A_NO_DATA,
MVS_G711A_ERASURE
};
enum msm_audio_g729a_frame_type {
MVS_G729A_NO_DATA,
MVS_G729A_SPEECH_GOOD,
MVS_G729A_SID,
MVS_G729A_ERASURE
};
struct min_max_rate {
uint32_t min_rate;
uint32_t max_rate;
};
struct msm_audio_mvs_config {
uint32_t mvs_mode;
uint32_t rate_type;
struct min_max_rate min_max_rate;
uint32_t dtx_mode;
};
#define MVS_MAX_VOC_PKT_SIZE 640
struct gsm_header {
uint8_t bfi;
uint8_t sid;
uint8_t taf;
uint8_t ufi;
};
struct q6_msm_audio_mvs_frame {
union {
uint32_t frame_type;
uint32_t packet_rate;
struct gsm_header gsm_frame_type;
} header;
uint32_t len;
uint8_t voc_pkt[MVS_MAX_VOC_PKT_SIZE];
};
struct msm_audio_mvs_frame {
uint32_t frame_type;
uint32_t len;
uint8_t voc_pkt[MVS_MAX_VOC_PKT_SIZE];
};
#define Q5V2_MVS_MAX_VOC_PKT_SIZE 320
struct q5v2_msm_audio_mvs_frame {
uint32_t frame_type;
uint32_t len;
uint8_t voc_pkt[Q5V2_MVS_MAX_VOC_PKT_SIZE];
};
#endif

View File

@@ -1,43 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_AUDIO_QCP_H
#define _MSM_AUDIO_QCP_H
#include <linux/msm_audio.h>
#define AUDIO_SET_QCELP_ENC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 0, struct msm_audio_qcelp_enc_config)
#define AUDIO_GET_QCELP_ENC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 1, struct msm_audio_qcelp_enc_config)
#define AUDIO_SET_EVRC_ENC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 2, struct msm_audio_evrc_enc_config)
#define AUDIO_GET_EVRC_ENC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 3, struct msm_audio_evrc_enc_config)
#define CDMA_RATE_BLANK 0x00
#define CDMA_RATE_EIGHTH 0x01
#define CDMA_RATE_QUARTER 0x02
#define CDMA_RATE_HALF 0x03
#define CDMA_RATE_FULL 0x04
#define CDMA_RATE_ERASURE 0x05
struct msm_audio_qcelp_enc_config {
uint32_t cdma_rate;
uint32_t min_bit_rate;
uint32_t max_bit_rate;
};
struct msm_audio_evrc_enc_config {
uint32_t cdma_rate;
uint32_t min_bit_rate;
uint32_t max_bit_rate;
};
#endif

View File

@@ -1,45 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_AUDIO_SBC_H
#define _MSM_AUDIO_SBC_H
#include <linux/msm_audio.h>
#define AUDIO_SET_SBC_ENC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 0), struct msm_audio_sbc_enc_config)
#define AUDIO_GET_SBC_ENC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 1), struct msm_audio_sbc_enc_config)
#define AUDIO_SBC_BA_LOUDNESS 0x0
#define AUDIO_SBC_BA_SNR 0x1
#define AUDIO_SBC_MODE_MONO 0x0
#define AUDIO_SBC_MODE_DUAL 0x1
#define AUDIO_SBC_MODE_STEREO 0x2
#define AUDIO_SBC_MODE_JSTEREO 0x3
#define AUDIO_SBC_BANDS_8 0x1
#define AUDIO_SBC_BLOCKS_4 0x0
#define AUDIO_SBC_BLOCKS_8 0x1
#define AUDIO_SBC_BLOCKS_12 0x2
#define AUDIO_SBC_BLOCKS_16 0x3
struct msm_audio_sbc_enc_config {
uint32_t channels;
uint32_t sample_rate;
uint32_t bit_allocation;
uint32_t number_of_subbands;
uint32_t number_of_blocks;
uint32_t bit_rate;
uint32_t mode;
};
#endif

View File

@@ -1,71 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_AUDIO_VOICEMEMO_H
#define _MSM_AUDIO_VOICEMEMO_H
#include <linux/msm_audio.h>
#define AUDIO_GET_VOICEMEMO_CONFIG _IOW(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 0), unsigned int)
#define AUDIO_SET_VOICEMEMO_CONFIG _IOR(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 1), unsigned int)
enum rpc_voc_rec_dir_type {
RPC_VOC_REC_NONE,
RPC_VOC_REC_FORWARD,
RPC_VOC_REC_REVERSE,
RPC_VOC_REC_BOTH,
RPC_VOC_MAX_REC_TYPE
};
enum rpc_voc_capability_type {
RPC_VOC_CAP_IS733 = 4,
RPC_VOC_CAP_IS127 = 8,
RPC_VOC_CAP_AMR = 64,
RPC_VOC_CAP_32BIT_DUMMY = 2147483647
};
enum rpc_voc_rate_type {
RPC_VOC_0_RATE = 0,
RPC_VOC_8_RATE,
RPC_VOC_4_RATE,
RPC_VOC_2_RATE,
RPC_VOC_1_RATE,
RPC_VOC_ERASURE,
RPC_VOC_ERR_RATE,
RPC_VOC_AMR_RATE_475 = 0,
RPC_VOC_AMR_RATE_515 = 1,
RPC_VOC_AMR_RATE_590 = 2,
RPC_VOC_AMR_RATE_670 = 3,
RPC_VOC_AMR_RATE_740 = 4,
RPC_VOC_AMR_RATE_795 = 5,
RPC_VOC_AMR_RATE_1020 = 6,
RPC_VOC_AMR_RATE_1220 = 7,
};
enum rpc_voc_pb_len_rate_var_type {
RPC_VOC_PB_NATIVE_QCP = 3,
RPC_VOC_PB_AMR,
RPC_VOC_PB_EVB
};
struct msm_audio_voicememo_config {
uint32_t rec_type;
uint32_t rec_interval_ms;
uint32_t auto_stop_ms;
uint32_t capability;
uint32_t max_rate;
uint32_t min_rate;
uint32_t frame_format;
uint32_t dtx_enable;
uint32_t data_req_ms;
};
#endif

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@@ -1,43 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_AUDIO_WMA_H
#define _MSM_AUDIO_WMA_H
#define AUDIO_GET_WMA_CONFIG _IOR(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 0), unsigned int)
#define AUDIO_SET_WMA_CONFIG _IOW(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 1), unsigned int)
#define AUDIO_GET_WMA_CONFIG_V2 _IOR(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 2), struct msm_audio_wma_config_v2)
#define AUDIO_SET_WMA_CONFIG_V2 _IOW(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 3), struct msm_audio_wma_config_v2)
struct msm_audio_wma_config {
unsigned short armdatareqthr;
unsigned short channelsdecoded;
unsigned short wmabytespersec;
unsigned short wmasamplingfreq;
unsigned short wmaencoderopts;
};
struct msm_audio_wma_config_v2 {
unsigned short format_tag;
unsigned short numchannels;
uint32_t samplingrate;
uint32_t avgbytespersecond;
unsigned short block_align;
unsigned short validbitspersample;
uint32_t channelmask;
unsigned short encodeopt;
};
#endif

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@@ -1,37 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_AUDIO_WMAPRO_H
#define _MSM_AUDIO_WMAPRO_H
#define AUDIO_GET_WMAPRO_CONFIG _IOR(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 0), struct msm_audio_wmapro_config)
#define AUDIO_SET_WMAPRO_CONFIG _IOW(AUDIO_IOCTL_MAGIC, (AUDIO_MAX_COMMON_IOCTL_NUM + 1), struct msm_audio_wmapro_config)
struct msm_audio_wmapro_config {
unsigned short armdatareqthr;
uint8_t validbitspersample;
uint8_t numchannels;
unsigned short formattag;
uint32_t samplingrate;
uint32_t avgbytespersecond;
unsigned short asfpacketlength;
uint32_t channelmask;
unsigned short encodeopt;
unsigned short advancedencodeopt;
uint32_t advancedencodeopt2;
};
#endif

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@@ -1,29 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _DSPS_H_
#define _DSPS_H_
#include <linux/ioctl.h>
#define DSPS_IOCTL_MAGIC 'd'
#define DSPS_IOCTL_ON _IO(DSPS_IOCTL_MAGIC, 1)
#define DSPS_IOCTL_OFF _IO(DSPS_IOCTL_MAGIC, 2)
#define DSPS_IOCTL_READ_SLOW_TIMER _IOR(DSPS_IOCTL_MAGIC, 3, unsigned int *)
#define DSPS_IOCTL_READ_FAST_TIMER _IOR(DSPS_IOCTL_MAGIC, 4, unsigned int *)
#define DSPS_IOCTL_RESET _IO(DSPS_IOCTL_MAGIC, 5)
#endif

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@@ -1,138 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_ION_H
#define _MSM_ION_H
#include "ion.h"
#define ION_BIT(nr) (1UL << (nr))
enum msm_ion_heap_types {
ION_HEAP_TYPE_MSM_START = ION_HEAP_TYPE_CUSTOM + 1,
ION_HEAP_TYPE_SECURE_DMA = ION_HEAP_TYPE_MSM_START,
ION_HEAP_TYPE_SYSTEM_SECURE,
ION_HEAP_TYPE_HYP_CMA,
ION_HEAP_TYPE_SECURE_CARVEOUT,
};
enum ion_heap_ids {
INVALID_HEAP_ID = - 1,
ION_CP_MM_HEAP_ID = 8,
ION_SECURE_HEAP_ID = 9,
ION_SECURE_DISPLAY_HEAP_ID = 10,
ION_CP_MFC_HEAP_ID = 12,
ION_SPSS_HEAP_ID = 13,
ION_SECURE_CARVEOUT_HEAP_ID = 14,
ION_CP_WB_HEAP_ID = 16,
ION_QSECOM_TA_HEAP_ID = 19,
ION_CAMERA_HEAP_ID = 20,
ION_SYSTEM_CONTIG_HEAP_ID = 21,
ION_ADSP_HEAP_ID = 22,
ION_PIL1_HEAP_ID = 23,
ION_SF_HEAP_ID = 24,
ION_SYSTEM_HEAP_ID = 25,
ION_PIL2_HEAP_ID = 26,
ION_QSECOM_HEAP_ID = 27,
ION_AUDIO_HEAP_ID = 28,
ION_MM_FIRMWARE_HEAP_ID = 29,
ION_GOOGLE_HEAP_ID = 30,
ION_HEAP_ID_RESERVED = 31
};
#define ION_IOMMU_HEAP_ID ION_SYSTEM_HEAP_ID
#define ION_HEAP_TYPE_IOMMU ION_HEAP_TYPE_SYSTEM
#define ION_SPSS_HEAP_ID ION_SPSS_HEAP_ID
enum ion_fixed_position {
NOT_FIXED,
FIXED_LOW,
FIXED_MIDDLE,
FIXED_HIGH,
};
enum cp_mem_usage {
VIDEO_BITSTREAM = 0x1,
VIDEO_PIXEL = 0x2,
VIDEO_NONPIXEL = 0x3,
DISPLAY_SECURE_CP_USAGE = 0x4,
CAMERA_SECURE_CP_USAGE = 0x5,
MAX_USAGE = 0x6,
UNKNOWN = 0x7FFFFFFF,
};
#define ION_FLAG_CP_TOUCH ION_BIT(17)
#define ION_FLAG_CP_BITSTREAM ION_BIT(18)
#define ION_FLAG_CP_PIXEL ION_BIT(19)
#define ION_FLAG_CP_NON_PIXEL ION_BIT(20)
#define ION_FLAG_CP_CAMERA ION_BIT(21)
#define ION_FLAG_CP_HLOS ION_BIT(22)
#define ION_FLAG_CP_SPSS_SP ION_BIT(23)
#define ION_FLAG_CP_SPSS_SP_SHARED ION_BIT(24)
#define ION_FLAG_CP_SEC_DISPLAY ION_BIT(25)
#define ION_FLAG_CP_APP ION_BIT(26)
#define ION_FLAG_CP_CAMERA_PREVIEW ION_BIT(27)
#define ION_FLAG_CP_CDSP ION_BIT(29)
#define ION_FLAG_CP_SPSS_HLOS_SHARED ION_BIT(30)
#define ION_FLAG_ALLOW_NON_CONTIG ION_BIT(28)
#define ION_FLAG_SECURE ION_BIT(ION_HEAP_ID_RESERVED)
#define ION_FLAG_POOL_FORCE_ALLOC ION_BIT(16)
#define ION_SECURE ION_FLAG_SECURE
#define ION_HEAP(bit) ION_BIT(bit)
#define ION_ADSP_HEAP_NAME "adsp"
#define ION_SYSTEM_HEAP_NAME "system"
#define ION_VMALLOC_HEAP_NAME ION_SYSTEM_HEAP_NAME
#define ION_KMALLOC_HEAP_NAME "kmalloc"
#define ION_AUDIO_HEAP_NAME "audio"
#define ION_SF_HEAP_NAME "sf"
#define ION_MM_HEAP_NAME "mm"
#define ION_CAMERA_HEAP_NAME "camera_preview"
#define ION_IOMMU_HEAP_NAME "iommu"
#define ION_MFC_HEAP_NAME "mfc"
#define ION_SPSS_HEAP_NAME "spss"
#define ION_SECURE_CARVEOUT_HEAP_NAME "secure_carveout"
#define ION_WB_HEAP_NAME "wb"
#define ION_MM_FIRMWARE_HEAP_NAME "mm_fw"
#define ION_GOOGLE_HEAP_NAME "easel_mem"
#define ION_PIL1_HEAP_NAME "pil_1"
#define ION_PIL2_HEAP_NAME "pil_2"
#define ION_QSECOM_HEAP_NAME "qsecom"
#define ION_QSECOM_TA_HEAP_NAME "qsecom_ta"
#define ION_SECURE_HEAP_NAME "secure_heap"
#define ION_SECURE_DISPLAY_HEAP_NAME "secure_display"
#define ION_SET_CACHED(__cache) ((__cache) | ION_FLAG_CACHED)
#define ION_SET_UNCACHED(__cache) ((__cache) & ~ION_FLAG_CACHED)
#define ION_IS_CACHED(__flags) ((__flags) & ION_FLAG_CACHED)
struct ion_flush_data {
ion_user_handle_t handle;
int fd;
void * vaddr;
unsigned int offset;
unsigned int length;
};
struct ion_prefetch_regions {
unsigned int vmid;
size_t * sizes;
unsigned int nr_sizes;
};
struct ion_prefetch_data {
int heap_id;
unsigned long len;
struct ion_prefetch_regions * regions;
unsigned int nr_regions;
};
#define ION_IOC_MSM_MAGIC 'M'
#define ION_IOC_CLEAN_CACHES _IOWR(ION_IOC_MSM_MAGIC, 0, struct ion_flush_data)
#define ION_IOC_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 1, struct ion_flush_data)
#define ION_IOC_CLEAN_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 2, struct ion_flush_data)
#define ION_IOC_PREFETCH _IOWR(ION_IOC_MSM_MAGIC, 3, struct ion_prefetch_data)
#define ION_IOC_DRAIN _IOWR(ION_IOC_MSM_MAGIC, 4, struct ion_prefetch_data)
#endif

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@@ -1,969 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_IPA_H_
#define _MSM_IPA_H_
#include <stdint.h>
#include <stddef.h>
#include <sys/stat.h>
#include <linux/ioctl.h>
#include <linux/types.h>
#include <linux/if_ether.h>
#define IPA_IOC_MAGIC 0xCF
#define IPA_DEV_NAME "/dev/ipa"
#define IPA_NAT_DEV_NAME "ipaNatTable"
#define IPA_IPV6CT_DEV_NAME "ipaIpv6CTTable"
#define IPA_DFLT_RT_TBL_NAME "ipa_dflt_rt"
#define IPA_IOCTL_ADD_HDR 0
#define IPA_IOCTL_DEL_HDR 1
#define IPA_IOCTL_ADD_RT_RULE 2
#define IPA_IOCTL_DEL_RT_RULE 3
#define IPA_IOCTL_ADD_FLT_RULE 4
#define IPA_IOCTL_DEL_FLT_RULE 5
#define IPA_IOCTL_COMMIT_HDR 6
#define IPA_IOCTL_RESET_HDR 7
#define IPA_IOCTL_COMMIT_RT 8
#define IPA_IOCTL_RESET_RT 9
#define IPA_IOCTL_COMMIT_FLT 10
#define IPA_IOCTL_RESET_FLT 11
#define IPA_IOCTL_DUMP 12
#define IPA_IOCTL_GET_RT_TBL 13
#define IPA_IOCTL_PUT_RT_TBL 14
#define IPA_IOCTL_COPY_HDR 15
#define IPA_IOCTL_QUERY_INTF 16
#define IPA_IOCTL_QUERY_INTF_TX_PROPS 17
#define IPA_IOCTL_QUERY_INTF_RX_PROPS 18
#define IPA_IOCTL_GET_HDR 19
#define IPA_IOCTL_PUT_HDR 20
#define IPA_IOCTL_SET_FLT 21
#define IPA_IOCTL_ALLOC_NAT_MEM 22
#define IPA_IOCTL_V4_INIT_NAT 23
#define IPA_IOCTL_TABLE_DMA_CMD 24
#define IPA_IOCTL_NAT_DMA IPA_IOCTL_TABLE_DMA_CMD
#define IPA_IOCTL_INIT_IPV6CT_TABLE 25
#define IPA_IOCTL_V4_DEL_NAT 26
#define IPA_IOCTL_PULL_MSG 27
#define IPA_IOCTL_GET_NAT_OFFSET 28
#define IPA_IOCTL_RM_ADD_DEPENDENCY 29
#define IPA_IOCTL_RM_DEL_DEPENDENCY 30
#define IPA_IOCTL_GENERATE_FLT_EQ 31
#define IPA_IOCTL_QUERY_INTF_EXT_PROPS 32
#define IPA_IOCTL_QUERY_EP_MAPPING 33
#define IPA_IOCTL_QUERY_RT_TBL_INDEX 34
#define IPA_IOCTL_WRITE_QMAPID 35
#define IPA_IOCTL_MDFY_FLT_RULE 36
#define IPA_IOCTL_NOTIFY_WAN_UPSTREAM_ROUTE_ADD 37
#define IPA_IOCTL_NOTIFY_WAN_UPSTREAM_ROUTE_DEL 38
#define IPA_IOCTL_NOTIFY_WAN_EMBMS_CONNECTED 39
#define IPA_IOCTL_ADD_HDR_PROC_CTX 40
#define IPA_IOCTL_DEL_HDR_PROC_CTX 41
#define IPA_IOCTL_MDFY_RT_RULE 42
#define IPA_IOCTL_ADD_RT_RULE_AFTER 43
#define IPA_IOCTL_ADD_FLT_RULE_AFTER 44
#define IPA_IOCTL_GET_HW_VERSION 45
#define IPA_IOCTL_ADD_RT_RULE_EXT 46
#define IPA_IOCTL_ADD_VLAN_IFACE 47
#define IPA_IOCTL_DEL_VLAN_IFACE 48
#define IPA_IOCTL_ADD_L2TP_VLAN_MAPPING 49
#define IPA_IOCTL_DEL_L2TP_VLAN_MAPPING 50
#define IPA_IOCTL_NAT_MODIFY_PDN 51
#define IPA_IOCTL_ALLOC_NAT_TABLE 52
#define IPA_IOCTL_ALLOC_IPV6CT_TABLE 53
#define IPA_IOCTL_DEL_NAT_TABLE 54
#define IPA_IOCTL_DEL_IPV6CT_TABLE 55
#define IPA_IOCTL_CLEANUP 56
#define IPA_IOCTL_QUERY_WLAN_CLIENT 57
#define IPA_IOCTL_GET_VLAN_MODE 58
#define IPA_HDR_MAX_SIZE 64
#define IPA_RESOURCE_NAME_MAX 32
#define IPA_NUM_PROPS_MAX 35
#define IPA_MAC_ADDR_SIZE 6
#define IPA_MBIM_MAX_STREAM_NUM 8
#define IPA_WAN_MSG_IPv6_ADDR_GW_LEN 4
#define IPA_MAX_NUM_HW_PATH_CLIENTS 16
#define QMI_IPA_MAX_CLIENT_DST_PIPES 4
#define IPA_FLT_TOS (1ul << 0)
#define IPA_FLT_PROTOCOL (1ul << 1)
#define IPA_FLT_SRC_ADDR (1ul << 2)
#define IPA_FLT_DST_ADDR (1ul << 3)
#define IPA_FLT_SRC_PORT_RANGE (1ul << 4)
#define IPA_FLT_DST_PORT_RANGE (1ul << 5)
#define IPA_FLT_TYPE (1ul << 6)
#define IPA_FLT_CODE (1ul << 7)
#define IPA_FLT_SPI (1ul << 8)
#define IPA_FLT_SRC_PORT (1ul << 9)
#define IPA_FLT_DST_PORT (1ul << 10)
#define IPA_FLT_TC (1ul << 11)
#define IPA_FLT_FLOW_LABEL (1ul << 12)
#define IPA_FLT_NEXT_HDR (1ul << 13)
#define IPA_FLT_META_DATA (1ul << 14)
#define IPA_FLT_FRAGMENT (1ul << 15)
#define IPA_FLT_TOS_MASKED (1ul << 16)
#define IPA_FLT_MAC_SRC_ADDR_ETHER_II (1ul << 17)
#define IPA_FLT_MAC_DST_ADDR_ETHER_II (1ul << 18)
#define IPA_FLT_MAC_SRC_ADDR_802_3 (1ul << 19)
#define IPA_FLT_MAC_DST_ADDR_802_3 (1ul << 20)
#define IPA_FLT_MAC_ETHER_TYPE (1ul << 21)
#define IPA_FLT_MAC_DST_ADDR_L2TP (1ul << 22)
#define IPA_FLT_TCP_SYN (1ul << 23)
#define IPA_FLT_TCP_SYN_L2TP (1ul << 24)
#define IPA_FLT_L2TP_INNER_IP_TYPE (1ul << 25)
#define IPA_FLT_L2TP_INNER_IPV4_DST_ADDR (1ul << 26)
#define IPA_MAX_PDN_NUM 5
enum ipa_client_type {
IPA_CLIENT_HSIC1_PROD = 0,
IPA_CLIENT_HSIC1_CONS = 1,
IPA_CLIENT_HSIC2_PROD = 2,
IPA_CLIENT_HSIC2_CONS = 3,
IPA_CLIENT_HSIC3_PROD = 4,
IPA_CLIENT_HSIC3_CONS = 5,
IPA_CLIENT_HSIC4_PROD = 6,
IPA_CLIENT_HSIC4_CONS = 7,
IPA_CLIENT_HSIC5_PROD = 8,
IPA_CLIENT_HSIC5_CONS = 9,
IPA_CLIENT_WLAN1_PROD = 10,
IPA_CLIENT_WLAN1_CONS = 11,
IPA_CLIENT_A5_WLAN_AMPDU_PROD = 12,
IPA_CLIENT_WLAN2_CONS = 13,
IPA_CLIENT_WLAN3_CONS = 15,
IPA_CLIENT_WLAN4_CONS = 17,
IPA_CLIENT_USB_PROD = 18,
IPA_CLIENT_USB_CONS = 19,
IPA_CLIENT_USB2_PROD = 20,
IPA_CLIENT_USB2_CONS = 21,
IPA_CLIENT_USB3_PROD = 22,
IPA_CLIENT_USB3_CONS = 23,
IPA_CLIENT_USB4_PROD = 24,
IPA_CLIENT_USB4_CONS = 25,
IPA_CLIENT_UC_USB_PROD = 26,
IPA_CLIENT_USB_DPL_CONS = 27,
IPA_CLIENT_A2_EMBEDDED_PROD = 28,
IPA_CLIENT_A2_EMBEDDED_CONS = 29,
IPA_CLIENT_A2_TETHERED_PROD = 30,
IPA_CLIENT_A2_TETHERED_CONS = 31,
IPA_CLIENT_APPS_LAN_PROD = 32,
IPA_CLIENT_APPS_LAN_CONS = 33,
IPA_CLIENT_APPS_WAN_PROD = 34,
IPA_CLIENT_APPS_LAN_WAN_PROD = IPA_CLIENT_APPS_WAN_PROD,
IPA_CLIENT_APPS_WAN_CONS = 35,
IPA_CLIENT_APPS_CMD_PROD = 36,
IPA_CLIENT_A5_LAN_WAN_CONS = 37,
IPA_CLIENT_ODU_PROD = 38,
IPA_CLIENT_ODU_EMB_CONS = 39,
IPA_CLIENT_ODU_TETH_CONS = 41,
IPA_CLIENT_MHI_PROD = 42,
IPA_CLIENT_MHI_CONS = 43,
IPA_CLIENT_MEMCPY_DMA_SYNC_PROD = 44,
IPA_CLIENT_MEMCPY_DMA_SYNC_CONS = 45,
IPA_CLIENT_MEMCPY_DMA_ASYNC_PROD = 46,
IPA_CLIENT_MEMCPY_DMA_ASYNC_CONS = 47,
IPA_CLIENT_ETHERNET_PROD = 48,
IPA_CLIENT_ETHERNET_CONS = 49,
IPA_CLIENT_Q6_LAN_PROD = 50,
IPA_CLIENT_Q6_LAN_CONS = 51,
IPA_CLIENT_Q6_WAN_PROD = 52,
IPA_CLIENT_Q6_WAN_CONS = 53,
IPA_CLIENT_Q6_CMD_PROD = 54,
IPA_CLIENT_Q6_DUN_CONS = 55,
IPA_CLIENT_Q6_DECOMP_PROD = 56,
IPA_CLIENT_Q6_DECOMP_CONS = 57,
IPA_CLIENT_Q6_DECOMP2_PROD = 58,
IPA_CLIENT_Q6_DECOMP2_CONS = 59,
IPA_CLIENT_Q6_LTE_WIFI_AGGR_CONS = 61,
IPA_CLIENT_TEST_PROD = 62,
IPA_CLIENT_TEST_CONS = 63,
IPA_CLIENT_TEST1_PROD = 64,
IPA_CLIENT_TEST1_CONS = 65,
IPA_CLIENT_TEST2_PROD = 66,
IPA_CLIENT_TEST2_CONS = 67,
IPA_CLIENT_TEST3_PROD = 68,
IPA_CLIENT_TEST3_CONS = 69,
IPA_CLIENT_TEST4_PROD = 70,
IPA_CLIENT_TEST4_CONS = 71,
IPA_CLIENT_DUMMY_CONS = 73
};
#define IPA_CLIENT_MAX (IPA_CLIENT_DUMMY_CONS + 1)
#define IPA_CLIENT_IS_APPS_CONS(client) ((client) == IPA_CLIENT_APPS_LAN_CONS || (client) == IPA_CLIENT_APPS_WAN_CONS)
#define IPA_CLIENT_IS_USB_CONS(client) ((client) == IPA_CLIENT_USB_CONS || (client) == IPA_CLIENT_USB2_CONS || (client) == IPA_CLIENT_USB3_CONS || (client) == IPA_CLIENT_USB_DPL_CONS || (client) == IPA_CLIENT_USB4_CONS)
#define IPA_CLIENT_IS_WLAN_CONS(client) ((client) == IPA_CLIENT_WLAN1_CONS || (client) == IPA_CLIENT_WLAN2_CONS || (client) == IPA_CLIENT_WLAN3_CONS || (client) == IPA_CLIENT_WLAN4_CONS)
#define IPA_CLIENT_IS_ODU_CONS(client) ((client) == IPA_CLIENT_ODU_EMB_CONS || (client) == IPA_CLIENT_ODU_TETH_CONS)
#define IPA_CLIENT_IS_Q6_CONS(client) ((client) == IPA_CLIENT_Q6_LAN_CONS || (client) == IPA_CLIENT_Q6_WAN_CONS || (client) == IPA_CLIENT_Q6_DUN_CONS || (client) == IPA_CLIENT_Q6_DECOMP_CONS || (client) == IPA_CLIENT_Q6_DECOMP2_CONS || (client) == IPA_CLIENT_Q6_LTE_WIFI_AGGR_CONS)
#define IPA_CLIENT_IS_Q6_PROD(client) ((client) == IPA_CLIENT_Q6_LAN_PROD || (client) == IPA_CLIENT_Q6_WAN_PROD || (client) == IPA_CLIENT_Q6_CMD_PROD || (client) == IPA_CLIENT_Q6_DECOMP_PROD || (client) == IPA_CLIENT_Q6_DECOMP2_PROD)
#define IPA_CLIENT_IS_Q6_NON_ZIP_CONS(client) ((client) == IPA_CLIENT_Q6_LAN_CONS || (client) == IPA_CLIENT_Q6_WAN_CONS || (client) == IPA_CLIENT_Q6_DUN_CONS || (client) == IPA_CLIENT_Q6_LTE_WIFI_AGGR_CONS)
#define IPA_CLIENT_IS_Q6_ZIP_CONS(client) ((client) == IPA_CLIENT_Q6_DECOMP_CONS || (client) == IPA_CLIENT_Q6_DECOMP2_CONS)
#define IPA_CLIENT_IS_Q6_NON_ZIP_PROD(client) ((client) == IPA_CLIENT_Q6_LAN_PROD || (client) == IPA_CLIENT_Q6_WAN_PROD || (client) == IPA_CLIENT_Q6_CMD_PROD)
#define IPA_CLIENT_IS_Q6_ZIP_PROD(client) ((client) == IPA_CLIENT_Q6_DECOMP_PROD || (client) == IPA_CLIENT_Q6_DECOMP2_PROD)
#define IPA_CLIENT_IS_MEMCPY_DMA_CONS(client) ((client) == IPA_CLIENT_MEMCPY_DMA_SYNC_CONS || (client) == IPA_CLIENT_MEMCPY_DMA_ASYNC_CONS)
#define IPA_CLIENT_IS_MEMCPY_DMA_PROD(client) ((client) == IPA_CLIENT_MEMCPY_DMA_SYNC_PROD || (client) == IPA_CLIENT_MEMCPY_DMA_ASYNC_PROD)
#define IPA_CLIENT_IS_MHI_CONS(client) ((client) == IPA_CLIENT_MHI_CONS)
#define IPA_CLIENT_IS_MHI(client) ((client) == IPA_CLIENT_MHI_CONS || (client) == IPA_CLIENT_MHI_PROD)
#define IPA_CLIENT_IS_TEST_PROD(client) ((client) == IPA_CLIENT_TEST_PROD || (client) == IPA_CLIENT_TEST1_PROD || (client) == IPA_CLIENT_TEST2_PROD || (client) == IPA_CLIENT_TEST3_PROD || (client) == IPA_CLIENT_TEST4_PROD)
#define IPA_CLIENT_IS_TEST_CONS(client) ((client) == IPA_CLIENT_TEST_CONS || (client) == IPA_CLIENT_TEST1_CONS || (client) == IPA_CLIENT_TEST2_CONS || (client) == IPA_CLIENT_TEST3_CONS || (client) == IPA_CLIENT_TEST4_CONS)
#define IPA_CLIENT_IS_TEST(client) (IPA_CLIENT_IS_TEST_PROD(client) || IPA_CLIENT_IS_TEST_CONS(client))
enum ipa_ip_type {
IPA_IP_v4,
IPA_IP_v6,
IPA_IP_MAX
};
enum ipa_rule_type {
IPA_RULE_HASHABLE,
IPA_RULE_NON_HASHABLE,
};
#define IPA_RULE_TYPE_MAX (IPA_RULE_NON_HASHABLE + 1)
enum ipa_flt_action {
IPA_PASS_TO_ROUTING,
IPA_PASS_TO_SRC_NAT,
IPA_PASS_TO_DST_NAT,
IPA_PASS_TO_EXCEPTION
};
enum ipa_wlan_event {
WLAN_CLIENT_CONNECT,
WLAN_CLIENT_DISCONNECT,
WLAN_CLIENT_POWER_SAVE_MODE,
WLAN_CLIENT_NORMAL_MODE,
SW_ROUTING_ENABLE,
SW_ROUTING_DISABLE,
WLAN_AP_CONNECT,
WLAN_AP_DISCONNECT,
WLAN_STA_CONNECT,
WLAN_STA_DISCONNECT,
WLAN_CLIENT_CONNECT_EX,
WLAN_SWITCH_TO_SCC,
WLAN_SWITCH_TO_MCC,
WLAN_WDI_ENABLE,
WLAN_WDI_DISABLE,
IPA_WLAN_EVENT_MAX
};
enum ipa_wan_event {
WAN_UPSTREAM_ROUTE_ADD = IPA_WLAN_EVENT_MAX,
WAN_UPSTREAM_ROUTE_DEL,
WAN_EMBMS_CONNECT,
WAN_XLAT_CONNECT,
IPA_WAN_EVENT_MAX
};
enum ipa_ecm_event {
ECM_CONNECT = IPA_WAN_EVENT_MAX,
ECM_DISCONNECT,
IPA_ECM_EVENT_MAX,
};
enum ipa_tethering_stats_event {
IPA_TETHERING_STATS_UPDATE_STATS = IPA_ECM_EVENT_MAX,
IPA_TETHERING_STATS_UPDATE_NETWORK_STATS,
IPA_TETHERING_STATS_EVENT_MAX,
};
enum ipa_quota_event {
IPA_QUOTA_REACH = IPA_TETHERING_STATS_EVENT_MAX,
IPA_QUOTA_EVENT_MAX,
};
enum ipa_ssr_event {
IPA_SSR_BEFORE_SHUTDOWN = IPA_QUOTA_EVENT_MAX,
IPA_SSR_AFTER_POWERUP,
IPA_SSR_EVENT_MAX
};
enum ipa_vlan_l2tp_event {
ADD_VLAN_IFACE = IPA_SSR_EVENT_MAX,
DEL_VLAN_IFACE,
ADD_L2TP_VLAN_MAPPING,
DEL_L2TP_VLAN_MAPPING,
IPA_VLAN_L2TP_EVENT_MAX,
};
enum ipa_per_client_stats_event {
IPA_PER_CLIENT_STATS_CONNECT_EVENT = IPA_VLAN_L2TP_EVENT_MAX,
IPA_PER_CLIENT_STATS_DISCONNECT_EVENT,
IPA_PER_CLIENT_STATS_EVENT_MAX
};
enum ipa_wlan_fw_ssr_event {
WLAN_FWR_SSR_BEFORE_SHUTDOWN = IPA_PER_CLIENT_STATS_EVENT_MAX,
IPA_WLAN_FW_SSR_EVENT_MAX,
#define IPA_WLAN_FW_SSR_EVENT_MAX IPA_WLAN_FW_SSR_EVENT_MAX
};
#define IPA_EVENT_MAX_NUM (IPA_WLAN_FW_SSR_EVENT_MAX)
#define IPA_EVENT_MAX ((int) IPA_EVENT_MAX_NUM)
enum ipa_rm_resource_name {
IPA_RM_RESOURCE_Q6_PROD = 0,
IPA_RM_RESOURCE_Q6_CONS = 1,
IPA_RM_RESOURCE_USB_PROD = 2,
IPA_RM_RESOURCE_USB_CONS = 3,
IPA_RM_RESOURCE_USB_DPL_DUMMY_PROD = 4,
IPA_RM_RESOURCE_USB_DPL_CONS = 5,
IPA_RM_RESOURCE_HSIC_PROD = 6,
IPA_RM_RESOURCE_HSIC_CONS = 7,
IPA_RM_RESOURCE_STD_ECM_PROD = 8,
IPA_RM_RESOURCE_APPS_CONS = 9,
IPA_RM_RESOURCE_RNDIS_PROD = 10,
IPA_RM_RESOURCE_WWAN_0_PROD = 12,
IPA_RM_RESOURCE_WLAN_PROD = 14,
IPA_RM_RESOURCE_WLAN_CONS = 15,
IPA_RM_RESOURCE_ODU_ADAPT_PROD = 16,
IPA_RM_RESOURCE_ODU_ADAPT_CONS = 17,
IPA_RM_RESOURCE_MHI_PROD = 18,
IPA_RM_RESOURCE_MHI_CONS = 19,
IPA_RM_RESOURCE_ETHERNET_PROD = 20,
IPA_RM_RESOURCE_ETHERNET_CONS = 21,
};
#define IPA_RM_RESOURCE_MAX (IPA_RM_RESOURCE_ETHERNET_CONS + 1)
enum ipa_hw_type {
IPA_HW_None = 0,
IPA_HW_v1_0 = 1,
IPA_HW_v1_1 = 2,
IPA_HW_v2_0 = 3,
IPA_HW_v2_1 = 4,
IPA_HW_v2_5 = 5,
IPA_HW_v2_6 = IPA_HW_v2_5,
IPA_HW_v2_6L = 6,
IPA_HW_v3_0 = 10,
IPA_HW_v3_1 = 11,
IPA_HW_v3_5 = 12,
IPA_HW_v3_5_1 = 13,
IPA_HW_v4_0 = 14,
};
#define IPA_HW_MAX (IPA_HW_v4_0 + 1)
#define IPA_HW_v4_0 IPA_HW_v4_0
struct ipa_rule_attrib {
uint32_t attrib_mask;
uint16_t src_port_lo;
uint16_t src_port_hi;
uint16_t dst_port_lo;
uint16_t dst_port_hi;
uint8_t type;
uint8_t code;
uint8_t tos_value;
uint8_t tos_mask;
uint32_t spi;
uint16_t src_port;
uint16_t dst_port;
uint32_t meta_data;
uint32_t meta_data_mask;
uint8_t src_mac_addr[ETH_ALEN];
uint8_t src_mac_addr_mask[ETH_ALEN];
uint8_t dst_mac_addr[ETH_ALEN];
uint8_t dst_mac_addr_mask[ETH_ALEN];
uint16_t ether_type;
union {
struct {
uint8_t tos;
uint8_t protocol;
uint32_t src_addr;
uint32_t src_addr_mask;
uint32_t dst_addr;
uint32_t dst_addr_mask;
} v4;
struct {
uint8_t tc;
uint32_t flow_label;
uint8_t next_hdr;
uint32_t src_addr[4];
uint32_t src_addr_mask[4];
uint32_t dst_addr[4];
uint32_t dst_addr_mask[4];
} v6;
} u;
};
#define IPA_IPFLTR_NUM_MEQ_32_EQNS 2
#define IPA_IPFLTR_NUM_IHL_MEQ_32_EQNS 2
#define IPA_IPFLTR_NUM_MEQ_128_EQNS 2
#define IPA_IPFLTR_NUM_IHL_RANGE_16_EQNS 2
struct ipa_ipfltr_eq_16 {
int8_t offset;
uint16_t value;
};
struct ipa_ipfltr_eq_32 {
int8_t offset;
uint32_t value;
};
struct ipa_ipfltr_mask_eq_128 {
int8_t offset;
uint8_t mask[16];
uint8_t value[16];
};
struct ipa_ipfltr_mask_eq_32 {
int8_t offset;
uint32_t mask;
uint32_t value;
};
struct ipa_ipfltr_range_eq_16 {
int8_t offset;
uint16_t range_low;
uint16_t range_high;
};
struct ipa_ipfltri_rule_eq {
uint16_t rule_eq_bitmap;
uint8_t tos_eq_present;
uint8_t tos_eq;
uint8_t protocol_eq_present;
uint8_t protocol_eq;
uint8_t num_ihl_offset_range_16;
struct ipa_ipfltr_range_eq_16 ihl_offset_range_16[IPA_IPFLTR_NUM_IHL_RANGE_16_EQNS];
uint8_t num_offset_meq_32;
struct ipa_ipfltr_mask_eq_32 offset_meq_32[IPA_IPFLTR_NUM_MEQ_32_EQNS];
uint8_t tc_eq_present;
uint8_t tc_eq;
uint8_t fl_eq_present;
uint32_t fl_eq;
uint8_t ihl_offset_eq_16_present;
struct ipa_ipfltr_eq_16 ihl_offset_eq_16;
uint8_t ihl_offset_eq_32_present;
struct ipa_ipfltr_eq_32 ihl_offset_eq_32;
uint8_t num_ihl_offset_meq_32;
struct ipa_ipfltr_mask_eq_32 ihl_offset_meq_32[IPA_IPFLTR_NUM_IHL_MEQ_32_EQNS];
uint8_t num_offset_meq_128;
struct ipa_ipfltr_mask_eq_128 offset_meq_128[IPA_IPFLTR_NUM_MEQ_128_EQNS];
uint8_t metadata_meq32_present;
struct ipa_ipfltr_mask_eq_32 metadata_meq32;
uint8_t ipv4_frag_eq_present;
};
struct ipa_flt_rule {
uint8_t retain_hdr;
uint8_t to_uc;
enum ipa_flt_action action;
uint32_t rt_tbl_hdl;
struct ipa_rule_attrib attrib;
struct ipa_ipfltri_rule_eq eq_attrib;
uint32_t rt_tbl_idx;
uint8_t eq_attrib_type;
uint8_t max_prio;
uint8_t hashable;
uint16_t rule_id;
uint8_t set_metadata;
uint8_t pdn_idx;
};
enum ipa_hdr_l2_type {
IPA_HDR_L2_NONE,
IPA_HDR_L2_ETHERNET_II,
IPA_HDR_L2_802_3,
IPA_HDR_L2_802_1Q,
};
#define IPA_HDR_L2_MAX (IPA_HDR_L2_802_1Q + 1)
#define IPA_HDR_L2_802_1Q IPA_HDR_L2_802_1Q
enum ipa_hdr_proc_type {
IPA_HDR_PROC_NONE,
IPA_HDR_PROC_ETHII_TO_ETHII,
IPA_HDR_PROC_ETHII_TO_802_3,
IPA_HDR_PROC_802_3_TO_ETHII,
IPA_HDR_PROC_802_3_TO_802_3,
IPA_HDR_PROC_L2TP_HEADER_ADD,
IPA_HDR_PROC_L2TP_HEADER_REMOVE
};
#define IPA_HDR_PROC_MAX (IPA_HDR_PROC_L2TP_HEADER_REMOVE + 1)
struct ipa_rt_rule {
enum ipa_client_type dst;
uint32_t hdr_hdl;
uint32_t hdr_proc_ctx_hdl;
struct ipa_rule_attrib attrib;
uint8_t max_prio;
uint8_t hashable;
uint8_t retain_hdr;
};
struct ipa_hdr_add {
char name[IPA_RESOURCE_NAME_MAX];
uint8_t hdr[IPA_HDR_MAX_SIZE];
uint8_t hdr_len;
enum ipa_hdr_l2_type type;
uint8_t is_partial;
uint32_t hdr_hdl;
int status;
uint8_t is_eth2_ofst_valid;
uint16_t eth2_ofst;
};
struct ipa_ioc_add_hdr {
uint8_t commit;
uint8_t num_hdrs;
struct ipa_hdr_add hdr[0];
};
struct ipa_l2tp_header_add_procparams {
uint32_t eth_hdr_retained : 1;
uint32_t input_ip_version : 1;
uint32_t output_ip_version : 1;
uint32_t reserved : 29;
};
struct ipa_l2tp_header_remove_procparams {
uint32_t hdr_len_remove : 8;
uint32_t eth_hdr_retained : 1;
uint32_t hdr_ofst_pkt_size_valid : 1;
uint32_t hdr_ofst_pkt_size : 6;
uint32_t hdr_endianness : 1;
uint32_t reserved : 15;
};
struct ipa_l2tp_hdr_proc_ctx_params {
struct ipa_l2tp_header_add_procparams hdr_add_param;
struct ipa_l2tp_header_remove_procparams hdr_remove_param;
uint8_t is_dst_pipe_valid;
enum ipa_client_type dst_pipe;
};
#define L2TP_USER_SPACE_SPECIFY_DST_PIPE
struct ipa_hdr_proc_ctx_add {
enum ipa_hdr_proc_type type;
uint32_t hdr_hdl;
uint32_t proc_ctx_hdl;
int status;
struct ipa_l2tp_hdr_proc_ctx_params l2tp_params;
};
#define IPA_L2TP_HDR_PROC_SUPPORT
struct ipa_ioc_add_hdr_proc_ctx {
uint8_t commit;
uint8_t num_proc_ctxs;
struct ipa_hdr_proc_ctx_add proc_ctx[0];
};
struct ipa_ioc_copy_hdr {
char name[IPA_RESOURCE_NAME_MAX];
uint8_t hdr[IPA_HDR_MAX_SIZE];
uint8_t hdr_len;
enum ipa_hdr_l2_type type;
uint8_t is_partial;
uint8_t is_eth2_ofst_valid;
uint16_t eth2_ofst;
};
struct ipa_ioc_get_hdr {
char name[IPA_RESOURCE_NAME_MAX];
uint32_t hdl;
};
struct ipa_hdr_del {
uint32_t hdl;
int status;
};
struct ipa_ioc_del_hdr {
uint8_t commit;
uint8_t num_hdls;
struct ipa_hdr_del hdl[0];
};
struct ipa_hdr_proc_ctx_del {
uint32_t hdl;
int status;
};
struct ipa_ioc_del_hdr_proc_ctx {
uint8_t commit;
uint8_t num_hdls;
struct ipa_hdr_proc_ctx_del hdl[0];
};
struct ipa_rt_rule_add {
struct ipa_rt_rule rule;
uint8_t at_rear;
uint32_t rt_rule_hdl;
int status;
};
struct ipa_ioc_add_rt_rule {
uint8_t commit;
enum ipa_ip_type ip;
char rt_tbl_name[IPA_RESOURCE_NAME_MAX];
uint8_t num_rules;
struct ipa_rt_rule_add rules[0];
};
struct ipa_ioc_add_rt_rule_after {
uint8_t commit;
enum ipa_ip_type ip;
char rt_tbl_name[IPA_RESOURCE_NAME_MAX];
uint8_t num_rules;
uint32_t add_after_hdl;
struct ipa_rt_rule_add rules[0];
};
struct ipa_rt_rule_mdfy {
struct ipa_rt_rule rule;
uint32_t rt_rule_hdl;
int status;
};
struct ipa_ioc_mdfy_rt_rule {
uint8_t commit;
enum ipa_ip_type ip;
uint8_t num_rules;
struct ipa_rt_rule_mdfy rules[0];
};
struct ipa_rt_rule_del {
uint32_t hdl;
int status;
};
struct ipa_rt_rule_add_ext {
struct ipa_rt_rule rule;
uint8_t at_rear;
uint32_t rt_rule_hdl;
int status;
uint16_t rule_id;
};
struct ipa_ioc_add_rt_rule_ext {
uint8_t commit;
enum ipa_ip_type ip;
char rt_tbl_name[IPA_RESOURCE_NAME_MAX];
uint8_t num_rules;
struct ipa_rt_rule_add_ext rules[0];
};
struct ipa_ioc_del_rt_rule {
uint8_t commit;
enum ipa_ip_type ip;
uint8_t num_hdls;
struct ipa_rt_rule_del hdl[0];
};
struct ipa_ioc_get_rt_tbl_indx {
enum ipa_ip_type ip;
char name[IPA_RESOURCE_NAME_MAX];
uint32_t idx;
};
struct ipa_flt_rule_add {
struct ipa_flt_rule rule;
uint8_t at_rear;
uint32_t flt_rule_hdl;
int status;
};
struct ipa_ioc_add_flt_rule {
uint8_t commit;
enum ipa_ip_type ip;
enum ipa_client_type ep;
uint8_t global;
uint8_t num_rules;
struct ipa_flt_rule_add rules[0];
};
struct ipa_ioc_add_flt_rule_after {
uint8_t commit;
enum ipa_ip_type ip;
enum ipa_client_type ep;
uint8_t num_rules;
uint32_t add_after_hdl;
struct ipa_flt_rule_add rules[0];
};
struct ipa_flt_rule_mdfy {
struct ipa_flt_rule rule;
uint32_t rule_hdl;
int status;
};
struct ipa_ioc_mdfy_flt_rule {
uint8_t commit;
enum ipa_ip_type ip;
uint8_t num_rules;
struct ipa_flt_rule_mdfy rules[0];
};
struct ipa_flt_rule_del {
uint32_t hdl;
int status;
};
struct ipa_ioc_del_flt_rule {
uint8_t commit;
enum ipa_ip_type ip;
uint8_t num_hdls;
struct ipa_flt_rule_del hdl[0];
};
struct ipa_ioc_get_rt_tbl {
enum ipa_ip_type ip;
char name[IPA_RESOURCE_NAME_MAX];
uint32_t hdl;
};
struct ipa_ioc_query_intf {
char name[IPA_RESOURCE_NAME_MAX];
uint32_t num_tx_props;
uint32_t num_rx_props;
uint32_t num_ext_props;
enum ipa_client_type excp_pipe;
};
struct ipa_ioc_tx_intf_prop {
enum ipa_ip_type ip;
struct ipa_rule_attrib attrib;
enum ipa_client_type dst_pipe;
enum ipa_client_type alt_dst_pipe;
char hdr_name[IPA_RESOURCE_NAME_MAX];
enum ipa_hdr_l2_type hdr_l2_type;
};
struct ipa_ioc_query_intf_tx_props {
char name[IPA_RESOURCE_NAME_MAX];
uint32_t num_tx_props;
struct ipa_ioc_tx_intf_prop tx[0];
};
struct ipa_ioc_ext_intf_prop {
enum ipa_ip_type ip;
struct ipa_ipfltri_rule_eq eq_attrib;
enum ipa_flt_action action;
uint32_t rt_tbl_idx;
uint8_t mux_id;
uint32_t filter_hdl;
uint8_t is_xlat_rule;
uint32_t rule_id;
uint8_t is_rule_hashable;
};
struct ipa_ioc_query_intf_ext_props {
char name[IPA_RESOURCE_NAME_MAX];
uint32_t num_ext_props;
struct ipa_ioc_ext_intf_prop ext[0];
};
struct ipa_ioc_rx_intf_prop {
enum ipa_ip_type ip;
struct ipa_rule_attrib attrib;
enum ipa_client_type src_pipe;
enum ipa_hdr_l2_type hdr_l2_type;
};
struct ipa_ioc_query_intf_rx_props {
char name[IPA_RESOURCE_NAME_MAX];
uint32_t num_rx_props;
struct ipa_ioc_rx_intf_prop rx[0];
};
struct ipa_ioc_nat_alloc_mem {
char dev_name[IPA_RESOURCE_NAME_MAX];
size_t size;
off_t offset;
};
struct ipa_ioc_nat_ipv6ct_table_alloc {
size_t size;
off_t offset;
};
struct ipa_ioc_v4_nat_init {
uint8_t tbl_index;
uint32_t ipv4_rules_offset;
uint32_t expn_rules_offset;
uint32_t index_offset;
uint32_t index_expn_offset;
uint16_t table_entries;
uint16_t expn_table_entries;
uint32_t ip_addr;
};
struct ipa_ioc_ipv6ct_init {
uint32_t base_table_offset;
uint32_t expn_table_offset;
uint16_t table_entries;
uint16_t expn_table_entries;
uint8_t tbl_index;
};
struct ipa_ioc_v4_nat_del {
uint8_t table_index;
uint32_t public_ip_addr;
};
struct ipa_ioc_nat_ipv6ct_table_del {
uint8_t table_index;
};
struct ipa_ioc_nat_dma_one {
uint8_t table_index;
uint8_t base_addr;
uint32_t offset;
uint16_t data;
};
struct ipa_ioc_nat_dma_cmd {
uint8_t entries;
struct ipa_ioc_nat_dma_one dma[0];
};
struct ipa_ioc_nat_pdn_entry {
uint8_t pdn_index;
uint32_t public_ip;
uint32_t src_metadata;
uint32_t dst_metadata;
};
struct ipa_ioc_vlan_iface_info {
char name[IPA_RESOURCE_NAME_MAX];
uint8_t vlan_id;
};
struct ipa_ioc_l2tp_vlan_mapping_info {
enum ipa_ip_type iptype;
char l2tp_iface_name[IPA_RESOURCE_NAME_MAX];
uint8_t l2tp_session_id;
char vlan_iface_name[IPA_RESOURCE_NAME_MAX];
};
struct ipa_msg_meta {
uint8_t msg_type;
uint8_t rsvd;
uint16_t msg_len;
};
struct ipa_wlan_msg {
char name[IPA_RESOURCE_NAME_MAX];
uint8_t mac_addr[IPA_MAC_ADDR_SIZE];
};
enum ipa_wlan_hdr_attrib_type {
WLAN_HDR_ATTRIB_MAC_ADDR,
WLAN_HDR_ATTRIB_STA_ID
};
struct ipa_wlan_hdr_attrib_val {
enum ipa_wlan_hdr_attrib_type attrib_type;
uint8_t offset;
union {
uint8_t mac_addr[IPA_MAC_ADDR_SIZE];
uint8_t sta_id;
} u;
};
struct ipa_wlan_msg_ex {
char name[IPA_RESOURCE_NAME_MAX];
uint8_t num_of_attribs;
struct ipa_wlan_hdr_attrib_val attribs[0];
};
struct ipa_ecm_msg {
char name[IPA_RESOURCE_NAME_MAX];
int ifindex;
};
struct ipa_wan_msg {
char upstream_ifname[IPA_RESOURCE_NAME_MAX];
char tethered_ifname[IPA_RESOURCE_NAME_MAX];
enum ipa_ip_type ip;
uint32_t ipv4_addr_gw;
uint32_t ipv6_addr_gw[IPA_WAN_MSG_IPv6_ADDR_GW_LEN];
};
struct ipa_ioc_rm_dependency {
enum ipa_rm_resource_name resource_name;
enum ipa_rm_resource_name depends_on_name;
};
struct ipa_ioc_generate_flt_eq {
enum ipa_ip_type ip;
struct ipa_rule_attrib attrib;
struct ipa_ipfltri_rule_eq eq_attrib;
};
struct ipa_ioc_write_qmapid {
enum ipa_client_type client;
uint8_t qmap_id;
};
enum ipacm_client_enum {
IPACM_CLIENT_USB = 1,
IPACM_CLIENT_WLAN,
IPACM_CLIENT_MAX
};
enum ipacm_per_client_device_type {
IPACM_CLIENT_DEVICE_TYPE_USB = 0,
IPACM_CLIENT_DEVICE_TYPE_WLAN = 1,
IPACM_CLIENT_DEVICE_TYPE_ETH = 2
};
#define IPACM_MAX_CLIENT_DEVICE_TYPES 3
struct ipa_lan_client_msg {
char lanIface[IPA_RESOURCE_NAME_MAX];
uint8_t mac[IPA_MAC_ADDR_SIZE];
};
struct ipa_lan_client {
uint8_t mac[IPA_MAC_ADDR_SIZE];
int8_t client_idx;
uint8_t inited;
};
struct ipa_tether_device_info {
int32_t ul_src_pipe;
uint8_t hdr_len;
uint32_t num_clients;
struct ipa_lan_client lan_client[IPA_MAX_NUM_HW_PATH_CLIENTS];
};
enum ipa_vlan_ifaces {
IPA_VLAN_IF_ETH,
IPA_VLAN_IF_RNDIS,
IPA_VLAN_IF_ECM
};
#define IPA_VLAN_IF_EMAC IPA_VLAN_IF_ETH
#define IPA_VLAN_IF_MAX (IPA_VLAN_IF_ECM + 1)
struct ipa_ioc_get_vlan_mode {
enum ipa_vlan_ifaces iface;
uint32_t is_vlan_mode;
};
#define IPA_IOC_ADD_HDR _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_ADD_HDR, struct ipa_ioc_add_hdr *)
#define IPA_IOC_DEL_HDR _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_DEL_HDR, struct ipa_ioc_del_hdr *)
#define IPA_IOC_ADD_RT_RULE _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_ADD_RT_RULE, struct ipa_ioc_add_rt_rule *)
#define IPA_IOC_ADD_RT_RULE_EXT _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_ADD_RT_RULE_EXT, struct ipa_ioc_add_rt_rule_ext *)
#define IPA_IOC_ADD_RT_RULE_AFTER _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_ADD_RT_RULE_AFTER, struct ipa_ioc_add_rt_rule_after *)
#define IPA_IOC_DEL_RT_RULE _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_DEL_RT_RULE, struct ipa_ioc_del_rt_rule *)
#define IPA_IOC_ADD_FLT_RULE _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_ADD_FLT_RULE, struct ipa_ioc_add_flt_rule *)
#define IPA_IOC_ADD_FLT_RULE_AFTER _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_ADD_FLT_RULE_AFTER, struct ipa_ioc_add_flt_rule_after *)
#define IPA_IOC_DEL_FLT_RULE _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_DEL_FLT_RULE, struct ipa_ioc_del_flt_rule *)
#define IPA_IOC_COMMIT_HDR _IO(IPA_IOC_MAGIC, IPA_IOCTL_COMMIT_HDR)
#define IPA_IOC_RESET_HDR _IO(IPA_IOC_MAGIC, IPA_IOCTL_RESET_HDR)
#define IPA_IOC_COMMIT_RT _IOW(IPA_IOC_MAGIC, IPA_IOCTL_COMMIT_RT, enum ipa_ip_type)
#define IPA_IOC_RESET_RT _IOW(IPA_IOC_MAGIC, IPA_IOCTL_RESET_RT, enum ipa_ip_type)
#define IPA_IOC_COMMIT_FLT _IOW(IPA_IOC_MAGIC, IPA_IOCTL_COMMIT_FLT, enum ipa_ip_type)
#define IPA_IOC_RESET_FLT _IOW(IPA_IOC_MAGIC, IPA_IOCTL_RESET_FLT, enum ipa_ip_type)
#define IPA_IOC_DUMP _IO(IPA_IOC_MAGIC, IPA_IOCTL_DUMP)
#define IPA_IOC_GET_RT_TBL _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_GET_RT_TBL, struct ipa_ioc_get_rt_tbl *)
#define IPA_IOC_PUT_RT_TBL _IOW(IPA_IOC_MAGIC, IPA_IOCTL_PUT_RT_TBL, uint32_t)
#define IPA_IOC_COPY_HDR _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_COPY_HDR, struct ipa_ioc_copy_hdr *)
#define IPA_IOC_QUERY_INTF _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_QUERY_INTF, struct ipa_ioc_query_intf *)
#define IPA_IOC_QUERY_INTF_TX_PROPS _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_QUERY_INTF_TX_PROPS, struct ipa_ioc_query_intf_tx_props *)
#define IPA_IOC_QUERY_INTF_RX_PROPS _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_QUERY_INTF_RX_PROPS, struct ipa_ioc_query_intf_rx_props *)
#define IPA_IOC_QUERY_INTF_EXT_PROPS _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_QUERY_INTF_EXT_PROPS, struct ipa_ioc_query_intf_ext_props *)
#define IPA_IOC_GET_HDR _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_GET_HDR, struct ipa_ioc_get_hdr *)
#define IPA_IOC_PUT_HDR _IOW(IPA_IOC_MAGIC, IPA_IOCTL_PUT_HDR, uint32_t)
#define IPA_IOC_ALLOC_NAT_MEM _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_ALLOC_NAT_MEM, struct ipa_ioc_nat_alloc_mem *)
#define IPA_IOC_ALLOC_NAT_TABLE _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_ALLOC_NAT_TABLE, struct ipa_ioc_nat_ipv6ct_table_alloc *)
#define IPA_IOC_ALLOC_IPV6CT_TABLE _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_ALLOC_IPV6CT_TABLE, struct ipa_ioc_nat_ipv6ct_table_alloc *)
#define IPA_IOC_V4_INIT_NAT _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_V4_INIT_NAT, struct ipa_ioc_v4_nat_init *)
#define IPA_IOC_INIT_IPV6CT_TABLE _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_INIT_IPV6CT_TABLE, struct ipa_ioc_ipv6ct_init *)
#define IPA_IOC_NAT_DMA _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_NAT_DMA, struct ipa_ioc_nat_dma_cmd *)
#define IPA_IOC_TABLE_DMA_CMD _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_TABLE_DMA_CMD, struct ipa_ioc_nat_dma_cmd *)
#define IPA_IOC_V4_DEL_NAT _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_V4_DEL_NAT, struct ipa_ioc_v4_nat_del *)
#define IPA_IOC_DEL_NAT_TABLE _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_DEL_NAT_TABLE, struct ipa_ioc_nat_ipv6ct_table_del *)
#define IPA_IOC_DEL_IPV6CT_TABLE _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_DEL_IPV6CT_TABLE, struct ipa_ioc_nat_ipv6ct_table_del *)
#define IPA_IOC_GET_NAT_OFFSET _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_GET_NAT_OFFSET, uint32_t *)
#define IPA_IOC_NAT_MODIFY_PDN _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_NAT_MODIFY_PDN, struct ipa_ioc_nat_pdn_entry *)
#define IPA_IOC_SET_FLT _IOW(IPA_IOC_MAGIC, IPA_IOCTL_SET_FLT, uint32_t)
#define IPA_IOC_PULL_MSG _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_PULL_MSG, struct ipa_msg_meta *)
#define IPA_IOC_RM_ADD_DEPENDENCY _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_RM_ADD_DEPENDENCY, struct ipa_ioc_rm_dependency *)
#define IPA_IOC_RM_DEL_DEPENDENCY _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_RM_DEL_DEPENDENCY, struct ipa_ioc_rm_dependency *)
#define IPA_IOC_GENERATE_FLT_EQ _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_GENERATE_FLT_EQ, struct ipa_ioc_generate_flt_eq *)
#define IPA_IOC_QUERY_EP_MAPPING _IOR(IPA_IOC_MAGIC, IPA_IOCTL_QUERY_EP_MAPPING, uint32_t)
#define IPA_IOC_QUERY_RT_TBL_INDEX _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_QUERY_RT_TBL_INDEX, struct ipa_ioc_get_rt_tbl_indx *)
#define IPA_IOC_WRITE_QMAPID _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_WRITE_QMAPID, struct ipa_ioc_write_qmapid *)
#define IPA_IOC_MDFY_FLT_RULE _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_MDFY_FLT_RULE, struct ipa_ioc_mdfy_flt_rule *)
#define IPA_IOC_MDFY_RT_RULE _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_MDFY_RT_RULE, struct ipa_ioc_mdfy_rt_rule *)
#define IPA_IOC_NOTIFY_WAN_UPSTREAM_ROUTE_ADD _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_NOTIFY_WAN_UPSTREAM_ROUTE_ADD, struct ipa_wan_msg *)
#define IPA_IOC_NOTIFY_WAN_UPSTREAM_ROUTE_DEL _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_NOTIFY_WAN_UPSTREAM_ROUTE_DEL, struct ipa_wan_msg *)
#define IPA_IOC_NOTIFY_WAN_EMBMS_CONNECTED _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_NOTIFY_WAN_EMBMS_CONNECTED, struct ipa_wan_msg *)
#define IPA_IOC_ADD_HDR_PROC_CTX _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_ADD_HDR_PROC_CTX, struct ipa_ioc_add_hdr_proc_ctx *)
#define IPA_IOC_DEL_HDR_PROC_CTX _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_DEL_HDR_PROC_CTX, struct ipa_ioc_del_hdr_proc_ctx *)
#define IPA_IOC_GET_HW_VERSION _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_GET_HW_VERSION, enum ipa_hw_type *)
#define IPA_IOC_ADD_VLAN_IFACE _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_ADD_VLAN_IFACE, struct ipa_ioc_vlan_iface_info *)
#define IPA_IOC_DEL_VLAN_IFACE _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_DEL_VLAN_IFACE, struct ipa_ioc_vlan_iface_info *)
#define IPA_IOC_ADD_L2TP_VLAN_MAPPING _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_ADD_L2TP_VLAN_MAPPING, struct ipa_ioc_l2tp_vlan_mapping_info *)
#define IPA_IOC_DEL_L2TP_VLAN_MAPPING _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_DEL_L2TP_VLAN_MAPPING, struct ipa_ioc_l2tp_vlan_mapping_info *)
#define IPA_IOC_CLEANUP _IO(IPA_IOC_MAGIC, IPA_IOCTL_CLEANUP)
#define IPA_IOC_QUERY_WLAN_CLIENT _IO(IPA_IOC_MAGIC, IPA_IOCTL_QUERY_WLAN_CLIENT)
#define IPA_IOC_GET_VLAN_MODE _IOWR(IPA_IOC_MAGIC, IPA_IOCTL_GET_VLAN_MODE, struct ipa_ioc_get_vlan_mode *)
#define TETH_BRIDGE_IOC_MAGIC 0xCE
#define TETH_BRIDGE_IOCTL_SET_BRIDGE_MODE 0
#define TETH_BRIDGE_IOCTL_SET_AGGR_PARAMS 1
#define TETH_BRIDGE_IOCTL_GET_AGGR_PARAMS 2
#define TETH_BRIDGE_IOCTL_GET_AGGR_CAPABILITIES 3
#define TETH_BRIDGE_IOCTL_MAX 4
enum teth_link_protocol_type {
TETH_LINK_PROTOCOL_IP,
TETH_LINK_PROTOCOL_ETHERNET,
TETH_LINK_PROTOCOL_MAX,
};
enum teth_aggr_protocol_type {
TETH_AGGR_PROTOCOL_NONE,
TETH_AGGR_PROTOCOL_MBIM,
TETH_AGGR_PROTOCOL_TLP,
TETH_AGGR_PROTOCOL_MAX,
};
struct teth_aggr_params_link {
enum teth_aggr_protocol_type aggr_prot;
uint32_t max_transfer_size_byte;
uint32_t max_datagrams;
};
struct teth_aggr_params {
struct teth_aggr_params_link ul;
struct teth_aggr_params_link dl;
};
struct teth_aggr_capabilities {
uint16_t num_protocols;
struct teth_aggr_params_link prot_caps[0];
};
struct teth_ioc_set_bridge_mode {
enum teth_link_protocol_type link_protocol;
uint16_t lcid;
};
struct teth_ioc_aggr_params {
struct teth_aggr_params aggr_params;
uint16_t lcid;
};
#define TETH_BRIDGE_IOC_SET_BRIDGE_MODE _IOW(TETH_BRIDGE_IOC_MAGIC, TETH_BRIDGE_IOCTL_SET_BRIDGE_MODE, struct teth_ioc_set_bridge_mode *)
#define TETH_BRIDGE_IOC_SET_AGGR_PARAMS _IOW(TETH_BRIDGE_IOC_MAGIC, TETH_BRIDGE_IOCTL_SET_AGGR_PARAMS, struct teth_ioc_aggr_params *)
#define TETH_BRIDGE_IOC_GET_AGGR_PARAMS _IOR(TETH_BRIDGE_IOC_MAGIC, TETH_BRIDGE_IOCTL_GET_AGGR_PARAMS, struct teth_ioc_aggr_params *)
#define TETH_BRIDGE_IOC_GET_AGGR_CAPABILITIES _IOWR(TETH_BRIDGE_IOC_MAGIC, TETH_BRIDGE_IOCTL_GET_AGGR_CAPABILITIES, struct teth_aggr_capabilities *)
#define ODU_BRIDGE_IOC_MAGIC 0xCD
#define ODU_BRIDGE_IOCTL_SET_MODE 0
#define ODU_BRIDGE_IOCTL_SET_LLV6_ADDR 1
#define ODU_BRIDGE_IOCTL_MAX 2
enum odu_bridge_mode {
ODU_BRIDGE_MODE_ROUTER,
ODU_BRIDGE_MODE_BRIDGE,
ODU_BRIDGE_MODE_MAX,
};
#define ODU_BRIDGE_IOC_SET_MODE _IOW(ODU_BRIDGE_IOC_MAGIC, ODU_BRIDGE_IOCTL_SET_MODE, enum odu_bridge_mode)
#define ODU_BRIDGE_IOC_SET_LLV6_ADDR _IOW(ODU_BRIDGE_IOC_MAGIC, ODU_BRIDGE_IOCTL_SET_LLV6_ADDR, struct in6_addr *)
#endif

View File

@@ -1,773 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_KGSL_H
#define _MSM_KGSL_H
#include <linux/types.h>
#include <linux/ioctl.h>
#define KGSL_VERSION_MAJOR 3
#define KGSL_VERSION_MINOR 14
#define KGSL_CONTEXT_SAVE_GMEM 0x00000001
#define KGSL_CONTEXT_NO_GMEM_ALLOC 0x00000002
#define KGSL_CONTEXT_SUBMIT_IB_LIST 0x00000004
#define KGSL_CONTEXT_CTX_SWITCH 0x00000008
#define KGSL_CONTEXT_PREAMBLE 0x00000010
#define KGSL_CONTEXT_TRASH_STATE 0x00000020
#define KGSL_CONTEXT_PER_CONTEXT_TS 0x00000040
#define KGSL_CONTEXT_USER_GENERATED_TS 0x00000080
#define KGSL_CONTEXT_END_OF_FRAME 0x00000100
#define KGSL_CONTEXT_NO_FAULT_TOLERANCE 0x00000200
#define KGSL_CONTEXT_SYNC 0x00000400
#define KGSL_CONTEXT_PWR_CONSTRAINT 0x00000800
#define KGSL_CONTEXT_PRIORITY_MASK 0x0000F000
#define KGSL_CONTEXT_PRIORITY_SHIFT 12
#define KGSL_CONTEXT_PRIORITY_UNDEF 0
#define KGSL_CONTEXT_IFH_NOP 0x00010000
#define KGSL_CONTEXT_SECURE 0x00020000
#define KGSL_CONTEXT_NO_SNAPSHOT 0x00040000
#define KGSL_CONTEXT_SPARSE 0x00080000
#define KGSL_CONTEXT_PREEMPT_STYLE_MASK 0x0E000000
#define KGSL_CONTEXT_PREEMPT_STYLE_SHIFT 25
#define KGSL_CONTEXT_PREEMPT_STYLE_DEFAULT 0x0
#define KGSL_CONTEXT_PREEMPT_STYLE_RINGBUFFER 0x1
#define KGSL_CONTEXT_PREEMPT_STYLE_FINEGRAIN 0x2
#define KGSL_CONTEXT_TYPE_MASK 0x01F00000
#define KGSL_CONTEXT_TYPE_SHIFT 20
#define KGSL_CONTEXT_TYPE_ANY 0
#define KGSL_CONTEXT_TYPE_GL 1
#define KGSL_CONTEXT_TYPE_CL 2
#define KGSL_CONTEXT_TYPE_C2D 3
#define KGSL_CONTEXT_TYPE_RS 4
#define KGSL_CONTEXT_TYPE_UNKNOWN 0x1E
#define KGSL_CONTEXT_INVALIDATE_ON_FAULT 0x10000000
#define KGSL_CONTEXT_INVALID 0xffffffff
#define KGSL_CMDBATCH_MEMLIST 0x00000001
#define KGSL_CMDBATCH_MARKER 0x00000002
#define KGSL_CMDBATCH_SUBMIT_IB_LIST KGSL_CONTEXT_SUBMIT_IB_LIST
#define KGSL_CMDBATCH_CTX_SWITCH KGSL_CONTEXT_CTX_SWITCH
#define KGSL_CMDBATCH_PROFILING 0x00000010
#define KGSL_CMDBATCH_PROFILING_KTIME 0x00000020
#define KGSL_CMDBATCH_END_OF_FRAME KGSL_CONTEXT_END_OF_FRAME
#define KGSL_CMDBATCH_SYNC KGSL_CONTEXT_SYNC
#define KGSL_CMDBATCH_PWR_CONSTRAINT KGSL_CONTEXT_PWR_CONSTRAINT
#define KGSL_CMDBATCH_SPARSE 0x1000
#define KGSL_CMDLIST_IB 0x00000001U
#define KGSL_CMDLIST_CTXTSWITCH_PREAMBLE 0x00000002U
#define KGSL_CMDLIST_IB_PREAMBLE 0x00000004U
#define KGSL_OBJLIST_MEMOBJ 0x00000008U
#define KGSL_OBJLIST_PROFILE 0x00000010U
#define KGSL_CMD_SYNCPOINT_TYPE_TIMESTAMP 0
#define KGSL_CMD_SYNCPOINT_TYPE_FENCE 1
#define KGSL_MEMFLAGS_SECURE 0x00000008ULL
#define KGSL_MEMFLAGS_GPUREADONLY 0x01000000U
#define KGSL_MEMFLAGS_GPUWRITEONLY 0x02000000U
#define KGSL_MEMFLAGS_FORCE_32BIT 0x100000000ULL
#define KGSL_SPARSE_BIND_MULTIPLE_TO_PHYS 0x400000000ULL
#define KGSL_SPARSE_BIND 0x1ULL
#define KGSL_SPARSE_UNBIND 0x2ULL
#define KGSL_CACHEMODE_MASK 0x0C000000U
#define KGSL_CACHEMODE_SHIFT 26
#define KGSL_CACHEMODE_WRITECOMBINE 0
#define KGSL_CACHEMODE_UNCACHED 1
#define KGSL_CACHEMODE_WRITETHROUGH 2
#define KGSL_CACHEMODE_WRITEBACK 3
#define KGSL_MEMFLAGS_USE_CPU_MAP 0x10000000ULL
#define KGSL_MEMFLAGS_SPARSE_PHYS 0x20000000ULL
#define KGSL_MEMFLAGS_SPARSE_VIRT 0x40000000ULL
#define KGSL_MEMFLAGS_IOCOHERENT 0x80000000ULL
#define KGSL_MEMTYPE_MASK 0x0000FF00
#define KGSL_MEMTYPE_SHIFT 8
#define KGSL_MEMTYPE_OBJECTANY 0
#define KGSL_MEMTYPE_FRAMEBUFFER 1
#define KGSL_MEMTYPE_RENDERBUFFER 2
#define KGSL_MEMTYPE_ARRAYBUFFER 3
#define KGSL_MEMTYPE_ELEMENTARRAYBUFFER 4
#define KGSL_MEMTYPE_VERTEXARRAYBUFFER 5
#define KGSL_MEMTYPE_TEXTURE 6
#define KGSL_MEMTYPE_SURFACE 7
#define KGSL_MEMTYPE_EGL_SURFACE 8
#define KGSL_MEMTYPE_GL 9
#define KGSL_MEMTYPE_CL 10
#define KGSL_MEMTYPE_CL_BUFFER_MAP 11
#define KGSL_MEMTYPE_CL_BUFFER_NOMAP 12
#define KGSL_MEMTYPE_CL_IMAGE_MAP 13
#define KGSL_MEMTYPE_CL_IMAGE_NOMAP 14
#define KGSL_MEMTYPE_CL_KERNEL_STACK 15
#define KGSL_MEMTYPE_COMMAND 16
#define KGSL_MEMTYPE_2D 17
#define KGSL_MEMTYPE_EGL_IMAGE 18
#define KGSL_MEMTYPE_EGL_SHADOW 19
#define KGSL_MEMTYPE_MULTISAMPLE 20
#define KGSL_MEMTYPE_KERNEL 255
#define KGSL_MEMALIGN_MASK 0x00FF0000
#define KGSL_MEMALIGN_SHIFT 16
enum kgsl_user_mem_type {
KGSL_USER_MEM_TYPE_PMEM = 0x00000000,
KGSL_USER_MEM_TYPE_ASHMEM = 0x00000001,
KGSL_USER_MEM_TYPE_ADDR = 0x00000002,
KGSL_USER_MEM_TYPE_ION = 0x00000003,
KGSL_USER_MEM_TYPE_DMABUF = 0x00000003,
KGSL_USER_MEM_TYPE_MAX = 0x00000007,
};
#define KGSL_MEMFLAGS_USERMEM_MASK 0x000000e0
#define KGSL_MEMFLAGS_USERMEM_SHIFT 5
#define KGSL_USERMEM_FLAG(x) (((x) + 1) << KGSL_MEMFLAGS_USERMEM_SHIFT)
#define KGSL_MEMFLAGS_NOT_USERMEM 0
#define KGSL_MEMFLAGS_USERMEM_PMEM KGSL_USERMEM_FLAG(KGSL_USER_MEM_TYPE_PMEM)
#define KGSL_MEMFLAGS_USERMEM_ASHMEM KGSL_USERMEM_FLAG(KGSL_USER_MEM_TYPE_ASHMEM)
#define KGSL_MEMFLAGS_USERMEM_ADDR KGSL_USERMEM_FLAG(KGSL_USER_MEM_TYPE_ADDR)
#define KGSL_MEMFLAGS_USERMEM_ION KGSL_USERMEM_FLAG(KGSL_USER_MEM_TYPE_ION)
#define KGSL_FLAGS_NORMALMODE 0x00000000
#define KGSL_FLAGS_SAFEMODE 0x00000001
#define KGSL_FLAGS_INITIALIZED0 0x00000002
#define KGSL_FLAGS_INITIALIZED 0x00000004
#define KGSL_FLAGS_STARTED 0x00000008
#define KGSL_FLAGS_ACTIVE 0x00000010
#define KGSL_FLAGS_RESERVED0 0x00000020
#define KGSL_FLAGS_RESERVED1 0x00000040
#define KGSL_FLAGS_RESERVED2 0x00000080
#define KGSL_FLAGS_SOFT_RESET 0x00000100
#define KGSL_FLAGS_PER_CONTEXT_TIMESTAMPS 0x00000200
#define KGSL_SYNCOBJ_SERVER_TIMEOUT 2000
#define KGSL_UBWC_NONE 0
#define KGSL_UBWC_1_0 1
#define KGSL_UBWC_2_0 2
#define KGSL_UBWC_3_0 3
enum kgsl_ctx_reset_stat {
KGSL_CTX_STAT_NO_ERROR = 0x00000000,
KGSL_CTX_STAT_GUILTY_CONTEXT_RESET_EXT = 0x00000001,
KGSL_CTX_STAT_INNOCENT_CONTEXT_RESET_EXT = 0x00000002,
KGSL_CTX_STAT_UNKNOWN_CONTEXT_RESET_EXT = 0x00000003
};
#define KGSL_CONVERT_TO_MBPS(val) (val * 1000 * 1000U)
enum kgsl_deviceid {
KGSL_DEVICE_3D0 = 0x00000000,
KGSL_DEVICE_MAX
};
struct kgsl_devinfo {
unsigned int device_id;
unsigned int chip_id;
unsigned int mmu_enabled;
unsigned long gmem_gpubaseaddr;
unsigned int gpu_id;
size_t gmem_sizebytes;
};
struct kgsl_devmemstore {
__volatile__ unsigned int soptimestamp;
unsigned int sbz;
__volatile__ unsigned int eoptimestamp;
unsigned int sbz2;
__volatile__ unsigned int preempted;
unsigned int sbz3;
__volatile__ unsigned int ref_wait_ts;
unsigned int sbz4;
unsigned int current_context;
unsigned int sbz5;
};
#define KGSL_MEMSTORE_OFFSET(ctxt_id,field) ((ctxt_id) * sizeof(struct kgsl_devmemstore) + offsetof(struct kgsl_devmemstore, field))
enum kgsl_timestamp_type {
KGSL_TIMESTAMP_CONSUMED = 0x00000001,
KGSL_TIMESTAMP_RETIRED = 0x00000002,
KGSL_TIMESTAMP_QUEUED = 0x00000003,
};
#define KGSL_PROP_DEVICE_INFO 0x1
#define KGSL_PROP_DEVICE_SHADOW 0x2
#define KGSL_PROP_DEVICE_POWER 0x3
#define KGSL_PROP_SHMEM 0x4
#define KGSL_PROP_SHMEM_APERTURES 0x5
#define KGSL_PROP_MMU_ENABLE 0x6
#define KGSL_PROP_INTERRUPT_WAITS 0x7
#define KGSL_PROP_VERSION 0x8
#define KGSL_PROP_GPU_RESET_STAT 0x9
#define KGSL_PROP_PWRCTRL 0xE
#define KGSL_PROP_PWR_CONSTRAINT 0x12
#define KGSL_PROP_UCHE_GMEM_VADDR 0x13
#define KGSL_PROP_SP_GENERIC_MEM 0x14
#define KGSL_PROP_UCODE_VERSION 0x15
#define KGSL_PROP_GPMU_VERSION 0x16
#define KGSL_PROP_HIGHEST_BANK_BIT 0x17
#define KGSL_PROP_DEVICE_BITNESS 0x18
#define KGSL_PROP_DEVICE_QDSS_STM 0x19
#define KGSL_PROP_MIN_ACCESS_LENGTH 0x1A
#define KGSL_PROP_UBWC_MODE 0x1B
#define KGSL_PROP_DEVICE_QTIMER 0x20
#define KGSL_PROP_L3_PWR_CONSTRAINT 0x22
struct kgsl_shadowprop {
unsigned long gpuaddr;
size_t size;
unsigned int flags;
};
struct kgsl_qdss_stm_prop {
uint64_t gpuaddr;
uint64_t size;
};
struct kgsl_qtimer_prop {
uint64_t gpuaddr;
uint64_t size;
};
struct kgsl_version {
unsigned int drv_major;
unsigned int drv_minor;
unsigned int dev_major;
unsigned int dev_minor;
};
struct kgsl_sp_generic_mem {
uint64_t local;
uint64_t pvt;
};
struct kgsl_ucode_version {
unsigned int pfp;
unsigned int pm4;
};
struct kgsl_gpmu_version {
unsigned int major;
unsigned int minor;
unsigned int features;
};
#define KGSL_PERFCOUNTER_GROUP_CP 0x0
#define KGSL_PERFCOUNTER_GROUP_RBBM 0x1
#define KGSL_PERFCOUNTER_GROUP_PC 0x2
#define KGSL_PERFCOUNTER_GROUP_VFD 0x3
#define KGSL_PERFCOUNTER_GROUP_HLSQ 0x4
#define KGSL_PERFCOUNTER_GROUP_VPC 0x5
#define KGSL_PERFCOUNTER_GROUP_TSE 0x6
#define KGSL_PERFCOUNTER_GROUP_RAS 0x7
#define KGSL_PERFCOUNTER_GROUP_UCHE 0x8
#define KGSL_PERFCOUNTER_GROUP_TP 0x9
#define KGSL_PERFCOUNTER_GROUP_SP 0xA
#define KGSL_PERFCOUNTER_GROUP_RB 0xB
#define KGSL_PERFCOUNTER_GROUP_PWR 0xC
#define KGSL_PERFCOUNTER_GROUP_VBIF 0xD
#define KGSL_PERFCOUNTER_GROUP_VBIF_PWR 0xE
#define KGSL_PERFCOUNTER_GROUP_MH 0xF
#define KGSL_PERFCOUNTER_GROUP_PA_SU 0x10
#define KGSL_PERFCOUNTER_GROUP_SQ 0x11
#define KGSL_PERFCOUNTER_GROUP_SX 0x12
#define KGSL_PERFCOUNTER_GROUP_TCF 0x13
#define KGSL_PERFCOUNTER_GROUP_TCM 0x14
#define KGSL_PERFCOUNTER_GROUP_TCR 0x15
#define KGSL_PERFCOUNTER_GROUP_L2 0x16
#define KGSL_PERFCOUNTER_GROUP_VSC 0x17
#define KGSL_PERFCOUNTER_GROUP_CCU 0x18
#define KGSL_PERFCOUNTER_GROUP_LRZ 0x19
#define KGSL_PERFCOUNTER_GROUP_CMP 0x1A
#define KGSL_PERFCOUNTER_GROUP_ALWAYSON 0x1B
#define KGSL_PERFCOUNTER_GROUP_SP_PWR 0x1C
#define KGSL_PERFCOUNTER_GROUP_TP_PWR 0x1D
#define KGSL_PERFCOUNTER_GROUP_RB_PWR 0x1E
#define KGSL_PERFCOUNTER_GROUP_CCU_PWR 0x1F
#define KGSL_PERFCOUNTER_GROUP_UCHE_PWR 0x20
#define KGSL_PERFCOUNTER_GROUP_CP_PWR 0x21
#define KGSL_PERFCOUNTER_GROUP_GPMU_PWR 0x22
#define KGSL_PERFCOUNTER_GROUP_ALWAYSON_PWR 0x23
#define KGSL_PERFCOUNTER_GROUP_MAX 0x24
#define KGSL_PERFCOUNTER_NOT_USED 0xFFFFFFFF
#define KGSL_PERFCOUNTER_BROKEN 0xFFFFFFFE
struct kgsl_ibdesc {
unsigned long gpuaddr;
unsigned long __pad;
size_t sizedwords;
unsigned int ctrl;
};
struct kgsl_cmdbatch_profiling_buffer {
uint64_t wall_clock_s;
uint64_t wall_clock_ns;
uint64_t gpu_ticks_queued;
uint64_t gpu_ticks_submitted;
uint64_t gpu_ticks_retired;
};
#define KGSL_IOC_TYPE 0x09
struct kgsl_device_getproperty {
unsigned int type;
void * value;
size_t sizebytes;
};
#define IOCTL_KGSL_DEVICE_GETPROPERTY _IOWR(KGSL_IOC_TYPE, 0x2, struct kgsl_device_getproperty)
struct kgsl_device_waittimestamp {
unsigned int timestamp;
unsigned int timeout;
};
#define IOCTL_KGSL_DEVICE_WAITTIMESTAMP _IOW(KGSL_IOC_TYPE, 0x6, struct kgsl_device_waittimestamp)
struct kgsl_device_waittimestamp_ctxtid {
unsigned int context_id;
unsigned int timestamp;
unsigned int timeout;
};
#define IOCTL_KGSL_DEVICE_WAITTIMESTAMP_CTXTID _IOW(KGSL_IOC_TYPE, 0x7, struct kgsl_device_waittimestamp_ctxtid)
struct kgsl_ringbuffer_issueibcmds {
unsigned int drawctxt_id;
unsigned long ibdesc_addr;
unsigned int numibs;
unsigned int timestamp;
unsigned int flags;
};
#define IOCTL_KGSL_RINGBUFFER_ISSUEIBCMDS _IOWR(KGSL_IOC_TYPE, 0x10, struct kgsl_ringbuffer_issueibcmds)
struct kgsl_cmdstream_readtimestamp {
unsigned int type;
unsigned int timestamp;
};
#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_OLD _IOR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp)
#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP _IOWR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp)
struct kgsl_cmdstream_freememontimestamp {
unsigned long gpuaddr;
unsigned int type;
unsigned int timestamp;
};
#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP _IOW(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp)
#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP_OLD _IOR(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp)
struct kgsl_drawctxt_create {
unsigned int flags;
unsigned int drawctxt_id;
};
#define IOCTL_KGSL_DRAWCTXT_CREATE _IOWR(KGSL_IOC_TYPE, 0x13, struct kgsl_drawctxt_create)
struct kgsl_drawctxt_destroy {
unsigned int drawctxt_id;
};
#define IOCTL_KGSL_DRAWCTXT_DESTROY _IOW(KGSL_IOC_TYPE, 0x14, struct kgsl_drawctxt_destroy)
struct kgsl_map_user_mem {
int fd;
unsigned long gpuaddr;
size_t len;
size_t offset;
unsigned long hostptr;
enum kgsl_user_mem_type memtype;
unsigned int flags;
};
#define IOCTL_KGSL_MAP_USER_MEM _IOWR(KGSL_IOC_TYPE, 0x15, struct kgsl_map_user_mem)
struct kgsl_cmdstream_readtimestamp_ctxtid {
unsigned int context_id;
unsigned int type;
unsigned int timestamp;
};
#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_CTXTID _IOWR(KGSL_IOC_TYPE, 0x16, struct kgsl_cmdstream_readtimestamp_ctxtid)
struct kgsl_cmdstream_freememontimestamp_ctxtid {
unsigned int context_id;
unsigned long gpuaddr;
unsigned int type;
unsigned int timestamp;
};
#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP_CTXTID _IOW(KGSL_IOC_TYPE, 0x17, struct kgsl_cmdstream_freememontimestamp_ctxtid)
struct kgsl_sharedmem_from_pmem {
int pmem_fd;
unsigned long gpuaddr;
unsigned int len;
unsigned int offset;
};
#define IOCTL_KGSL_SHAREDMEM_FROM_PMEM _IOWR(KGSL_IOC_TYPE, 0x20, struct kgsl_sharedmem_from_pmem)
struct kgsl_sharedmem_free {
unsigned long gpuaddr;
};
#define IOCTL_KGSL_SHAREDMEM_FREE _IOW(KGSL_IOC_TYPE, 0x21, struct kgsl_sharedmem_free)
struct kgsl_cff_user_event {
unsigned char cff_opcode;
unsigned int op1;
unsigned int op2;
unsigned int op3;
unsigned int op4;
unsigned int op5;
unsigned int __pad[2];
};
#define IOCTL_KGSL_CFF_USER_EVENT _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_cff_user_event)
struct kgsl_gmem_desc {
unsigned int x;
unsigned int y;
unsigned int width;
unsigned int height;
unsigned int pitch;
};
struct kgsl_buffer_desc {
void * hostptr;
unsigned long gpuaddr;
int size;
unsigned int format;
unsigned int pitch;
unsigned int enabled;
};
struct kgsl_bind_gmem_shadow {
unsigned int drawctxt_id;
struct kgsl_gmem_desc gmem_desc;
unsigned int shadow_x;
unsigned int shadow_y;
struct kgsl_buffer_desc shadow_buffer;
unsigned int buffer_id;
};
#define IOCTL_KGSL_DRAWCTXT_BIND_GMEM_SHADOW _IOW(KGSL_IOC_TYPE, 0x22, struct kgsl_bind_gmem_shadow)
struct kgsl_sharedmem_from_vmalloc {
unsigned long gpuaddr;
unsigned int hostptr;
unsigned int flags;
};
#define IOCTL_KGSL_SHAREDMEM_FROM_VMALLOC _IOWR(KGSL_IOC_TYPE, 0x23, struct kgsl_sharedmem_from_vmalloc)
#define IOCTL_KGSL_SHAREDMEM_FLUSH_CACHE _IOW(KGSL_IOC_TYPE, 0x24, struct kgsl_sharedmem_free)
struct kgsl_drawctxt_set_bin_base_offset {
unsigned int drawctxt_id;
unsigned int offset;
};
#define IOCTL_KGSL_DRAWCTXT_SET_BIN_BASE_OFFSET _IOW(KGSL_IOC_TYPE, 0x25, struct kgsl_drawctxt_set_bin_base_offset)
enum kgsl_cmdwindow_type {
KGSL_CMDWINDOW_MIN = 0x00000000,
KGSL_CMDWINDOW_2D = 0x00000000,
KGSL_CMDWINDOW_3D = 0x00000001,
KGSL_CMDWINDOW_MMU = 0x00000002,
KGSL_CMDWINDOW_ARBITER = 0x000000FF,
KGSL_CMDWINDOW_MAX = 0x000000FF,
};
struct kgsl_cmdwindow_write {
enum kgsl_cmdwindow_type target;
unsigned int addr;
unsigned int data;
};
#define IOCTL_KGSL_CMDWINDOW_WRITE _IOW(KGSL_IOC_TYPE, 0x2e, struct kgsl_cmdwindow_write)
struct kgsl_gpumem_alloc {
unsigned long gpuaddr;
size_t size;
unsigned int flags;
};
#define IOCTL_KGSL_GPUMEM_ALLOC _IOWR(KGSL_IOC_TYPE, 0x2f, struct kgsl_gpumem_alloc)
struct kgsl_cff_syncmem {
unsigned long gpuaddr;
size_t len;
unsigned int __pad[2];
};
#define IOCTL_KGSL_CFF_SYNCMEM _IOW(KGSL_IOC_TYPE, 0x30, struct kgsl_cff_syncmem)
struct kgsl_timestamp_event {
int type;
unsigned int timestamp;
unsigned int context_id;
void * priv;
size_t len;
};
#define IOCTL_KGSL_TIMESTAMP_EVENT_OLD _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_timestamp_event)
#define KGSL_TIMESTAMP_EVENT_GENLOCK 1
struct kgsl_timestamp_event_genlock {
int handle;
};
#define KGSL_TIMESTAMP_EVENT_FENCE 2
struct kgsl_timestamp_event_fence {
int fence_fd;
};
#define IOCTL_KGSL_SETPROPERTY _IOW(KGSL_IOC_TYPE, 0x32, struct kgsl_device_getproperty)
#define IOCTL_KGSL_TIMESTAMP_EVENT _IOWR(KGSL_IOC_TYPE, 0x33, struct kgsl_timestamp_event)
struct kgsl_gpumem_alloc_id {
unsigned int id;
unsigned int flags;
size_t size;
size_t mmapsize;
unsigned long gpuaddr;
unsigned long __pad[2];
};
#define IOCTL_KGSL_GPUMEM_ALLOC_ID _IOWR(KGSL_IOC_TYPE, 0x34, struct kgsl_gpumem_alloc_id)
struct kgsl_gpumem_free_id {
unsigned int id;
unsigned int __pad;
};
#define IOCTL_KGSL_GPUMEM_FREE_ID _IOWR(KGSL_IOC_TYPE, 0x35, struct kgsl_gpumem_free_id)
struct kgsl_gpumem_get_info {
unsigned long gpuaddr;
unsigned int id;
unsigned int flags;
size_t size;
size_t mmapsize;
unsigned long useraddr;
unsigned long __pad[4];
};
#define IOCTL_KGSL_GPUMEM_GET_INFO _IOWR(KGSL_IOC_TYPE, 0x36, struct kgsl_gpumem_get_info)
struct kgsl_gpumem_sync_cache {
unsigned long gpuaddr;
unsigned int id;
unsigned int op;
size_t offset;
size_t length;
};
#define KGSL_GPUMEM_CACHE_CLEAN (1 << 0)
#define KGSL_GPUMEM_CACHE_TO_GPU KGSL_GPUMEM_CACHE_CLEAN
#define KGSL_GPUMEM_CACHE_INV (1 << 1)
#define KGSL_GPUMEM_CACHE_FROM_GPU KGSL_GPUMEM_CACHE_INV
#define KGSL_GPUMEM_CACHE_FLUSH (KGSL_GPUMEM_CACHE_CLEAN | KGSL_GPUMEM_CACHE_INV)
#define KGSL_GPUMEM_CACHE_RANGE (1 << 31U)
#define IOCTL_KGSL_GPUMEM_SYNC_CACHE _IOW(KGSL_IOC_TYPE, 0x37, struct kgsl_gpumem_sync_cache)
struct kgsl_perfcounter_get {
unsigned int groupid;
unsigned int countable;
unsigned int offset;
unsigned int offset_hi;
unsigned int __pad;
};
#define IOCTL_KGSL_PERFCOUNTER_GET _IOWR(KGSL_IOC_TYPE, 0x38, struct kgsl_perfcounter_get)
struct kgsl_perfcounter_put {
unsigned int groupid;
unsigned int countable;
unsigned int __pad[2];
};
#define IOCTL_KGSL_PERFCOUNTER_PUT _IOW(KGSL_IOC_TYPE, 0x39, struct kgsl_perfcounter_put)
struct kgsl_perfcounter_query {
unsigned int groupid;
unsigned int * countables;
unsigned int count;
unsigned int max_counters;
unsigned int __pad[2];
};
#define IOCTL_KGSL_PERFCOUNTER_QUERY _IOWR(KGSL_IOC_TYPE, 0x3A, struct kgsl_perfcounter_query)
struct kgsl_perfcounter_read_group {
unsigned int groupid;
unsigned int countable;
unsigned long long value;
};
struct kgsl_perfcounter_read {
struct kgsl_perfcounter_read_group * reads;
unsigned int count;
unsigned int __pad[2];
};
#define IOCTL_KGSL_PERFCOUNTER_READ _IOWR(KGSL_IOC_TYPE, 0x3B, struct kgsl_perfcounter_read)
struct kgsl_gpumem_sync_cache_bulk {
unsigned int * id_list;
unsigned int count;
unsigned int op;
unsigned int __pad[2];
};
#define IOCTL_KGSL_GPUMEM_SYNC_CACHE_BULK _IOWR(KGSL_IOC_TYPE, 0x3C, struct kgsl_gpumem_sync_cache_bulk)
struct kgsl_cmd_syncpoint_timestamp {
unsigned int context_id;
unsigned int timestamp;
};
struct kgsl_cmd_syncpoint_fence {
int fd;
};
struct kgsl_cmd_syncpoint {
int type;
void * priv;
size_t size;
};
#define KGSL_IBDESC_MEMLIST 0x1
#define KGSL_IBDESC_PROFILING_BUFFER 0x2
struct kgsl_submit_commands {
unsigned int context_id;
unsigned int flags;
struct kgsl_ibdesc * cmdlist;
unsigned int numcmds;
struct kgsl_cmd_syncpoint * synclist;
unsigned int numsyncs;
unsigned int timestamp;
unsigned int __pad[4];
};
#define IOCTL_KGSL_SUBMIT_COMMANDS _IOWR(KGSL_IOC_TYPE, 0x3D, struct kgsl_submit_commands)
struct kgsl_device_constraint {
unsigned int type;
unsigned int context_id;
void * data;
size_t size;
};
#define KGSL_CONSTRAINT_NONE 0
#define KGSL_CONSTRAINT_PWRLEVEL 1
#define KGSL_CONSTRAINT_L3_NONE 2
#define KGSL_CONSTRAINT_L3_PWRLEVEL 3
#define KGSL_CONSTRAINT_PWR_MIN 0
#define KGSL_CONSTRAINT_PWR_MAX 1
#define KGSL_CONSTRAINT_L3_PWR_MED 0
#define KGSL_CONSTRAINT_L3_PWR_MAX 1
struct kgsl_device_constraint_pwrlevel {
unsigned int level;
};
struct kgsl_syncsource_create {
unsigned int id;
unsigned int __pad[3];
};
#define IOCTL_KGSL_SYNCSOURCE_CREATE _IOWR(KGSL_IOC_TYPE, 0x40, struct kgsl_syncsource_create)
struct kgsl_syncsource_destroy {
unsigned int id;
unsigned int __pad[3];
};
#define IOCTL_KGSL_SYNCSOURCE_DESTROY _IOWR(KGSL_IOC_TYPE, 0x41, struct kgsl_syncsource_destroy)
struct kgsl_syncsource_create_fence {
unsigned int id;
int fence_fd;
unsigned int __pad[4];
};
#define IOCTL_KGSL_SYNCSOURCE_CREATE_FENCE _IOWR(KGSL_IOC_TYPE, 0x42, struct kgsl_syncsource_create_fence)
struct kgsl_syncsource_signal_fence {
unsigned int id;
int fence_fd;
unsigned int __pad[4];
};
#define IOCTL_KGSL_SYNCSOURCE_SIGNAL_FENCE _IOWR(KGSL_IOC_TYPE, 0x43, struct kgsl_syncsource_signal_fence)
struct kgsl_cff_sync_gpuobj {
uint64_t offset;
uint64_t length;
unsigned int id;
};
#define IOCTL_KGSL_CFF_SYNC_GPUOBJ _IOW(KGSL_IOC_TYPE, 0x44, struct kgsl_cff_sync_gpuobj)
struct kgsl_gpuobj_alloc {
uint64_t size;
uint64_t flags;
uint64_t va_len;
uint64_t mmapsize;
unsigned int id;
unsigned int metadata_len;
uint64_t metadata;
};
#define KGSL_GPUOBJ_ALLOC_METADATA_MAX 64
#define IOCTL_KGSL_GPUOBJ_ALLOC _IOWR(KGSL_IOC_TYPE, 0x45, struct kgsl_gpuobj_alloc)
struct kgsl_gpuobj_free {
uint64_t flags;
uint64_t priv;
unsigned int id;
unsigned int type;
unsigned int len;
};
#define KGSL_GPUOBJ_FREE_ON_EVENT 1
#define KGSL_GPU_EVENT_TIMESTAMP 1
#define KGSL_GPU_EVENT_FENCE 2
struct kgsl_gpu_event_timestamp {
unsigned int context_id;
unsigned int timestamp;
};
struct kgsl_gpu_event_fence {
int fd;
};
#define IOCTL_KGSL_GPUOBJ_FREE _IOW(KGSL_IOC_TYPE, 0x46, struct kgsl_gpuobj_free)
struct kgsl_gpuobj_info {
uint64_t gpuaddr;
uint64_t flags;
uint64_t size;
uint64_t va_len;
uint64_t va_addr;
unsigned int id;
};
#define IOCTL_KGSL_GPUOBJ_INFO _IOWR(KGSL_IOC_TYPE, 0x47, struct kgsl_gpuobj_info)
struct kgsl_gpuobj_import {
uint64_t priv;
uint64_t priv_len;
uint64_t flags;
unsigned int type;
unsigned int id;
};
struct kgsl_gpuobj_import_dma_buf {
int fd;
};
struct kgsl_gpuobj_import_useraddr {
uint64_t virtaddr;
};
#define IOCTL_KGSL_GPUOBJ_IMPORT _IOWR(KGSL_IOC_TYPE, 0x48, struct kgsl_gpuobj_import)
struct kgsl_gpuobj_sync_obj {
uint64_t offset;
uint64_t length;
unsigned int id;
unsigned int op;
};
struct kgsl_gpuobj_sync {
uint64_t objs;
unsigned int obj_len;
unsigned int count;
};
#define IOCTL_KGSL_GPUOBJ_SYNC _IOW(KGSL_IOC_TYPE, 0x49, struct kgsl_gpuobj_sync)
struct kgsl_command_object {
uint64_t offset;
uint64_t gpuaddr;
uint64_t size;
unsigned int flags;
unsigned int id;
};
struct kgsl_command_syncpoint {
uint64_t priv;
uint64_t size;
unsigned int type;
};
struct kgsl_gpu_command {
uint64_t flags;
uint64_t cmdlist;
unsigned int cmdsize;
unsigned int numcmds;
uint64_t objlist;
unsigned int objsize;
unsigned int numobjs;
uint64_t synclist;
unsigned int syncsize;
unsigned int numsyncs;
unsigned int context_id;
unsigned int timestamp;
};
#define IOCTL_KGSL_GPU_COMMAND _IOWR(KGSL_IOC_TYPE, 0x4A, struct kgsl_gpu_command)
struct kgsl_preemption_counters_query {
uint64_t counters;
unsigned int size_user;
unsigned int size_priority_level;
unsigned int max_priority_level;
};
#define IOCTL_KGSL_PREEMPTIONCOUNTER_QUERY _IOWR(KGSL_IOC_TYPE, 0x4B, struct kgsl_preemption_counters_query)
#define KGSL_GPUOBJ_SET_INFO_METADATA (1 << 0)
#define KGSL_GPUOBJ_SET_INFO_TYPE (1 << 1)
struct kgsl_gpuobj_set_info {
uint64_t flags;
uint64_t metadata;
unsigned int id;
unsigned int metadata_len;
unsigned int type;
};
#define IOCTL_KGSL_GPUOBJ_SET_INFO _IOW(KGSL_IOC_TYPE, 0x4C, struct kgsl_gpuobj_set_info)
struct kgsl_sparse_phys_alloc {
uint64_t size;
uint64_t pagesize;
uint64_t flags;
unsigned int id;
};
#define IOCTL_KGSL_SPARSE_PHYS_ALLOC _IOWR(KGSL_IOC_TYPE, 0x50, struct kgsl_sparse_phys_alloc)
struct kgsl_sparse_phys_free {
unsigned int id;
};
#define IOCTL_KGSL_SPARSE_PHYS_FREE _IOW(KGSL_IOC_TYPE, 0x51, struct kgsl_sparse_phys_free)
struct kgsl_sparse_virt_alloc {
uint64_t size;
uint64_t pagesize;
uint64_t flags;
uint64_t gpuaddr;
unsigned int id;
};
#define IOCTL_KGSL_SPARSE_VIRT_ALLOC _IOWR(KGSL_IOC_TYPE, 0x52, struct kgsl_sparse_virt_alloc)
struct kgsl_sparse_virt_free {
unsigned int id;
};
#define IOCTL_KGSL_SPARSE_VIRT_FREE _IOW(KGSL_IOC_TYPE, 0x53, struct kgsl_sparse_virt_free)
struct kgsl_sparse_binding_object {
uint64_t virtoffset;
uint64_t physoffset;
uint64_t size;
uint64_t flags;
unsigned int id;
};
struct kgsl_sparse_bind {
uint64_t list;
unsigned int id;
unsigned int size;
unsigned int count;
};
#define IOCTL_KGSL_SPARSE_BIND _IOW(KGSL_IOC_TYPE, 0x54, struct kgsl_sparse_bind)
struct kgsl_gpu_sparse_command {
uint64_t flags;
uint64_t sparselist;
uint64_t synclist;
unsigned int sparsesize;
unsigned int numsparse;
unsigned int syncsize;
unsigned int numsyncs;
unsigned int context_id;
unsigned int timestamp;
unsigned int id;
};
#define IOCTL_KGSL_GPU_SPARSE_COMMAND _IOWR(KGSL_IOC_TYPE, 0x55, struct kgsl_gpu_sparse_command)
#endif

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@@ -1,230 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_MDP_EXT_H_
#define _MSM_MDP_EXT_H_
#include <linux/msm_mdp.h>
#define MDP_IOCTL_MAGIC 'S'
#define MSMFB_ATOMIC_COMMIT _IOWR(MDP_IOCTL_MAGIC, 128, void *)
#define MSMFB_ASYNC_POSITION_UPDATE _IOWR(MDP_IOCTL_MAGIC, 129, struct mdp_position_update)
#define MSMFB_MDP_SET_CFG _IOW(MDP_IOCTL_MAGIC, 130, struct mdp_set_cfg)
#ifdef __LP64
#define MDP_LAYER_COMMIT_V1_PAD 2
#else
#define MDP_LAYER_COMMIT_V1_PAD 3
#endif
#define MDP_LAYER_FLIP_LR 0x1
#define MDP_LAYER_FLIP_UD 0x2
#define MDP_LAYER_ENABLE_PIXEL_EXT 0x4
#define MDP_LAYER_FORGROUND 0x8
#define MDP_LAYER_SECURE_SESSION 0x10
#define MDP_LAYER_SOLID_FILL 0x20
#define MDP_LAYER_DEINTERLACE 0x40
#define MDP_LAYER_BWC 0x80
#define MDP_LAYER_ASYNC 0x100
#define MDP_LAYER_PP 0x200
#define MDP_LAYER_SECURE_DISPLAY_SESSION 0x400
#define MDP_LAYER_ENABLE_QSEED3_SCALE 0x800
#define MDP_LAYER_MULTIRECT_ENABLE 0x1000
#define MDP_LAYER_MULTIRECT_PARALLEL_MODE 0x2000
#define MDP_DESTSCALER_ENABLE 0x1
#define MDP_DESTSCALER_SCALE_UPDATE 0x2
#define MDP_DESTSCALER_ENHANCER_UPDATE 0x4
#define MDP_VALIDATE_LAYER 0x01
#define MDP_COMMIT_WAIT_FOR_FINISH 0x02
#define MDP_COMMIT_SYNC_FENCE_WAIT 0x04
#define MDP_COMMIT_AVR_EN 0x08
#define MDP_COMMIT_AVR_ONE_SHOT_MODE 0x10
#define MDP_COMMIT_CWB_EN 0x800
#define MDP_COMMIT_CWB_DSPP 0x1000
#define MDP_COMMIT_VERSION_1_0 0x00010000
struct mdp_layer_plane {
int fd;
uint32_t offset;
uint32_t stride;
};
struct mdp_layer_buffer {
uint32_t width;
uint32_t height;
uint32_t format;
struct mdp_layer_plane planes[MAX_PLANES];
uint32_t plane_count;
struct mult_factor comp_ratio;
int fence;
uint32_t reserved;
};
struct mdp_input_layer {
uint32_t flags;
uint32_t pipe_ndx;
uint8_t horz_deci;
uint8_t vert_deci;
uint8_t alpha;
uint16_t z_order;
uint32_t transp_mask;
uint32_t bg_color;
enum mdss_mdp_blend_op blend_op;
enum mdp_color_space color_space;
struct mdp_rect src_rect;
struct mdp_rect dst_rect;
void * scale;
struct mdp_layer_buffer buffer;
void * pp_info;
int error_code;
uint32_t reserved[6];
};
struct mdp_output_layer {
uint32_t flags;
uint32_t writeback_ndx;
struct mdp_layer_buffer buffer;
enum mdp_color_space color_space;
uint32_t reserved[5];
};
struct mdp_destination_scaler_data {
uint32_t flags;
uint32_t dest_scaler_ndx;
uint32_t lm_width;
uint32_t lm_height;
uint64_t scale;
};
#define MDP_VIDEO_FRC_ENABLE (1 << 0)
struct mdp_frc_info {
uint32_t flags;
uint32_t frame_cnt;
int64_t timestamp;
};
struct mdp_layer_commit_v1 {
uint32_t flags;
int release_fence;
struct mdp_rect left_roi;
struct mdp_rect right_roi;
struct mdp_input_layer * input_layers;
uint32_t input_layer_cnt;
struct mdp_output_layer * output_layer;
int retire_fence;
void * dest_scaler;
uint32_t dest_scaler_cnt;
struct mdp_frc_info * frc_info;
uint32_t reserved[MDP_LAYER_COMMIT_V1_PAD];
};
struct mdp_layer_commit {
uint32_t version;
union {
struct mdp_layer_commit_v1 commit_v1;
};
};
struct mdp_point {
uint32_t x;
uint32_t y;
};
struct mdp_async_layer {
uint32_t flags;
uint32_t pipe_ndx;
struct mdp_point src;
struct mdp_point dst;
int error_code;
uint32_t reserved[3];
};
struct mdp_position_update {
struct mdp_async_layer * input_layers;
uint32_t input_layer_cnt;
};
#define MAX_DET_CURVES 3
struct mdp_det_enhance_data {
uint32_t enable;
int16_t sharpen_level1;
int16_t sharpen_level2;
uint16_t clip;
uint16_t limit;
uint16_t thr_quiet;
uint16_t thr_dieout;
uint16_t thr_low;
uint16_t thr_high;
uint16_t prec_shift;
int16_t adjust_a[MAX_DET_CURVES];
int16_t adjust_b[MAX_DET_CURVES];
int16_t adjust_c[MAX_DET_CURVES];
};
#define ENABLE_SCALE 0x1
#define ENABLE_DETAIL_ENHANCE 0x2
#define ENABLE_DIRECTION_DETECTION 0x4
#define SCALER_LUT_SWAP 0x1
#define SCALER_LUT_DIR_WR 0x2
#define SCALER_LUT_Y_CIR_WR 0x4
#define SCALER_LUT_UV_CIR_WR 0x8
#define SCALER_LUT_Y_SEP_WR 0x10
#define SCALER_LUT_UV_SEP_WR 0x20
#define FILTER_EDGE_DIRECTED_2D 0x0
#define FILTER_CIRCULAR_2D 0x1
#define FILTER_SEPARABLE_1D 0x2
#define FILTER_BILINEAR 0x3
#define FILTER_ALPHA_DROP_REPEAT 0x0
#define FILTER_ALPHA_BILINEAR 0x1
struct mdp_scale_data_v2 {
uint32_t enable;
int32_t init_phase_x[MAX_PLANES];
int32_t phase_step_x[MAX_PLANES];
int32_t init_phase_y[MAX_PLANES];
int32_t phase_step_y[MAX_PLANES];
uint32_t num_ext_pxls_left[MAX_PLANES];
uint32_t num_ext_pxls_right[MAX_PLANES];
uint32_t num_ext_pxls_top[MAX_PLANES];
uint32_t num_ext_pxls_btm[MAX_PLANES];
int32_t left_ftch[MAX_PLANES];
int32_t left_rpt[MAX_PLANES];
int32_t right_ftch[MAX_PLANES];
int32_t right_rpt[MAX_PLANES];
uint32_t top_rpt[MAX_PLANES];
uint32_t btm_rpt[MAX_PLANES];
uint32_t top_ftch[MAX_PLANES];
uint32_t btm_ftch[MAX_PLANES];
uint32_t roi_w[MAX_PLANES];
uint32_t preload_x[MAX_PLANES];
uint32_t preload_y[MAX_PLANES];
uint32_t src_width[MAX_PLANES];
uint32_t src_height[MAX_PLANES];
uint32_t dst_width;
uint32_t dst_height;
uint32_t y_rgb_filter_cfg;
uint32_t uv_filter_cfg;
uint32_t alpha_filter_cfg;
uint32_t blend_cfg;
uint32_t lut_flag;
uint32_t dir_lut_idx;
uint32_t y_rgb_cir_lut_idx;
uint32_t uv_cir_lut_idx;
uint32_t y_rgb_sep_lut_idx;
uint32_t uv_sep_lut_idx;
struct mdp_det_enhance_data detail_enhance;
uint64_t reserved[8];
};
struct mdp_scale_luts_info {
uint64_t dir_lut;
uint64_t cir_lut;
uint64_t sep_lut;
uint32_t dir_lut_size;
uint32_t cir_lut_size;
uint32_t sep_lut_size;
};
#define MDP_QSEED3_LUT_CFG 0x1
struct mdp_set_cfg {
uint64_t flags;
uint32_t len;
uint64_t payload;
};
#endif

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@@ -1,67 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef MSM_PFT_H_
#define MSM_PFT_H_
#include <linux/types.h>
enum pft_command_opcode {
PFT_CMD_OPCODE_SET_STATE,
PFT_CMD_OPCODE_UPDATE_REG_APP_UID,
PFT_CMD_OPCODE_PERFORM_IN_PLACE_FILE_ENC,
PFT_CMD_OPCODE_MAX_COMMAND_INDEX
};
enum pft_state {
PFT_STATE_DEACTIVATED,
PFT_STATE_DEACTIVATING,
PFT_STATE_KEY_REMOVED,
PFT_STATE_REMOVING_KEY,
PFT_STATE_KEY_LOADED,
PFT_STATE_MAX_INDEX
};
enum pft_command_response_code {
PFT_CMD_RESP_SUCCESS,
PFT_CMD_RESP_GENERAL_ERROR,
PFT_CMD_RESP_INVALID_COMMAND,
PFT_CMD_RESP_INVALID_CMD_PARAMS,
PFT_CMD_RESP_INVALID_STATE,
PFT_CMD_RESP_ALREADY_IN_STATE,
PFT_CMD_RESP_INPLACE_FILE_IS_OPEN,
PFT_CMD_RESP_ENT_FILES_CLOSING_FAILURE,
PFT_CMD_RESP_MAX_INDEX
};
struct pft_command_response {
__u32 command_id;
__u32 error_code;
};
struct pft_command {
__u32 opcode;
union {
struct {
__u32 state;
} set_state;
struct {
__u32 items_count;
uid_t table[0];
} update_app_list;
struct {
__u32 file_descriptor;
} preform_in_place_file_enc;
};
};
#endif

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@@ -1,129 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_RMNET_H_
#define _MSM_RMNET_H_
#define RMNET_MODE_NONE (0x00)
#define RMNET_MODE_LLP_ETH (0x01)
#define RMNET_MODE_LLP_IP (0x02)
#define RMNET_MODE_QOS (0x04)
#define RMNET_MODE_MASK (RMNET_MODE_LLP_ETH | RMNET_MODE_LLP_IP | RMNET_MODE_QOS)
#define RMNET_IS_MODE_QOS(mode) ((mode & RMNET_MODE_QOS) == RMNET_MODE_QOS)
#define RMNET_IS_MODE_IP(mode) ((mode & RMNET_MODE_LLP_IP) == RMNET_MODE_LLP_IP)
#define RMNET_IOCTL_SET_LLP_ETHERNET 0x000089F1
#define RMNET_IOCTL_SET_LLP_IP 0x000089F2
#define RMNET_IOCTL_GET_LLP 0x000089F3
#define RMNET_IOCTL_SET_QOS_ENABLE 0x000089F4
#define RMNET_IOCTL_SET_QOS_DISABLE 0x000089F5
#define RMNET_IOCTL_GET_QOS 0x000089F6
#define RMNET_IOCTL_GET_OPMODE 0x000089F7
#define RMNET_IOCTL_OPEN 0x000089F8
#define RMNET_IOCTL_CLOSE 0x000089F9
#define RMNET_IOCTL_FLOW_ENABLE 0x000089FA
#define RMNET_IOCTL_FLOW_DISABLE 0x000089FB
#define RMNET_IOCTL_FLOW_SET_HNDL 0x000089FC
#define RMNET_IOCTL_EXTENDED 0x000089FD
#define RMNET_IOCTL_GET_SUPPORTED_FEATURES 0x0000
#define RMNET_IOCTL_SET_MRU 0x0001
#define RMNET_IOCTL_GET_MRU 0x0002
#define RMNET_IOCTL_GET_EPID 0x0003
#define RMNET_IOCTL_GET_DRIVER_NAME 0x0004
#define RMNET_IOCTL_ADD_MUX_CHANNEL 0x0005
#define RMNET_IOCTL_SET_EGRESS_DATA_FORMAT 0x0006
#define RMNET_IOCTL_SET_INGRESS_DATA_FORMAT 0x0007
#define RMNET_IOCTL_SET_AGGREGATION_COUNT 0x0008
#define RMNET_IOCTL_GET_AGGREGATION_COUNT 0x0009
#define RMNET_IOCTL_SET_AGGREGATION_SIZE 0x000A
#define RMNET_IOCTL_GET_AGGREGATION_SIZE 0x000B
#define RMNET_IOCTL_FLOW_CONTROL 0x000C
#define RMNET_IOCTL_GET_DFLT_CONTROL_CHANNEL 0x000D
#define RMNET_IOCTL_GET_HWSW_MAP 0x000E
#define RMNET_IOCTL_SET_RX_HEADROOM 0x000F
#define RMNET_IOCTL_GET_EP_PAIR 0x0010
#define RMNET_IOCTL_SET_QOS_VERSION 0x0011
#define RMNET_IOCTL_GET_QOS_VERSION 0x0012
#define RMNET_IOCTL_GET_SUPPORTED_QOS_MODES 0x0013
#define RMNET_IOCTL_SET_SLEEP_STATE 0x0014
#define RMNET_IOCTL_SET_XLAT_DEV_INFO 0x0015
#define RMNET_IOCTL_DEREGISTER_DEV 0x0016
#define RMNET_IOCTL_GET_SG_SUPPORT 0x0017
#define RMNET_IOCTL_FEAT_NOTIFY_MUX_CHANNEL (1 << 0)
#define RMNET_IOCTL_FEAT_SET_EGRESS_DATA_FORMAT (1 << 1)
#define RMNET_IOCTL_FEAT_SET_INGRESS_DATA_FORMAT (1 << 2)
#define RMNET_IOCTL_FEAT_SET_AGGREGATION_COUNT (1 << 3)
#define RMNET_IOCTL_FEAT_GET_AGGREGATION_COUNT (1 << 4)
#define RMNET_IOCTL_FEAT_SET_AGGREGATION_SIZE (1 << 5)
#define RMNET_IOCTL_FEAT_GET_AGGREGATION_SIZE (1 << 6)
#define RMNET_IOCTL_FEAT_FLOW_CONTROL (1 << 7)
#define RMNET_IOCTL_FEAT_GET_DFLT_CONTROL_CHANNEL (1 << 8)
#define RMNET_IOCTL_FEAT_GET_HWSW_MAP (1 << 9)
#define RMNET_IOCTL_EGRESS_FORMAT_MAP (1 << 1)
#define RMNET_IOCTL_EGRESS_FORMAT_AGGREGATION (1 << 2)
#define RMNET_IOCTL_EGRESS_FORMAT_MUXING (1 << 3)
#define RMNET_IOCTL_EGRESS_FORMAT_CHECKSUM (1 << 4)
#define RMNET_IOCTL_INGRESS_FORMAT_MAP (1 << 1)
#define RMNET_IOCTL_INGRESS_FORMAT_DEAGGREGATION (1 << 2)
#define RMNET_IOCTL_INGRESS_FORMAT_DEMUXING (1 << 3)
#define RMNET_IOCTL_INGRESS_FORMAT_CHECKSUM (1 << 4)
#define RMNET_IOCTL_INGRESS_FORMAT_AGG_DATA (1 << 5)
#ifndef IFNAMSIZ
#define IFNAMSIZ 16
#endif
struct rmnet_ioctl_extended_s {
uint32_t extended_ioctl;
union {
uint32_t data;
int8_t if_name[IFNAMSIZ];
struct {
uint32_t mux_id;
int8_t vchannel_name[IFNAMSIZ];
} rmnet_mux_val;
struct {
uint8_t flow_mode;
uint8_t mux_id;
} flow_control_prop;
struct {
uint32_t consumer_pipe_num;
uint32_t producer_pipe_num;
} ipa_ep_pair;
struct {
uint32_t __data;
uint32_t agg_size;
uint32_t agg_count;
} ingress_format;
} u;
};
struct rmnet_ioctl_data_s {
union {
uint32_t operation_mode;
uint32_t tcm_handle;
} u;
};
#define RMNET_IOCTL_QOS_MODE_6 (1 << 0)
#define RMNET_IOCTL_QOS_MODE_8 (1 << 1)
struct QMI_QOS_HDR_S {
unsigned char version;
unsigned char flags;
uint32_t flow_id;
} __attribute((__packed__));
struct qmi_qos_hdr8_s {
struct QMI_QOS_HDR_S hdr;
uint8_t reserved[2];
} __attribute((__packed__));
#endif

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@@ -1,66 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef __MSM_ROTATOR_H__
#define __MSM_ROTATOR_H__
#include <linux/types.h>
#include <linux/msm_mdp.h>
#define MSM_ROTATOR_IOCTL_MAGIC 'R'
#define MSM_ROTATOR_IOCTL_START _IOWR(MSM_ROTATOR_IOCTL_MAGIC, 1, struct msm_rotator_img_info)
#define MSM_ROTATOR_IOCTL_ROTATE _IOW(MSM_ROTATOR_IOCTL_MAGIC, 2, struct msm_rotator_data_info)
#define MSM_ROTATOR_IOCTL_FINISH _IOW(MSM_ROTATOR_IOCTL_MAGIC, 3, int)
#define ROTATOR_VERSION_01 0xA5B4C301
enum rotator_clk_type {
ROTATOR_CORE_CLK,
ROTATOR_PCLK,
ROTATOR_IMEM_CLK
};
struct msm_rotator_img_info {
unsigned int session_id;
struct msmfb_img src;
struct msmfb_img dst;
struct mdp_rect src_rect;
unsigned int dst_x;
unsigned int dst_y;
unsigned char rotations;
int enable;
unsigned int downscale_ratio;
unsigned int secure;
};
struct msm_rotator_data_info {
int session_id;
struct msmfb_data src;
struct msmfb_data dst;
unsigned int version_key;
struct msmfb_data src_chroma;
struct msmfb_data dst_chroma;
};
struct msm_rot_clocks {
const char * clk_name;
enum rotator_clk_type clk_type;
unsigned int clk_rate;
};
struct msm_rotator_platform_data {
unsigned int number_of_clocks;
unsigned int hardware_version_number;
struct msm_rot_clocks * rotator_clks;
struct msm_bus_scale_pdata * bus_scale_table;
char rot_iommu_split_domain;
};
#endif

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@@ -1,65 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_THERMAL_IOCTL_H
#define _MSM_THERMAL_IOCTL_H
#include <linux/ioctl.h>
#define MSM_THERMAL_IOCTL_NAME "msm_thermal_query"
#define MSM_IOCTL_FREQ_SIZE 16
struct __attribute__((__packed__)) cpu_freq_arg {
uint32_t cpu_num;
uint32_t freq_req;
};
struct __attribute__((__packed__)) clock_plan_arg {
uint32_t cluster_num;
uint32_t freq_table_len;
uint32_t set_idx;
unsigned int freq_table[MSM_IOCTL_FREQ_SIZE];
};
struct __attribute__((__packed__)) voltage_plan_arg {
uint32_t cluster_num;
uint32_t voltage_table_len;
uint32_t set_idx;
uint32_t voltage_table[MSM_IOCTL_FREQ_SIZE];
};
struct __attribute__((__packed__)) msm_thermal_ioctl {
uint32_t size;
union {
struct cpu_freq_arg cpu_freq;
struct clock_plan_arg clock_freq;
struct voltage_plan_arg voltage;
};
};
enum {
MSM_SET_CPU_MAX_FREQ = 0x00,
MSM_SET_CPU_MIN_FREQ = 0x01,
MSM_SET_CLUSTER_MAX_FREQ = 0x02,
MSM_SET_CLUSTER_MIN_FREQ = 0x03,
MSM_GET_CLUSTER_FREQ_PLAN = 0x04,
MSM_GET_CLUSTER_VOLTAGE_PLAN = 0x05,
MSM_CMD_MAX_NR,
};
#define MSM_THERMAL_MAGIC_NUM 0xCA
#define MSM_THERMAL_SET_CPU_MAX_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM, MSM_SET_CPU_MAX_FREQ, struct msm_thermal_ioctl)
#define MSM_THERMAL_SET_CPU_MIN_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM, MSM_SET_CPU_MIN_FREQ, struct msm_thermal_ioctl)
#define MSM_THERMAL_SET_CLUSTER_MAX_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM, MSM_SET_CLUSTER_MAX_FREQ, struct msm_thermal_ioctl)
#define MSM_THERMAL_SET_CLUSTER_MIN_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM, MSM_SET_CLUSTER_MIN_FREQ, struct msm_thermal_ioctl)
#define MSM_THERMAL_GET_CLUSTER_FREQUENCY_PLAN _IOR(MSM_THERMAL_MAGIC_NUM, MSM_GET_CLUSTER_FREQ_PLAN, struct msm_thermal_ioctl)
#define MSM_THERMAL_GET_CLUSTER_VOLTAGE_PLAN _IOR(MSM_THERMAL_MAGIC_NUM, MSM_GET_CLUSTER_VOLTAGE_PLAN, struct msm_thermal_ioctl)
#endif

View File

@@ -1,469 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_VIDC_DEC_H_
#define _MSM_VIDC_DEC_H_
#include <linux/types.h>
#include <linux/ioctl.h>
#define VDEC_S_BASE 0x40000000
#define VDEC_S_SUCCESS (VDEC_S_BASE)
#define VDEC_S_EFAIL (VDEC_S_BASE + 1)
#define VDEC_S_EFATAL (VDEC_S_BASE + 2)
#define VDEC_S_EBADPARAM (VDEC_S_BASE + 3)
#define VDEC_S_EINVALSTATE (VDEC_S_BASE + 4)
#define VDEC_S_ENOSWRES (VDEC_S_BASE + 5)
#define VDEC_S_ENOHWRES (VDEC_S_BASE + 6)
#define VDEC_S_EINVALCMD (VDEC_S_BASE + 7)
#define VDEC_S_ETIMEOUT (VDEC_S_BASE + 8)
#define VDEC_S_ENOPREREQ (VDEC_S_BASE + 9)
#define VDEC_S_ECMDQFULL (VDEC_S_BASE + 10)
#define VDEC_S_ENOTSUPP (VDEC_S_BASE + 11)
#define VDEC_S_ENOTIMPL (VDEC_S_BASE + 12)
#define VDEC_S_BUSY (VDEC_S_BASE + 13)
#define VDEC_S_INPUT_BITSTREAM_ERR (VDEC_S_BASE + 14)
#define VDEC_INTF_VER 1
#define VDEC_MSG_BASE 0x0000000
#define VDEC_MSG_INVALID (VDEC_MSG_BASE + 0)
#define VDEC_MSG_RESP_INPUT_BUFFER_DONE (VDEC_MSG_BASE + 1)
#define VDEC_MSG_RESP_OUTPUT_BUFFER_DONE (VDEC_MSG_BASE + 2)
#define VDEC_MSG_RESP_INPUT_FLUSHED (VDEC_MSG_BASE + 3)
#define VDEC_MSG_RESP_OUTPUT_FLUSHED (VDEC_MSG_BASE + 4)
#define VDEC_MSG_RESP_FLUSH_INPUT_DONE (VDEC_MSG_BASE + 5)
#define VDEC_MSG_RESP_FLUSH_OUTPUT_DONE (VDEC_MSG_BASE + 6)
#define VDEC_MSG_RESP_START_DONE (VDEC_MSG_BASE + 7)
#define VDEC_MSG_RESP_STOP_DONE (VDEC_MSG_BASE + 8)
#define VDEC_MSG_RESP_PAUSE_DONE (VDEC_MSG_BASE + 9)
#define VDEC_MSG_RESP_RESUME_DONE (VDEC_MSG_BASE + 10)
#define VDEC_MSG_RESP_RESOURCE_LOADED (VDEC_MSG_BASE + 11)
#define VDEC_EVT_RESOURCES_LOST (VDEC_MSG_BASE + 12)
#define VDEC_MSG_EVT_CONFIG_CHANGED (VDEC_MSG_BASE + 13)
#define VDEC_MSG_EVT_HW_ERROR (VDEC_MSG_BASE + 14)
#define VDEC_MSG_EVT_INFO_CONFIG_CHANGED (VDEC_MSG_BASE + 15)
#define VDEC_MSG_EVT_INFO_FIELD_DROPPED (VDEC_MSG_BASE + 16)
#define VDEC_MSG_EVT_HW_OVERLOAD (VDEC_MSG_BASE + 17)
#define VDEC_MSG_EVT_MAX_CLIENTS (VDEC_MSG_BASE + 18)
#define VDEC_MSG_EVT_HW_UNSUPPORTED (VDEC_MSG_BASE + 19)
#define VDEC_BUFFERFLAG_EOS 0x00000001
#define VDEC_BUFFERFLAG_DECODEONLY 0x00000004
#define VDEC_BUFFERFLAG_DATACORRUPT 0x00000008
#define VDEC_BUFFERFLAG_ENDOFFRAME 0x00000010
#define VDEC_BUFFERFLAG_SYNCFRAME 0x00000020
#define VDEC_BUFFERFLAG_EXTRADATA 0x00000040
#define VDEC_BUFFERFLAG_CODECCONFIG 0x00000080
#define VDEC_EXTRADATA_NONE 0x001
#define VDEC_EXTRADATA_QP 0x004
#define VDEC_EXTRADATA_MB_ERROR_MAP 0x008
#define VDEC_EXTRADATA_SEI 0x010
#define VDEC_EXTRADATA_VUI 0x020
#define VDEC_EXTRADATA_VC1 0x040
#define VDEC_EXTRADATA_EXT_DATA 0x0800
#define VDEC_EXTRADATA_USER_DATA 0x1000
#define VDEC_EXTRADATA_EXT_BUFFER 0x2000
#define VDEC_CMDBASE 0x800
#define VDEC_CMD_SET_INTF_VERSION (VDEC_CMDBASE)
#define VDEC_IOCTL_MAGIC 'v'
struct vdec_ioctl_msg {
void * in;
void * out;
};
#define VDEC_IOCTL_GET_PROFILE_LEVEL_SUPPORTED _IOWR(VDEC_IOCTL_MAGIC, 0, struct vdec_ioctl_msg)
#define VDEC_IOCTL_GET_INTERLACE_FORMAT _IOR(VDEC_IOCTL_MAGIC, 1, struct vdec_ioctl_msg)
#define VDEC_IOCTL_GET_CURRENT_PROFILE_LEVEL _IOWR(VDEC_IOCTL_MAGIC, 2, struct vdec_ioctl_msg)
#define VDEC_IOCTL_SET_OUTPUT_FORMAT _IOWR(VDEC_IOCTL_MAGIC, 3, struct vdec_ioctl_msg)
#define VDEC_IOCTL_GET_OUTPUT_FORMAT _IOWR(VDEC_IOCTL_MAGIC, 4, struct vdec_ioctl_msg)
#define VDEC_IOCTL_SET_CODEC _IOW(VDEC_IOCTL_MAGIC, 5, struct vdec_ioctl_msg)
#define VDEC_IOCTL_GET_CODEC _IOR(VDEC_IOCTL_MAGIC, 6, struct vdec_ioctl_msg)
#define VDEC_IOCTL_SET_PICRES _IOW(VDEC_IOCTL_MAGIC, 7, struct vdec_ioctl_msg)
#define VDEC_IOCTL_GET_PICRES _IOR(VDEC_IOCTL_MAGIC, 8, struct vdec_ioctl_msg)
#define VDEC_IOCTL_SET_EXTRADATA _IOW(VDEC_IOCTL_MAGIC, 9, struct vdec_ioctl_msg)
#define VDEC_IOCTL_GET_EXTRADATA _IOR(VDEC_IOCTL_MAGIC, 10, struct vdec_ioctl_msg)
#define VDEC_IOCTL_SET_SEQUENCE_HEADER _IOW(VDEC_IOCTL_MAGIC, 11, struct vdec_ioctl_msg)
#define VDEC_IOCTL_SET_BUFFER_REQ _IOW(VDEC_IOCTL_MAGIC, 12, struct vdec_ioctl_msg)
#define VDEC_IOCTL_GET_BUFFER_REQ _IOR(VDEC_IOCTL_MAGIC, 13, struct vdec_ioctl_msg)
#define VDEC_IOCTL_ALLOCATE_BUFFER _IOWR(VDEC_IOCTL_MAGIC, 14, struct vdec_ioctl_msg)
#define VDEC_IOCTL_FREE_BUFFER _IOW(VDEC_IOCTL_MAGIC, 15, struct vdec_ioctl_msg)
#define VDEC_IOCTL_SET_BUFFER _IOW(VDEC_IOCTL_MAGIC, 16, struct vdec_ioctl_msg)
#define VDEC_IOCTL_FILL_OUTPUT_BUFFER _IOW(VDEC_IOCTL_MAGIC, 17, struct vdec_ioctl_msg)
#define VDEC_IOCTL_DECODE_FRAME _IOW(VDEC_IOCTL_MAGIC, 18, struct vdec_ioctl_msg)
#define VDEC_IOCTL_LOAD_RESOURCES _IO(VDEC_IOCTL_MAGIC, 19)
#define VDEC_IOCTL_CMD_START _IO(VDEC_IOCTL_MAGIC, 20)
#define VDEC_IOCTL_CMD_STOP _IO(VDEC_IOCTL_MAGIC, 21)
#define VDEC_IOCTL_CMD_PAUSE _IO(VDEC_IOCTL_MAGIC, 22)
#define VDEC_IOCTL_CMD_RESUME _IO(VDEC_IOCTL_MAGIC, 23)
#define VDEC_IOCTL_CMD_FLUSH _IOW(VDEC_IOCTL_MAGIC, 24, struct vdec_ioctl_msg)
#define VDEC_IOCTL_GET_NEXT_MSG _IOR(VDEC_IOCTL_MAGIC, 25, struct vdec_ioctl_msg)
#define VDEC_IOCTL_STOP_NEXT_MSG _IO(VDEC_IOCTL_MAGIC, 26)
#define VDEC_IOCTL_GET_NUMBER_INSTANCES _IOR(VDEC_IOCTL_MAGIC, 27, struct vdec_ioctl_msg)
#define VDEC_IOCTL_SET_PICTURE_ORDER _IOW(VDEC_IOCTL_MAGIC, 28, struct vdec_ioctl_msg)
#define VDEC_IOCTL_SET_FRAME_RATE _IOW(VDEC_IOCTL_MAGIC, 29, struct vdec_ioctl_msg)
#define VDEC_IOCTL_SET_H264_MV_BUFFER _IOW(VDEC_IOCTL_MAGIC, 30, struct vdec_ioctl_msg)
#define VDEC_IOCTL_FREE_H264_MV_BUFFER _IOW(VDEC_IOCTL_MAGIC, 31, struct vdec_ioctl_msg)
#define VDEC_IOCTL_GET_MV_BUFFER_SIZE _IOR(VDEC_IOCTL_MAGIC, 32, struct vdec_ioctl_msg)
#define VDEC_IOCTL_SET_IDR_ONLY_DECODING _IO(VDEC_IOCTL_MAGIC, 33)
#define VDEC_IOCTL_SET_CONT_ON_RECONFIG _IO(VDEC_IOCTL_MAGIC, 34)
#define VDEC_IOCTL_SET_DISABLE_DMX _IOW(VDEC_IOCTL_MAGIC, 35, struct vdec_ioctl_msg)
#define VDEC_IOCTL_GET_DISABLE_DMX _IOR(VDEC_IOCTL_MAGIC, 36, struct vdec_ioctl_msg)
#define VDEC_IOCTL_GET_DISABLE_DMX_SUPPORT _IOR(VDEC_IOCTL_MAGIC, 37, struct vdec_ioctl_msg)
#define VDEC_IOCTL_SET_PERF_CLK _IOR(VDEC_IOCTL_MAGIC, 38, struct vdec_ioctl_msg)
#define VDEC_IOCTL_SET_META_BUFFERS _IOW(VDEC_IOCTL_MAGIC, 39, struct vdec_ioctl_msg)
#define VDEC_IOCTL_FREE_META_BUFFERS _IO(VDEC_IOCTL_MAGIC, 40)
enum vdec_picture {
PICTURE_TYPE_I,
PICTURE_TYPE_P,
PICTURE_TYPE_B,
PICTURE_TYPE_BI,
PICTURE_TYPE_SKIP,
PICTURE_TYPE_IDR,
PICTURE_TYPE_UNKNOWN
};
enum vdec_buffer {
VDEC_BUFFER_TYPE_INPUT,
VDEC_BUFFER_TYPE_OUTPUT
};
struct vdec_allocatorproperty {
enum vdec_buffer buffer_type;
uint32_t mincount;
uint32_t maxcount;
uint32_t actualcount;
size_t buffer_size;
uint32_t alignment;
uint32_t buf_poolid;
size_t meta_buffer_size;
};
struct vdec_bufferpayload {
void * bufferaddr;
size_t buffer_len;
int pmem_fd;
size_t offset;
size_t mmaped_size;
};
struct vdec_setbuffer_cmd {
enum vdec_buffer buffer_type;
struct vdec_bufferpayload buffer;
};
struct vdec_fillbuffer_cmd {
struct vdec_bufferpayload buffer;
void * client_data;
};
enum vdec_bufferflush {
VDEC_FLUSH_TYPE_INPUT,
VDEC_FLUSH_TYPE_OUTPUT,
VDEC_FLUSH_TYPE_ALL
};
enum vdec_codec {
VDEC_CODECTYPE_H264 = 0x1,
VDEC_CODECTYPE_H263 = 0x2,
VDEC_CODECTYPE_MPEG4 = 0x3,
VDEC_CODECTYPE_DIVX_3 = 0x4,
VDEC_CODECTYPE_DIVX_4 = 0x5,
VDEC_CODECTYPE_DIVX_5 = 0x6,
VDEC_CODECTYPE_DIVX_6 = 0x7,
VDEC_CODECTYPE_XVID = 0x8,
VDEC_CODECTYPE_MPEG1 = 0x9,
VDEC_CODECTYPE_MPEG2 = 0xa,
VDEC_CODECTYPE_VC1 = 0xb,
VDEC_CODECTYPE_VC1_RCV = 0xc,
VDEC_CODECTYPE_HEVC = 0xd,
VDEC_CODECTYPE_MVC = 0xe,
VDEC_CODECTYPE_VP8 = 0xf,
VDEC_CODECTYPE_VP9 = 0x10,
};
enum vdec_mpeg2_profile {
VDEC_MPEG2ProfileSimple = 0x1,
VDEC_MPEG2ProfileMain = 0x2,
VDEC_MPEG2Profile422 = 0x4,
VDEC_MPEG2ProfileSNR = 0x8,
VDEC_MPEG2ProfileSpatial = 0x10,
VDEC_MPEG2ProfileHigh = 0x20,
VDEC_MPEG2ProfileKhronosExtensions = 0x6F000000,
VDEC_MPEG2ProfileVendorStartUnused = 0x7F000000,
VDEC_MPEG2ProfileMax = 0x7FFFFFFF
};
enum vdec_mpeg2_level {
VDEC_MPEG2LevelLL = 0x1,
VDEC_MPEG2LevelML = 0x2,
VDEC_MPEG2LevelH14 = 0x4,
VDEC_MPEG2LevelHL = 0x8,
VDEC_MPEG2LevelKhronosExtensions = 0x6F000000,
VDEC_MPEG2LevelVendorStartUnused = 0x7F000000,
VDEC_MPEG2LevelMax = 0x7FFFFFFF
};
enum vdec_mpeg4_profile {
VDEC_MPEG4ProfileSimple = 0x01,
VDEC_MPEG4ProfileSimpleScalable = 0x02,
VDEC_MPEG4ProfileCore = 0x04,
VDEC_MPEG4ProfileMain = 0x08,
VDEC_MPEG4ProfileNbit = 0x10,
VDEC_MPEG4ProfileScalableTexture = 0x20,
VDEC_MPEG4ProfileSimpleFace = 0x40,
VDEC_MPEG4ProfileSimpleFBA = 0x80,
VDEC_MPEG4ProfileBasicAnimated = 0x100,
VDEC_MPEG4ProfileHybrid = 0x200,
VDEC_MPEG4ProfileAdvancedRealTime = 0x400,
VDEC_MPEG4ProfileCoreScalable = 0x800,
VDEC_MPEG4ProfileAdvancedCoding = 0x1000,
VDEC_MPEG4ProfileAdvancedCore = 0x2000,
VDEC_MPEG4ProfileAdvancedScalable = 0x4000,
VDEC_MPEG4ProfileAdvancedSimple = 0x8000,
VDEC_MPEG4ProfileKhronosExtensions = 0x6F000000,
VDEC_MPEG4ProfileVendorStartUnused = 0x7F000000,
VDEC_MPEG4ProfileMax = 0x7FFFFFFF
};
enum vdec_mpeg4_level {
VDEC_MPEG4Level0 = 0x01,
VDEC_MPEG4Level0b = 0x02,
VDEC_MPEG4Level1 = 0x04,
VDEC_MPEG4Level2 = 0x08,
VDEC_MPEG4Level3 = 0x10,
VDEC_MPEG4Level4 = 0x20,
VDEC_MPEG4Level4a = 0x40,
VDEC_MPEG4Level5 = 0x80,
VDEC_MPEG4LevelKhronosExtensions = 0x6F000000,
VDEC_MPEG4LevelVendorStartUnused = 0x7F000000,
VDEC_MPEG4LevelMax = 0x7FFFFFFF
};
enum vdec_avc_profile {
VDEC_AVCProfileBaseline = 0x01,
VDEC_AVCProfileMain = 0x02,
VDEC_AVCProfileExtended = 0x04,
VDEC_AVCProfileHigh = 0x08,
VDEC_AVCProfileHigh10 = 0x10,
VDEC_AVCProfileHigh422 = 0x20,
VDEC_AVCProfileHigh444 = 0x40,
VDEC_AVCProfileKhronosExtensions = 0x6F000000,
VDEC_AVCProfileVendorStartUnused = 0x7F000000,
VDEC_AVCProfileMax = 0x7FFFFFFF
};
enum vdec_avc_level {
VDEC_AVCLevel1 = 0x01,
VDEC_AVCLevel1b = 0x02,
VDEC_AVCLevel11 = 0x04,
VDEC_AVCLevel12 = 0x08,
VDEC_AVCLevel13 = 0x10,
VDEC_AVCLevel2 = 0x20,
VDEC_AVCLevel21 = 0x40,
VDEC_AVCLevel22 = 0x80,
VDEC_AVCLevel3 = 0x100,
VDEC_AVCLevel31 = 0x200,
VDEC_AVCLevel32 = 0x400,
VDEC_AVCLevel4 = 0x800,
VDEC_AVCLevel41 = 0x1000,
VDEC_AVCLevel42 = 0x2000,
VDEC_AVCLevel5 = 0x4000,
VDEC_AVCLevel51 = 0x8000,
VDEC_AVCLevelKhronosExtensions = 0x6F000000,
VDEC_AVCLevelVendorStartUnused = 0x7F000000,
VDEC_AVCLevelMax = 0x7FFFFFFF
};
enum vdec_divx_profile {
VDEC_DIVXProfile_qMobile = 0x01,
VDEC_DIVXProfile_Mobile = 0x02,
VDEC_DIVXProfile_HD = 0x04,
VDEC_DIVXProfile_Handheld = 0x08,
VDEC_DIVXProfile_Portable = 0x10,
VDEC_DIVXProfile_HomeTheater = 0x20
};
enum vdec_xvid_profile {
VDEC_XVIDProfile_Simple = 0x1,
VDEC_XVIDProfile_Advanced_Realtime_Simple = 0x2,
VDEC_XVIDProfile_Advanced_Simple = 0x4
};
enum vdec_xvid_level {
VDEC_XVID_LEVEL_S_L0 = 0x1,
VDEC_XVID_LEVEL_S_L1 = 0x2,
VDEC_XVID_LEVEL_S_L2 = 0x4,
VDEC_XVID_LEVEL_S_L3 = 0x8,
VDEC_XVID_LEVEL_ARTS_L1 = 0x10,
VDEC_XVID_LEVEL_ARTS_L2 = 0x20,
VDEC_XVID_LEVEL_ARTS_L3 = 0x40,
VDEC_XVID_LEVEL_ARTS_L4 = 0x80,
VDEC_XVID_LEVEL_AS_L0 = 0x100,
VDEC_XVID_LEVEL_AS_L1 = 0x200,
VDEC_XVID_LEVEL_AS_L2 = 0x400,
VDEC_XVID_LEVEL_AS_L3 = 0x800,
VDEC_XVID_LEVEL_AS_L4 = 0x1000
};
enum vdec_h263profile {
VDEC_H263ProfileBaseline = 0x01,
VDEC_H263ProfileH320Coding = 0x02,
VDEC_H263ProfileBackwardCompatible = 0x04,
VDEC_H263ProfileISWV2 = 0x08,
VDEC_H263ProfileISWV3 = 0x10,
VDEC_H263ProfileHighCompression = 0x20,
VDEC_H263ProfileInternet = 0x40,
VDEC_H263ProfileInterlace = 0x80,
VDEC_H263ProfileHighLatency = 0x100,
VDEC_H263ProfileKhronosExtensions = 0x6F000000,
VDEC_H263ProfileVendorStartUnused = 0x7F000000,
VDEC_H263ProfileMax = 0x7FFFFFFF
};
enum vdec_h263level {
VDEC_H263Level10 = 0x01,
VDEC_H263Level20 = 0x02,
VDEC_H263Level30 = 0x04,
VDEC_H263Level40 = 0x08,
VDEC_H263Level45 = 0x10,
VDEC_H263Level50 = 0x20,
VDEC_H263Level60 = 0x40,
VDEC_H263Level70 = 0x80,
VDEC_H263LevelKhronosExtensions = 0x6F000000,
VDEC_H263LevelVendorStartUnused = 0x7F000000,
VDEC_H263LevelMax = 0x7FFFFFFF
};
enum vdec_wmv_format {
VDEC_WMVFormatUnused = 0x01,
VDEC_WMVFormat7 = 0x02,
VDEC_WMVFormat8 = 0x04,
VDEC_WMVFormat9 = 0x08,
VDEC_WMFFormatKhronosExtensions = 0x6F000000,
VDEC_WMFFormatVendorStartUnused = 0x7F000000,
VDEC_WMVFormatMax = 0x7FFFFFFF
};
enum vdec_vc1_profile {
VDEC_VC1ProfileSimple = 0x1,
VDEC_VC1ProfileMain = 0x2,
VDEC_VC1ProfileAdvanced = 0x4
};
enum vdec_vc1_level {
VDEC_VC1_LEVEL_S_Low = 0x1,
VDEC_VC1_LEVEL_S_Medium = 0x2,
VDEC_VC1_LEVEL_M_Low = 0x4,
VDEC_VC1_LEVEL_M_Medium = 0x8,
VDEC_VC1_LEVEL_M_High = 0x10,
VDEC_VC1_LEVEL_A_L0 = 0x20,
VDEC_VC1_LEVEL_A_L1 = 0x40,
VDEC_VC1_LEVEL_A_L2 = 0x80,
VDEC_VC1_LEVEL_A_L3 = 0x100,
VDEC_VC1_LEVEL_A_L4 = 0x200
};
struct vdec_profile_level {
uint32_t profiles;
uint32_t levels;
};
enum vdec_interlaced_format {
VDEC_InterlaceFrameProgressive = 0x1,
VDEC_InterlaceInterleaveFrameTopFieldFirst = 0x2,
VDEC_InterlaceInterleaveFrameBottomFieldFirst = 0x4
};
#define VDEC_YUV_FORMAT_NV12_TP10_UBWC VDEC_YUV_FORMAT_NV12_TP10_UBWC
enum vdec_output_fromat {
VDEC_YUV_FORMAT_NV12 = 0x1,
VDEC_YUV_FORMAT_TILE_4x2 = 0x2,
VDEC_YUV_FORMAT_NV12_UBWC = 0x3,
VDEC_YUV_FORMAT_NV12_TP10_UBWC = 0x4
};
enum vdec_output_order {
VDEC_ORDER_DISPLAY = 0x1,
VDEC_ORDER_DECODE = 0x2
};
struct vdec_picsize {
uint32_t frame_width;
uint32_t frame_height;
uint32_t stride;
uint32_t scan_lines;
};
struct vdec_seqheader {
void * ptr_seqheader;
size_t seq_header_len;
int pmem_fd;
size_t pmem_offset;
};
struct vdec_mberror {
void * ptr_errormap;
size_t err_mapsize;
};
struct vdec_input_frameinfo {
void * bufferaddr;
size_t offset;
size_t datalen;
uint32_t flags;
int64_t timestamp;
void * client_data;
int pmem_fd;
size_t pmem_offset;
void * desc_addr;
uint32_t desc_size;
};
struct vdec_framesize {
uint32_t left;
uint32_t top;
uint32_t right;
uint32_t bottom;
};
struct vdec_aspectratioinfo {
uint32_t aspect_ratio;
uint32_t par_width;
uint32_t par_height;
};
struct vdec_sep_metadatainfo {
void * metabufaddr;
uint32_t size;
int fd;
int offset;
uint32_t buffer_size;
};
struct vdec_output_frameinfo {
void * bufferaddr;
size_t offset;
size_t len;
uint32_t flags;
int64_t time_stamp;
enum vdec_picture pic_type;
void * client_data;
void * input_frame_clientdata;
struct vdec_picsize picsize;
struct vdec_framesize framesize;
enum vdec_interlaced_format interlaced_format;
struct vdec_aspectratioinfo aspect_ratio_info;
struct vdec_sep_metadatainfo metadata_info;
};
union vdec_msgdata {
struct vdec_output_frameinfo output_frame;
void * input_frame_clientdata;
};
struct vdec_msginfo {
uint32_t status_code;
uint32_t msgcode;
union vdec_msgdata msgdata;
size_t msgdatasize;
};
struct vdec_framerate {
unsigned long fps_denominator;
unsigned long fps_numerator;
};
struct vdec_h264_mv {
size_t size;
int count;
int pmem_fd;
int offset;
};
struct vdec_mv_buff_size {
int width;
int height;
int size;
int alignment;
};
struct vdec_meta_buffers {
size_t size;
int count;
int pmem_fd;
int pmem_fd_iommu;
int offset;
};
#endif

View File

@@ -1,387 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _MSM_VIDC_ENC_H_
#define _MSM_VIDC_ENC_H_
#include <linux/types.h>
#include <linux/ioctl.h>
#define VEN_S_BASE 0x00000000
#define VEN_S_SUCCESS (VEN_S_BASE)
#define VEN_S_EFAIL (VEN_S_BASE + 1)
#define VEN_S_EFATAL (VEN_S_BASE + 2)
#define VEN_S_EBADPARAM (VEN_S_BASE + 3)
#define VEN_S_EINVALSTATE (VEN_S_BASE + 4)
#define VEN_S_ENOSWRES (VEN_S_BASE + 5)
#define VEN_S_ENOHWRES (VEN_S_BASE + 6)
#define VEN_S_EBUFFREQ (VEN_S_BASE + 7)
#define VEN_S_EINVALCMD (VEN_S_BASE + 8)
#define VEN_S_ETIMEOUT (VEN_S_BASE + 9)
#define VEN_S_ENOREATMPT (VEN_S_BASE + 10)
#define VEN_S_ENOPREREQ (VEN_S_BASE + 11)
#define VEN_S_ECMDQFULL (VEN_S_BASE + 12)
#define VEN_S_ENOTSUPP (VEN_S_BASE + 13)
#define VEN_S_ENOTIMPL (VEN_S_BASE + 14)
#define VEN_S_ENOTPMEM (VEN_S_BASE + 15)
#define VEN_S_EFLUSHED (VEN_S_BASE + 16)
#define VEN_S_EINSUFBUF (VEN_S_BASE + 17)
#define VEN_S_ESAMESTATE (VEN_S_BASE + 18)
#define VEN_S_EINVALTRANS (VEN_S_BASE + 19)
#define VEN_INTF_VER 1
#define VEN_MSG_INDICATION 0
#define VEN_MSG_INPUT_BUFFER_DONE 1
#define VEN_MSG_OUTPUT_BUFFER_DONE 2
#define VEN_MSG_NEED_OUTPUT_BUFFER 3
#define VEN_MSG_FLUSH_INPUT_DONE 4
#define VEN_MSG_FLUSH_OUTPUT_DONE 5
#define VEN_MSG_START 6
#define VEN_MSG_STOP 7
#define VEN_MSG_PAUSE 8
#define VEN_MSG_RESUME 9
#define VEN_MSG_STOP_READING_MSG 10
#define VEN_MSG_LTRUSE_FAILED 11
#define VEN_MSG_HW_OVERLOAD 12
#define VEN_MSG_MAX_CLIENTS 13
#define VEN_BUFFLAG_EOS 0x00000001
#define VEN_BUFFLAG_ENDOFFRAME 0x00000010
#define VEN_BUFFLAG_SYNCFRAME 0x00000020
#define VEN_BUFFLAG_EXTRADATA 0x00000040
#define VEN_BUFFLAG_CODECCONFIG 0x00000080
#define VEN_EXTRADATA_NONE 0x001
#define VEN_EXTRADATA_QCOMFILLER 0x002
#define VEN_EXTRADATA_SLICEINFO 0x100
#define VEN_EXTRADATA_LTRINFO 0x200
#define VEN_EXTRADATA_MBINFO 0x400
#define VEN_FRAME_TYPE_I 1
#define VEN_FRAME_TYPE_P 2
#define VEN_FRAME_TYPE_B 3
#define VEN_CODEC_MPEG4 1
#define VEN_CODEC_H264 2
#define VEN_CODEC_H263 3
#define VEN_PROFILE_MPEG4_SP 1
#define VEN_PROFILE_MPEG4_ASP 2
#define VEN_PROFILE_H264_BASELINE 3
#define VEN_PROFILE_H264_MAIN 4
#define VEN_PROFILE_H264_HIGH 5
#define VEN_PROFILE_H263_BASELINE 6
#define VEN_LEVEL_MPEG4_0 0x1
#define VEN_LEVEL_MPEG4_1 0x2
#define VEN_LEVEL_MPEG4_2 0x3
#define VEN_LEVEL_MPEG4_3 0x4
#define VEN_LEVEL_MPEG4_4 0x5
#define VEN_LEVEL_MPEG4_5 0x6
#define VEN_LEVEL_MPEG4_3b 0x7
#define VEN_LEVEL_MPEG4_6 0x8
#define VEN_LEVEL_H264_1 0x9
#define VEN_LEVEL_H264_1b 0xA
#define VEN_LEVEL_H264_1p1 0xB
#define VEN_LEVEL_H264_1p2 0xC
#define VEN_LEVEL_H264_1p3 0xD
#define VEN_LEVEL_H264_2 0xE
#define VEN_LEVEL_H264_2p1 0xF
#define VEN_LEVEL_H264_2p2 0x10
#define VEN_LEVEL_H264_3 0x11
#define VEN_LEVEL_H264_3p1 0x12
#define VEN_LEVEL_H264_3p2 0x13
#define VEN_LEVEL_H264_4 0x14
#define VEN_LEVEL_H263_10 0x15
#define VEN_LEVEL_H263_20 0x16
#define VEN_LEVEL_H263_30 0x17
#define VEN_LEVEL_H263_40 0x18
#define VEN_LEVEL_H263_45 0x19
#define VEN_LEVEL_H263_50 0x1A
#define VEN_LEVEL_H263_60 0x1B
#define VEN_LEVEL_H263_70 0x1C
#define VEN_ENTROPY_MODEL_CAVLC 1
#define VEN_ENTROPY_MODEL_CABAC 2
#define VEN_CABAC_MODEL_0 1
#define VEN_CABAC_MODEL_1 2
#define VEN_CABAC_MODEL_2 3
#define VEN_DB_DISABLE 1
#define VEN_DB_ALL_BLKG_BNDRY 2
#define VEN_DB_SKIP_SLICE_BNDRY 3
#define VEN_MSLICE_OFF 1
#define VEN_MSLICE_CNT_MB 2
#define VEN_MSLICE_CNT_BYTE 3
#define VEN_MSLICE_GOB 4
#define VEN_RC_OFF 1
#define VEN_RC_VBR_VFR 2
#define VEN_RC_VBR_CFR 3
#define VEN_RC_CBR_VFR 4
#define VEN_RC_CBR_CFR 5
#define VEN_FLUSH_INPUT 1
#define VEN_FLUSH_OUTPUT 2
#define VEN_FLUSH_ALL 3
#define VEN_INPUTFMT_NV12 1
#define VEN_INPUTFMT_NV21 2
#define VEN_INPUTFMT_NV12_16M2KA 3
#define VEN_ROTATION_0 1
#define VEN_ROTATION_90 2
#define VEN_ROTATION_180 3
#define VEN_ROTATION_270 4
#define VEN_TIMEOUT_INFINITE 0xffffffff
#define VEN_IR_OFF 1
#define VEN_IR_CYCLIC 2
#define VEN_IR_RANDOM 3
#define VEN_IOCTLBASE_NENC 0x800
#define VEN_IOCTLBASE_ENC 0x850
struct venc_ioctl_msg {
void * in;
void * out;
};
#define VEN_IOCTL_SET_INTF_VERSION _IOW(VEN_IOCTLBASE_NENC, 0, struct venc_ioctl_msg)
#define VEN_IOCTL_CMD_READ_NEXT_MSG _IOWR(VEN_IOCTLBASE_NENC, 1, struct venc_ioctl_msg)
#define VEN_IOCTL_CMD_STOP_READ_MSG _IO(VEN_IOCTLBASE_NENC, 2)
#define VEN_IOCTL_SET_INPUT_BUFFER_REQ _IOW(VEN_IOCTLBASE_NENC, 3, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_INPUT_BUFFER_REQ _IOR(VEN_IOCTLBASE_NENC, 4, struct venc_ioctl_msg)
#define VEN_IOCTL_CMD_ALLOC_INPUT_BUFFER _IOW(VEN_IOCTLBASE_NENC, 5, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_INPUT_BUFFER _IOW(VEN_IOCTLBASE_NENC, 6, struct venc_ioctl_msg)
#define VEN_IOCTL_CMD_FREE_INPUT_BUFFER _IOW(VEN_IOCTLBASE_NENC, 7, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_OUTPUT_BUFFER_REQ _IOW(VEN_IOCTLBASE_NENC, 8, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_OUTPUT_BUFFER_REQ _IOR(VEN_IOCTLBASE_NENC, 9, struct venc_ioctl_msg)
#define VEN_IOCTL_CMD_ALLOC_OUTPUT_BUFFER _IOW(VEN_IOCTLBASE_NENC, 10, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_OUTPUT_BUFFER _IOW(VEN_IOCTLBASE_NENC, 11, struct venc_ioctl_msg)
#define VEN_IOCTL_CMD_FREE_OUTPUT_BUFFER _IOW(VEN_IOCTLBASE_NENC, 12, struct venc_ioctl_msg)
#define VEN_IOCTL_CMD_START _IO(VEN_IOCTLBASE_NENC, 13)
#define VEN_IOCTL_CMD_ENCODE_FRAME _IOW(VEN_IOCTLBASE_NENC, 14, struct venc_ioctl_msg)
#define VEN_IOCTL_CMD_FILL_OUTPUT_BUFFER _IOW(VEN_IOCTLBASE_NENC, 15, struct venc_ioctl_msg)
#define VEN_IOCTL_CMD_FLUSH _IOW(VEN_IOCTLBASE_NENC, 16, struct venc_ioctl_msg)
#define VEN_IOCTL_CMD_PAUSE _IO(VEN_IOCTLBASE_NENC, 17)
#define VEN_IOCTL_CMD_RESUME _IO(VEN_IOCTLBASE_NENC, 18)
#define VEN_IOCTL_CMD_STOP _IO(VEN_IOCTLBASE_NENC, 19)
#define VEN_IOCTL_SET_RECON_BUFFER _IOW(VEN_IOCTLBASE_NENC, 20, struct venc_ioctl_msg)
#define VEN_IOCTL_FREE_RECON_BUFFER _IOW(VEN_IOCTLBASE_NENC, 21, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_RECON_BUFFER_SIZE _IOW(VEN_IOCTLBASE_NENC, 22, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_BASE_CFG _IOW(VEN_IOCTLBASE_ENC, 1, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_BASE_CFG _IOR(VEN_IOCTLBASE_ENC, 2, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_LIVE_MODE _IOW(VEN_IOCTLBASE_ENC, 3, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_LIVE_MODE _IOR(VEN_IOCTLBASE_ENC, 4, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_CODEC_PROFILE _IOW(VEN_IOCTLBASE_ENC, 5, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_CODEC_PROFILE _IOR(VEN_IOCTLBASE_ENC, 6, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_PROFILE_LEVEL _IOW(VEN_IOCTLBASE_ENC, 7, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_PROFILE_LEVEL _IOR(VEN_IOCTLBASE_ENC, 8, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_SHORT_HDR _IOW(VEN_IOCTLBASE_ENC, 9, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_SHORT_HDR _IOR(VEN_IOCTLBASE_ENC, 10, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_SESSION_QP _IOW(VEN_IOCTLBASE_ENC, 11, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_SESSION_QP _IOR(VEN_IOCTLBASE_ENC, 12, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_INTRA_PERIOD _IOW(VEN_IOCTLBASE_ENC, 13, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_INTRA_PERIOD _IOR(VEN_IOCTLBASE_ENC, 14, struct venc_ioctl_msg)
#define VEN_IOCTL_CMD_REQUEST_IFRAME _IO(VEN_IOCTLBASE_ENC, 15)
#define VEN_IOCTL_GET_CAPABILITY _IOR(VEN_IOCTLBASE_ENC, 16, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_SEQUENCE_HDR _IOR(VEN_IOCTLBASE_ENC, 17, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_ENTROPY_CFG _IOW(VEN_IOCTLBASE_ENC, 18, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_ENTROPY_CFG _IOR(VEN_IOCTLBASE_ENC, 19, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_DEBLOCKING_CFG _IOW(VEN_IOCTLBASE_ENC, 20, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_DEBLOCKING_CFG _IOR(VEN_IOCTLBASE_ENC, 21, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_INTRA_REFRESH _IOW(VEN_IOCTLBASE_ENC, 22, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_INTRA_REFRESH _IOR(VEN_IOCTLBASE_ENC, 23, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_MULTI_SLICE_CFG _IOW(VEN_IOCTLBASE_ENC, 24, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_MULTI_SLICE_CFG _IOR(VEN_IOCTLBASE_ENC, 25, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_RATE_CTRL_CFG _IOW(VEN_IOCTLBASE_ENC, 26, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_RATE_CTRL_CFG _IOR(VEN_IOCTLBASE_ENC, 27, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_VOP_TIMING_CFG _IOW(VEN_IOCTLBASE_ENC, 28, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_VOP_TIMING_CFG _IOR(VEN_IOCTLBASE_ENC, 29, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_FRAME_RATE _IOW(VEN_IOCTLBASE_ENC, 30, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_FRAME_RATE _IOR(VEN_IOCTLBASE_ENC, 31, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_TARGET_BITRATE _IOW(VEN_IOCTLBASE_ENC, 32, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_TARGET_BITRATE _IOR(VEN_IOCTLBASE_ENC, 33, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_ROTATION _IOW(VEN_IOCTLBASE_ENC, 34, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_ROTATION _IOR(VEN_IOCTLBASE_ENC, 35, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_HEC _IOW(VEN_IOCTLBASE_ENC, 36, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_HEC _IOR(VEN_IOCTLBASE_ENC, 37, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_DATA_PARTITION _IOW(VEN_IOCTLBASE_ENC, 38, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_DATA_PARTITION _IOR(VEN_IOCTLBASE_ENC, 39, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_RVLC _IOW(VEN_IOCTLBASE_ENC, 40, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_RVLC _IOR(VEN_IOCTLBASE_ENC, 41, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_AC_PREDICTION _IOW(VEN_IOCTLBASE_ENC, 42, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_AC_PREDICTION _IOR(VEN_IOCTLBASE_ENC, 43, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_QP_RANGE _IOW(VEN_IOCTLBASE_ENC, 44, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_QP_RANGE _IOR(VEN_IOCTLBASE_ENC, 45, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_NUMBER_INSTANCES _IOR(VEN_IOCTLBASE_ENC, 46, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_METABUFFER_MODE _IOW(VEN_IOCTLBASE_ENC, 47, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_EXTRADATA _IOW(VEN_IOCTLBASE_ENC, 48, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_EXTRADATA _IOR(VEN_IOCTLBASE_ENC, 49, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_SLICE_DELIVERY_MODE _IO(VEN_IOCTLBASE_ENC, 50)
#define VEN_IOCTL_SET_H263_PLUSPTYPE _IOW(VEN_IOCTLBASE_ENC, 51, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_CAPABILITY_LTRCOUNT _IOW(VEN_IOCTLBASE_ENC, 52, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_CAPABILITY_LTRCOUNT _IOR(VEN_IOCTLBASE_ENC, 53, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_LTRMODE _IOW(VEN_IOCTLBASE_ENC, 54, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_LTRMODE _IOR(VEN_IOCTLBASE_ENC, 55, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_LTRCOUNT _IOW(VEN_IOCTLBASE_ENC, 56, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_LTRCOUNT _IOR(VEN_IOCTLBASE_ENC, 57, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_LTRPERIOD _IOW(VEN_IOCTLBASE_ENC, 58, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_LTRPERIOD _IOR(VEN_IOCTLBASE_ENC, 59, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_LTRUSE _IOW(VEN_IOCTLBASE_ENC, 60, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_LTRUSE _IOR(VEN_IOCTLBASE_ENC, 61, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_LTRMARK _IOW(VEN_IOCTLBASE_ENC, 62, struct venc_ioctl_msg)
#define VEN_IOCTL_GET_LTRMARK _IOR(VEN_IOCTLBASE_ENC, 63, struct venc_ioctl_msg)
#define VEN_IOCTL_SET_SPS_PPS_FOR_IDR _IOW(VEN_IOCTLBASE_ENC, 64, struct venc_ioctl_msg)
struct venc_range {
unsigned long max;
unsigned long min;
unsigned long step_size;
};
struct venc_switch {
unsigned char status;
};
struct venc_allocatorproperty {
unsigned long mincount;
unsigned long maxcount;
unsigned long actualcount;
unsigned long datasize;
unsigned long suffixsize;
unsigned long alignment;
unsigned long bufpoolid;
};
struct venc_bufferpayload {
unsigned char * pbuffer;
size_t sz;
int fd;
unsigned int offset;
unsigned int maped_size;
unsigned long filled_len;
};
struct venc_buffer {
unsigned char * ptrbuffer;
unsigned long sz;
unsigned long len;
unsigned long offset;
long long timestamp;
unsigned long flags;
void * clientdata;
};
struct venc_basecfg {
unsigned long input_width;
unsigned long input_height;
unsigned long dvs_width;
unsigned long dvs_height;
unsigned long codectype;
unsigned long fps_num;
unsigned long fps_den;
unsigned long targetbitrate;
unsigned long inputformat;
};
struct venc_profile {
unsigned long profile;
};
struct ven_profilelevel {
unsigned long level;
};
struct venc_sessionqp {
unsigned long iframeqp;
unsigned long pframqp;
};
struct venc_qprange {
unsigned long maxqp;
unsigned long minqp;
};
struct venc_plusptype {
unsigned long plusptype_enable;
};
struct venc_intraperiod {
unsigned long num_pframes;
unsigned long num_bframes;
};
struct venc_seqheader {
unsigned char * hdrbufptr;
unsigned long bufsize;
unsigned long hdrlen;
};
struct venc_capability {
unsigned long codec_types;
unsigned long maxframe_width;
unsigned long maxframe_height;
unsigned long maxtarget_bitrate;
unsigned long maxframe_rate;
unsigned long input_formats;
unsigned char dvs;
};
struct venc_entropycfg {
unsigned int longentropysel;
unsigned long cabacmodel;
};
struct venc_dbcfg {
unsigned long db_mode;
unsigned long slicealpha_offset;
unsigned long slicebeta_offset;
};
struct venc_intrarefresh {
unsigned long irmode;
unsigned long mbcount;
};
struct venc_multiclicecfg {
unsigned long mslice_mode;
unsigned long mslice_size;
};
struct venc_bufferflush {
unsigned long flush_mode;
};
struct venc_ratectrlcfg {
unsigned long rcmode;
};
struct venc_voptimingcfg {
unsigned long voptime_resolution;
};
struct venc_framerate {
unsigned long fps_denominator;
unsigned long fps_numerator;
};
struct venc_targetbitrate {
unsigned long target_bitrate;
};
struct venc_rotation {
unsigned long rotation;
};
struct venc_timeout {
unsigned long millisec;
};
struct venc_headerextension {
unsigned long header_extension;
};
struct venc_msg {
unsigned long statuscode;
unsigned long msgcode;
struct venc_buffer buf;
unsigned long msgdata_size;
};
struct venc_recon_addr {
unsigned char * pbuffer;
unsigned long buffer_size;
unsigned long pmem_fd;
unsigned long offset;
};
struct venc_recon_buff_size {
int width;
int height;
int size;
int alignment;
};
struct venc_ltrmode {
unsigned long ltr_mode;
};
struct venc_ltrcount {
unsigned long ltr_count;
};
struct venc_ltrperiod {
unsigned long ltr_period;
};
struct venc_ltruse {
unsigned long ltr_id;
unsigned long ltr_frames;
};
#endif

View File

@@ -1,214 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _QSEECOM_H_
#define _QSEECOM_H_
#include <linux/types.h>
#include <linux/ioctl.h>
#define MAX_ION_FD 4
#define MAX_APP_NAME_SIZE 64
#define QSEECOM_HASH_SIZE 32
#define QSEECOM_TA_ION_ALLOCATE_DELAY 50
#define QSEECOM_TA_ION_ALLOCATE_MAX_ATTEMP 20
struct qseecom_register_listener_req {
uint32_t listener_id;
int32_t ifd_data_fd;
void * virt_sb_base;
uint32_t sb_size;
};
struct qseecom_send_cmd_req {
void * cmd_req_buf;
unsigned int cmd_req_len;
void * resp_buf;
unsigned int resp_len;
};
struct qseecom_ion_fd_info {
int32_t fd;
uint32_t cmd_buf_offset;
};
struct qseecom_send_modfd_cmd_req {
void * cmd_req_buf;
unsigned int cmd_req_len;
void * resp_buf;
unsigned int resp_len;
struct qseecom_ion_fd_info ifd_data[MAX_ION_FD];
};
struct qseecom_send_resp_req {
void * resp_buf;
unsigned int resp_len;
};
struct qseecom_load_img_req {
uint32_t mdt_len;
uint32_t img_len;
int32_t ifd_data_fd;
char img_name[MAX_APP_NAME_SIZE];
uint32_t app_arch;
uint32_t app_id;
};
struct qseecom_set_sb_mem_param_req {
int32_t ifd_data_fd;
void * virt_sb_base;
uint32_t sb_len;
};
struct qseecom_qseos_version_req {
unsigned int qseos_version;
};
struct qseecom_qseos_app_load_query {
char app_name[MAX_APP_NAME_SIZE];
uint32_t app_id;
uint32_t app_arch;
};
struct qseecom_send_svc_cmd_req {
uint32_t cmd_id;
void * cmd_req_buf;
unsigned int cmd_req_len;
void * resp_buf;
unsigned int resp_len;
};
enum qseecom_key_management_usage_type {
QSEOS_KM_USAGE_DISK_ENCRYPTION = 0x01,
QSEOS_KM_USAGE_FILE_ENCRYPTION = 0x02,
QSEOS_KM_USAGE_UFS_ICE_DISK_ENCRYPTION = 0x03,
QSEOS_KM_USAGE_SDCC_ICE_DISK_ENCRYPTION = 0x04,
QSEOS_KM_USAGE_MAX
};
struct qseecom_create_key_req {
unsigned char hash32[QSEECOM_HASH_SIZE];
enum qseecom_key_management_usage_type usage;
};
struct qseecom_wipe_key_req {
enum qseecom_key_management_usage_type usage;
int wipe_key_flag;
};
struct qseecom_update_key_userinfo_req {
unsigned char current_hash32[QSEECOM_HASH_SIZE];
unsigned char new_hash32[QSEECOM_HASH_SIZE];
enum qseecom_key_management_usage_type usage;
};
#define SHA256_DIGEST_LENGTH (256 / 8)
struct qseecom_save_partition_hash_req {
int partition_id;
char digest[SHA256_DIGEST_LENGTH];
};
struct qseecom_is_es_activated_req {
int is_activated;
};
struct qseecom_mdtp_cipher_dip_req {
uint8_t * in_buf;
uint32_t in_buf_size;
uint8_t * out_buf;
uint32_t out_buf_size;
uint32_t direction;
};
enum qseecom_bandwidth_request_mode {
INACTIVE = 0,
LOW,
MEDIUM,
HIGH,
};
struct qseecom_send_modfd_listener_resp {
void * resp_buf_ptr;
unsigned int resp_len;
struct qseecom_ion_fd_info ifd_data[MAX_ION_FD];
};
struct qseecom_qteec_req {
void * req_ptr;
uint32_t req_len;
void * resp_ptr;
uint32_t resp_len;
};
struct qseecom_qteec_modfd_req {
void * req_ptr;
uint32_t req_len;
void * resp_ptr;
uint32_t resp_len;
struct qseecom_ion_fd_info ifd_data[MAX_ION_FD];
};
struct qseecom_sg_entry {
uint32_t phys_addr;
uint32_t len;
};
struct qseecom_sg_entry_64bit {
uint64_t phys_addr;
uint32_t len;
} __attribute__((packed));
#define QSEECOM_SG_LIST_BUF_FORMAT_VERSION_1 1
#define QSEECOM_SG_LIST_BUF_FORMAT_VERSION_2 2
struct qseecom_sg_list_buf_hdr_64bit {
struct qseecom_sg_entry_64bit blank_entry;
uint32_t version;
uint64_t new_buf_phys_addr;
uint32_t nents_total;
} __attribute__((packed));
#define QSEECOM_SG_LIST_BUF_HDR_SZ_64BIT sizeof(struct qseecom_sg_list_buf_hdr_64bit)
#define MAX_CE_PIPE_PAIR_PER_UNIT 3
#define INVALID_CE_INFO_UNIT_NUM 0xffffffff
#define CE_PIPE_PAIR_USE_TYPE_FDE 0
#define CE_PIPE_PAIR_USE_TYPE_PFE 1
struct qseecom_ce_pipe_entry {
int valid;
unsigned int ce_num;
unsigned int ce_pipe_pair;
};
#define MAX_CE_INFO_HANDLE_SIZE 32
struct qseecom_ce_info_req {
unsigned char handle[MAX_CE_INFO_HANDLE_SIZE];
unsigned int usage;
unsigned int unit_num;
unsigned int num_ce_pipe_entries;
struct qseecom_ce_pipe_entry ce_pipe_entry[MAX_CE_PIPE_PAIR_PER_UNIT];
};
#define SG_ENTRY_SZ sizeof(struct qseecom_sg_entry)
#define SG_ENTRY_SZ_64BIT sizeof(struct qseecom_sg_entry_64bit)
struct file;
#define QSEECOM_IOC_MAGIC 0x97
#define QSEECOM_IOCTL_REGISTER_LISTENER_REQ _IOWR(QSEECOM_IOC_MAGIC, 1, struct qseecom_register_listener_req)
#define QSEECOM_IOCTL_UNREGISTER_LISTENER_REQ _IO(QSEECOM_IOC_MAGIC, 2)
#define QSEECOM_IOCTL_SEND_CMD_REQ _IOWR(QSEECOM_IOC_MAGIC, 3, struct qseecom_send_cmd_req)
#define QSEECOM_IOCTL_SEND_MODFD_CMD_REQ _IOWR(QSEECOM_IOC_MAGIC, 4, struct qseecom_send_modfd_cmd_req)
#define QSEECOM_IOCTL_RECEIVE_REQ _IO(QSEECOM_IOC_MAGIC, 5)
#define QSEECOM_IOCTL_SEND_RESP_REQ _IO(QSEECOM_IOC_MAGIC, 6)
#define QSEECOM_IOCTL_LOAD_APP_REQ _IOWR(QSEECOM_IOC_MAGIC, 7, struct qseecom_load_img_req)
#define QSEECOM_IOCTL_SET_MEM_PARAM_REQ _IOWR(QSEECOM_IOC_MAGIC, 8, struct qseecom_set_sb_mem_param_req)
#define QSEECOM_IOCTL_UNLOAD_APP_REQ _IO(QSEECOM_IOC_MAGIC, 9)
#define QSEECOM_IOCTL_GET_QSEOS_VERSION_REQ _IOWR(QSEECOM_IOC_MAGIC, 10, struct qseecom_qseos_version_req)
#define QSEECOM_IOCTL_PERF_ENABLE_REQ _IO(QSEECOM_IOC_MAGIC, 11)
#define QSEECOM_IOCTL_PERF_DISABLE_REQ _IO(QSEECOM_IOC_MAGIC, 12)
#define QSEECOM_IOCTL_LOAD_EXTERNAL_ELF_REQ _IOWR(QSEECOM_IOC_MAGIC, 13, struct qseecom_load_img_req)
#define QSEECOM_IOCTL_UNLOAD_EXTERNAL_ELF_REQ _IO(QSEECOM_IOC_MAGIC, 14)
#define QSEECOM_IOCTL_APP_LOADED_QUERY_REQ _IOWR(QSEECOM_IOC_MAGIC, 15, struct qseecom_qseos_app_load_query)
#define QSEECOM_IOCTL_SEND_CMD_SERVICE_REQ _IOWR(QSEECOM_IOC_MAGIC, 16, struct qseecom_send_svc_cmd_req)
#define QSEECOM_IOCTL_CREATE_KEY_REQ _IOWR(QSEECOM_IOC_MAGIC, 17, struct qseecom_create_key_req)
#define QSEECOM_IOCTL_WIPE_KEY_REQ _IOWR(QSEECOM_IOC_MAGIC, 18, struct qseecom_wipe_key_req)
#define QSEECOM_IOCTL_SAVE_PARTITION_HASH_REQ _IOWR(QSEECOM_IOC_MAGIC, 19, struct qseecom_save_partition_hash_req)
#define QSEECOM_IOCTL_IS_ES_ACTIVATED_REQ _IOWR(QSEECOM_IOC_MAGIC, 20, struct qseecom_is_es_activated_req)
#define QSEECOM_IOCTL_SEND_MODFD_RESP _IOWR(QSEECOM_IOC_MAGIC, 21, struct qseecom_send_modfd_listener_resp)
#define QSEECOM_IOCTL_SET_BUS_SCALING_REQ _IOWR(QSEECOM_IOC_MAGIC, 23, int)
#define QSEECOM_IOCTL_UPDATE_KEY_USER_INFO_REQ _IOWR(QSEECOM_IOC_MAGIC, 24, struct qseecom_update_key_userinfo_req)
#define QSEECOM_QTEEC_IOCTL_OPEN_SESSION_REQ _IOWR(QSEECOM_IOC_MAGIC, 30, struct qseecom_qteec_modfd_req)
#define QSEECOM_QTEEC_IOCTL_CLOSE_SESSION_REQ _IOWR(QSEECOM_IOC_MAGIC, 31, struct qseecom_qteec_req)
#define QSEECOM_QTEEC_IOCTL_INVOKE_MODFD_CMD_REQ _IOWR(QSEECOM_IOC_MAGIC, 32, struct qseecom_qteec_modfd_req)
#define QSEECOM_QTEEC_IOCTL_REQUEST_CANCELLATION_REQ _IOWR(QSEECOM_IOC_MAGIC, 33, struct qseecom_qteec_modfd_req)
#define QSEECOM_IOCTL_MDTP_CIPHER_DIP_REQ _IOWR(QSEECOM_IOC_MAGIC, 34, struct qseecom_mdtp_cipher_dip_req)
#define QSEECOM_IOCTL_SEND_MODFD_CMD_64_REQ _IOWR(QSEECOM_IOC_MAGIC, 35, struct qseecom_send_modfd_cmd_req)
#define QSEECOM_IOCTL_SEND_MODFD_RESP_64 _IOWR(QSEECOM_IOC_MAGIC, 36, struct qseecom_send_modfd_listener_resp)
#define QSEECOM_IOCTL_GET_CE_PIPE_INFO _IOWR(QSEECOM_IOC_MAGIC, 40, struct qseecom_ce_info_req)
#define QSEECOM_IOCTL_FREE_CE_PIPE_INFO _IOWR(QSEECOM_IOC_MAGIC, 41, struct qseecom_ce_info_req)
#define QSEECOM_IOCTL_QUERY_CE_PIPE_INFO _IOWR(QSEECOM_IOC_MAGIC, 42, struct qseecom_ce_info_req)
#endif

View File

@@ -1,115 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _RMNET_DATA_H_
#define _RMNET_DATA_H_
#define RMNET_LOCAL_LOGICAL_ENDPOINT - 1
#define RMNET_EGRESS_FORMAT__RESERVED__ (1 << 0)
#define RMNET_EGRESS_FORMAT_MAP (1 << 1)
#define RMNET_EGRESS_FORMAT_AGGREGATION (1 << 2)
#define RMNET_EGRESS_FORMAT_MUXING (1 << 3)
#define RMNET_EGRESS_FORMAT_MAP_CKSUMV3 (1 << 4)
#define RMNET_EGRESS_FORMAT_MAP_CKSUMV4 (1 << 5)
#define RMNET_INGRESS_FIX_ETHERNET (1 << 0)
#define RMNET_INGRESS_FORMAT_MAP (1 << 1)
#define RMNET_INGRESS_FORMAT_DEAGGREGATION (1 << 2)
#define RMNET_INGRESS_FORMAT_DEMUXING (1 << 3)
#define RMNET_INGRESS_FORMAT_MAP_COMMANDS (1 << 4)
#define RMNET_INGRESS_FORMAT_MAP_CKSUMV3 (1 << 5)
#define RMNET_INGRESS_FORMAT_MAP_CKSUMV4 (1 << 6)
#define RMNET_NETLINK_PROTO 31
#define RMNET_MAX_STR_LEN 16
#define RMNET_NL_DATA_MAX_LEN 64
#define RMNET_NETLINK_MSG_COMMAND 0
#define RMNET_NETLINK_MSG_RETURNCODE 1
#define RMNET_NETLINK_MSG_RETURNDATA 2
struct rmnet_nl_msg_s {
uint16_t reserved;
uint16_t message_type;
uint16_t reserved2 : 14;
uint16_t crd : 2;
union {
uint16_t arg_length;
uint16_t return_code;
};
union {
uint8_t data[RMNET_NL_DATA_MAX_LEN];
struct {
uint8_t dev[RMNET_MAX_STR_LEN];
uint32_t flags;
uint16_t agg_size;
uint16_t agg_count;
uint8_t tail_spacing;
} data_format;
struct {
uint8_t dev[RMNET_MAX_STR_LEN];
int32_t ep_id;
uint8_t operating_mode;
uint8_t next_dev[RMNET_MAX_STR_LEN];
} local_ep_config;
struct {
uint32_t id;
uint8_t vnd_name[RMNET_MAX_STR_LEN];
} vnd;
struct {
uint32_t id;
uint32_t map_flow_id;
uint32_t tc_flow_id;
} flow_control;
};
};
enum rmnet_netlink_message_types_e {
RMNET_NETLINK_ASSOCIATE_NETWORK_DEVICE,
RMNET_NETLINK_UNASSOCIATE_NETWORK_DEVICE,
RMNET_NETLINK_GET_NETWORK_DEVICE_ASSOCIATED,
RMNET_NETLINK_SET_LINK_EGRESS_DATA_FORMAT,
RMNET_NETLINK_GET_LINK_EGRESS_DATA_FORMAT,
RMNET_NETLINK_SET_LINK_INGRESS_DATA_FORMAT,
RMNET_NETLINK_GET_LINK_INGRESS_DATA_FORMAT,
RMNET_NETLINK_SET_LOGICAL_EP_CONFIG,
RMNET_NETLINK_UNSET_LOGICAL_EP_CONFIG,
RMNET_NETLINK_GET_LOGICAL_EP_CONFIG,
RMNET_NETLINK_NEW_VND,
RMNET_NETLINK_NEW_VND_WITH_PREFIX,
RMNET_NETLINK_GET_VND_NAME,
RMNET_NETLINK_FREE_VND,
RMNET_NETLINK_ADD_VND_TC_FLOW,
RMNET_NETLINK_DEL_VND_TC_FLOW,
RMNET_NETLINK_NEW_VND_WITH_NAME
};
#define RMNET_NETLINK_NEW_VND_WITH_NAME RMNET_NETLINK_NEW_VND_WITH_NAME
enum rmnet_config_endpoint_modes_e {
RMNET_EPMODE_NONE,
RMNET_EPMODE_VND,
RMNET_EPMODE_BRIDGE,
RMNET_EPMODE_LENGTH
};
enum rmnet_config_return_codes_e {
RMNET_CONFIG_OK,
RMNET_CONFIG_UNKNOWN_MESSAGE,
RMNET_CONFIG_UNKNOWN_ERROR,
RMNET_CONFIG_NOMEM,
RMNET_CONFIG_DEVICE_IN_USE,
RMNET_CONFIG_INVALID_REQUEST,
RMNET_CONFIG_NO_SUCH_DEVICE,
RMNET_CONFIG_BAD_ARGUMENTS,
RMNET_CONFIG_BAD_EGRESS_DEVICE,
RMNET_CONFIG_TC_HANDLE_FULL
};
#endif

View File

@@ -1,140 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _RMNET_IPA_FD_IOCTL_H
#define _RMNET_IPA_FD_IOCTL_H
#include <linux/ioctl.h>
#include <linux/ipa_qmi_service_v01.h>
#include <linux/msm_ipa.h>
#define WAN_IOC_MAGIC 0x69
#define WAN_IOCTL_ADD_FLT_RULE 0
#define WAN_IOCTL_ADD_FLT_INDEX 1
#define WAN_IOCTL_VOTE_FOR_BW_MBPS 2
#define WAN_IOCTL_POLL_TETHERING_STATS 3
#define WAN_IOCTL_SET_DATA_QUOTA 4
#define WAN_IOCTL_SET_TETHER_CLIENT_PIPE 5
#define WAN_IOCTL_QUERY_TETHER_STATS 6
#define WAN_IOCTL_RESET_TETHER_STATS 7
#define WAN_IOCTL_QUERY_DL_FILTER_STATS 8
#define WAN_IOCTL_ADD_FLT_RULE_EX 9
#define WAN_IOCTL_QUERY_TETHER_STATS_ALL 10
#define WAN_IOCTL_NOTIFY_WAN_STATE 11
#define WAN_IOCTL_ADD_UL_FLT_RULE 12
#define WAN_IOCTL_ENABLE_PER_CLIENT_STATS 13
#define WAN_IOCTL_QUERY_PER_CLIENT_STATS 14
#define WAN_IOCTL_SET_LAN_CLIENT_INFO 15
#define WAN_IOCTL_CLEAR_LAN_CLIENT_INFO 16
#define WAN_IOCTL_SEND_LAN_CLIENT_MSG 17
#ifndef IFNAMSIZ
#define IFNAMSIZ 16
#endif
struct wan_ioctl_poll_tethering_stats {
uint64_t polling_interval_secs;
uint8_t reset_stats;
};
struct wan_ioctl_set_data_quota {
char interface_name[IFNAMSIZ];
uint64_t quota_mbytes;
uint8_t set_quota;
};
struct wan_ioctl_set_tether_client_pipe {
enum ipacm_client_enum ipa_client;
uint8_t reset_client;
uint32_t ul_src_pipe_len;
uint32_t ul_src_pipe_list[QMI_IPA_MAX_PIPES_V01];
uint32_t dl_dst_pipe_len;
uint32_t dl_dst_pipe_list[QMI_IPA_MAX_PIPES_V01];
};
struct wan_ioctl_query_tether_stats {
char upstreamIface[IFNAMSIZ];
char tetherIface[IFNAMSIZ];
enum ipacm_client_enum ipa_client;
uint64_t ipv4_tx_packets;
uint64_t ipv4_tx_bytes;
uint64_t ipv4_rx_packets;
uint64_t ipv4_rx_bytes;
uint64_t ipv6_tx_packets;
uint64_t ipv6_tx_bytes;
uint64_t ipv6_rx_packets;
uint64_t ipv6_rx_bytes;
};
struct wan_ioctl_query_tether_stats_all {
char upstreamIface[IFNAMSIZ];
enum ipacm_client_enum ipa_client;
uint8_t reset_stats;
uint64_t tx_bytes;
uint64_t rx_bytes;
};
struct wan_ioctl_reset_tether_stats {
char upstreamIface[IFNAMSIZ];
uint8_t reset_stats;
};
struct wan_ioctl_query_dl_filter_stats {
uint8_t reset_stats;
struct ipa_get_data_stats_resp_msg_v01 stats_resp;
uint32_t index;
};
struct wan_ioctl_notify_wan_state {
uint8_t up;
};
struct wan_ioctl_send_lan_client_msg {
struct ipa_lan_client_msg lan_client;
enum ipa_per_client_stats_event client_event;
};
struct wan_ioctl_lan_client_info {
enum ipacm_per_client_device_type device_type;
uint8_t mac[IPA_MAC_ADDR_SIZE];
uint8_t client_init;
int8_t client_idx;
uint8_t hdr_len;
enum ipa_client_type ul_src_pipe;
};
struct wan_ioctl_per_client_info {
uint8_t mac[IPA_MAC_ADDR_SIZE];
uint64_t ipv4_tx_bytes;
uint64_t ipv4_rx_bytes;
uint64_t ipv6_tx_bytes;
uint64_t ipv6_rx_bytes;
};
struct wan_ioctl_query_per_client_stats {
enum ipacm_per_client_device_type device_type;
uint8_t reset_stats;
uint8_t disconnect_clnt;
uint8_t num_clients;
struct wan_ioctl_per_client_info client_info[IPA_MAX_NUM_HW_PATH_CLIENTS];
};
#define WAN_IOC_ADD_FLT_RULE _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_ADD_FLT_RULE, struct ipa_install_fltr_rule_req_msg_v01 *)
#define WAN_IOC_ADD_FLT_RULE_INDEX _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_ADD_FLT_INDEX, struct ipa_fltr_installed_notif_req_msg_v01 *)
#define WAN_IOC_VOTE_FOR_BW_MBPS _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_VOTE_FOR_BW_MBPS, uint32_t *)
#define WAN_IOC_POLL_TETHERING_STATS _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_POLL_TETHERING_STATS, struct wan_ioctl_poll_tethering_stats *)
#define WAN_IOC_SET_DATA_QUOTA _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_SET_DATA_QUOTA, struct wan_ioctl_set_data_quota *)
#define WAN_IOC_SET_TETHER_CLIENT_PIPE _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_SET_TETHER_CLIENT_PIPE, struct wan_ioctl_set_tether_client_pipe *)
#define WAN_IOC_QUERY_TETHER_STATS _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_QUERY_TETHER_STATS, struct wan_ioctl_query_tether_stats *)
#define WAN_IOC_RESET_TETHER_STATS _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_RESET_TETHER_STATS, struct wan_ioctl_reset_tether_stats *)
#define WAN_IOC_QUERY_DL_FILTER_STATS _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_QUERY_DL_FILTER_STATS, struct wan_ioctl_query_dl_filter_stats *)
#define WAN_IOC_ADD_FLT_RULE_EX _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_ADD_FLT_RULE_EX, struct ipa_install_fltr_rule_req_ex_msg_v01 *)
#define WAN_IOC_QUERY_TETHER_STATS_ALL _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_QUERY_TETHER_STATS_ALL, struct wan_ioctl_query_tether_stats_all *)
#define WAN_IOC_NOTIFY_WAN_STATE _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_NOTIFY_WAN_STATE, struct wan_ioctl_notify_wan_state *)
#define WAN_IOC_ADD_UL_FLT_RULE _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_ADD_UL_FLT_RULE, struct ipa_configure_ul_firewall_rules_req_msg_v01 *)
#define WAN_IOC_ENABLE_PER_CLIENT_STATS _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_ENABLE_PER_CLIENT_STATS, bool *)
#define WAN_IOC_QUERY_PER_CLIENT_STATS _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_QUERY_PER_CLIENT_STATS, struct wan_ioctl_query_per_client_stats *)
#define WAN_IOC_SET_LAN_CLIENT_INFO _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_SET_LAN_CLIENT_INFO, struct wan_ioctl_lan_client_info *)
#define WAN_IOC_SEND_LAN_CLIENT_MSG _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_SEND_LAN_CLIENT_MSG, struct wan_ioctl_send_lan_client_msg *)
#define WAN_IOC_CLEAR_LAN_CLIENT_INFO _IOWR(WAN_IOC_MAGIC, WAN_IOCTL_CLEAR_LAN_CLIENT_INFO, struct wan_ioctl_lan_client_info *)
#endif

View File

@@ -1,40 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _SOCKEV_H_
#define _SOCKEV_H_
#include <linux/types.h>
#include <linux/netlink.h>
#include <linux/socket.h>
enum sknetlink_groups {
SKNLGRP_UNICAST,
SKNLGRP_SOCKEV,
__SKNLGRP_MAX
};
#define SOCKEV_STR_MAX 32
struct sknlsockevmsg {
__u8 event[SOCKEV_STR_MAX];
__u32 pid;
__u16 skfamily;
__u8 skstate;
__u8 skprotocol;
__u16 sktype;
__u64 skflags;
};
#endif

View File

@@ -1,99 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _LINUX_SOCKIOS_H
#define _LINUX_SOCKIOS_H
#include <asm/sockios.h>
#define SIOCINQ FIONREAD
#define SIOCOUTQ TIOCOUTQ
#define SIOCADDRT 0x890B
#define SIOCDELRT 0x890C
#define SIOCRTMSG 0x890D
#define SIOCGIFNAME 0x8910
#define SIOCSIFLINK 0x8911
#define SIOCGIFCONF 0x8912
#define SIOCGIFFLAGS 0x8913
#define SIOCSIFFLAGS 0x8914
#define SIOCGIFADDR 0x8915
#define SIOCSIFADDR 0x8916
#define SIOCGIFDSTADDR 0x8917
#define SIOCSIFDSTADDR 0x8918
#define SIOCGIFBRDADDR 0x8919
#define SIOCSIFBRDADDR 0x891a
#define SIOCGIFNETMASK 0x891b
#define SIOCSIFNETMASK 0x891c
#define SIOCGIFMETRIC 0x891d
#define SIOCSIFMETRIC 0x891e
#define SIOCGIFMEM 0x891f
#define SIOCSIFMEM 0x8920
#define SIOCGIFMTU 0x8921
#define SIOCSIFMTU 0x8922
#define SIOCSIFNAME 0x8923
#define SIOCSIFHWADDR 0x8924
#define SIOCGIFENCAP 0x8925
#define SIOCSIFENCAP 0x8926
#define SIOCGIFHWADDR 0x8927
#define SIOCGIFSLAVE 0x8929
#define SIOCSIFSLAVE 0x8930
#define SIOCADDMULTI 0x8931
#define SIOCDELMULTI 0x8932
#define SIOCGIFINDEX 0x8933
#define SIOGIFINDEX SIOCGIFINDEX
#define SIOCSIFPFLAGS 0x8934
#define SIOCGIFPFLAGS 0x8935
#define SIOCDIFADDR 0x8936
#define SIOCSIFHWBROADCAST 0x8937
#define SIOCGIFCOUNT 0x8938
#define SIOCGIFBR 0x8940
#define SIOCSIFBR 0x8941
#define SIOCGIFTXQLEN 0x8942
#define SIOCSIFTXQLEN 0x8943
#define SIOCETHTOOL 0x8946
#define SIOCGMIIPHY 0x8947
#define SIOCGMIIREG 0x8948
#define SIOCSMIIREG 0x8949
#define SIOCWANDEV 0x894A
#define SIOCOUTQNSD 0x894B
#define SIOCDARP 0x8953
#define SIOCGARP 0x8954
#define SIOCSARP 0x8955
#define SIOCDRARP 0x8960
#define SIOCGRARP 0x8961
#define SIOCSRARP 0x8962
#define SIOCGIFMAP 0x8970
#define SIOCSIFMAP 0x8971
#define SIOCADDDLCI 0x8980
#define SIOCDELDLCI 0x8981
#define SIOCGIFVLAN 0x8982
#define SIOCSIFVLAN 0x8983
#define SIOCBONDENSLAVE 0x8990
#define SIOCBONDRELEASE 0x8991
#define SIOCBONDSETHWADDR 0x8992
#define SIOCBONDSLAVEINFOQUERY 0x8993
#define SIOCBONDINFOQUERY 0x8994
#define SIOCBONDCHANGEACTIVE 0x8995
#define SIOCBRADDBR 0x89a0
#define SIOCBRDELBR 0x89a1
#define SIOCBRADDIF 0x89a2
#define SIOCBRDELIF 0x89a3
#define SIOCSHWTSTAMP 0x89b0
#define SIOCGHWTSTAMP 0x89b1
#define SIOCDEVPRIVATE 0x89F0
#define SIOCPROTOPRIVATE 0x89E0
#endif

View File

@@ -1,78 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _SPCOM_H_
#define _SPCOM_H_
#include <linux/types.h>
#ifndef BIT
#define BIT(x) (1 << x)
#endif
#ifndef PAGE_SIZE
#define PAGE_SIZE 4096
#endif
#define SPCOM_MAX_CHANNELS 0x20
#define SPCOM_CHANNEL_NAME_SIZE 32
#define SPCOM_GET_NEXT_REQUEST_SIZE (PAGE_SIZE - 1)
enum spcom_cmd_id {
SPCOM_CMD_LOAD_APP = 0x4C4F4144,
SPCOM_CMD_RESET_SP = 0x52455354,
SPCOM_CMD_SEND = 0x53454E44,
SPCOM_CMD_SEND_MODIFIED = 0x534E444D,
SPCOM_CMD_LOCK_ION_BUF = 0x4C4F434B,
SPCOM_CMD_UNLOCK_ION_BUF = 0x554C434B,
SPCOM_CMD_FSSR = 0x46535352,
SPCOM_CMD_CREATE_CHANNEL = 0x43524554,
};
enum spcom_poll_events {
SPCOM_POLL_LINK_STATE = BIT(1),
SPCOM_POLL_CH_CONNECT = BIT(2),
SPCOM_POLL_READY_FLAG = BIT(14),
SPCOM_POLL_WAIT_FLAG = BIT(15),
};
struct spcom_user_command {
enum spcom_cmd_id cmd_id;
uint32_t arg;
} __attribute__((packed));
struct spcom_send_command {
enum spcom_cmd_id cmd_id;
uint32_t timeout_msec;
uint32_t buf_size;
char buf[0];
} __attribute__((packed));
struct spcom_user_create_channel_command {
enum spcom_cmd_id cmd_id;
char ch_name[SPCOM_CHANNEL_NAME_SIZE];
} __attribute__((packed));
#define SPCOM_MAX_ION_BUF 4
struct spcom_ion_info {
int32_t fd;
uint32_t buf_offset;
};
#define SPCOM_ION_FD_UNLOCK_ALL 0xFFFF
struct spcom_ion_handle {
int32_t fd;
};
struct spcom_user_send_modified_command {
enum spcom_cmd_id cmd_id;
struct spcom_ion_info ion_info[SPCOM_MAX_ION_BUF];
uint32_t timeout_msec;
uint32_t buf_size;
char buf[0];
} __attribute__((packed));
#endif

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