Evolution-X-Devices/kernel_oneplus_8750-devicetrees
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ARM: dts: msm: Fix BT inquiry issue by updating UART Rx wakeup

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in SM6150

BT inquiry stop was not functioning correctly. The system entered
sleep state, and the Rx wakeup interrupt failed to trigger,
resulting in missing Rx packets on the Bluetooth side.

Updated the 4uart node pinctrl configuration for Rx wakeup to
ensure proper interrupt handling and resolve the BT inquiry issue
on the SM6150 platform.

Change-Id: I19bdecb950e36e54da2b278ed58143e2b5bef411
Signed-off-by: Nandi Bhoopathi <quic_nandibho@quicinc.com>
This commit is contained in:
Nandi Bhoopathi
2025-05-24 12:51:45 +05:30
parent 65085722f1
commit 4f88738a30
2 changed files with 75 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

81
qcom/sm6150-pinctrl.dtsi
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/
&tlmm {
@@ -528,6 +528,32 @@
};
qupv3_se7_4uart_pins: qupv3_se7_4uart_pins {
qupv3_se7_default_cts:qupv3_se7_default_cts {
mux {
pins = "gpio10";
function = "gpio";
};
config {
pins = "gpio10";
drive-strength = <2>;
bias-disable;
};
};
qupv3_se7_default_rts:qupv3_se7_default_rts {
mux {
pins = "gpio11";
function = "gpio";
};
config {
pins = "gpio11";
drive-strength = <2>;
bias-pull-down;
};
};
qupv3_se7_default_tx: qupv3_se7_default_tx {
mux {
pins = "gpio12";
@@ -541,28 +567,27 @@
};
};
qupv3_se7_default_ctsrtsrx:
qupv3_se7_default_ctsrtsrx {
mux {
pins = "gpio10", "gpio11", "gpio13";
function = "gpio";
};
qupv3_se7_default_rx: qupv3_se7_default_rx {
mux {
pins = "gpio13";
function = "gpio";
};
config {
pins = "gpio10", "gpio11", "gpio13";
drive-strength = <2>;
bias-pull-down;
};
config {
pins = "gpio13";
drive-strength = <2>;
bias-pull-down;
};
};
qupv3_se7_ctsrx: qupv3_se7_ctsrx {
qupv3_se7_cts: qupv3_se7_cts {
mux {
pins = "gpio10", "gpio13";
pins = "gpio10";
function = "qup13";
};
config {
pins = "gpio10", "gpio13";
pins = "gpio10";
drive-strength = <2>;
bias-disable;
};
@@ -593,5 +618,31 @@
bias-pull-up;
};
};
qupv3_se7_rx_active: qupv3_se7_rx_active {
mux {
pins = "gpio13";
function = "qup13";
};
config {
pins = "gpio13";
drive-strength = <2>;
bias-disable;
};
};
qupv3_se7_rx_wake: qupv3_se7_rx_wake {
mux {
pins = "gpio13";
function = "gpio";
};
config {
pins = "gpio13";
drive-strength = <2>;
bias-disable;
};
};
};
};

18
qcom/sm6150-qupv3.dtsi
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
*Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/
&soc {
/*
@@ -404,14 +404,14 @@
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
<&aggre1_noc MASTER_BLSP_1 &mc_virt SLAVE_EBI1>;
pinctrl-names = "default", "active", "sleep", "shutdown";
pinctrl-0 = <&qupv3_se7_default_ctsrtsrx>,
<&qupv3_se7_default_tx>;
pinctrl-1 = <&qupv3_se7_ctsrx>, <&qupv3_se7_rts>,
<&qupv3_se7_tx>;
pinctrl-2 = <&qupv3_se7_ctsrx>, <&qupv3_se7_rts>,
<&qupv3_se7_tx>;
pinctrl-3 = <&qupv3_se7_default_ctsrtsrx>,
<&qupv3_se7_default_tx>;
pinctrl-0 = <&qupv3_se7_default_cts>, <&qupv3_se7_default_rts>,
<&qupv3_se7_default_tx>, <&qupv3_se7_default_rx>;
pinctrl-1 = <&qupv3_se7_cts>, <&qupv3_se7_rts>,
<&qupv3_se7_tx>, <&qupv3_se7_rx_active>;
pinctrl-2 = <&qupv3_se7_cts>, <&qupv3_se7_default_rts>,
<&qupv3_se7_tx>, <&qupv3_se7_rx_wake>;
pinctrl-3 = <&qupv3_se7_default_cts>, <&qupv3_se7_default_rts>,
<&qupv3_se7_default_tx>, <&qupv3_se7_default_rx>;
interrupts-extended = <&intc GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
<&tlmm 13 IRQ_TYPE_LEVEL_HIGH>;
qcom,wakeup-byte = <0xFD>;