Evolution-X-Devices/kernel_oneplus_8750-devicetrees
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ARM: dts: msm: Fix FDE issue by updating register name

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with ice in SM6150

Fix FDE issue by updating register name.

Change-Id: Ibc435b2f08eedda33b140424c976f6c115d0a8dd
Signed-off-by: Venkata Talluri <quic_vtalluri@quicinc.com>
This commit is contained in:
Venkata Talluri
2025-05-28 20:06:47 +05:30
committed by Venkata Koteswararao Talluri
parent 9966cbd7e1
commit 831798b044
1 changed files with 3 additions and 6 deletions
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9
qcom/sm6150.dtsi
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@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -1128,14 +1128,12 @@
compatible = "qcom,ufshc";
reg = <0x1d84000 0x3000>,
<0x1d90000 0x8000>;
reg-names = "ufs_mem", "ufs_ice";
reg-names = "ufs_mem", "ice";
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
phys = <&ufsphy_mem>;
phy-names = "ufsphy";
#reset-cells = <1>;
qcom,ice-use-hwkm;
lanes-per-direction = <1>;
limit-phy-submode = <0>;
dev-ref-clk-freq = <0>; /* 19.2 MHz */
@@ -1255,7 +1253,7 @@
sdhc_1: sdhci@7c4000 {
compatible = "qcom,sdhci-msm-v5";
reg = <0x7c4000 0x1000>, <0x7c5000 0x1000>, <0x7C8000 0x8000>;
reg-names = "hc", "cqhci", "cqhci_ice";
reg-names = "hc", "cqhci", "ice";
interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH>;
@@ -1300,7 +1298,6 @@
nvmem-cells = <&boot_config>;
nvmem-cell-names = "boot_conf";
boot_device_type = <0x0>;
qcom,ice-use-hwkm;
cap-mmc-hw-reset;