ARM: dts: msm: Add a node for cpufreq cycle counter driver

Add cpufreq cycle counter register information to devicetree in a
separate node for use by driver. This will initialize walt for QCS610.

Change-Id: Ib3d581ba8a6d7c7b683e938a4ed3e28ec0593862
Signed-off-by: Kunal Singh Ranawat <quic_kranawat@quicinc.com>

qcom/sm6150-walt.dtsi

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+	walt {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		qcom,cycle-cntr {
+			compatible = "qcom,cycle-cntr-hw";
+			reg = <0x18323000 0x1400>, <0x18325800 0x1400>;
+			reg-names = "freq-domain0", "freq-domain1";
+		};
+	};
+};

qcom/sm6150.dtsi

@@ -1882,6 +1882,7 @@
 #include "sm6150-qupv3.dtsi"
 #include "sm6150-usb.dtsi"
 #include "sm6150-dma-heaps.dtsi"
+#include "sm6150-walt.dtsi"
 
 &tlmm {
 	status = "okay";