6 Commits

Author SHA1 Message Date
mtk21827
75bd7b6b99 [ALPS05377669] memory: config emimpu sysfs(eng)
Only allow eng load built in emimpu sysfs.

MTK-Commit-Id: d43a97a0d48e41ba361ea94cd9f392ca2a179c58

Change-Id: I37e409faee83bf480e9b6d15be46d18737d81611
Signed-off-by: mtk21827 <joanne.wang@mediatek.com>
CR-Id: ALPS05377669
Feature: External Memory Interface(emi)
2020-10-20 16:08:57 +08:00
mtk20497
dd2361d1bb [ALPS05340604] DRAM:modify dram driver for DDR400.fix f meters calculate
modify dram driver for DDR400.fix f meters calculate

MTK-Commit-Id: 437bf94112fda16d4dd6015cbe95bdee2ff4e386

Change-Id: Ie3ff51da6f36bf1b43a42b1c94b185c7c18fe21c
Signed-off-by: jay dong <jay.dong@mediatek.com>
CR-Id: ALPS05340604
Feature: DRAM
2020-09-14 12:22:33 +08:00
mtk21827
8626bf2364 [ALPS05241110] memory: add mpu callback list
Purpose: Provide a common callback register function for
other users to debug when mpu violation.

MTK-Commit-Id: 1ee51e035ee21c33fa6f5620667280df6c96d696

Change-Id: I52f465d46735e871c596d8d73dfb57b407f2d4b9
Signed-off-by: mtk21827 <joanne.wang@mediatek.com>
CR-Id: ALPS05241110
Feature: External Memory Interface(emi)
2020-08-14 22:51:44 +08:00
mtk21827
d5f460fcfc [ALPS05258267] memory: mediatek: add mtk_emicen_addr2dram
Background:
    DRAM devices uses rank/bank/row/column addresses to locate data.
    EMI has multiple channels connecting to multiple DRAM devices.
    When accessing DRAM, the given linear address needed to be translated
    into rank/bank/row/column addresses. This translation is done by EMI
    according to settings of hardware reigsters: emi_cona/f/h/k (which are
    programmed based on the using DRAM device).

For debugging a DRAM issue (such as a DRAM bit-flip issue), the linear
address at which the issue was seen needs to be translated (to address
from DRAM point of view) to idenfiy the EMI channel number and DRAM
rank/bank numbers. This can help narrow down the issue to the exact
hardware component.

This patch adds a new function mtk_emicen_addr2dram() and export it for
translating an input address to addresses from DRAM point of view. For
compatibility, create new properties (hash value, dispatch value, version)
of the emicen device node since hash/dispatch values differ from platform
to platform and there is a new formula of translation for LPDDR5.

MTK-Commit-Id: 48d786cefe23d950e04ab1c535863bda4d9b466d

Change-Id: I7e9a8975fb56ce6e102bff2b1dfe27648d9e1bbe
Signed-off-by: mtk21827 <joanne.wang@mediatek.com>
CR-Id: ALPS05258267
Feature: External Memory Interface(emi)
2020-08-14 22:46:42 +08:00
Juju Sung
16b62722a2 [ALPS05014853] ipi: add IPI signal headers
[Detail]
1.add mt6885 related feature header
2.add emi.h to support for sspm_ipi

MTK-Commit-Id: 589c8680e4a74bfde9bf89bfad8b000e3313ca25

Change-Id: I64a2bd68adcb64757c9518a6df69fec93562d7fb
Signed-off-by: Juju Sung <juju.sung@mediatek.com>
CR-Id: ALPS05014853
Feature: [Module]Kernel Maintenance
2020-04-09 10:01:42 +08:00
Aneesh V
9c1c21a053 ddr: add LPDDR2 data from JESD209-2
add LPDDR2 data from the JEDEC spec JESD209-2. The data
includes:

1. Addressing information for LPDDR2 memories of different
   densities and types(S2/S4)
2. AC timing data.

This data will useful for memory controller device drivers.
Right now this is used by the TI EMIF SDRAM controller
driver.

Signed-off-by: Aneesh V <aneesh@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Benoit Cousson <b-cousson@ti.com>
[santosh.shilimkar@ti.com: Moved to drivers/memory from drivers/misc]
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-05-02 00:04:06 -07:00