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Merge remote-tracking branch 'origin/LE.UM.4.2.1.r1.3' into LE.UM.4.2.1.r1-02600-QCS404.0

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* origin/LE.UM.4.2.1.r1.3:
  techpack: allow building data-kernel module
  qcacld-3.0: Handle tx_power_level under radio stat
  Fix for display suspend resume crash
  regulator: cpr3-regulator: Add support for sdm660
  Revert "ARM: dts: msm: fix NFC device probe issue for sdm660"
  ARM: dts: msm: Update the PM660 GPIO definitions
  clk: qcom: Restore dsi pll clk names for sdm660
  smcinvoke : Add locking to shared variables
  ARM: decompressor: avoid speculative prefetch from protected regions
  msm: sps: Fix the SPS_DBG macro definitions
  power: qpnp-smb2: Force power-role to UFP by default
  input: touchscreen: add raydium touch driver
  ARM: dts: msm: enable xbl boot loading for IPA FW on sdxprairie
  ARM: dts: msm: remove qcom_seecom node for qcs404
  defconfig: sa8155: Enable preempt and rcu debugging configs
  mhi: cntrl: qcom: expand debug modes for new device bringup
  msm: pcie: add sa8195 pci device id support
  msm: npu: Add support to get firmware capabilities
  defconfig: sa2150p: remove cnss driver from build
  ARM: dts: msm: Add qcom_gadget node for SA515M
  ARM: dts: ipc: Change sound card name
  crypto: msm: make qcrypto and qcedev independent of DEBUG_FS
  msm: npu: Allow context switch after processing IPC message
  ARM: dts: msm: remove DP pinctrl from sa6155, sa8155 and sa8195p
  msm: mhi_dev: Fix maximum number of HW channels
  msm: mhi_dev: Remove MHI hardware channel to IPA GSI mapping
  ARM: dts: msm: remove 2nd DP and eDP from sa8195p
  ARM: DTS: msm: Update DP PLL string for SDM660
  clk: qcom: mdss: DP PLL changes for SDM660
  net: stmmac: handle dma fatal irq for IPA channels
  power: qpnp-fg-gen3: Silence an instance of -Wsizeof-array-div in clear_cycle_counter
  defconfig: qti-quin-gvm: Enable virtualized FastRPC on GVM
  driver: boot_marker: enable bootloader log mount
  defconfig: Minimal Kernel config for qcs610
  USB: configfs: Clear deactivation flag in configfs_composite_unbind()
  msm: vidc: Check image encode capabilities
  defconfig: atoll: Enable dm-snapshot
  msm: camera: isp: variable should be accessed only if match is found
  data-kernel: EMac: S2D phase 2 changes
  defconfig: enable rmnet_data driver for wearable target
  ARM: dts: msm: config primary tdm on auto platform
  mmc: sdhci-msm: Enable EMMC_BOOT_SELECT bit
  usb: dwc3-msm: Avoid access of gsi_reg for non-GSI targets
  defconfig: sa515m: Build CNSS2 driver as loadable module
  msm_bus: fix compilation when CONFIG_DEBUG_FS is disabled
  ARM: dts: msm: Add model specific configurations for SA6155 VMs
  cnss2: Add DOMAIN_ATTR_GEOMETRY attribute support
  msm:ipa:mhi: send qmi endp_desc notification to Q6
  msm: camera: isp: Fix IRQ delay handling logic
  msm: camera: isp: Change state of all CID resource to RESERVE on deinit
  net: stmmac: Enable CRC clipping bit
  drivers: thermal: Avoid multiple TSENS controller re-init simultaneously
  mhi: netdev: Open mhi channels based on state notifications from host
  clk: fix compilation when CONFIG_DEBUG_FS is disabled
  ARM: dts: msm: Add property iommu-geometry for CNSS
  Revert "binder: implement binderfs"
  msm: vidc_3x: correct ion flags for CP_CAMERA_ENCODE context bank
  ARM: dts: msm: Fix mistaken description for pcie1&3 on sa8195p
  defconfig: msm: veth: Add Veth configs
  mhi: fix compilation when CONFIG_DEBUG_FS is disabled
  debugfs: Fix !DEBUG_FS debugfs_create_automount
  ufs: fix compilation when CONFIG_DEBUG_FS is disabled
  tsens: fix compilation when CONFIG_DEBUG_FS is disabled
  gsi: fix compilation when CONFIG_DEBUG_FS is disabled
  msm: ipa: Fix compilation errors when DEBUG_FS is disabled
  hdcp_qseecom: Maintain repeater_flag appropriately
  ARM: dts: msm: support to enable CRC using DTS
  ARM: dts: msm: Add always-on flag for L12A on sa8195
  diag: dci: Synchronize dci mempool buffers alloc and free
  msm: vidc_3x: Add new video driver to support CMA buffers
  dt: sm8155: Change copyright year in DT file
  msm: vidc_3x: Add changes to read video CMA configuration information
  mm/memblock.c: fix bug in early_dyn_memhotplug
  ARM: dts: qcom: Include PM660 dtsi for SDA429
  ARM: msm: dts: Enable sdp check timer for sdm429
  char: virtio_fastrpc: Fix compile warning
  phy-msm-usb: Perform sdp_check for SDP charger as well
  msm: vidc_3x: populate sid list for each context bank
  qrtr: usb_dev: Fix kthread usage
  iommu: iommu-debug: Fix the return string
  ARM: dts: msm: Enable PDC support for VM targets
  fw-api: CL 10441255 - update fw common interface files
  fw-api: CL 10438420 - update fw common interface files
  fw-api: CL 10437857 - update fw common interface files
  fw-api: CL 10407957 - update fw common interface files
  fw-api: CL 10402317 - update fw common interface files
  fw-api: CL 10382552 - update fw common interface files
  fw-api: CL 10372014 - update fw common interface files
  fw-api: CL 10366568 - update fw common interface files
  fw-api: CL 10356226 - update fw common interface files
  msm: ipa: update check flags to handle CONFIG_DEBUG_FS
  arm64: defconfig: Add IPA configs
  Release 5.2.03.26T
  ARM: dts: msm: Add IPA device configuration for SA8155
  ARM: dts: msm: Fix cx_cdev label size for MDM9607
  clk: qcom: mdss: add dsi phy 12nm clock
  ARM: dts: msm: Add default thermal zone rules for MDM9607
  ARM: dts: msm: Add regulator cooling device for MDM9607
  usb: dwc3: gadget: Block GSI DB update after END transfer on all EPs
  qcacld-3.0: Delete older PMK of all APs which have the same PMK
  ARM: dts: msm: Add qcom_gadget node for sdxprairie
  msm: npu: Continue npu_probe() when !DEBUG_FS
  qcom: qpnp-fg-gen4: Continue fg_gen4_probe() when !DEBUG_FS
  diag: Check for valid PCIe device
  Release 5.2.03.26S
  qcacld-3.0: Disable BTM offload to fw if a peer doesn't support PMF
  init: Remove modem mounting from kernel
  ARM: dts: msm: Add eMMC, SD card support on sdm429w
  msm: adsprpc: Put upper limit on IOMMU mapping size
  ARM: dts: msm: Add QMI cooling devices for MDM9607
  soc: swr-mstr: Add delay between fifo writes to avoid overflow/underflow
  asoc: wcd937x: Update retry logic for SWR logical addr
  soc: qcom: Increase bootmarker read buffer
  qcacld-3.0: Don't send disassoc frame to fw in case of HO failure
  diag: Initialize local variables
  mhi: core: Read transfer length from an event properly
  msm: vidc_3x: Add CMA support for video hardware
  ARM: dts: msm: Enable RTB for sdmshrike
  soc: qcom: Remove redundant bootstats
  defconfig: Add required configs for USB
  kernel: sysctl: make drop_caches write-only
  ARM: dts: msm: enable POMS on TD4330 cmd panel for trinket
  ARM: dts: msm: enable POMS on TD4330 panel for trinket
  ARM: dts: msm: Add secure display ion heap for GVMs
  ARM: dts: msm: Add BLSP DTSI nodes on sdm429
  ARM: dts: msm: Add DTS to support eMMC
  defconfig: msm: Add defconfig files for SA2150P-NAND
  Release 5.2.03.26R
  ARM: dts: msm: Add ATEML touch support for atoll target
  input: touchscreen: Add support for kernel command line parsing
  ARM: dts: msm: Enable constant fps feature for atoll CPhy panel
  disp: msm: dsi: refine the logic for mode filling and calculation
  disp: msm: dsi: add panel mode restriction for DFPS and RFI
  drm: msm: dsi-staging: CPhy constant fps porch calculation
  qcacld-3.0: drop frames in the RX thread queue during peer unmap
  defconfig: sdm429w: Add support for DEBUGCC for SDM429W
  msm: mhi_dev: Avoid re-alloc of netdev interface
  defconfig: msm: Thermal Enabled on mdm9607 target
  msm: ais: Fix powerup sequence in cam driver
  defconfig: sdm429-bg: Enable CPR, MEM-ACC, Haptics configs
  msm: v4l2loopback: to create V4L2 loopback devices
  msm:ipa:change IPA client mapping for mhi protocol
  sm8150: dt: sm8150-slpi-pinctrl: Typo mistake in gpio
  binder: implement binderfs
  msm: mhi_dev: Add proper check before accessing variable
  Revert "ARM: dts: msm: Add cmd mode panel support for SDM660 MTP"
  msm: veth_ipa: Introduce front end network driver
  net: stmmac: Ethtool half duplex not supported
  ARM: dts: msm: Add the CPR regulator node for SDM429w
  defconfig: sdmsteppe: Enable USB_VIDEO_CLASS
  Release 5.2.03.26Q
  defconfig: sdm429: Add MPROC defconfig for SDM429W
  ARM: dts: msm: add new HAB physical channels for DATA_NETWORK and HSI2S
  ARM: dts: qcom: Add MPROC device nodes for sdm429w
  qcacld-3.0: Avoid peer access after peer deletion
  PM / hibernate: Make passing hibernate offsets more friendly
  usb: dwc3-msm: Keep wakeup IRQs disabled for automotive platforms
  power: smb1398: Update the max-ilim current settings
  irqchip: qcom: pdc: Add a kernel config for pdc save/restore feature
  defconfig: msm: Enable PDC_VIRT on Quin GVM platform
  irqchip: qcom: pdc: Add support for pdc-virt
  clk: qcom: gcc-sdm429w: Update plls for SDM429W
  net: stmmac: Fixed ethool speed issue
  ARM: dts: msm: Add pcie1~3 support for sa8195 virtual machine
  clk: qcom: debugcc-sdm429w: Update debugcc Kconfig
  defconfig: sdm429: Enable BLSP, SLIMBUS driver defconfig
  ARM: dts: msm: Add SPS node for sdm429
  USB: phy: msm: Check for PHY reset handle also
  ARM: dts: msm: Add USB device nodes for sdm429
  clk: qcom: Add pcie1~3 virtio clocks for sa8195p
  uapi: add ADM_AUDPROC_PERSISTENT cal type
  ARM: dts: msm: Disable shared display on DP display sa8195
  Release 5.2.03.26P
  qcacld-3.0: Update OFDM and CCK flags for packet capture mode
  Release 5.2.03.26O
  qcacld-3.0: Copy peer and radio stats correctly
  qcacld-3.0: Handle LL stats for 2nd radio
  qcacld-3.0: Return LL stats resp in caller context
  diag: Save the correct task pointer while registering dci client
  qcacmn: Mark SRD channels conditionally passive
  ARM: dts: msm: Enable constant fps feature
  drm/msm/dsi-staging: Fix porch calculation issue for constant fps
  soc: qcom: hab: add some physical channels in HAB driver
  net: stmmac: Free IPA queue memory on netdev close
  power: smb1398: Fix SOC based SMB enable condition
  emac: emac RXC clock warning
  Release 5.2.03.26N
  ARM: dts: msm: EMAC phy hw reset delay timer
  driver: input: sensors: Increase the smi130 accel buffer samples size
  qcacld-3.0: Do not enable STA roaming if any NDI connection is active
  defconfig: sm8150: Enable dm-snapshot
  defconfig: sdmsteppe: Enable dm-snapshot
  net: stmmac: Set IOC for every TSO last desc
  fw-api: Define DEST_RING_CONSUMER_PREFET_TIMER macro for qca6750
  mhi: core: Fix out of bound channel id handling
  mhi: core: improve bandwidth switch events processing
  fw-api: CL 10334178 - update fw common interface files
  spi: spi-qcom-geni: Add error interrupt handling in spi driver
  ASoC: audio-ext-clk: Add pmi clk support for tasha
  ARM: dts: msm: Tasha snd node changes for sdm660
  fw-api: CL 10322687 - update fw common interface files
  fw-api: CL 10320987 - update fw common interface files
  Release 5.2.03.26M
  ARM: dts: msm: Disable shared display on DP display sa8155
  ARM: dts: msm: Disable shared display on DP display sa6155
  fw-api: CL 10317768 - update fw common interface files
  qcacld-3.0: Prevent RSO stop sent after vdev down
  fw-api: CL 10308469 - update fw common interface files
  Release 5.2.03.26L
  qcacld-3.0: Send PER config command before WMI_ROAM_SCAN_MODE command
  Release 5.2.03.26K
  qcacld-3.0: Lock all the entry of ch power info
  drivers: rmnet: shs: Add oom handler
  fw-api: CL 10295227 - update fw common interface files
  dsp: q6adm: Update the proper param_hdr for offset
  Revert "ASoC: Add Voice over pcie support"
  msm: mdss: add support to handle LP_RX_TO/BTA_TO errors for DSI 12nm PHY
  msm: mdss: perform DSI PHY s/w reset for 12nm PHY during unblank
  msm: mdss: update the MDSS DSI ULPS exit sequence
  msm: mdss: add support to program of HSTX drivers for DSI 12nm PHY
  msm: mdss: update DSI ULPS entry/exit sequence
  fw-api: CL 10270542 - update fw common interface files
  qcom: spmi-wled: Wait for OVPs before disable module
  ion: msm: Restrict VMID_CP_CAMERA_ENCODE to read only
  msm: vidc_3x: correct ion flags for CP_CAMERA_ENCODE context bank
  fw-api: CL 10262355 - update fw common interface files
  msm: vidc_3x: Add new video driver to support CMA buffers
  msm: vidc_3x: Add changes to read video CMA configuration information
  msm: vidc_3x: populate sid list for each context bank
  msm: vidc_3x: Add CMA support for video hardware
  drivers: net: can:Threshold update for time offset
  smcinvoke: Add suspend resume support
  SMCInvoke: Process requests for active clients
  msm: mdss: add support for DSI 12nm PHY in DSI driver
  drivers: rmnet: shs: add segmentation levels for slow start flows
  msm: vidc: Fix DCVS enablement
  vidc_3x: Fix qbuf error in gralloc buffers encoding
  data-kernel: EMAC: Change defualt value for phy reset delays.
  ARM: dts: msm: EMAC phy hw reset delay timer
  ARM: dts: msm: Disable minidump-id for Modem on SDM660
  autoconf: Enable legacy avtimer for sdm660
  diag: Add protection while accessing diag client map
  Revert "drivers: usb: gadget: Change gbam setup usage in rmnet function"
  ARM: dts: msm: EMAC phy hw reset delay timer
  ARM: dts: msm: EMAC phy hw reset delay timer
  data-kernel: EMAC: read phy hw reset delay time from dtsi
  bolero: tx-macro: Fix audio distortion during amic record
  va-macro: Add autosuspend after pm_runtime_get_sync
  qcacmn: Update the mc timer state after its deleted
  qcacld-3.0: Fix while condition in rrm_fill_beacon_ies()
  asoc: codecs: avoid crash after diconnecting DP cable
  mhi: core: move certain logs to controller log buffer
  mhi: cntrl: qcom: move certain logs to controller log buffer
  mhi: cntrl: qcom: reduce timesync and bootlogger log buffer size
  mhi: cntrl: qcom: add support for controller ipc logs
  cnss2: add support for controller IPC logs
  mhi: core: add log buffer for controller bootup and shutdown
  audio-kernel: Rename hw vote rsc to digital cdc rsc mgr
  msm: ipa2: Add change to fix ipa padding
  ARM: dts: msm: Update ADC_TM compatible field for PM660
  bindings: thermal: Add compatible field for PMIC4 ADC_TM
  thermal: adc_tm: Update support for PMIC4 ADC_TM
  asoc: add new path for in call recording
  audio-kernel: Synchronize hw vote and unvote requests
  asoc: sm8150: add proxy ports for call screening in machine driver
  ARM: dts: msm: Removing quiet-therm-step node
  vidc_3x: Query Entropy property only for H264 format
  asoc: add code change for pseudo playback and capture BE DAIs.
  ASoC: Add Voice over pcie support
  defconfig: arm64: msm: Enable USB RMNET & RNDIS using IPA over BAM2BAM
  usb: gadget: f_qc_rndis: Add RNDIS support using IPA over BAM2BAM
  fbdev: msm: fix merge errors in DP
  Revert "defconfig: arm64: msm: Enable USB RMNET & RNDIS using IPA over BAM2BAM"
  ARM: dts: msm: Add rpm-smd irq number for SDM660
  ARM: dts: msm: Update msm_ext_disp string
  autoconf: Enable leagay avtimer for sdm660
  defconfig: arm64: msm: Enable USB RMNET & RNDIS using IPA over BAM2BAM
  msm: ipa: Add low-level IPA client support
  Fixing compilation failures
  uapi/media: Fix buffer size issue for NV12_UBWC.
  soc: qcom: boot_stats: Add display boot KPI
  pfk: Fixed ICE slot number for bare metal
  clk: qcom: parents need enable during set rate for SDM660
  HID: core: add usage_page_preceding flag for hid_concatenate_usage_page().
  vidc_3x: Fix HFR recording issue.
  fbdev: msm: Use dynamic allocation for SID variable.
  Revert "fbdev: msm: disable sec display".
  ARM: dts: msm: modified interrupt interrupt type for smmu
  arm64: defconfig: Add IPA realted configs
  msm: ipa: Add Kconfig changes of IPA2 driver
  ARM: dts: msm: Add compatible rmnet version for ipa2
  msm: ipa2: Add changes compatible to kernel-4.14
  msm: ipa: Add support of IPA2 driver
  msm: Disable CSID virtualization and fix SID switching for SDM660
  defconfig: msm: Enable coresight replicator, qpdi for SDM660
  coresight: add qpdi driver support in upstream implementation
  ARM: dts: msm: coresight support for SDM660
  coresight: replicator: Add CoreSight Replicator driver
  msm: vidc: Re-calculate buffer requirement
  fbdev: msm: disable sec display
  ARM: dts: msm: fix NFC device probe issue for sdm660
  msm: fbdev: dp: Add dp intf to codec ops
  ARM: dts: msm: Add default thermal zone rules for SDM660
  media: v4l2-ctrls: Add missing entry in header_mode
  msm: vidc: Fix v4l2 format warnings
  ARM: dts: msm: Update WLED configuration for sdm660
  qcacld-3.0: Possible OOB write in rrm_process_radio_measurement_request
  fixing compilation issue
  msm: vidc_3x: Add partial cache operations support
  Revert "msm: vidc_3x: Add partial cache operations support"
  defconfig: msm: Disable CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE flag
  ARM: dts: msm: Add LPM residency for sdm660
  fbdev: msm: Remove CPU sync in dma buf unmap path
  ARM: dts: msm: Add panel changes for SDM660 QRD
  defconfig: msm: Enable DP Panel config
  msm: fbdev: dp: enable audio support over DP
  ARM: dts: msm: Update supply name for vdd cx-mx wlan rail
  mdss: fbdev: Fix fence timeout error check
  ARM: dts: msm: Add energy costs for SDM660
  ARM: dts: msm: Specify WLED configuration for sdm660 MTP
  ARM: dts: msm: Enable subsystem watchdog
  ARM: dts: msm: Enable WDSP SVA for SDM660
  ARM: dts: msm: Add TSENS in thermal_zone for SDM660
  ARM: dts: msm: Remove thermal sensor_info nodes
  defconfig: msm: Enable Thermal configs for SDM660
  ARM: dts: msm: add bcl_sensors thermal zones
  ARM: dts: msm: enable LMH DCVS driver for sdm660
  drivers: thermal: lmh_dcvs: Add support to enable legacy hardware feature
  ARM: dts: msm: add gpio_key VOL_UP button on SDM660
  ARM: dts: msm: Fix slave id for pm660l_gpio
  soc: qcom: dcc: DCC driver for SDM660
  msm: vidc_3x: Assign and pass hal buffer type to smem
  msm: vidc_3x: Add partial cache operations support
  Revert "msm: vidc_3x: disable smem_cache_operations for encoder"
  defconfig: msm: Enable DP Panel config
  msm: bus: removing warning
  clk: qcom: mdss: DSI and DP PLL changes for SDM660
  clk : qcom : Update mdss byte and pxl clk names
  fbdev: changes to enable recovery ui
  fbdev: msm: Add snapshot of mdss driver
  msm: fbdev: dp: update fbdev dp driver
  msm: fbdev: Add snapshot of DP driver
  ARM: DTS: msm: Enable 14nm DP PLL clk
  Revert "msm: mdss: dsi: Add support dual roi partial update"
  Revert "msm: mdss: add multiple partial update support"
  Revert "msm: mdss: add additional LM checks for dest scalar validation"
  Revert "fbdev: changes to enable recovery ui"
  Revert "fbdev: changes to enable recovery ui"
  usb: gadget: uvc: Update frame size as per frame type
  clk: remove workaround changes for SDM660
  ARM: dts: msm: Add dtbo support for sdm660 & sda660
  defconfig: sdm : Add configs for SDM660
  ARM: dts: msm: Add audio support for SDM660
  Revert "regulator: core: TEMP change register string size"
  ARM: dts: msm: Add cmd mode panel support for SDM660 MTP
  msm: vidc_3x: disable smem_cache_operations for encoder
  defconfig: msm: Enable CPR and FG related configs for SDM660
  drivers: irqchip: qcom: Add mpm pin data for sdm660
  defconfig: sdm : Add configs for SDM660
  ARM: dts: msm: Add MPM interrupt controller for sdm660..
  ARM: dts: msm: add support for frequency scaling for SDM660.
  Temporary commit : resolve build error.
  thermal: adc_tm: adc_init for sdm660
  ARM: dts: msm: add pmic support for SDM660
  ARM: dts: msm: Update GPU bw table for SDM660
  fbdev: changes to enable recovery ui
  iio: adc: Add DRAX_TEMP channel support
  ARM: dts: msm: Add device tree for SDM660
  ASoC: sdm660: Fix compilation issue of sdm660 drivers
  clk: qcom: Add snapshot of sdm660 clocks
  msm: vidc: remove additional checks in response_handler.
  vidc: Remove firmware_cb context bank.
  defconfig: vidc: Enable video drivers for sdm660.
  msm: vidc_3x: ION Upgrade changes for video.
  Revert "msm: vidc_3x: Add snapshot of video driver"
  Revert "msm: vidc_3x: ION Upgrade changes for video"
  Revert "vidc: Remove firmware_cb context bank"
  ARM: dts: msm: rename codec name
  mm-camera_v2: Check proper VFE h/w versions
  msm: kgsl: Change default pagetable creation sequence
  msm: kgsl: Remove workaround for GPU aperture programming
  ASoC: msm: Add support for WCD interrupt config via LPI TLMM
  Revert "ARM: dts: msm: Enable global pagetable for gpu on SDM660"
  msm: sde: Fixes to enable rotator for SDM660
  vidc: Remove firmware_cb context bank
  defconfig: msm: Enable PMIC related configs for SDM660
  defconfig: sdm : Update perf configs for SDM660
  msm: mdss: add additional LM checks for dest scalar validation
  msm: mdss: add multiple partial update support
  Audio-kernel: voice: TEMP enable voice call
  msm: mdss: dsi: Add support dual roi partial update
  Revert "vidc: Temporary change to remove secure context bank"
  Revert "BACKPORT: perf_event: Add support for LSM and SELinux checks"
  Linux 4.14.163
  perf/x86/intel/bts: Fix the use of page_private()
  xen/blkback: Avoid unmapping unmapped grant pages
  s390/smp: fix physical to logical CPU map for SMT
  net: add annotations on hh->hh_len lockless accesses
  arm64: dts: meson: odroid-c2: Disable usb_otg bus to avoid power failed warning
  ath9k_htc: Discard undersized packets
  ath9k_htc: Modify byte order for an error message
  rxrpc: Fix possible NULL pointer access in ICMP handling
  selftests: rtnetlink: add addresses with fixed life time
  powerpc/pseries/hvconsole: Fix stack overread via udbg
  drm/mst: Fix MST sideband up-reply failure handling
  scsi: qedf: Do not retry ELS request if qedf_alloc_cmd fails
  fix compat handling of FICLONERANGE, FIDEDUPERANGE and FS_IOC_FIEMAP
  tty: serial: msm_serial: Fix lockup for sysrq and oops
  dt-bindings: clock: renesas: rcar-usb2-clock-sel: Fix typo in example
  media: usb: fix memory leak in af9005_identify_state
  regulator: ab8500: Remove AB8505 USB regulator
  media: flexcop-usb: ensure -EIO is returned on error condition
  Bluetooth: Fix memory leak in hci_connect_le_scan
  Bluetooth: delete a stray unlock
  Bluetooth: btusb: fix PM leak in error case of setup
  platform/x86: pmc_atom: Add Siemens CONNECT X300 to critclk_systems DMI table
  xfs: don't check for AG deadlock for realtime files in bunmapi
  scsi: qla2xxx: Drop superfluous INIT_WORK of del_work
  nfsd4: fix up replay_matches_cache()
  PM / devfreq: Check NULL governor in available_governors_show
  arm64: Revert support for execute-only user mappings
  ftrace: Avoid potential division by zero in function profiler
  exit: panic before exit_mm() on global init exit
  ALSA: firewire-motu: Correct a typo in the clock proc string
  ALSA: cs4236: fix error return comparison of an unsigned integer
  tracing: Have the histogram compare functions convert to u64 first
  tracing: Fix lock inversion in trace_event_enable_tgid_record()
  gpiolib: fix up emulated open drain outputs
  ata: ahci_brcm: Fix AHCI resources management
  ata: ahci_brcm: Allow optional reset controller to be used
  ata: libahci_platform: Export again ahci_platform_<en/dis>able_phys()
  compat_ioctl: block: handle BLKREPORTZONE/BLKRESETZONE
  compat_ioctl: block: handle Persistent Reservations
  dmaengine: Fix access to uninitialized dma_slave_caps
  locks: print unsigned ino in /proc/locks
  pstore/ram: Write new dumps to start of recycled zones
  memcg: account security cred as well to kmemcg
  mm/zsmalloc.c: fix the migrated zspage statistics.
  media: cec: avoid decrementing transmit_queue_sz if it is 0
  media: cec: CEC 2.0-only bcast messages were ignored
  media: pulse8-cec: fix lost cec_transmit_attempt_done() call
  MIPS: Avoid VDSO ABI breakage due to global register variable
  drm/sun4i: hdmi: Remove duplicate cleanup calls
  ALSA: ice1724: Fix sleep-in-atomic in Infrasonic Quartet support code
  drm: limit to INT_MAX in create_blob ioctl
  taskstats: fix data-race
  xfs: fix mount failure crash on invalid iclog memory access
  PM / hibernate: memory_bm_find_bit(): Tighten node optimisation
  xen/balloon: fix ballooned page accounting without hotplug enabled
  xen-blkback: prevent premature module unload
  IB/mlx4: Follow mirror sequence of device add during device removal
  s390/cpum_sf: Avoid SBD overflow condition in irq handler
  s390/cpum_sf: Adjust sampling interval to avoid hitting sample limits
  md: raid1: check rdev before reference in raid1_sync_request func
  net: make socket read/write_iter() honor IOCB_NOWAIT
  usb: gadget: fix wrong endpoint desc
  drm/nouveau: Move the declaration of struct nouveau_conn_atom up a bit
  scsi: libsas: stop discovering if oob mode is disconnected
  scsi: iscsi: qla4xxx: fix double free in probe
  scsi: qla2xxx: Don't call qlt_async_event twice
  scsi: lpfc: Fix memory leak on lpfc_bsg_write_ebuf_set func
  rxe: correctly calculate iCRC for unaligned payloads
  RDMA/cma: add missed unregister_pernet_subsys in init failure
  PM / devfreq: Don't fail devfreq_dev_release if not in list
  iio: adc: max9611: Fix too short conversion time delay
  nvme_fc: add module to ops template to allow module references
  UPSTREAM: selinux: sidtab reverse lookup hash table
  UPSTREAM: selinux: avoid atomic_t usage in sidtab
  UPSTREAM: selinux: check sidtab limit before adding a new entry
  UPSTREAM: selinux: fix context string corruption in convert_context()
  BACKPORT: selinux: overhaul sidtab to fix bug and improve performance
  UPSTREAM: selinux: refactor mls_context_to_sid() and make it stricter
  UPSTREAM: selinux: Cleanup printk logging in services
  UPSTREAM: scsi: ilog2: create truly constant version for sparse
  BACKPORT: selinux: use separate table for initial SID lookup
  UPSTREAM: selinux: make "selinux_policycap_names[]" const char *
  UPSTREAM: selinux: refactor sidtab conversion
  BACKPORT: selinux: wrap AVC state
  UPSTREAM: selinux: wrap selinuxfs state
  UPSTREAM: selinux: rename the {is,set}_enforcing() functions
  BACKPORT: selinux: wrap global selinux state
  UPSTREAM: selinux: Use kmem_cache for hashtab_node
  BACKPORT: perf_event: Add support for LSM and SELinux checks
  audio-kernel: dsp: TEMP Enable bluetooth
  ARM: dts: msm: Update lpi offset for SDM660
  ASoC: sdm660_cdc: Update mbhc reg struct for IN2P_CLAMP_STATE
  vidc: Temporary change to remove secure context bank
  UPSTREAM: binder: Add binder_proc logging to binderfs
  UPSTREAM: binder: Make transaction_log available in binderfs
  UPSTREAM: binder: Add stats, state and transactions files
  UPSTREAM: binder: add a mount option to show global stats
  UPSTREAM: binder: Validate the default binderfs device names.
  UPSTREAM: binder: Add default binder devices through binderfs when configured
  UPSTREAM: binder: fix CONFIG_ANDROID_BINDER_DEVICES
  UPSTREAM: android: binder: use kstrdup instead of open-coding it
  UPSTREAM: binderfs: remove separate device_initcall()
  BACKPORT: binderfs: respect limit on binder control creation
  UPSTREAM: binderfs: switch from d_add() to d_instantiate()
  UPSTREAM: binderfs: drop lock in binderfs_binder_ctl_create
  UPSTREAM: binderfs: kill_litter_super() before cleanup
  UPSTREAM: binderfs: rework binderfs_binder_device_create()
  UPSTREAM: binderfs: rework binderfs_fill_super()
  UPSTREAM: binderfs: prevent renaming the control dentry
  UPSTREAM: binderfs: remove outdated comment
  UPSTREAM: binderfs: fix error return code in binderfs_fill_super()
  UPSTREAM: binderfs: handle !CONFIG_IPC_NS builds
  BACKPORT: binderfs: reserve devices for initial mount
  UPSTREAM: binderfs: rename header to binderfs.h
  BACKPORT: binderfs: implement "max" mount option
  UPSTREAM: binderfs: make each binderfs mount a new instance
  UPSTREAM: binderfs: remove wrong kern_mount() call
  BACKPORT: binder: implement binderfs
  UPSTREAM: binder: remove BINDER_DEBUG_ENTRY()
  UPSTREAM: seq_file: Introduce DEFINE_SHOW_ATTRIBUTE() helper macro
  Revert "msm: camera_v2: CPP AXI reset at close".
  msm: camera: dtsi: arm camera gpio config for sdm660.
  UPSTREAM: exit: panic before exit_mm() on global init exit
  soc: qcom: Add support for SDA660 into socinfo driver
  defconfig: sdm : Add configs for SDM660
  ARM: dts: msm: Add dts for SDA660.
  ANDROID: cpufreq_interactive: remove unused variable
  ARM: dts: msm: add pmic support for SDM660
  defconfig: sdm660: Enable camera driver support
  audio-kernel: Pull in latest code changes from 4.0 branch
  msm: mdss: Remove validate layer logs
  regulator: core: TEMP change register string size
  defconfig : msm: Enable snd config on SDM660
  ARM: dts: msm: Snd node changes for sdm660
  Revert "ARM: dts: msm: Audio changes for SDM660"
  asoc: fix NULL pointer de-reference in asoc drivers.
  asoc: msm-pcm: Add mutex lock to protect prvt data
  msm: vidc_3x: ION Upgrade changes for video
  msm: vidc_3x: Add snapshot of video driver
  ARM: dts: msm: Enable icnss interrupts and configs
  dts: Add restrict-access to adsp_mem
  ARM: dts: msm: update DT entries for fastRPC on SDM660
  Merge multi rect traffic changes into kernel.lnx.4.14.r22-rel
  fbdev: msm: Add backlight class support for FB driver
  ARM: dts: msm: Audio changes for SDM660
  Adding perf defconfig for SDM660.
  ARM: SDM: bringup changes for SDM660
  ARM: dts: msm: Enable global pagetable for gpu on SDM660
  power: qpnp-smb2: Use chg_param.smb_version in place of smb_version.
  ARM: dts: msm: SMP2P changes for sdm660
  soc: qcom: Force sequential boot for MSA modem
  Workaround: These are work around which need to de addressed
  soc: qcom: add snapshot of MBA based modem PIL
  defconfig : Enable QCOM_COMMAND_DB and QCOM_SECURE_BUFFER
  ARM: dts: msm: Add regulator property for SMMU nodes
  msm: kgsl: Add CX peak freq for Adreno512
  defconfig : Enable KGSL
  ARM: dts: msm: Enable WLED backlight
  defconfig : msm: Enable backlight configs
  msm: mdss: fix qseed3 op_mode register programming
  msm: mdss: Skip setting up Qseed3 for non-vig pipes
  msm: mdss: Change IOMMU map sequence during splash cleanup
  msm: mdss: share MDP smmu device mappings with other mdss clients
  msm: mdss: Add support for secure camera
  msm: mdss: Enable secure display and camera feature for msmcobalt
  Revert "power: qpnp-smb2: Use chg_param.smb_version in place of smb_version"
  msm: mdss: Initialize mdss v3 pp driver ops for msmfalcon
  Revert "soc: qcom: Remove legacy scm_call API support"
  msm: mdss: Add mdss capabilities for msmfalcon
  ARM: dts: msm: Add dt entry regulator-hw-type
  msm/sde/rotator: Add sdm660 MDP rev for rotator
  dtsi: dtsi changes
  defconfig: msm: Add sdm660_defconfig
  ARM: SDM: bringup changes for SDM660
  clk: qcom: Add snapshot of sdm660 clocks
  regulator: add snapshot of cpr3-regulator and dependent drivers
  mdss: 660.14 wA
  backlight: qcom-spmi-wled: Add compatible string for SDM660
  fbdev: msm: Do SMMU attach before buffer map
  msm: mdss: Separate PP programming to advanced and deferred modes
  msm: mdss: Add PA dither support for msmcobalt
  qcacld-3.0: Possible OOB write in rrm_process_radio_measurement_request
  Initial target definition for sdm660 on 4.14
  autoconf: new config files for sdm660
  qcacld-3.0: Fix buffer overflow in HTT MSG handling
  qcacld-3.0: set same IPA bandwidth for both cons and prod pipes
  iommu: arm-smmu: Fix dev_err formatting errors
  qcacmn: Fix incorrect ref counter of vdev
  qcacld-3.0: Dont create the session from add virt interface
  qcacmn: Fix ref leak of vdev if scan is rejected

Signed-off-by: UtsavBalar1231 <utsavbalar1231@gmail.com>
This commit is contained in:
UtsavBalar1231
2020-06-07 09:59:07 +05:30
parent 9594052516 e849a86979
commit 27639feb73
520 changed files with 29411 additions and 4846 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
Documentation/devicetree/bindings/arm/msm/qcom,osm.txt
View File

@@ -13,7 +13,8 @@ Properties:
or "qcom,clk-cpu-osm-sm6150" or
"qcom,clk-cpu-osm-sdmmagpie" or
"qcom,clk-cpu-osm-trinket" or
"qcom,clk-cpu-osm-atoll".
"qcom,clk-cpu-osm-atoll" or
"qcom,clk-cpu-osm-sdm630".
- reg
Usage: required

2
Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.txt
View File

@@ -46,7 +46,7 @@ Required properties:
Example (R-Car H3):
usb2_clksel: clock-controller@e6590630 {
compatible = "renesas,r8a77950-rcar-usb2-clock-sel",
compatible = "renesas,r8a7795-rcar-usb2-clock-sel",
"renesas,rcar-gen3-usb2-clock-sel";
reg = <0 0xe6590630 0 0x02>;
clocks = <&cpg CPG_MOD 703>, <&usb_extal>, <&usb_xtal>;

3
Documentation/devicetree/bindings/cnss/cnss-wlan.txt
View File

@@ -79,6 +79,9 @@ Optional properties:
- qcom,set-wlaon-pwr-ctrl: Boolean property to indicate if set
WLAON_QFPROM_PWR_CTRL_REG register during power on
and off sequences.
- qcom,iommu-geometry: Boolean property to indicate if need to enable
DOMAIN_ATTR_GEOMETRY domain attribute. Only used
when DOMAIN_ATTR_FAST set.
List of chip specific sub nodes:
- chip_cfg@X: represent chip specific configurations

20
Documentation/devicetree/bindings/interrupt-controller/qti,pdc.txt
View File

@@ -32,7 +32,8 @@ Properties:
"qcom,pdc-sm6150",
"qcom,pdc-sm8150",
"qcom,pdc-sdxprairie",
"qcom,pdc-atoll"
"qcom,pdc-atoll",
"qcom,pdc-virt"
- reg:
Usage: required
@@ -58,6 +59,14 @@ Properties:
Value type: <bool>
Definition: Identifies the node as an interrupt controller.
- qcom,pdc-pins:
Usage: optional
Value type: <u32 array>
Definition: Specifies the PDC pin and its mapping hwirq.
The first element of the tuple is the PDC port.
The second element is the GIC hwirq number for the PDC port.
Usage is required when using "qcom,pdc-virt" as compatible.
Example:
pdcgic: interrupt-controller@0xb220000{
@@ -67,3 +76,12 @@ pdcgic: interrupt-controller@0xb220000{
interrupt-parent = <&intc>;
interrupt-controller;
};
pdcgic: interrupt-controller@0xb220000{
compatible = "qcom,pdc-virt";
reg = <0xb220000 0x30000>;
#interrupt-cells = <3>;
interrupt-parent = <&intc>;
interrupt-controller;
qcom,pdc-pins = <8 520>, <9 521>;
};

6
Documentation/devicetree/bindings/leds/leds-qpnp-wled.txt
View File

@@ -1,8 +1,8 @@
Qualcomm Technologies QPNP WLED
Qualcomm Technologies, Inc. QPNP WLED
QPNP (Qualcomm Technologies Plug N Play) WLED (White Light
QPNP (Qualcomm Technologies, Inc. Plug N Play) WLED (White Light
Emitting Diode) driver is used for controlling display
backlight that is part of PMIC on Qualcomm Technologies
backlight that is part of PMIC on Qualcomm Technologies, Inc.
reference platforms. The PMIC is connected to the host
processor via SPMI bus.

4
Documentation/devicetree/bindings/media/video/msm-vidc.txt
View File

@@ -118,6 +118,8 @@ Optional properties:
internal persist1 = 0x400
internal cmd queue = 0x800
- virtual-addr-pool : offset and length of virtual address pool.
- cma-addr-pool : offset and length of CMA address pool.
- qcom,cma-s1-bypass : bool indicating stage 1 translation bypass need for CMA region.
- qcom,fw-context-bank : bool indicating firmware context bank.
- qcom,secure-context-bank : bool indicating secure context bank.
@@ -180,6 +182,8 @@ Example:
<&venus_smmu 0x0c>;
buffer-types = <0xfff>;
virtual-addr-pool = <0x5dc00000 0x80000000>;
cma-addr-pool= <0xb6800000 0x9800000>;
qcom,cma-s1-bypass;
qcom,secure-context-bank;
};

4
Documentation/devicetree/bindings/net/stmmac.txt
View File

@@ -116,6 +116,10 @@ Optional properties:
- snps,high_credit: max write outstanding req. limit
- snps,low_credit: max read outstanding req. limit
- snps,priority: TX queue priority (Range: 0x0 to 0xF)
- snps,crc_strip: this enables the CRC stripping feature in the hardware and the
last four bytes of the ethernet packet type is stripped and
dropped before forwarding.
Examples:
stmmac_axi_setup: stmmac-axi-config {

25
Documentation/devicetree/bindings/pil/inrush-current-mitigation.txt Normal file
View File

@@ -0,0 +1,25 @@
In Rush Current Mitigation driver:
On recent targets, APSS L2 memories are moved to APC domain which were
earlier on Mx domain. Analysis suggests that on current targets APSS L2
memories provide reverse capacitance on Mx and this used to provide buffer
while powering ON Q6 L2. Now due to L2s moving to APC, the cushion is not
available. So there is a chance of droop when Q6 L2 memories are being
powered up.
During Q6 low power modes L2 is kept in retention only and never collapsed. So
the cases where it needs to be taken care is during PIL(modem and adsp bringup
during boot). So in cold boot path before bringing up modem or adsp, turn on MM
memories. Hence providing a intermediate load.
Required properties:
- compatible: Must be qcom,msm-inrush-current-mitigation
- qcom,dependent-subsystems: List of subsystems which need the intermediate load
- vdd-supply: gdsc handle to switch on memory.
Example:
qcom,inrush-current {
compatible = "qcom,msm-inrush-current-mitigation";
qcom,dependent-subsystems = "modem", "adsp";
vdd-supply = <&gdsc_mdss>;
};

14
Documentation/devicetree/bindings/platform/msm/veth_ipa.txt Normal file
View File

@@ -0,0 +1,14 @@
Qualcomm Technologies, Inc. Veth IPA device
This specifies the bindings for QTI VETH_IPA that provides backhaul
connectivity.
Required properties:
- compatible: Must be "qcom,veth-ipa"
Example:
qcom,veth-ipa {
compatible = "qcom,veth-ipa";
};

5
Documentation/devicetree/bindings/power/supply/qcom/qpnp-smb2.txt
View File

@@ -210,6 +210,11 @@ Charger specific properties:
Definition: Boolean flag which when present enables stepwise change in FCC.
The default stepping rate is 100mA/sec.
- qcom,ufp-only-mode
Usage: optional
Value type: bool
Definition: Boolean flag which when present configure charger in SINK only
mode.
=============================================
Second Level Nodes - SMB2 Charger Peripherals

9
Documentation/devicetree/bindings/regulator/cpr3-regulator.txt
View File

@@ -209,6 +209,15 @@ Platform independent properties:
as the corresponding addresses are specified in
the qcom,cpr-panic-reg-addr-list property.
- qcom,cpr-reset-step-quot-loop-en
Usage: optional; only meaningful for CPR4 and CPRh controllers
Value type: <empty>
Definition: Boolean value which indicates that the CPR controller should
be configured to reset step_quot on each loop_en = 0
transition. This configuration allows the CPR controller to
first use the default step_quot and then later switch to the
run-time calibrated step_quot.
=================================================
Second Level Nodes - CPR Threads for a Controller
=================================================

2
Documentation/devicetree/bindings/usb/msm-hsusb.txt
View File

@@ -295,6 +295,8 @@ Optional properties :
- qcom,usbeth-reset-gpio: If present then an external usb-to-eth is connected to
the USB host controller and its RESET_N signal is connected to this
usbeth-reset-gpio GPIO. It should be driven LOW to RESET the usb-to-eth.
- qcom,enumeration-check-for-sdp: If present, start timer for SDP charger to check enumeration
happen or not.
Example HSUSB OTG controller device node :
usb@f9690000 {

3
Documentation/devicetree/bindings/usb/msm-ssusb.txt
View File

@@ -93,9 +93,6 @@ Optional properties :
capable DWC3 which does not have extcon handle.
- qcom,default-mode-host: If present, start host mode on probe for an OTG
capable DWC3 which does not have extcon handle.
- qcom,no-wakeup-from-pm-suspend: If present, there is no need of SS wakeup events via
pwr_event_irq in system suspend scenario. So in system suspend and hibernation,
we can suspend the SSPHY.
Sub nodes:
- Sub node for "DWC3- USB3 controller".

10
Documentation/power/swsusp.txt
View File

@@ -24,8 +24,16 @@ Some warnings, first.
* see the FAQ below for details. (This is not true for more traditional
* power states like "standby", which normally don't turn USB off.)
Swap partition:
You need to append resume=/dev/your_swap_partition to kernel command
line. Then you suspend by
line or specify it using /sys/power/resume.
Swap file:
If using a swapfile you can also specify a resume offset using
resume_offset=<number> on the kernel command line or specify it
in /sys/power/resume_offset.
After preparing then you suspend by
echo shutdown > /sys/power/disk; echo disk > /sys/power/state

10
Makefile
View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 4
PATCHLEVEL = 14
SUBLEVEL = 162
SUBLEVEL = 163
EXTRAVERSION =
NAME = Petit Gorille
@@ -785,7 +785,13 @@ KBUILD_CFLAGS += $(call cc-option, -Wno-undefined-optimized)
KBUILD_CFLAGS += $(call cc-option, -Wno-tautological-constant-out-of-range-compare)
KBUILD_CFLAGS += $(call cc-option, -mllvm -disable-struct-const-merge)
KBUILD_CFLAGS += $(call cc-option, -Wno-sometimes-uninitialized)
KBUILD_CFLAGS += -Wno-pointer-sign
KBUILD_CFLAGS += -Wno-format
KBUILD_CFLAGS += -Wno-format-extra-args
KBUILD_CFLAGS += -Wno-unused-variable
KBUILD_CFLAGS += -Wno-unused-parameter
KBUILD_CFLAGS += -Wno-unused-function
KBUILD_CFLAGS += -Wno-int-conversion
# Quiet clang warning: comparison of unsigned expression < 0 is always false
KBUILD_CFLAGS += $(call cc-disable-warning, tautological-compare)

11
arch/arm/Kconfig
View File

@@ -2174,6 +2174,17 @@ config AUTO_ZRELADDR
config EFI_STUB
bool
config ARM_DECOMPRESSOR_LIMIT
hex "Limit the decompressor memory area"
default 0x3200000
help
Allows overriding of the memory size that decompressor maps with
read, write and execute permissions to avoid speculative prefetch.
By default ARM_DECOMPRESSOR_LIMIT maps first 1GB of memory
with read, write and execute permissions and reset of the memory
as strongly ordered.
config EFI
bool "UEFI runtime support"
depends on OF && !CPU_BIG_ENDIAN && MMU && AUTO_ZRELADDR && !XIP_KERNEL

2
arch/arm/boot/compressed/head.S
View File

@@ -701,7 +701,7 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size
mov r0, r3
mov r9, r0, lsr #18
mov r9, r9, lsl #18 @ start of RAM
add r10, r9, #0x10000000 @ a reasonable RAM size
add r10, r9, #CONFIG_ARM_DECOMPRESSOR_LIMIT
mov r1, #0x12 @ XN|U + section mapping
orr r1, r1, #3 << 10 @ AP=11
add r2, r3, #16384

5
arch/arm/configs/vendor/mdm9607-128mb-perf_defconfig vendored
View File

@@ -179,6 +179,11 @@ CONFIG_POWER_SUPPLY=y
CONFIG_SMB358_CHARGER=y
CONFIG_THERMAL=y
CONFIG_THERMAL_WRITABLE_TRIPS=y
CONFIG_THERMAL_GOV_USER_SPACE=y
CONFIG_THERMAL_GOV_LOW_LIMITS=y
CONFIG_CPU_THERMAL=y
CONFIG_QTI_QMI_COOLING_DEVICE=y
CONFIG_REGULATOR_COOLING_DEVICE=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_CPR=y
CONFIG_REGULATOR_MEM_ACC=y

5
arch/arm/configs/vendor/mdm9607-perf_defconfig vendored
View File

@@ -208,8 +208,13 @@ CONFIG_POWER_SUPPLY=y
CONFIG_SMB358_CHARGER=y
CONFIG_THERMAL=y
CONFIG_THERMAL_WRITABLE_TRIPS=y
CONFIG_THERMAL_GOV_USER_SPACE=y
CONFIG_THERMAL_GOV_LOW_LIMITS=y
CONFIG_CPU_THERMAL=y
CONFIG_QCOM_SPMI_TEMP_ALARM=y
CONFIG_THERMAL_TSENS=y
CONFIG_QTI_QMI_COOLING_DEVICE=y
CONFIG_REGULATOR_COOLING_DEVICE=y
CONFIG_QTI_ADC_TM=y
CONFIG_MFD_SPMI_PMIC=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y

5
arch/arm/configs/vendor/mdm9607_defconfig vendored
View File

@@ -211,8 +211,13 @@ CONFIG_POWER_SUPPLY=y
CONFIG_SMB358_CHARGER=y
CONFIG_THERMAL=y
CONFIG_THERMAL_WRITABLE_TRIPS=y
CONFIG_THERMAL_GOV_USER_SPACE=y
CONFIG_THERMAL_GOV_LOW_LIMITS=y
CONFIG_CPU_THERMAL=y
CONFIG_QCOM_SPMI_TEMP_ALARM=y
CONFIG_THERMAL_TSENS=y
CONFIG_QTI_QMI_COOLING_DEVICE=y
CONFIG_REGULATOR_COOLING_DEVICE=y
CONFIG_QTI_ADC_TM=y
CONFIG_MFD_SPMI_PMIC=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y

2
arch/arm/configs/vendor/sa515m-perf_defconfig vendored
View File

@@ -230,7 +230,7 @@ CONFIG_PPP=y
CONFIG_PPP_ASYNC=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
CONFIG_CLD_LL_CORE=y
CONFIG_CNSS2=y
CONFIG_CNSS2=m
CONFIG_CNSS2_QMI=y
CONFIG_CNSS_QCA6390=y
CONFIG_CNSS_UTILS=y

2
arch/arm/configs/vendor/sa515m_defconfig vendored
View File

@@ -228,7 +228,7 @@ CONFIG_PPP=y
CONFIG_PPP_ASYNC=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
CONFIG_CLD_LL_CORE=y
CONFIG_CNSS2=y
CONFIG_CNSS2=m
CONFIG_CNSS2_DEBUG=y
CONFIG_CNSS2_QMI=y
CONFIG_CNSS_QCA6390=y

60
arch/arm/configs/vendor/sdm429-bg-perf_defconfig vendored
View File

@@ -230,6 +230,7 @@ CONFIG_NET_ACT_MIRRED=y
CONFIG_NET_ACT_SKBEDIT=y
CONFIG_QRTR=y
CONFIG_QRTR_SMD=y
CONFIG_RMNET_DATA=y
CONFIG_SOCKEV_NLMCAST=y
CONFIG_BT=y
CONFIG_MSM_BT_POWER=y
@@ -277,7 +278,7 @@ CONFIG_NETDEVICES=y
CONFIG_BONDING=y
CONFIG_DUMMY=y
CONFIG_TUN=y
CONFIG_RMNET=y
CONFIG_MSM_RMNET_BAM=y
CONFIG_PPP=y
CONFIG_PPP_BSDCOMP=y
CONFIG_PPP_DEFLATE=y
@@ -317,21 +318,22 @@ CONFIG_TOUCHSCREEN_SYNAPTICS_TCM_ZEROFLASH=y
CONFIG_TOUCHSCREEN_SYNAPTICS_TCM_DIAGNOSTICS=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_QPNP_POWER_ON=y
CONFIG_INPUT_QTI_HAPTICS=y
CONFIG_INPUT_UINPUT=y
# CONFIG_SERIO_SERPORT is not set
# CONFIG_VT is not set
# CONFIG_LEGACY_PTYS is not set
# CONFIG_DEVMEM is not set
CONFIG_SERIAL_MSM_GENI=y
CONFIG_SERIAL_MSM_HS=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_MSM_LEGACY=y
CONFIG_MSM_SMD_PKT=y
CONFIG_DIAG_CHAR=y
CONFIG_MSM_ADSPRPC=y
CONFIG_MSM_RDBG=m
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_QCOM_GENI=y
CONFIG_I2C_MSM_V2=y
CONFIG_SPI=y
CONFIG_SPI_QCOM_GENI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=y
CONFIG_SPMI=y
CONFIG_SPMI_SIMULATOR=y
@@ -365,10 +367,10 @@ CONFIG_MFD_I2C_PMIC=y
CONFIG_MFD_SPMI_PMIC=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_PROXY_CONSUMER=y
CONFIG_REGULATOR_PM8008=y
CONFIG_REGULATOR_QPNP_LCDB=y
CONFIG_REGULATOR_REFGEN=y
CONFIG_REGULATOR_CPR=y
CONFIG_REGULATOR_MEM_ACC=y
CONFIG_REGULATOR_RPM_SMD=y
CONFIG_REGULATOR_SPM=y
CONFIG_REGULATOR_STUB=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
@@ -420,7 +422,6 @@ CONFIG_DRM_SDE_EVTLOG_DEBUG=y
CONFIG_DRM_SDE_RSC=y
CONFIG_FB_ARMCLCD=y
CONFIG_FB_VIRTUAL=y
CONFIG_BACKLIGHT_QCOM_SPMI_WLED=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
@@ -440,28 +441,22 @@ CONFIG_HID_PLANTRONICS=y
CONFIG_HID_SONY=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_MSM=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_MSM=y
CONFIG_USB_ISP1760=y
CONFIG_USB_ISP1760_HOST_ROLE=y
CONFIG_USB_EHSET_TEST_FIXTURE=y
CONFIG_USB_LINK_LAYER_TEST=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_QCOM_EMU_PHY=y
CONFIG_USB_MSM_SSPHY_QMP=y
CONFIG_MSM_QUSB_PHY=y
CONFIG_MSM_HSUSB_PHY=y
CONFIG_DUAL_ROLE_USB_INTF=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_VBUS_DRAW=900
CONFIG_USB_GADGET_DEBUG_FILES=y
CONFIG_USB_GADGET_DEBUG_FS=y
CONFIG_USB_GADGET_VBUS_DRAW=500
CONFIG_USB_CI13XXX_MSM=y
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_NCM=y
CONFIG_USB_CONFIGFS_RMNET_BAM=y
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_USB_CONFIGFS_F_MTP=y
@@ -473,11 +468,7 @@ CONFIG_USB_CONFIGFS_F_MIDI=y
CONFIG_USB_CONFIGFS_F_HID=y
CONFIG_USB_CONFIGFS_F_DIAG=y
CONFIG_USB_CONFIGFS_F_CDEV=y
CONFIG_USB_CONFIGFS_F_CCID=y
CONFIG_USB_CONFIGFS_F_GSI=y
CONFIG_USB_CONFIGFS_F_QDSS=y
CONFIG_USB_PD_POLICY=y
CONFIG_QPNP_USB_PDPHY=y
CONFIG_MMC=y
CONFIG_MMC_PERF_PROFILING=y
CONFIG_MMC_BLOCK_MINORS=32
@@ -492,8 +483,6 @@ CONFIG_MMC_SDHCI_MSM=y
CONFIG_MMC_SDHCI_MSM_ICE=y
CONFIG_MMC_CQ_HCI=y
CONFIG_LEDS_QPNP_FLASH_V2=y
CONFIG_LEDS_QPNP_HAPTICS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_QPNP=y
CONFIG_DMADEVICES=y
@@ -504,21 +493,16 @@ CONFIG_STAGING=y
CONFIG_ASHMEM=y
CONFIG_ANDROID_LOW_MEMORY_KILLER=y
CONFIG_ION=y
CONFIG_QCOM_GENI_SE=y
CONFIG_QPNP_REVID=y
CONFIG_SPS=y
CONFIG_SPS_SUPPORT_NDP_BAM=y
CONFIG_USB_BAM=y
CONFIG_IPA3=y
CONFIG_IPA_WDI_UNIFIED_API=y
CONFIG_RMNET_IPA3=y
CONFIG_RNDIS_IPA=y
CONFIG_IPA_UT=y
CONFIG_MSM_11AD=m
CONFIG_QCOM_MDSS_PLL=y
CONFIG_QCOM_CLK_SMD_RPM=y
CONFIG_SPMI_PMIC_CLKDIV=y
CONFIG_SDM_GCC_429W=y
CONFIG_SDM_DEBUGCC_429W=y
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_QCOM=y
CONFIG_MAILBOX=y
@@ -530,9 +514,7 @@ CONFIG_IOMMU_DEBUG=y
CONFIG_IOMMU_DEBUG_TRACKING=y
CONFIG_IOMMU_TESTS=y
CONFIG_RPMSG_CHAR=y
CONFIG_RPMSG_QCOM_GLINK_RPM=y
CONFIG_RPMSG_QCOM_GLINK_SMEM=y
CONFIG_RPMSG_QCOM_GLINK_SPI=y
CONFIG_RPMSG_QCOM_SMD=y
CONFIG_QCOM_CPUSS_DUMP=y
CONFIG_QCOM_RUN_QUEUE_STATS=y
CONFIG_QCOM_QMI_HELPERS=y
@@ -542,6 +524,7 @@ CONFIG_QCOM_MEMORY_DUMP_V2=y
CONFIG_QCOM_WATCHDOG_V2=y
CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y
CONFIG_QCOM_SMP2P=y
CONFIG_QCOM_SMSM=y
CONFIG_QPNP_PBS=y
CONFIG_MSM_SERVICE_LOCATOR=y
CONFIG_MSM_SERVICE_NOTIFIER=y
@@ -563,8 +546,6 @@ CONFIG_QCOM_BUS_SCALING=y
CONFIG_QCOM_COMMAND_DB=y
CONFIG_QCOM_EARLY_RANDOM=y
CONFIG_QSEE_IPC_IRQ=y
CONFIG_QCOM_GLINK=y
CONFIG_QCOM_GLINK_PKT=y
CONFIG_QTI_RPM_STATS_LOG=y
CONFIG_MSM_CDSP_LOADER=y
CONFIG_QCOM_SMCINVOKE=y
@@ -575,8 +556,8 @@ CONFIG_MEM_SHARE_QMI_SERVICE=y
CONFIG_MSM_PERFORMANCE=y
CONFIG_QMP_DEBUGFS_CLIENT=y
CONFIG_QCOM_SMP2P_SLEEPSTATE=y
CONFIG_QCOM_CDSP_RM=y
CONFIG_QCOM_CX_IPEAK=y
CONFIG_MSM_BAM_DMUX=y
CONFIG_DEVFREQ_GOV_PASSIVE=y
CONFIG_QCOM_BIMC_BWMON=y
CONFIG_ARM_MEMLAT_MON=y
@@ -598,7 +579,6 @@ CONFIG_RAS=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_QCOM_QFPROM=y
CONFIG_NVMEM_SPMI_SDAM=y
CONFIG_SENSORS_SSC=y
CONFIG_MSM_TZ_LOG=y
CONFIG_EXT4_FS=y

60
arch/arm/configs/vendor/sdm429-bg_defconfig vendored
View File

@@ -235,6 +235,7 @@ CONFIG_NET_ACT_SKBEDIT=y
CONFIG_DNS_RESOLVER=y
CONFIG_QRTR=y
CONFIG_QRTR_SMD=y
CONFIG_RMNET_DATA=y
CONFIG_SOCKEV_NLMCAST=y
CONFIG_BT=y
CONFIG_MSM_BT_POWER=y
@@ -284,7 +285,7 @@ CONFIG_NETDEVICES=y
CONFIG_BONDING=y
CONFIG_DUMMY=y
CONFIG_TUN=y
CONFIG_RMNET=y
CONFIG_MSM_RMNET_BAM=y
CONFIG_PPP=y
CONFIG_PPP_BSDCOMP=y
CONFIG_PPP_DEFLATE=y
@@ -324,24 +325,26 @@ CONFIG_TOUCHSCREEN_SYNAPTICS_TCM_ZEROFLASH=y
CONFIG_TOUCHSCREEN_SYNAPTICS_TCM_DIAGNOSTICS=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_QPNP_POWER_ON=y
CONFIG_INPUT_QTI_HAPTICS=y
CONFIG_INPUT_UINPUT=y
# CONFIG_SERIO_SERPORT is not set
# CONFIG_VT is not set
# CONFIG_LEGACY_PTYS is not set
# CONFIG_DEVMEM is not set
CONFIG_SERIAL_MSM_GENI=y
CONFIG_SERIAL_MSM_GENI_CONSOLE=y
CONFIG_SERIAL_MSM=y
CONFIG_SERIAL_MSM_CONSOLE=y
CONFIG_SERIAL_MSM_HS=y
CONFIG_SERIAL_DEV_BUS=y
CONFIG_TTY_PRINTK=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_MSM_LEGACY=y
CONFIG_MSM_SMD_PKT=y
CONFIG_DIAG_CHAR=y
CONFIG_MSM_ADSPRPC=y
CONFIG_MSM_RDBG=m
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_QCOM_GENI=y
CONFIG_I2C_MSM_V2=y
CONFIG_SPI=y
CONFIG_SPI_QCOM_GENI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=y
CONFIG_SPMI=y
CONFIG_SPMI_SIMULATOR=y
@@ -375,10 +378,10 @@ CONFIG_MFD_I2C_PMIC=y
CONFIG_MFD_SPMI_PMIC=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_PROXY_CONSUMER=y
CONFIG_REGULATOR_PM8008=y
CONFIG_REGULATOR_QPNP_LCDB=y
CONFIG_REGULATOR_REFGEN=y
CONFIG_REGULATOR_CPR=y
CONFIG_REGULATOR_MEM_ACC=y
CONFIG_REGULATOR_RPM_SMD=y
CONFIG_REGULATOR_SPM=y
CONFIG_REGULATOR_STUB=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
@@ -431,7 +434,6 @@ CONFIG_DRM_SDE_RSC=y
CONFIG_FB_VIRTUAL=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_QCOM_SPMI_WLED=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
@@ -451,18 +453,11 @@ CONFIG_HID_PLANTRONICS=y
CONFIG_HID_SONY=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_MSM=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_MSM=y
CONFIG_USB_ISP1760=y
CONFIG_USB_ISP1760_HOST_ROLE=y
CONFIG_USB_EHSET_TEST_FIXTURE=y
CONFIG_USB_LINK_LAYER_TEST=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_QCOM_EMU_PHY=y
CONFIG_USB_MSM_SSPHY_QMP=y
@@ -470,9 +465,13 @@ CONFIG_MSM_QUSB_PHY=y
CONFIG_MSM_HSUSB_PHY=y
CONFIG_DUAL_ROLE_USB_INTF=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_VBUS_DRAW=900
CONFIG_USB_GADGET_DEBUG_FILES=y
CONFIG_USB_GADGET_DEBUG_FS=y
CONFIG_USB_GADGET_VBUS_DRAW=500
CONFIG_USB_CI13XXX_MSM=y
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_NCM=y
CONFIG_USB_CONFIGFS_RMNET_BAM=y
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_USB_CONFIGFS_F_MTP=y
@@ -484,11 +483,7 @@ CONFIG_USB_CONFIGFS_F_MIDI=y
CONFIG_USB_CONFIGFS_F_HID=y
CONFIG_USB_CONFIGFS_F_DIAG=y
CONFIG_USB_CONFIGFS_F_CDEV=y
CONFIG_USB_CONFIGFS_F_CCID=y
CONFIG_USB_CONFIGFS_F_GSI=y
CONFIG_USB_CONFIGFS_F_QDSS=y
CONFIG_USB_PD_POLICY=y
CONFIG_QPNP_USB_PDPHY=y
CONFIG_MMC=y
CONFIG_MMC_PERF_PROFILING=y
CONFIG_MMC_BLOCK_MINORS=32
@@ -503,7 +498,6 @@ CONFIG_MMC_SDHCI_MSM=y
CONFIG_MMC_SDHCI_MSM_ICE=y
CONFIG_MMC_CQ_HCI=y
CONFIG_LEDS_QPNP_FLASH_V2=y
CONFIG_LEDS_QPNP_HAPTICS=y
CONFIG_EDAC=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_QPNP=y
@@ -517,19 +511,13 @@ CONFIG_STAGING=y
CONFIG_ASHMEM=y
CONFIG_ANDROID_LOW_MEMORY_KILLER=y
CONFIG_ION=y
CONFIG_QCOM_GENI_SE=y
CONFIG_QPNP_REVID=y
CONFIG_SPS=y
CONFIG_SPS_SUPPORT_NDP_BAM=y
CONFIG_USB_BAM=y
CONFIG_IPA3=y
CONFIG_IPA_DEBUG=y
CONFIG_IPA_WDI_UNIFIED_API=y
CONFIG_RMNET_IPA3=y
CONFIG_RNDIS_IPA=y
CONFIG_IPA_UT=y
CONFIG_QCOM_CLK_SMD_RPM=y
CONFIG_SDM_GCC_429W=y
CONFIG_SDM_DEBUGCC_429W=y
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_QCOM=y
CONFIG_MAILBOX=y
@@ -544,9 +532,7 @@ CONFIG_IOMMU_DEBUG=y
CONFIG_IOMMU_DEBUG_TRACKING=y
CONFIG_IOMMU_TESTS=y
CONFIG_RPMSG_CHAR=y
CONFIG_RPMSG_QCOM_GLINK_RPM=y
CONFIG_RPMSG_QCOM_GLINK_SMEM=y
CONFIG_RPMSG_QCOM_GLINK_SPI=y
CONFIG_RPMSG_QCOM_SMD=y
CONFIG_QCOM_CPUSS_DUMP=y
CONFIG_QCOM_RUN_QUEUE_STATS=y
CONFIG_QCOM_QMI_HELPERS=y
@@ -557,6 +543,7 @@ CONFIG_QCOM_WATCHDOG_V2=y
CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y
CONFIG_QCOM_WDOG_IPI_ENABLE=y
CONFIG_QCOM_SMP2P=y
CONFIG_QCOM_SMSM=y
CONFIG_QPNP_PBS=y
CONFIG_MSM_SERVICE_LOCATOR=y
CONFIG_MSM_SERVICE_NOTIFIER=y
@@ -583,8 +570,6 @@ CONFIG_QCOM_BUS_SCALING=y
CONFIG_QCOM_COMMAND_DB=y
CONFIG_QCOM_EARLY_RANDOM=y
CONFIG_QSEE_IPC_IRQ=y
CONFIG_QCOM_GLINK=y
CONFIG_QCOM_GLINK_PKT=y
# CONFIG_MSM_JTAGV8 is not set
CONFIG_QTI_RPM_STATS_LOG=y
CONFIG_MSM_CDSP_LOADER=y
@@ -596,8 +581,8 @@ CONFIG_MEM_SHARE_QMI_SERVICE=y
CONFIG_MSM_PERFORMANCE=y
CONFIG_QMP_DEBUGFS_CLIENT=y
CONFIG_QCOM_SMP2P_SLEEPSTATE=y
CONFIG_QCOM_CDSP_RM=y
CONFIG_QCOM_CX_IPEAK=y
CONFIG_MSM_BAM_DMUX=y
CONFIG_DEVFREQ_GOV_PASSIVE=y
CONFIG_QCOM_BIMC_BWMON=y
CONFIG_ARM_MEMLAT_MON=y
@@ -618,7 +603,6 @@ CONFIG_RAS=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_QCOM_QFPROM=y
CONFIG_NVMEM_SPMI_SDAM=y
CONFIG_SENSORS_SSC=y
CONFIG_MSM_TZ_LOG=y
CONFIG_EXT4_FS=y

1
arch/arm/mach-qcom/Makefile
View File

@@ -5,5 +5,6 @@ obj-$(CONFIG_ARCH_QCS403) += board-qcs403.o
obj-$(CONFIG_ARCH_SDM429W) += board-sdm429w.o
obj-$(CONFIG_ARCH_TRINKET) += board-trinket.o
obj-$(CONFIG_ARCH_SDXPRAIRIE) += board-sdxprairie.o
obj-$(CONFIG_ARCH_SDM660) += board-660.o
obj-$(CONFIG_ARCH_MDM9607) += board-mdm9607.o
obj-$(CONFIG_ARCH_SDM660) += board-660.o

2
arch/arm64/Kconfig.platforms
View File

@@ -145,8 +145,6 @@ config ARCH_QCOM
select PM_OPP
select SOC_BUS
select MFD_CORE
select SND_SOC_COMPRESS
select SND_HWDEP
select CLKDEV_LOOKUP
select HAVE_CLK
select HAVE_CLK_PREPARE

4
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
View File

@@ -295,7 +295,7 @@
};
&usb0_phy {
status = "okay";
status = "disabled";
phy-supply = <&usb_otg_pwr>;
};
@@ -305,7 +305,7 @@
};
&usb0 {
status = "okay";
status = "disabled";
};
&usb1 {

4
arch/arm64/boot/dts/qcom/Makefile
View File

@@ -184,7 +184,7 @@ dtb-$(CONFIG_QTI_GVM) += sa8155-vm-la.dtb \
sa8155-vm-lv.dtb \
sa8155-vm-lv-mt.dtb \
sa8155-vm-la-mt.dtb \
sa6155p-vm.dtb \
sa6155p-vm-la.dtb \
sa8195-vm-la.dtb \
sa8195-vm-la-mt.dtb \
sa8195-vm-lv.dtb \
@@ -402,6 +402,7 @@ dtb-$(CONFIG_ARCH_SDXPRAIRIE) += sdxprairie-rumi.dtb \
sa515m-v2-ttp-pcie-ep.dtb \
sa515m-v2-ttp-flashless-usb-ep.dtb \
sa515m-v2-ttp-flashless-pcie-ep.dtb \
sa515m-v2-ttp-emmc.dtb \
sa515m-ccard.dtb \
sa515m-ccard-pcie-ep.dtb \
sa515m-ccard-usb-ep.dtb \
@@ -499,6 +500,7 @@ endif
endif
ifeq ($(CONFIG_ARM64),y)
always := $(dtb-y)
subdir-y := $(dts-dirs)

22
arch/arm64/boot/dts/qcom/atoll-idp.dtsi
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -221,6 +221,7 @@
&qupv3_se7_i2c {
status = "ok";
qcom,i2c-touch-active = "synaptics,tcm-i2c";
synaptics_tcm@20 {
compatible = "synaptics,tcm-i2c";
reg = <0x20>;
@@ -244,6 +245,25 @@
synaptics,power-delay-ms = <200>;
synaptics,ubl-i2c-addr = <0x20>;
};
atmel_mxt_ts@4a {
compatible = "atmel,maxtouch";
reg = <0x4a>;
interrupt-parent = <&tlmm>;
interrupts = <9 0x2008>;
avdd-supply = <&pm6150l_l7>;
vdd-supply = <&pm6150_l10>;
pinctrl-names = "pmx_ts_active", "pmx_ts_suspend";
pinctrl-0 = <&ts_active>;
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
reset-gpios = <&tlmm 8 0x00>;
irq-gpios = <&tlmm 9 0x2008>;
atmel,xy_switch;
atmel,panel-coords = <0 0 479 799>;
atmel,display-coords = <0 0 339 769>;
};
};
&dsi_rm69299_visionox_amoled_video {

1
arch/arm64/boot/dts/qcom/atoll-sde-display.dtsi
View File

@@ -372,6 +372,7 @@
qcom,dsi-dyn-clk-skip-timing-update;
qcom,dsi-dyn-clk-list =
<1052068500 1047684883 1043301259 1038917642 1034534025>;
qcom,dsi-dyn-clk-type = "constant-fps-adjust-hfp";
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-panel-phy-timings = [00 23 09 09 26 24 09

366
arch/arm64/boot/dts/qcom/dsi-panel-nt35597-truly-dualmipi-wqxga-cmd.dtsi
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2016-2017,2020, The Linux Foundation. All rights reserved.
/* Copyright (c) 2016-2017, 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -15,27 +15,12 @@
qcom,mdss-dsi-panel-name =
"Dual nt35597 cmd mode dsi truly panel without DSC";
qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
qcom,mdss-dsi-panel-framerate = <60>;
qcom,mdss-dsi-virtual-channel-id = <0>;
qcom,mdss-dsi-stream = <0>;
qcom,mdss-dsi-panel-width = <720>;
qcom,mdss-dsi-panel-height = <2560>;
qcom,mdss-dsi-h-front-porch = <100>;
qcom,mdss-dsi-h-back-porch = <32>;
qcom,mdss-dsi-h-pulse-width = <16>;
qcom,mdss-dsi-h-sync-skew = <0>;
qcom,mdss-dsi-v-back-porch = <7>;
qcom,mdss-dsi-v-front-porch = <8>;
qcom,mdss-dsi-v-pulse-width = <1>;
qcom,mdss-dsi-h-left-border = <0>;
qcom,mdss-dsi-h-right-border = <0>;
qcom,mdss-dsi-v-top-border = <0>;
qcom,mdss-dsi-v-bottom-border = <0>;
qcom,mdss-dsi-bpp = <24>;
qcom,mdss-dsi-color-order = "rgb_swap_rgb";
qcom,mdss-dsi-underflow-color = <0xff>;
qcom,mdss-dsi-border-color = <0>;
qcom,mdss-dsi-h-sync-pulse = <0>;
qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
qcom,mdss-dsi-bllp-eof-power-mode;
qcom,mdss-dsi-bllp-power-mode;
@@ -43,13 +28,10 @@
qcom,mdss-dsi-lane-1-state;
qcom,mdss-dsi-lane-2-state;
qcom,mdss-dsi-lane-3-state;
qcom,mdss-dsi-panel-timings = [cd 32 22 00 60 64 26 34 29 03
04 00];
qcom,adjust-timer-wakeup-ms = <1>;
qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
qcom,mdss-dsi-tx-eot-append;
qcom,mdss-dsi-t-clk-post = <0x0d>;
qcom,mdss-dsi-t-clk-pre = <0x2d>;
qcom,mdss-pan-physical-width-dimension = <74>;
qcom,mdss-pan-physical-height-dimension = <131>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-dsi-dma-trigger = "trigger_sw";
qcom,mdss-dsi-mdp-trigger = "none";
@@ -59,170 +41,186 @@
qcom,mdss-dsi-te-dcs-command = <1>;
qcom,mdss-dsi-te-check-enable;
qcom,mdss-dsi-te-using-te-pin;
qcom,ulps-enabled;
qcom,mdss-dsi-on-command = [
/* CMD2_P0 */
15 01 00 00 00 00 02 FF 20
15 01 00 00 00 00 02 fb 01
15 01 00 00 00 00 02 00 01
15 01 00 00 00 00 02 01 55
15 01 00 00 00 00 02 02 45
15 01 00 00 00 00 02 05 40
15 01 00 00 00 00 02 06 19
15 01 00 00 00 00 02 07 1E
15 01 00 00 00 00 02 0B 73
15 01 00 00 00 00 02 0C 73
15 01 00 00 00 00 02 0E B0
15 01 00 00 00 00 02 0F AE
15 01 00 00 00 00 02 11 B8
15 01 00 00 00 00 02 13 00
15 01 00 00 00 00 02 58 80
15 01 00 00 00 00 02 59 01
15 01 00 00 00 00 02 5A 00
15 01 00 00 00 00 02 5B 01
15 01 00 00 00 00 02 5C 80
15 01 00 00 00 00 02 5D 81
15 01 00 00 00 00 02 5E 00
15 01 00 00 00 00 02 5F 01
15 01 00 00 00 00 02 72 11
15 01 00 00 00 00 02 68 03
/* CMD2_P4 */
15 01 00 00 00 00 02 ff 24
15 01 00 00 00 00 02 fb 01
15 01 00 00 00 00 02 00 1C
15 01 00 00 00 00 02 01 0B
15 01 00 00 00 00 02 02 0C
15 01 00 00 00 00 02 03 01
15 01 00 00 00 00 02 04 0F
15 01 00 00 00 00 02 05 10
15 01 00 00 00 00 02 06 10
15 01 00 00 00 00 02 07 10
15 01 00 00 00 00 02 08 89
15 01 00 00 00 00 02 09 8A
15 01 00 00 00 00 02 0A 13
15 01 00 00 00 00 02 0B 13
15 01 00 00 00 00 02 0C 15
15 01 00 00 00 00 02 0D 15
15 01 00 00 00 00 02 0E 17
15 01 00 00 00 00 02 0F 17
15 01 00 00 00 00 02 10 1C
15 01 00 00 00 00 02 11 0B
15 01 00 00 00 00 02 12 0C
15 01 00 00 00 00 02 13 01
15 01 00 00 00 00 02 14 0F
15 01 00 00 00 00 02 15 10
15 01 00 00 00 00 02 16 10
15 01 00 00 00 00 02 17 10
15 01 00 00 00 00 02 18 89
15 01 00 00 00 00 02 19 8A
15 01 00 00 00 00 02 1A 13
15 01 00 00 00 00 02 1B 13
15 01 00 00 00 00 02 1C 15
15 01 00 00 00 00 02 1D 15
15 01 00 00 00 00 02 1E 17
15 01 00 00 00 00 02 1F 17
/* STV */
15 01 00 00 00 00 02 20 40
15 01 00 00 00 00 02 21 01
15 01 00 00 00 00 02 22 00
15 01 00 00 00 00 02 23 40
15 01 00 00 00 00 02 24 40
15 01 00 00 00 00 02 25 6D
15 01 00 00 00 00 02 26 40
15 01 00 00 00 00 02 27 40
/* Vend */
15 01 00 00 00 00 02 E0 00
15 01 00 00 00 00 02 DC 21
15 01 00 00 00 00 02 DD 22
15 01 00 00 00 00 02 DE 07
15 01 00 00 00 00 02 DF 07
15 01 00 00 00 00 02 E3 6D
15 01 00 00 00 00 02 E1 07
15 01 00 00 00 00 02 E2 07
/* UD */
15 01 00 00 00 00 02 29 D8
15 01 00 00 00 00 02 2A 2A
/* CLK */
15 01 00 00 00 00 02 4B 03
15 01 00 00 00 00 02 4C 11
15 01 00 00 00 00 02 4D 10
15 01 00 00 00 00 02 4E 01
15 01 00 00 00 00 02 4F 01
15 01 00 00 00 00 02 50 10
15 01 00 00 00 00 02 51 00
15 01 00 00 00 00 02 52 80
15 01 00 00 00 00 02 53 00
15 01 00 00 00 00 02 56 00
15 01 00 00 00 00 02 54 07
15 01 00 00 00 00 02 58 07
15 01 00 00 00 00 02 55 25
/* Reset XDONB */
15 01 00 00 00 00 02 5B 43
15 01 00 00 00 00 02 5C 00
15 01 00 00 00 00 02 5F 73
15 01 00 00 00 00 02 60 73
15 01 00 00 00 00 02 63 22
15 01 00 00 00 00 02 64 00
15 01 00 00 00 00 02 67 08
15 01 00 00 00 00 02 68 04
/* Resolution:1440x2560*/
15 01 00 00 00 00 02 72 02
/* mux */
15 01 00 00 00 00 02 7A 80
15 01 00 00 00 00 02 7B 91
15 01 00 00 00 00 02 7C D8
15 01 00 00 00 00 02 7D 60
15 01 00 00 00 00 02 7F 15
15 01 00 00 00 00 02 75 15
/* ABOFF */
15 01 00 00 00 00 02 B3 C0
15 01 00 00 00 00 02 B4 00
15 01 00 00 00 00 02 B5 00
/* Source EQ */
15 01 00 00 00 00 02 78 00
15 01 00 00 00 00 02 79 00
15 01 00 00 00 00 02 80 00
15 01 00 00 00 00 02 83 00
/* FP BP */
15 01 00 00 00 00 02 93 0A
15 01 00 00 00 00 02 94 0A
/* Inversion Type */
15 01 00 00 00 00 02 8A 00
15 01 00 00 00 00 02 9B FF
/* IMGSWAP =1 @PortSwap=1 */
15 01 00 00 00 00 02 9D B0
15 01 00 00 00 00 02 9F 63
15 01 00 00 00 00 02 98 10
/* FRM */
15 01 00 00 00 00 02 EC 00
/* CMD1 */
15 01 00 00 00 00 02 ff 10
/* VBP+VSA=,VFP = 10H */
15 01 00 00 00 00 04 3B 03 0A 0A
/* FTE on */
15 01 00 00 00 00 02 35 00
/* EN_BK =1(auto black) */
15 01 00 00 00 00 02 E5 01
/* CMD mode(10) VDO mode(03) */
15 01 00 00 00 00 02 BB 10
/* Non Reload MTP */
15 01 00 00 00 00 02 FB 01
/* SlpOut + DispOn */
05 01 00 00 78 00 02 11 00
05 01 00 00 78 00 02 29 00
];
qcom,mdss-dsi-off-command = [05 01 00 00 78 00 02 28 00
05 01 00 00 78 00 02 10 00];
qcom,mdss-dsi-panel-hdr-enabled;
qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000
17000 15500 30000 8000 3000>;
qcom,mdss-dsi-panel-peak-brightness = <4200000>;
qcom,mdss-dsi-panel-blackness-level = <3230>;
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
qcom,mdss-pan-physical-width-dimension = <74>;
qcom,mdss-pan-physical-height-dimension = <131>;
qcom,config-select = <&dsi_dual_nt35597_truly_cmd_config0>;
dsi_dual_nt35597_truly_cmd_config0: config0 {
qcom,split-mode = "dualctl-split";
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-panel-framerate = <60>;
qcom,mdss-dsi-panel-width = <720>;
qcom,mdss-dsi-panel-height = <2560>;
qcom,mdss-dsi-h-front-porch = <100>;
qcom,mdss-dsi-h-back-porch = <32>;
qcom,mdss-dsi-h-pulse-width = <16>;
qcom,mdss-dsi-h-sync-skew = <0>;
qcom,mdss-dsi-v-back-porch = <7>;
qcom,mdss-dsi-v-front-porch = <8>;
qcom,mdss-dsi-v-pulse-width = <1>;
qcom,mdss-dsi-h-left-border = <0>;
qcom,mdss-dsi-h-right-border = <0>;
qcom,mdss-dsi-v-top-border = <0>;
qcom,mdss-dsi-v-bottom-border = <0>;
qcom,mdss-dsi-h-sync-pulse = <0>;
qcom,mdss-dsi-panel-jitter = <0x1 0x1>;
qcom,mdss-dsi-on-command = [
/* CMD2_P0 */
15 01 00 00 00 00 02 FF 20
15 01 00 00 00 00 02 fb 01
15 01 00 00 00 00 02 00 01
15 01 00 00 00 00 02 01 55
15 01 00 00 00 00 02 02 45
15 01 00 00 00 00 02 05 40
15 01 00 00 00 00 02 06 19
15 01 00 00 00 00 02 07 1E
15 01 00 00 00 00 02 0B 73
15 01 00 00 00 00 02 0C 73
15 01 00 00 00 00 02 0E B0
15 01 00 00 00 00 02 0F AE
15 01 00 00 00 00 02 11 B8
15 01 00 00 00 00 02 13 00
15 01 00 00 00 00 02 58 80
15 01 00 00 00 00 02 59 01
15 01 00 00 00 00 02 5A 00
15 01 00 00 00 00 02 5B 01
15 01 00 00 00 00 02 5C 80
15 01 00 00 00 00 02 5D 81
15 01 00 00 00 00 02 5E 00
15 01 00 00 00 00 02 5F 01
15 01 00 00 00 00 02 72 31
15 01 00 00 00 00 02 68 03
/* CMD2_P4 */
15 01 00 00 00 00 02 ff 24
15 01 00 00 00 00 02 fb 01
15 01 00 00 00 00 02 00 1C
15 01 00 00 00 00 02 01 0B
15 01 00 00 00 00 02 02 0C
15 01 00 00 00 00 02 03 01
15 01 00 00 00 00 02 04 0F
15 01 00 00 00 00 02 05 10
15 01 00 00 00 00 02 06 10
15 01 00 00 00 00 02 07 10
15 01 00 00 00 00 02 08 89
15 01 00 00 00 00 02 09 8A
15 01 00 00 00 00 02 0A 13
15 01 00 00 00 00 02 0B 13
15 01 00 00 00 00 02 0C 15
15 01 00 00 00 00 02 0D 15
15 01 00 00 00 00 02 0E 17
15 01 00 00 00 00 02 0F 17
15 01 00 00 00 00 02 10 1C
15 01 00 00 00 00 02 11 0B
15 01 00 00 00 00 02 12 0C
15 01 00 00 00 00 02 13 01
15 01 00 00 00 00 02 14 0F
15 01 00 00 00 00 02 15 10
15 01 00 00 00 00 02 16 10
15 01 00 00 00 00 02 17 10
15 01 00 00 00 00 02 18 89
15 01 00 00 00 00 02 19 8A
15 01 00 00 00 00 02 1A 13
15 01 00 00 00 00 02 1B 13
15 01 00 00 00 00 02 1C 15
15 01 00 00 00 00 02 1D 15
15 01 00 00 00 00 02 1E 17
15 01 00 00 00 00 02 1F 17
/* STV */
15 01 00 00 00 00 02 20 40
15 01 00 00 00 00 02 21 01
15 01 00 00 00 00 02 22 00
15 01 00 00 00 00 02 23 40
15 01 00 00 00 00 02 24 40
15 01 00 00 00 00 02 25 6D
15 01 00 00 00 00 02 26 40
15 01 00 00 00 00 02 27 40
/* Vend */
15 01 00 00 00 00 02 E0 00
15 01 00 00 00 00 02 DC 21
15 01 00 00 00 00 02 DD 22
15 01 00 00 00 00 02 DE 07
15 01 00 00 00 00 02 DF 07
15 01 00 00 00 00 02 E3 6D
15 01 00 00 00 00 02 E1 07
15 01 00 00 00 00 02 E2 07
/* UD */
15 01 00 00 00 00 02 29 D8
15 01 00 00 00 00 02 2A 2A
/* CLK */
15 01 00 00 00 00 02 4B 03
15 01 00 00 00 00 02 4C 11
15 01 00 00 00 00 02 4D 10
15 01 00 00 00 00 02 4E 01
15 01 00 00 00 00 02 4F 01
15 01 00 00 00 00 02 50 10
15 01 00 00 00 00 02 51 00
15 01 00 00 00 00 02 52 80
15 01 00 00 00 00 02 53 00
15 01 00 00 00 00 02 56 00
15 01 00 00 00 00 02 54 07
15 01 00 00 00 00 02 58 07
15 01 00 00 00 00 02 55 25
/* Reset XDONB */
15 01 00 00 00 00 02 5B 43
15 01 00 00 00 00 02 5C 00
15 01 00 00 00 00 02 5F 73
15 01 00 00 00 00 02 60 73
15 01 00 00 00 00 02 63 22
15 01 00 00 00 00 02 64 00
15 01 00 00 00 00 02 67 08
15 01 00 00 00 00 02 68 04
/* Resolution:1440x2560*/
15 01 00 00 00 00 02 72 02
/* mux */
15 01 00 00 00 00 02 7A 80
15 01 00 00 00 00 02 7B 91
15 01 00 00 00 00 02 7C D8
15 01 00 00 00 00 02 7D 60
15 01 00 00 00 00 02 7F 15
15 01 00 00 00 00 02 75 15
/* ABOFF */
15 01 00 00 00 00 02 B3 C0
15 01 00 00 00 00 02 B4 00
15 01 00 00 00 00 02 B5 00
/* Source EQ */
15 01 00 00 00 00 02 78 00
15 01 00 00 00 00 02 79 00
15 01 00 00 00 00 02 80 00
15 01 00 00 00 00 02 83 00
/* FP BP */
15 01 00 00 00 00 02 93 0A
15 01 00 00 00 00 02 94 0A
/* Inversion Type */
15 01 00 00 00 00 02 8A 00
15 01 00 00 00 00 02 9B FF
/* IMGSWAP =1 @PortSwap=1 */
15 01 00 00 00 00 02 9D B0
15 01 00 00 00 00 02 9F 63
15 01 00 00 00 00 02 98 10
/* FRM */
15 01 00 00 00 00 02 EC 00
/* CMD1 */
15 01 00 00 00 00 02 ff 10
/* VBP+VSA=,VFP = 10H */
15 01 00 00 00 00 04 3B 03 0A 0A
/* FTE on */
15 01 00 00 00 00 02 35 00
/* EN_BK =1(auto black) */
15 01 00 00 00 00 02 E5 01
/* CMD mode(10) VDO mode(03) */
15 01 00 00 00 00 02 BB 10
/* Non Reload MTP */
15 01 00 00 00 00 02 FB 01
/* SlpOut + DispOn */
05 01 00 00 78 00 02 11 00
05 01 00 00 78 00 02 29 00
];
qcom,mdss-dsi-off-command = [05 01 00 00 78 00
02 28 00 05 01 00 00 78 00 02 10 00];
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
};
};
};
};

20
arch/arm64/boot/dts/qcom/mdm9607-regulator.dtsi
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -10,7 +10,7 @@
* GNU General Public License for more details.
*/
&rpm_requests {
&rpmb {
rpm-regulator-smpa2 {
status = "okay";
mdm9607_s2: regulator-s2 {
@@ -70,6 +70,14 @@
<RPM_SMD_REGULATOR_LEVEL_TURBO>;
qcom,use-voltage-level;
};
cx_cdev: cx {
compatible = "qcom,regulator-cooling-device";
regulator-cdev-supply = <&mdm9607_s3_floor_level>;
regulator-levels = <RPM_SMD_REGULATOR_LEVEL_NOM_PLUS
RPM_SMD_REGULATOR_LEVEL_RETENTION>;
#cooling-cells = <2>;
};
};
rpm-regulator-smpa4 {
@@ -264,6 +272,14 @@
qcom,use-voltage-floor-level;
qcom,always-send-voltage;
};
mx_cdev: mx {
compatible = "qcom,regulator-cooling-device";
regulator-cdev-supply = <&mdm9607_l12_floor_level>;
regulator-levels = <RPM_SMD_REGULATOR_LEVEL_NOM_PLUS
RPM_SMD_REGULATOR_LEVEL_RETENTION>;
#cooling-cells = <2>;
};
};
rpm-regulator-ldoa13 {

293
arch/arm64/boot/dts/qcom/mdm9607-thermal.dtsi
View File

@@ -1,5 +1,5 @@
/*
*Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
*Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,6 +12,36 @@
*/
#include <dt-bindings/thermal/thermal.h>
&soc {
qmi-tmd-devices {
compatible = "qcom,qmi-cooling-devices";
modem {
qcom,instance-id = <0x0>;
modem_pa: modem_pa {
qcom,qmi-dev-name = "pa";
#cooling-cells = <2>;
};
modem_proc: modem_proc {
qcom,qmi-dev-name = "modem";
#cooling-cells = <2>;
};
modem_vdd: modem_vdd {
qcom,qmi-dev-name = "cpuv_restriction_cold";
#cooling-cells = <2>;
};
modem_cx: modem_cx {
qcom,qmi-dev-name = "cx_vdd_limit";
#cooling-cells = <2>;
};
};
};
};
&thermal_zones {
nav-usr {
polling-delay-passive = <0>;
@@ -112,4 +142,265 @@
};
};
};
cpuss-step {
polling-delay-passive = <65>;
polling-delay = <0>;
thermal-sensors = <&tsens 4>;
thermal-governor = "step_wise";
wake-capable-sensor;
trips {
cpu_trip:cpu-trip {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
};
cooling-maps {
cpu0_cdev {
trip = <&cpu_trip>;
cooling-device =
<&CPU0 THERMAL_NO_LIMIT
(THERMAL_MAX_LIMIT-1)>;
};
};
};
modem-dsp-step {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&tsens 2>;
thermal-governor = "step_wise";
wake-capable-sensor;
trips {
modem_pa_trip0: modem_pa_trip0 {
temperature = <95000>;
hysteresis = <5000>;
type = "passive";
};
modem_pa_trip1: modem_pa_trip1 {
temperature = <100000>;
hysteresis = <5000>;
type = "passive";
};
modem_cx_trip0: modem-cx-trip0 {
temperature = <110000>;
hysteresis = <5000>;
type = "passive";
};
modem_cx_trip1: modem-cx-trip1 {
temperature = <112000>;
hysteresis = <2000>;
type = "passive";
};
modem_cx_trip2: modem-cx-trip2 {
temperature = <115000>;
hysteresis = <3000>;
type = "passive";
};
};
cooling-maps {
modem_pa0_cdev {
trip = <&modem_pa_trip0>;
cooling-device = <&modem_pa 1 1>;
};
modem_pa1_cdev {
trip = <&modem_pa_trip1>;
cooling-device = <&modem_pa 2 2>;
};
modem_cx0_cdev {
trip = <&modem_cx_trip0>;
cooling-device = <&modem_cx 0 0>;
};
modem_cx1_cdev {
trip = <&modem_cx_trip1>;
cooling-device = <&modem_cx 1 1>;
};
modem_cx2_cdev {
trip = <&modem_cx_trip2>;
cooling-device = <&modem_cx 2 2>;
};
};
};
nav-lowf {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "low_limits_floor";
thermal-sensors = <&tsens 0>;
wake-capable-sensor;
trips {
nav_lowf: nav-lowf {
temperature = <5000>;
hysteresis = <5000>;
type = "passive";
};
};
cooling-maps {
cpu0_cdev {
trip = <&nav_lowf>;
cooling-device = <&CPU0 (THERMAL_MAX_LIMIT-3)
(THERMAL_MAX_LIMIT-3)>;
};
cx_vdd_cdev {
trip = <&nav_lowf>;
cooling-device = <&cx_cdev 0 0>;
};
mx_vdd_cdev {
trip = <&nav_lowf>;
cooling-device = <&mx_cdev 0 0>;
};
modem_vdd_cdev {
trip = <&nav_lowf>;
cooling-device = <&modem_vdd 0 0>;
};
};
};
wddac-lowf {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "low_limits_floor";
thermal-sensors = <&tsens 1>;
wake-capable-sensor;
trips {
wddac_lowf: wddac-lowf {
temperature = <5000>;
hysteresis = <5000>;
type ="passive";
};
};
cooling-maps {
cpu0_cdev {
trip = <&wddac_lowf>;
cooling-device = <&CPU0 (THERMAL_MAX_LIMIT-3)
(THERMAL_MAX_LIMIT-3)>;
};
cx_vdd_cdev {
trip = <&wddac_lowf>;
cooling-device = <&cx_cdev 0 0>;
};
mx_vdd_cdev {
trip = <&wddac_lowf>;
cooling-device = <&mx_cdev 0 0>;
};
modem_vdd_cdev {
trip = <&wddac_lowf>;
cooling-device = <&modem_vdd 0 0>;
};
};
};
modem-dsp-lowf {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "low_limits_floor";
thermal-sensors = <&tsens 2>;
wake-capable-sensor;
trips {
modem_dsp_lowf: modem-dsp-lowf {
temperature = <5000>;
hysteresis = <5000>;
type = "passive";
};
};
cooling-maps {
cpu0_cdev {
trip = <&modem_dsp_lowf>;
cooling-device = <&CPU0 (THERMAL_MAX_LIMIT-3)
(THERMAL_MAX_LIMIT-3)>;
};
cx_vdd_cdev {
trip = <&modem_dsp_lowf>;
cooling-device = <&cx_cdev 0 0>;
};
mx_vdd_cdev {
trip = <&modem_dsp_lowf>;
cooling-device = <&mx_cdev 0 0>;
};
modem_vdd_cdev {
trip = <&modem_dsp_lowf>;
cooling-device = <&modem_vdd 0 0>;
};
};
};
ipss-lowf {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "low_limits_floor";
thermal-sensors = <&tsens 3>;
wake-capable-sensor;
trips {
ipss_lowf: ipss-lowf {
temperature = <5000>;
hysteresis = <5000>;
type = "passive";
};
};
cooling-maps {
cpu0_cdev {
trip = <&ipss_lowf>;
cooling-device = <&CPU0 (THERMAL_MAX_LIMIT-3)
(THERMAL_MAX_LIMIT-3)>;
};
cx_vdd_cdev {
trip = <&ipss_lowf>;
cooling-device = <&cx_cdev 0 0>;
};
mx_vdd_cdev {
trip = <&ipss_lowf>;
cooling-device = <&mx_cdev 0 0>;
};
modem_vdd_cdev {
trip = <&ipss_lowf>;
cooling-device = <&modem_vdd 0 0>;
};
};
};
cpuss-lowf {
polling-delay-passive = <65>;
polling-delay = <0>;
thermal-governor = "low_limits_floor";
thermal-sensors = <&tsens 4>;
wake-capable-sensor;
trips {
cpuss_lowf: cpuss-lowf {
temperature = <5000>;
hysteresis = <5000>;
type = "passive";
};
};
cooling-maps {
cpu0_cdev {
trip = <&cpuss_lowf>;
cooling-device = <&CPU0 (THERMAL_MAX_LIMIT-3)
(THERMAL_MAX_LIMIT-3)>;
};
cx_vdd_cdev {
trip = <&cpuss_lowf>;
cooling-device = <&cx_cdev 0 0>;
};
mx_vdd_cdev {
trip = <&cpuss_lowf>;
cooling-device = <&mx_cdev 0 0>;
};
modem_vdd_cdev {
trip = <&cpuss_lowf>;
cooling-device = <&modem_vdd 0 0>;
};
};
};
};

97
arch/arm64/boot/dts/qcom/mdm9607.dtsi
View File

@@ -88,7 +88,7 @@
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x0>;
qcom,limits-info = <&mitigation_profile0>;
#cooling-cells = <2>;
};
};
soc: soc { };
@@ -1238,99 +1238,6 @@
&pri_mi2s_din_sleep>;
};
qcom,msm-thermal {
compatible = "qcom,msm-thermal";
qcom,sensor-id = <4>;
qcom,poll-ms = <250>;
qcom,limit-temp = <60>;
qcom,temp-hysteresis = <10>;
qcom,freq-step = <2>;
qcom,freq-mitigation-temp = <105>;
qcom,freq-mitigation-temp-hysteresis = <15>;
qcom,freq-mitigation-value = <800000>;
qcom,disable-cx-phase-ctrl;
qcom,disable-gfx-phase-ctrl;
qcom,disable-psm;
qcom,disable-ocr;
qcom,mx-restriction-temp = <10>;
qcom,mx-restriction-temp-hysteresis = <5>;
qcom,mx-retention-min =
<RPM_SMD_REGULATOR_LEVEL_NOM_PLUS>;
vdd-mx-supply = <&mdm9607_l12_floor_level>;
qcom,vdd-restriction-temp = <5>;
qcom,vdd-restriction-temp-hysteresis = <10>;
vdd-dig-supply = <&mdm9607_s3_floor_level>;
qcom,therm-ddr-lm-info = <2 78 70>;
qcom,vdd-dig-rstr{
qcom,vdd-rstr-reg = "vdd-dig";
qcom,levels = <RPM_SMD_REGULATOR_LEVEL_NOM_PLUS
RPM_SMD_REGULATOR_LEVEL_TURBO
RPM_SMD_REGULATOR_LEVEL_TURBO>;
qcom,min-level = <RPM_SMD_REGULATOR_LEVEL_RETENTION>;
};
msm_thermal_freq: qcom,vdd-apps-rstr {
qcom,vdd-rstr-reg = "vdd-apps";
qcom,levels = <998400>;
qcom,freq-req;
};
};
qcom,sensor-information {
compatible = "qcom,sensor-information";
sensor_information0: qcom,sensor-information-0 {
qcom,sensor-type = "tsens";
qcom,sensor-name = "tsens_tz_sensor0";
};
sensor_information1: qcom,sensor-information-1 {
qcom,sensor-type = "tsens";
qcom,sensor-name = "tsens_tz_sensor1";
};
sensor_information2: qcom,sensor-information-2 {
qcom,sensor-type = "tsens";
qcom,sensor-name = "tsens_tz_sensor2";
};
sensor_information3: qcom,sensor-information-3 {
qcom,sensor-type = "tsens";
qcom,sensor-name = "tsens_tz_sensor3";
};
sensor_information4: qcom,sensor-information-4 {
qcom,sensor-type = "tsens";
qcom,sensor-name = "tsens_tz_sensor4";
};
sensor_information5: qcom,sensor-information-5 {
qcom,sensor-type = "adc";
qcom,sensor-name = "pa_therm0";
};
sensor_information6: qcom,sensor-information-6 {
qcom,sensor-type = "adc";
qcom,sensor-name = "pa_therm1";
};
sensor_information7: qcom,sensor-information-7 {
qcom,sensor-type = "adc";
qcom,sensor-name = "xo_therm";
};
sensor_information8: qcom,sensor-information-8 {
qcom,sensor-type = "adc";
qcom,sensor-name = "xo_therm_amux";
};
};
mitigation_profile0: qcom,limit_info-0 {
qcom,temperature-sensor = <&sensor_information4>;
qcom,boot-frequency-mitigate;
qcom,emergency-frequency-mitigate;
};
qcom,ipc-spinlock@1905000 {
compatible = "qcom,ipc-spinlock-sfpb";
reg = <0x1905000 0x8000>;
@@ -1392,7 +1299,7 @@
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
label = "rpm";
rpm_requests: rpm_requests@0 {
rpmb: rpmb@0 {
compatible = "qcom,rpm-smd";
qcom,smd-channels = "rpm_requests";
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;

130
arch/arm64/boot/dts/qcom/msm-audio.dtsi
View File

@@ -15,6 +15,18 @@
status = "okay";
};
&pm660_gpios {
pmi_clk {
pmi_clk_default: pmi_clk_default{
status = "ok";
pins = "gpio3";
function = "func1";
output-enable;
output-low;
qcom,drive-strength = <2>;
};
};
};
&soc {
pcm0: qcom,msm-pcm {
compatible = "qcom,msm-pcm-dsp";
@@ -659,112 +671,6 @@
};
};
tasha_snd: sound-9335 {
compatible = "qcom,sdm660-asoc-snd-tasha";
qcom,model = "sdm660-tasha-snd-card";
qcom,wcn-btfm;
qcom,mi2s-audio-intf;
qcom,auxpcm-audio-intf;
qcom,ext-disp-audio-rx;
qcom,msm-mi2s-master = <1>, <1>, <1>, <1>;
qcom,audio-routing =
"AIF4 VI", "MCLK",
"RX_BIAS", "MCLK",
"MADINPUT", "MCLK",
"AMIC2", "MIC BIAS2",
"MIC BIAS2", "Headset Mic",
"AMIC3", "MIC BIAS2",
"MIC BIAS2", "ANCRight Headset Mic",
"AMIC4", "MIC BIAS2",
"MIC BIAS2", "ANCLeft Headset Mic",
"AMIC5", "MIC BIAS3",
"MIC BIAS3", "Handset Mic",
"AMIC6", "MIC BIAS4",
"MIC BIAS4", "Analog Mic6",
"DMIC0", "MIC BIAS1",
"MIC BIAS1", "Digital Mic0",
"DMIC1", "MIC BIAS1",
"MIC BIAS1", "Digital Mic1",
"DMIC2", "MIC BIAS3",
"MIC BIAS3", "Digital Mic2",
"DMIC3", "MIC BIAS3",
"MIC BIAS3", "Digital Mic3",
"DMIC4", "MIC BIAS4",
"MIC BIAS4", "Digital Mic4",
"DMIC5", "MIC BIAS4",
"MIC BIAS4", "Digital Mic5",
"SpkrLeft IN", "SPK1 OUT",
"SpkrRight IN", "SPK2 OUT";
qcom,msm-mbhc-hphl-swh = <1>;
qcom,msm-mbhc-gnd-swh = <1>;
qcom,us-euro-gpios = <&us_euro_gpio>;
qcom,hph-en0-gpio = <&tasha_hph_en0>;
qcom,hph-en1-gpio = <&tasha_hph_en1>;
qcom,msm-mclk-freq = <9600000>;
asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
<&loopback>, <&compress>, <&hostless>,
<&afe>, <&lsm>, <&routing>, <&cpe>, <&compr>,
<&pcm_noirq>, <&cpe3>;
asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
"msm-pcm-dsp.2", "msm-voip-dsp",
"msm-pcm-voice", "msm-pcm-loopback",
"msm-compress-dsp", "msm-pcm-hostless",
"msm-pcm-afe", "msm-lsm-client",
"msm-pcm-routing", "msm-cpe-lsm",
"msm-compr-dsp", "msm-pcm-dsp-noirq",
"msm-cpe-lsm.3";
asoc-cpu = <&dai_dp>, <&dai_mi2s0>,
<&dai_mi2s1>,
<&dai_mi2s2>, <&dai_mi2s3>,
<&dai_pri_auxpcm>, <&dai_sec_auxpcm>,
<&dai_tert_auxpcm>, <&dai_quat_auxpcm>,
<&sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>,
<&sb_2_rx>, <&sb_2_tx>, <&sb_3_rx>, <&sb_3_tx>,
<&sb_4_rx>, <&sb_4_tx>, <&sb_5_tx>,
<&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>,
<&afe_proxy_tx>, <&incall_record_rx>,
<&incall_record_tx>, <&incall_music_rx>,
<&incall_music_2_rx>, <&sb_5_rx>, <&sb_6_rx>,
<&sb_7_rx>, <&sb_7_tx>, <&sb_8_tx>, <&sb_8_rx>,
<&usb_audio_rx>, <&usb_audio_tx>,
<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_tx_0>,
<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_tx_0>,
<&dai_tert_tdm_rx_0>, <&dai_tert_tdm_tx_0>,
<&dai_quat_tdm_rx_0>, <&dai_quat_tdm_tx_0>;
asoc-cpu-names = "msm-dai-q6-dp.24608", "msm-dai-q6-mi2s.0",
"msm-dai-q6-mi2s.1",
"msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
"msm-dai-q6-auxpcm.1", "msm-dai-q6-auxpcm.2",
"msm-dai-q6-auxpcm.3", "msm-dai-q6-auxpcm.4",
"msm-dai-q6-dev.16384", "msm-dai-q6-dev.16385",
"msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387",
"msm-dai-q6-dev.16388", "msm-dai-q6-dev.16389",
"msm-dai-q6-dev.16390", "msm-dai-q6-dev.16391",
"msm-dai-q6-dev.16392", "msm-dai-q6-dev.16393",
"msm-dai-q6-dev.16395", "msm-dai-q6-dev.224",
"msm-dai-q6-dev.225", "msm-dai-q6-dev.241",
"msm-dai-q6-dev.240", "msm-dai-q6-dev.32771",
"msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773",
"msm-dai-q6-dev.32770", "msm-dai-q6-dev.16394",
"msm-dai-q6-dev.16396", "msm-dai-q6-dev.16398",
"msm-dai-q6-dev.16399", "msm-dai-q6-dev.16401",
"msm-dai-q6-dev.16400", "msm-dai-q6-dev.28672",
"msm-dai-q6-dev.28673", "msm-dai-q6-tdm.36864",
"msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36880",
"msm-dai-q6-tdm.36881", "msm-dai-q6-tdm.36896",
"msm-dai-q6-tdm.36897", "msm-dai-q6-tdm.36912",
"msm-dai-q6-tdm.36913";
asoc-codec = <&stub_codec>, <&ext_disp_audio_codec>;
asoc-codec-names = "msm-stub-codec.1",
"msm-ext-disp-audio-codec-rx";
qcom,wsa-max-devs = <2>;
qcom,wsa-devs = <&wsa881x_211>, <&wsa881x_212>,
<&wsa881x_213>, <&wsa881x_214>;
qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight",
"SpkrLeft", "SpkrRight";
};
us_euro_gpio: msm_cdc_pinctrl@75 {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
@@ -781,13 +687,23 @@
};
clock_audio: audio_ext_clk {
status = "disabled";
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <10>;
pinctrl-names = "default";
pinctrl-0 = <&pmi_clk_default>;
qcom,audio-ref-clk-gpio = <&pm660_gpios 3 0>;
clock-names = "osr_clk";
clocks = <&clock_rpmcc RPM_SMD_DIV_CLK1>;
qcom,node_has_rpm_clock;
#clock-cells = <1>;
};
clock_audio_native: audio_ext_clk_native {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <2>;
qcom,use-pinctrl = <1>;
clock-names = "osr_clk";
#clock-cells = <1>;
qcom,codec-mclk-clk-freq = <11289600>;
qcom,mclk-clk-reg = <0x15020018 0x0>;
pinctrl-names = "sleep", "active";

4
arch/arm64/boot/dts/qcom/pm8019-rpm-regulator.dtsi
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,7 +11,7 @@
* GNU General Public License for more details.
*/
&rpm_requests {
&rpmb {
rpm-regulator-smpa1 {
qcom,resource-name = "smpa";
qcom,resource-id = <1>;

3
arch/arm64/boot/dts/qcom/qcs610-iot.dtsi
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -120,6 +120,7 @@
clock-names = "eth_axi_clk", "eth_ptp_clk",
"eth_rgmii_clk", "eth_slave_ahb_clk";
qcom,phy-reset = <&tlmm 36 GPIO_ACTIVE_HIGH>;
qcom,phy-reset-delay-msecs = <10 50>;
qcom,phy-intr-redirect = <&tlmm 76 GPIO_ACTIVE_LOW>;
gdsc_emac-supply = <&emac_gdsc>;
pinctrl-names = "dev-emac-mdc", "dev-emac-mdio",

2
arch/arm64/boot/dts/qcom/qcs610-ipc.dtsi
View File

@@ -36,7 +36,7 @@
&sm6150_snd {
status = "okay";
compatible = "qcom,sm6150-asoc-snd";
qcom,model = "sm6150-idp-snd-card";
qcom,model = "sm6150-ipc-snd-card";
qcom,audio-routing =
"AMIC1", "MIC BIAS1",
"MIC BIAS1", "Analog Mic1",

12
arch/arm64/boot/dts/qcom/quin-vm-common.dtsi
View File

@@ -185,6 +185,18 @@
role = "fe";
remote-vmids = <0>;
};
mmidgrp1100: mmidgrp1100 {
grp-start-id = <1100>;
role = "fe";
remote-vmids = <0>;
};
mmidgrp1200: mmidgrp1200 {
grp-start-id = <1200>;
role = "fe";
remote-vmids = <0>;
};
};
sde_kms_hyp: qcom,sde_kms_hyp@ae00000 {

1
arch/arm64/boot/dts/qcom/sa2150p-ccard.dtsi
View File

@@ -160,7 +160,6 @@
&usb3 {
qcom,ignore-wakeup-src-in-hostmode;
qcom,no-wakeup-from-pm-suspend;
};
&usb3_extcon {

11
arch/arm64/boot/dts/qcom/sa515m-ccard-pcie-ep.dts
View File

@@ -20,6 +20,17 @@
compatible = "qcom,sa515m-ccard",
"qcom,sdxprairie", "qcom,ccard";
qcom,board-id = <25 1>, <25 0x101>;
/delete-node/ qcom_gadget;
qcom_gadget {
compatible = "qcom,usb-gadget";
qcom,vid = <0x05c6>;
composition1 {
qcom,pid = <0x9105>;
qcom,composition = "diag.diag,gsi.dpl";
};
};
};
&restart_pshold {

26
arch/arm64/boot/dts/qcom/sa515m-ccard-usb-ep.dts
View File

@@ -20,6 +20,32 @@
compatible = "qcom,sa515m-ccard",
"qcom,sdxprairie", "qcom,ccard";
qcom,board-id = <25 2>, <25 0x102>;
/delete-node/ qcom_gadget;
qcom_gadget {
compatible = "qcom,usb-gadget";
qcom,vid = <0x05c6>;
composition1 {
qcom,pid = <0x9103>;
qcom,composition = "diag.diag,ipc.ipc,gsi.rmnet,gsi.rmnet.v2x,ecm.ecm,gsi.dpl";
};
composition2 {
qcom,pid = <0x9107>;
qcom,composition = "diag.diag,ipc.ipc,gsi.rmnet.v2x,gsi.ecm,gsi.dpl";
};
composition3 {
qcom,pid = <0x910b>;
qcom,composition = "diag.diag,gsi.rmnet,gsi.dpl,ipc.ipc,ecm.ecm";
};
composition4 {
qcom,pid = <0x910d>;
qcom,composition = "diag.diag,gsi.dpl,ipc.ipc,gsi.ecm";
};
};
};
&ipa_hw {

11
arch/arm64/boot/dts/qcom/sa515m-v2-ccard-pcie-ep.dts
View File

@@ -20,6 +20,17 @@
compatible = "qcom,sa515m-ccard",
"qcom,sdxprairie", "qcom,ccard";
qcom,board-id = <25 1>, <25 0x101>;
/delete-node/ qcom_gadget;
qcom_gadget {
compatible = "qcom,usb-gadget";
qcom,vid = <0x05c6>;
composition1 {
qcom,pid = <0x9105>;
qcom,composition = "diag.diag,gsi.dpl";
};
};
};
&restart_pshold {

18
arch/arm64/boot/dts/qcom/sa515m-v2-ccard-usb-ep.dts
View File

@@ -21,20 +21,30 @@
"qcom,sdxprairie", "qcom,ccard";
qcom,board-id = <25 2>, <25 0x102>;
/delete-node/ qcom_gadget;
qcom_gadget {
compatible = "qcom,usb-gadget";
qcom,vid = <0x05c6>;
composition1 {
qcom,pid = <0x910B>;
qcom,composition = "diag.diag,gsi.rmnet,gsi.dpl,ipc.ipc,ecm.ecm";
qcom,pid = <0x9103>;
qcom,composition = "diag.diag,ipc.ipc,gsi.rmnet,gsi.rmnet.v2x,ecm.ecm,gsi.dpl";
};
composition2 {
qcom,pid = <0x910D>;
qcom,composition = "diag.diag,gsi.dpl,ipc.ipc,gsi.ecm";
qcom,pid = <0x9107>;
qcom,composition = "diag.diag,ipc.ipc,gsi.rmnet.v2x,gsi.ecm,gsi.dpl";
};
composition3 {
qcom,pid = <0x910b>;
qcom,composition = "diag.diag,gsi.rmnet,gsi.dpl,ipc.ipc,ecm.ecm";
};
composition4 {
qcom,pid = <0x910d>;
qcom,composition = "diag.diag,gsi.dpl,ipc.ipc,gsi.ecm";
};
};
};

163
arch/arm64/boot/dts/qcom/sa515m-v2-ttp-emmc.dts Normal file
View File

@@ -0,0 +1,163 @@
/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "sa515m-v2-ttp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SA515M TTP eMMC";
compatible = "qcom,sa515m-ttp",
"qcom,sdxprairie","qcom,ttp";
qcom,board-id = <30 0x5> , <30 0x105>;
};
&tlmm {
sdc1_data_4_on: sdc1_data_4_on {
mux {
pins = "gpio98";
function = "gpio";
};
config {
pins = "gpio98";
drive-strength = <4>;
bias-pull-up;
};
};
sdc1_data_4_off: sdc1_data_4_off {
mux {
pins = "gpio98";
function = "gpio";
};
config {
pins = "gpio98";
drive-strength = <2>;
bias-disable;
};
};
sdc1_data_5_on: sdc1_data_5_on {
mux {
pins = "gpio99";
function = "gpio";
};
config {
pins = "gpio99";
drive-strength = <4>;
bias-pull-up;
};
};
sdc1_data_5_off: sdc1_data_5_off {
mux {
pins = "gpio99";
function = "gpio";
};
config {
pins = "gpio99";
drive-strength = <2>;
bias-disable;
};
};
sdc1_data_6_on: sdc1_data_6_on {
mux {
pins = "gpio100";
function = "gpio";
};
config {
pins = "gpio100";
drive-strength = <4>;
bias-pull-up;
};
};
sdc1_data_6_off: sdc1_data_6_off {
mux {
pins = "gpio100";
function = "gpio";
};
config {
pins = "gpio100";
drive-strength = <2>;
bias-disable;
};
};
sdc1_data_7_on: sdc1_data_7_on {
mux {
pins = "gpio101";
function = "gpio";
};
config {
pins = "gpio101";
drive-strength = <4>;
bias-pull-up;
};
};
sdc1_data_7_off: sdc1_data_7_off {
mux {
pins = "gpio101";
function = "gpio";
};
config {
pins = "gpio101";
drive-strength = <2>;
bias-disable;
};
};
};
&sdhc_1 {
vdd-supply = <&vreg_sd_vdd>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <0 570000>;
vdd-io-supply = <&vreg_vddpx_2>;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <0 325000>;
reg = <0x8804000 0x1000>, <0x8805000 0x1000>,
<0x0F198028 0x4>;
reg-names = "hc_mem", "cmdq_mem", "tlmm_mem";
qcom,bus-width = <8>;
tlmm_cfg = <0x6>;
qcom,clk-rates = <400000 20000000 25000000 50000000
100000000>;
qcom,devfreq,freq-table = <50000000 100000000>;
qcom,bus-speed-mode = "DDR_1p8v";
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
&sdc1_data_4_on &sdc1_data_5_on
&sdc1_data_6_on &sdc1_data_7_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off
&sdc1_data_4_off &sdc1_data_5_off
&sdc1_data_6_off &sdc1_data_7_off>;
/delete-property/ cd-gpios;
status = "ok";
};

11
arch/arm64/boot/dts/qcom/sa515m-v2-ttp-pcie-ep.dts
View File

@@ -19,6 +19,17 @@
compatible = "qcom,sa515m-ttp",
"qcom,sdxprairie","qcom,ttp";
qcom,board-id = <30 1> , <30 0x101>;
/delete-node/ qcom_gadget;
qcom_gadget {
compatible = "qcom,usb-gadget";
qcom,vid = <0x05c6>;
composition1 {
qcom,pid = <0x9105>;
qcom,composition = "diag.diag,gsi.dpl";
};
};
};
&ipa_hw {

18
arch/arm64/boot/dts/qcom/sa515m-v2-ttp-usb-ep.dts
View File

@@ -20,20 +20,30 @@
"qcom,sdxprairie","qcom,ttp";
qcom,board-id = <30 2> , <30 0x102>;
/delete-node/ qcom_gadget;
qcom_gadget {
compatible = "qcom,usb-gadget";
qcom,vid = <0x05c6>;
composition1 {
qcom,pid = <0x910B>;
qcom,composition = "diag.diag,gsi.rmnet,gsi.dpl,ipc.ipc,ecm.ecm";
qcom,pid = <0x9103>;
qcom,composition = "diag.diag,ipc.ipc,gsi.rmnet,gsi.rmnet.v2x,ecm.ecm,gsi.dpl";
};
composition2 {
qcom,pid = <0x910D>;
qcom,composition = "diag.diag,gsi.dpl,ipc.ipc,gsi.ecm";
qcom,pid = <0x9107>;
qcom,composition = "diag.diag,ipc.ipc,gsi.rmnet.v2x,gsi.ecm,gsi.dpl";
};
composition3 {
qcom,pid = <0x910b>;
qcom,composition = "diag.diag,gsi.rmnet,gsi.dpl,ipc.ipc,ecm.ecm";
};
composition4 {
qcom,pid = <0x910d>;
qcom,composition = "diag.diag,gsi.dpl,ipc.ipc,gsi.ecm";
};
};
};

1
arch/arm64/boot/dts/qcom/sa6155-adp-air.dtsi
View File

@@ -172,6 +172,7 @@
clock-names = "eth_axi_clk", "eth_ptp_clk",
"eth_rgmii_clk", "eth_slave_ahb_clk";
qcom,phy-reset = <&tlmm 104 GPIO_ACTIVE_HIGH>;
qcom,phy-reset-delay-msecs = <10 50>;
qcom,phy-intr-redirect = <&tlmm 121 GPIO_ACTIVE_LOW>;
gdsc_emac-supply = <&emac_gdsc>;
pinctrl-names = "dev-emac-mdc", "dev-emac-mdio",

1
arch/arm64/boot/dts/qcom/sa6155-adp-star.dtsi
View File

@@ -165,6 +165,7 @@
clock-names = "eth_axi_clk", "eth_ptp_clk",
"eth_rgmii_clk", "eth_slave_ahb_clk";
qcom,phy-reset = <&tlmm 104 GPIO_ACTIVE_HIGH>;
qcom,phy-reset-delay-msecs = <10 50>;
qcom,phy-intr-redirect = <&tlmm 121 GPIO_ACTIVE_LOW>;
gdsc_emac-supply = <&emac_gdsc>;
pinctrl-names = "dev-emac-mdc", "dev-emac-mdio",

70
arch/arm64/boot/dts/qcom/sa6155-display.dtsi
View File

@@ -45,9 +45,6 @@
qcom,ext-disp = <&ext_disp>;
qcom,dp-hpd-gpio = <&ioexp 8 0>;
qcom,mst-fixed-topology-ports = <1 2>;
pinctrl-names = "mdss_dp_active", "mdss_dp_sleep";
pinctrl-0 = <&dp_hpd_cfg_pins>;
pinctrl-1 = <&dp_hpd_cfg_pins>;
vdda-1p2-supply = <&pm6155_1_l11>;
vdda-0p9-supply = <&pm6155_1_l5>;
@@ -295,59 +292,6 @@
};
};
sde_sh_base1: qcom,shared-display-base@1 {
qcom,shared-display-base-intf = <0>;
qcom,shared-display-base-mode {
qcom,mode-h-active = <1920>;
qcom,mode-h-front-porch = <88>;
qcom,mode-h-pulse-width = <44>;
qcom,mode-h-back-porch = <148>;
qcom,mode-h-active-high;
qcom,mode-v-active = <1080>;
qcom,mode-v-front-porch = <4>;
qcom,mode-v-pulse-width = <5>;
qcom,mode-v-back-porch = <36>;
qcom,mode-v-active-high;
qcom,mode-refresh-rate = <60>;
qcom,mode-clock-in-khz = <148500>;
};
};
sde_sh3: qcom,shared-display@3 {
compatible = "qcom,shared-display";
qcom,shared-display-base = <&sde_sh_base1>;
qcom,blend-stage-range = <0 7>;
qcom,shared-display-name = "shared-disp-3";
qcom,shared-display-src-mode {
qcom,mode-h-active = <1920>;
qcom,mode-v-active = <1080>;
};
qcom,shared-display-dst-mode {
qcom,mode-x-offset = <0>;
qcom,mode-y-offset = <0>;
qcom,mode-width = <1920>;
qcom,mode-height = <1080>;
};
};
sde_sh4: qcom,shared-display@4 {
compatible = "qcom,shared-display";
qcom,shared-display-base = <&sde_sh_base1>;
qcom,blend-stage-range = <7 1>;
qcom,shared-display-name = "shared-disp-4";
qcom,shared-display-src-mode {
qcom,mode-h-active = <1920>;
qcom,mode-v-active = <1080>;
};
qcom,shared-display-dst-mode {
qcom,mode-x-offset = <0>;
qcom,mode-y-offset = <0>;
qcom,mode-width = <1920>;
qcom,mode-height = <1080>;
};
};
qcom,sde-shared-plane {
compatible = "qcom,sde-shared-plane";
qcom,add-planes {
@@ -364,21 +308,13 @@
qcom,plane-init-handoff;
qcom,plane-seamless-mode = "shared";
};
plane@2 {
qcom,plane-name = "plane-2-splash";
qcom,plane-parent = "plane-2";
qcom,plane-init-active;
qcom,plane-init-handoff;
qcom,plane-seamless-mode = "shared";
};
};
};
sde_card1: qcom,sde-kms-lease@0 {
compatible = "qcom,sde-kms-lease";
qcom,dev-name = "msm_drm";
qcom,lease-connectors = "DSI-2","DP-4","DP-2","DP-3";
qcom,lease-connectors = "DSI-2","DP-1","DP-2","DP-3";
qcom,lease-planes = "plane-0","plane-1","plane-2","plane-3",
"plane-4", "plane-5", "plane-6",
"plane-7","plane-8","plane-9";
@@ -392,8 +328,8 @@
sde_card3: qcom,sde-kms-lease@2 {
compatible = "qcom,sde-kms-lease";
qcom,dev-name = "msm_drm3";
qcom,lease-connectors = "DSI-3", "DP-5";
qcom,lease-planes = "plane-3-splash", "plane-2-splash";
qcom,lease-connectors = "DSI-3";
qcom,lease-planes = "plane-3-splash";
};
};

37
arch/arm64/boot/dts/qcom/sa6155p-vm.dts → arch/arm64/boot/dts/qcom/sa6155p-vm-la.dts
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -13,7 +13,7 @@
/dts-v1/;
#include "sa6155p-vm.dtsi"
#include "sa6155p-vm-la.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SA6155P Virtual Machine";
@@ -21,36 +21,3 @@
qcom,pmic-name = "PM6150";
qcom,board-id = <0 0>;
};
&slpi_tlmm {
status = "ok";
};
&apps_smmu {
status = "ok";
};
&qupv3_se7_4uart {
status = "ok";
};
&usb0 {
status = "ok";
};
&qusb_phy0 {
status = "ok";
};
&pcie0_msi {
status = "ok";
};
&pcie0 {
status = "ok";
};
&sdhc_2 {
status = "ok";
};

71
arch/arm64/boot/dts/qcom/sa6155p-vm-la.dtsi Normal file
View File

@@ -0,0 +1,71 @@
/*
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "sa6155p-vm.dtsi"
/ {
reserved_memory: reserved-memory {
pmem_shared: pmem_shared_region@a1600000 {
reg = <0x0 0xa1600000 0x0 0x20000000>;
label = "pmem_shared_mem";
};
secure_display_memory: secure_display_region {
compatible = "shared-dma-pool";
reusable;
reg = <0x0 0xc1800000 0x0 0x14000000>;
};
};
};
&slpi_tlmm {
status = "ok";
};
&apps_smmu {
status = "ok";
};
&qupv3_se7_4uart {
status = "ok";
};
&usb0 {
status = "ok";
};
&qusb_phy0 {
status = "ok";
};
&pcie0_msi {
status = "ok";
};
&pcie0 {
status = "ok";
};
&sdhc_2 {
status = "ok";
};
&msm_ion {
qcom,ion-heap@10 {
reg = <10>;
memory-region = <&secure_display_memory>;
qcom,ion-heap-type = "HYP_CMA";
};
};

15
arch/arm64/boot/dts/qcom/sa6155p-vm.dtsi
View File

@@ -31,13 +31,6 @@
sdhc2 = &sdhc_2; /* SDC2 SD Card slot */
};
reserved_memory: reserved-memory {
pmem_shared: pmem_shared_region@a1600000 {
reg = <0x0 0xa1600000 0x0 0x20000000>;
label = "pmem_shared_mem";
};
};
};
&soc {
@@ -198,6 +191,14 @@
};
};
pdc: interrupt-controller@0xb220000{
compatible = "qcom,pdc-virt";
reg = <0xb220000 0x400>;
#interrupt-cells = <3>;
interrupt-controller;
qcom,pdc-pins = <8 520>, <9 521>, <10 522>, <11 523>;
};
apps_smmu: apps-smmu@0x15000000 {
compatible = "qcom,qsmmu-v500";
reg = <0x15000000 0x80000>,

70
arch/arm64/boot/dts/qcom/sa8155-adp-star-display.dtsi
View File

@@ -45,10 +45,6 @@
qcom,dp-hpd-gpio = <&ioexp 8 0>;
qcom,mst-fixed-topology-ports = <1 2>;
pinctrl-names = "mdss_dp_active", "mdss_dp_sleep";
pinctrl-0 = <&dp_hpd_cfg_pins>;
pinctrl-1 = <&dp_hpd_cfg_pins>;
qcom,core-supply-entries {
#address-cells = <1>;
#size-cells = <0>;
@@ -380,59 +376,6 @@
};
};
sde_sh_base1: qcom,shared-display-base@1 {
qcom,shared-display-base-intf = <0>;
qcom,shared-display-base-mode {
qcom,mode-h-active = <1920>;
qcom,mode-h-front-porch = <88>;
qcom,mode-h-pulse-width = <44>;
qcom,mode-h-back-porch = <148>;
qcom,mode-h-active-high;
qcom,mode-v-active = <1080>;
qcom,mode-v-front-porch = <4>;
qcom,mode-v-pulse-width = <5>;
qcom,mode-v-back-porch = <36>;
qcom,mode-v-active-high;
qcom,mode-refresh-rate = <60>;
qcom,mode-clock-in-khz = <148500>;
};
};
sde_sh3: qcom,shared-display@3 {
compatible = "qcom,shared-display";
qcom,shared-display-base = <&sde_sh_base1>;
qcom,blend-stage-range = <0 9>;
qcom,shared-display-name = "shared-disp-3";
qcom,shared-display-src-mode {
qcom,mode-h-active = <1920>;
qcom,mode-v-active = <1080>;
};
qcom,shared-display-dst-mode {
qcom,mode-x-offset = <0>;
qcom,mode-y-offset = <0>;
qcom,mode-width = <1920>;
qcom,mode-height = <1080>;
};
};
sde_sh4: qcom,shared-display@4 {
compatible = "qcom,shared-display";
qcom,shared-display-base = <&sde_sh_base1>;
qcom,blend-stage-range = <9 1>;
qcom,shared-display-name = "shared-disp-4";
qcom,shared-display-src-mode {
qcom,mode-h-active = <1920>;
qcom,mode-v-active = <1080>;
};
qcom,shared-display-dst-mode {
qcom,mode-x-offset = <0>;
qcom,mode-y-offset = <0>;
qcom,mode-width = <1920>;
qcom,mode-height = <1080>;
};
};
qcom,sde-shared-plane {
compatible = "qcom,sde-shared-plane";
qcom,add-planes {
@@ -449,20 +392,13 @@
qcom,plane-init-handoff;
qcom,plane-seamless-mode = "shared";
};
plane@2 {
qcom,plane-name = "plane-2-splash";
qcom,plane-parent = "plane-2";
qcom,plane-init-active;
qcom,plane-init-handoff;
qcom,plane-seamless-mode = "shared";
};
};
};
sde_card1: qcom,sde-kms-lease@0 {
compatible = "qcom,sde-kms-lease";
qcom,dev-name = "msm_drm";
qcom,lease-connectors = "DSI-2", "DSI-3", "DP-4", "DP-2",
qcom,lease-connectors = "DSI-2", "DSI-3", "DP-1", "DP-2",
"DP-3";
qcom,lease-planes = "plane-0", "plane-1", "plane-2",
"plane-3","plane-4", "plane-5",
@@ -480,8 +416,8 @@
sde_card3: qcom,sde-kms-lease@2 {
compatible = "qcom,sde-kms-lease";
qcom,dev-name = "msm_drm3";
qcom,lease-connectors = "DSI-4","DP-5";
qcom,lease-planes = "plane-3-splash", "plane-2-splash";
qcom,lease-connectors = "DSI-4";
qcom,lease-planes = "plane-3-splash";
};
};

24
arch/arm64/boot/dts/qcom/sa8155-audio.dtsi
View File

@@ -25,11 +25,17 @@
qcom,msm-cpudai-tdm-group-port-id = <36864 36866 36868 36870>;
qcom,msm-cpudai-tdm-clk-rate = <12288000>;
qcom,msm-cpudai-tdm-clk-internal = <1>;
qcom,msm-cpudai-tdm-sync-mode = <1>;
qcom,msm-cpudai-tdm-sync-mode = <0>;
qcom,msm-cpudai-tdm-sync-src = <1>;
qcom,msm-cpudai-tdm-data-out = <0>;
qcom,msm-cpudai-tdm-invert-sync = <0>;
qcom,msm-cpudai-tdm-data-delay = <0>;
qcom,msm-cpudai-tdm-data-delay = <1>;
qcom,msm-cpudai-tdm-clk-attribute = /bits/ 16 <1>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pri_tdm_clk_active &pri_tdm_sync_active
&pri_tdm_din_active &pri_tdm_dout_active>;
pinctrl-1 = <&pri_tdm_clk_sleep &pri_tdm_sync_sleep
&pri_tdm_din_sleep &pri_tdm_dout_sleep>;
dai_pri_tdm_rx_0: qcom,msm-dai-q6-tdm-pri-rx-0 {
compatible = "qcom,msm-dai-q6-tdm";
qcom,msm-cpudai-tdm-dev-id = <36864>;
@@ -62,11 +68,12 @@
qcom,msm-cpudai-tdm-group-port-id = <36865 36867 36869 36871>;
qcom,msm-cpudai-tdm-clk-rate = <12288000>;
qcom,msm-cpudai-tdm-clk-internal = <1>;
qcom,msm-cpudai-tdm-sync-mode = <1>;
qcom,msm-cpudai-tdm-sync-mode = <0>;
qcom,msm-cpudai-tdm-sync-src = <1>;
qcom,msm-cpudai-tdm-data-out = <0>;
qcom,msm-cpudai-tdm-invert-sync = <0>;
qcom,msm-cpudai-tdm-data-delay = <0>;
qcom,msm-cpudai-tdm-data-delay = <1>;
qcom,msm-cpudai-tdm-clk-attribute = /bits/ 16 <1>;
dai_pri_tdm_tx_0: qcom,msm-dai-q6-tdm-pri-tx-0 {
compatible = "qcom,msm-dai-q6-tdm";
qcom,msm-cpudai-tdm-dev-id = <36865>;
@@ -455,14 +462,6 @@
qcom,msm-cpudai-tdm-data-align = <0>;
};
};
dai_pri_auxpcm: qcom,msm-pri-auxpcm {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pri_aux_pcm_clk_active &pri_aux_pcm_sync_active
&pri_aux_pcm_din_active &pri_aux_pcm_dout_active>;
pinctrl-1 = <&pri_aux_pcm_clk_sleep &pri_aux_pcm_sync_sleep
&pri_aux_pcm_din_sleep &pri_aux_pcm_dout_sleep>;
};
};
&audio_apr {
@@ -487,6 +486,7 @@
qcom,auxpcm-audio-intf;
qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>;
qcom,pri-tdm-gpios = <&tdm_pri_rx>;
qcom,sec-tdm-gpios = <&tdm_sec_rx>;
qcom,tert-tdm-gpios = <&tdm_tert_rx>;
qcom,quat-tdm-gpios = <&tdm_quat_rx>;

124
arch/arm64/boot/dts/qcom/sa8155-vm-la.dtsi
View File

@@ -11,6 +11,8 @@
* GNU General Public License for more details.
*/
#include <dt-bindings/msm/msm-bus-ids.h>
/ {
reserved_memory: reserved-memory {
@@ -24,6 +26,20 @@
reusable;
reg = <0x0 0xc0000000 0x0 0x14400000>;
};
pil_ipa_fw_mem: pil_ipa_fw_region {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x98700000 0x0 0x10000>;
};
pil_ipa_gsi_mem: pil_ipa_gsi_region {
compatible = "removed-dma-pool";
no-map;
alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
alignment = <0x0 0x1000>;
size = <0x0 0x7000>;
};
};
};
@@ -66,3 +82,111 @@
qcom,ion-heap-type = "HYP_CMA";
};
};
&soc {
qcom,msm_gsi {
compatible = "qcom,msm_gsi";
};
ipa_hw: qcom,ipa@1e00000 {
compatible = "qcom,ipa";
reg = <0x1e00000 0x34000>,
<0x1e04000 0x28000>;
reg-names = "ipa-base", "gsi-base";
interrupts =
<0 311 0>,
<0 432 0>;
interrupt-names = "ipa-irq", "gsi-irq";
qcom,ipa-hw-ver = <15>; /* IPA core version = IPAv4.1 */
qcom,ipa-hw-mode = <0>;
qcom,platform-type = <2>; /* APQ platform */
qcom,ee = <0>;
qcom,use-ipa-tethering-bridge;
qcom,use-64-bit-dma-mask;
qcom,arm-smmu;
qcom,smmu-fast-map;
qcom,use-ipa-pm;
qcom,bandwidth-vote-for-ipa;
qcom,msm-bus,name = "ipa";
qcom,msm-bus,num-cases = <5>;
qcom,msm-bus,num-paths = <4>;
qcom,msm-bus,vectors-KBps =
/* No vote */
<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 0 0>,
<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 0 0>,
<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 0 0>,
<MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 0>,
/* SVS2 */
<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 80000 600000>,
<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 80000 350000>,
<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 40000 40000>,
<MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 125>,
/* SVS */
<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 80000 640000>,
<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 80000 640000>,
<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 80000 80000>,
<MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 250>,
/* NOMINAL */
<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 206000 960000>,
<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 206000 960000>,
<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 206000 160000>,
<MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 500>,
/* TURBO */
<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 206000 3600000>,
<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 206000 3600000>,
<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 206000 300000>,
<MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 600>;
qcom,bus-vector-names = "MIN", "SVS2", "SVS", "NOMINAL",
"TURBO";
qcom,throughput-threshold = <310 600 1000>;
qcom,scaling-exceptions = <>;
};
ipa_smmu_ap: ipa_smmu_ap {
compatible = "qcom,ipa-smmu-ap-cb";
iommus = <&apps_smmu 0x520 0x0>;
qcom,iova-mapping = <0x20000000 0x40000000>;
qcom,smmu-s1-bypass;
};
ipa_smmu_wlan: ipa_smmu_wlan {
compatible = "qcom,ipa-smmu-wlan-cb";
iommus = <&apps_smmu 0x521 0x0>;
qcom,smmu-s1-bypass;
qcom,additional-mapping =
/* ipa-uc ram */
<0x1E60000 0x1E60000 0x80000>;
};
ipa_smmu_uc: ipa_smmu_uc {
compatible = "qcom,ipa-smmu-uc-cb";
iommus = <&apps_smmu 0x522 0x0>;
qcom,smmu-s1-bypass;
qcom,iova-mapping = <0x40400000 0x1FC00000>;
};
qcom,ipa_fws {
compatible = "qcom,pil-tz-generic";
qcom,pas-id = <0xf>;
qcom,firmware-name = "ipa_fws";
qcom,pil-force-shutdown;
memory-region = <&pil_ipa_gsi_mem>;
};
qcom,ipa_uc {
compatible = "qcom,pil-tz-generic";
qcom,pas-id = <0x1B>;
qcom,firmware-name = "ipa_uc";
qcom,pil-force-shutdown;
memory-region = <&pil_ipa_fw_mem>;
};
qcom,veth-ipa {
compatible = "qcom,veth-ipa";
};
};

8
arch/arm64/boot/dts/qcom/sa8155-vm.dtsi
View File

@@ -127,6 +127,14 @@
reg = <0xeb600000 0x1000>;
};
pdc: interrupt-controller@0xb220000{
compatible = "qcom,pdc-virt";
reg = <0xb220000 0x400>;
#interrupt-cells = <3>;
interrupt-controller;
qcom,pdc-pins = <7 519>, <8 520>, <9 521>, <10 522>, <11 523>;
};
clock_virt: qcom,virtio-gcc {
compatible = "virtio,mmio";
reg = <0x1c200000 0x1000>;

1
arch/arm64/boot/dts/qcom/sa8155.dtsi
View File

@@ -698,6 +698,7 @@
clock-names = "emac_axi_clk", "emac_ptp_clk",
"emac_rgmii_clk", "emac_slv_ahb_clk";
qcom,phy-reset = <&tlmm 79 GPIO_ACTIVE_HIGH>;
qcom,phy-reset-delay-msecs = <10 50>;
qcom,phy-intr-redirect = <&tlmm 124 GPIO_ACTIVE_LOW>;
gdsc_emac-supply = <&emac_gdsc>;
pinctrl-names = "dev-emac-mdc",

14
arch/arm64/boot/dts/qcom/sa8195-vm-la.dtsi
View File

@@ -17,6 +17,12 @@
reg = <0x0 0xa0000000 0x0 0x20000000>;
label = "pmem_shared_mem";
};
secure_display_memory: secure_display_region {
compatible = "shared-dma-pool";
reusable;
reg = <0x0 0xc0000000 0x0 0x14400000>;
};
};
};
@@ -52,3 +58,11 @@
&sdhc_2 {
status = "ok";
};
&msm_ion {
qcom,ion-heap@10 {
reg = <10>;
memory-region = <&secure_display_memory>;
qcom,ion-heap-type = "HYP_CMA";
};
};

1062
arch/arm64/boot/dts/qcom/sa8195-vm-pcie.dtsi
View File

File diff suppressed because it is too large Load Diff

20
arch/arm64/boot/dts/qcom/sa8195-vm.dtsi
View File

@@ -30,6 +30,14 @@
};
&soc {
pdc: interrupt-controller@0xb220000{
compatible = "qcom,pdc-virt";
reg = <0xb220000 0x400>;
#interrupt-cells = <3>;
interrupt-controller;
qcom,pdc-pins = <7 519>, <8 520>, <9 521>, <10 522>, <11 523>;
};
clock_virt: qcom,virtio-gcc {
compatible = "virtio,mmio";
reg = <0x1c200000 0x1000>;
@@ -62,6 +70,18 @@
regulator-name = "pcie_0_gdsc";
};
pcie_1_gdsc: pcie_1_gdsc {
regulator-name = "pcie_1_gdsc";
};
pcie_2_gdsc: pcie_2_gdsc {
regulator-name = "pcie_2_gdsc";
};
pcie_3_gdsc: pcie_3_gdsc {
regulator-name = "pcie_3_gdsc";
};
L2A: pm8195_1_l2: regulator-pm8195-1-l2 {
regulator-name = "ldoa2";
regulator-min-microvolt = <1800000>;

71
arch/arm64/boot/dts/qcom/sa8195p-adp-star-display.dtsi
View File

@@ -45,10 +45,6 @@
qcom,dp-hpd-gpio = <&ioexp 8 0>;
qcom,mst-fixed-topology-ports = <1 2>;
pinctrl-names = "mdss_dp_active", "mdss_dp_sleep";
pinctrl-0 = <&dp_hpd_cfg_pins>;
pinctrl-1 = <&dp_hpd_cfg_pins>;
qcom,core-supply-entries {
#address-cells = <1>;
#size-cells = <0>;
@@ -367,59 +363,6 @@
};
};
sde_sh_base1: qcom,shared-display-base@1 {
qcom,shared-display-base-intf = <0>;
qcom,shared-display-base-mode {
qcom,mode-h-active = <1920>;
qcom,mode-h-front-porch = <88>;
qcom,mode-h-pulse-width = <44>;
qcom,mode-h-back-porch = <148>;
qcom,mode-h-active-high;
qcom,mode-v-active = <1080>;
qcom,mode-v-front-porch = <4>;
qcom,mode-v-pulse-width = <5>;
qcom,mode-v-back-porch = <36>;
qcom,mode-v-active-high;
qcom,mode-refresh-rate = <60>;
qcom,mode-clock-in-khz = <148500>;
};
};
sde_sh3: qcom,shared-display@3 {
compatible = "qcom,shared-display";
qcom,shared-display-base = <&sde_sh_base1>;
qcom,blend-stage-range = <0 9>;
qcom,shared-display-name = "shared-disp-3";
qcom,shared-display-src-mode {
qcom,mode-h-active = <1920>;
qcom,mode-v-active = <1080>;
};
qcom,shared-display-dst-mode {
qcom,mode-x-offset = <0>;
qcom,mode-y-offset = <0>;
qcom,mode-width = <1920>;
qcom,mode-height = <1080>;
};
};
sde_sh4: qcom,shared-display@4 {
compatible = "qcom,shared-display";
qcom,shared-display-base = <&sde_sh_base1>;
qcom,blend-stage-range = <9 1>;
qcom,shared-display-name = "shared-disp-4";
qcom,shared-display-src-mode {
qcom,mode-h-active = <1920>;
qcom,mode-v-active = <1080>;
};
qcom,shared-display-dst-mode {
qcom,mode-x-offset = <0>;
qcom,mode-y-offset = <0>;
qcom,mode-width = <1920>;
qcom,mode-height = <1080>;
};
};
qcom,sde-shared-plane {
compatible = "qcom,sde-shared-plane";
qcom,add-planes {
@@ -436,20 +379,13 @@
qcom,plane-init-handoff;
qcom,plane-seamless-mode = "shared";
};
plane@2 {
qcom,plane-name = "plane-2-splash";
qcom,plane-parent = "plane-2";
qcom,plane-init-active;
qcom,plane-init-handoff;
qcom,plane-seamless-mode = "shared";
};
};
};
sde_card1: qcom,sde-kms-lease@0 {
compatible = "qcom,sde-kms-lease";
qcom,dev-name = "msm_drm";
qcom,lease-connectors = "DSI-2", "DSI-3", "DP-4", "DP-2",
qcom,lease-connectors = "DSI-2", "DSI-3", "DP-1", "DP-2",
"DP-3";
qcom,lease-planes = "plane-0", "plane-1", "plane-2",
"plane-3","plane-4", "plane-5",
@@ -469,8 +405,8 @@
sde_card3: qcom,sde-kms-lease@2 {
compatible = "qcom,sde-kms-lease";
qcom,dev-name = "msm_drm3";
qcom,lease-connectors = "DSI-4","DP-5";
qcom,lease-planes = "plane-3-splash", "plane-2-splash";
qcom,lease-connectors = "DSI-4";
qcom,lease-planes = "plane-3-splash";
};
};
@@ -483,6 +419,7 @@
};
&mdss_mdp {
qcom,sde-crtc-num-pref = <7>;
qcom,sde-reg-dma-version = <0>;
qcom,sde-ctl-display-pref = "primary", "none", "none",
"none", "none";

66
arch/arm64/boot/dts/qcom/sa8195p-pcie.dtsi
View File

@@ -555,38 +555,38 @@
msi-controller;
reg = <0x17a00040 0x0>;
interrupt-parent = <&pdc>;
interrupts = <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 769 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 770 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 771 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 773 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 774 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 775 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 776 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 777 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 778 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 779 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 780 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 781 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 782 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 783 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 784 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 785 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 786 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 787 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 788 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 789 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 790 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 791 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 792 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 793 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 794 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 795 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 796 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 797 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 799 IRQ_TYPE_EDGE_RISING>;
interrupts = <GIC_SPI 896 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 897 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 898 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 899 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 900 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 901 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 902 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 903 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 904 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 905 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 906 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 907 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 908 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 909 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 910 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 911 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 912 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 913 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 914 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 915 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 916 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 917 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 918 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 919 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 920 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 921 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 922 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 923 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 924 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 925 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 926 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 927 IRQ_TYPE_EDGE_RISING>;
};
pcie2: qcom,pcie@1c18000 {
@@ -1294,7 +1294,7 @@
};
};
pcie3_msi: qcom,pcie1_msi@17a00040 {
pcie3_msi: qcom,pcie3_msi@17a00040 {
compatible = "qcom,pci-msi";
msi-controller;
reg = <0x17a00040 0x0>;

3
arch/arm64/boot/dts/qcom/sa8195p-regulator.dtsi
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -329,6 +329,7 @@
regulator-max-microvolt = <1890000>;
qcom,init-voltage = <1800000>;
qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
regulator-always-on;
};
};

41
arch/arm64/boot/dts/qcom/sda429-wdp.dtsi
View File

@@ -11,3 +11,44 @@
* GNU General Public License for more details.
*/
&sdhc_1 {
/* device core power supply */
vdd-supply = <&L19A>;
qcom,vdd-voltage-level = <2900000 3200000>;
qcom,vdd-current-level = <200 570000>;
/* device communication power supply */
vdd-io-supply = <&L13A>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <0 60000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
status = "ok";
};
&sdhc_2 {
/* device core power supply for sd card*/
vdd-supply = <&vreg_sd_vdd>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <15000 800000>;
/* device communication power supply for msm_io*/
vdd-io-supply = <&vreg_sd_pad>;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <200 22000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&tlmm 67 0x1>;
status = "disabled";
};

41
arch/arm64/boot/dts/qcom/sda429-wtp.dtsi
View File

@@ -11,3 +11,44 @@
* GNU General Public License for more details.
*/
&sdhc_1 {
/* device core power supply */
vdd-supply = <&L19A>;
qcom,vdd-voltage-level = <2900000 3200000>;
qcom,vdd-current-level = <200 570000>;
/* device communication power supply */
vdd-io-supply = <&L13A>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <0 60000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
status = "ok";
};
&sdhc_2 {
/* device core power supply for sd card*/
vdd-supply = <&vreg_sd_vdd>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <15000 800000>;
/* device communication power supply for msm_io*/
vdd-io-supply = <&vreg_sd_pad>;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <200 22000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&tlmm 67 0x1>;
status = "disabled";
};

1
arch/arm64/boot/dts/qcom/sda429.dts
View File

@@ -14,6 +14,7 @@
/dts-v1/;
#include "sda429.dtsi"
#include "sdm429w-bg-pm660.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDA429 SoC";

556
arch/arm64/boot/dts/qcom/sdm429-blsp.dtsi Normal file
View File

@@ -0,0 +1,556 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "sdm429-pinctrl.dtsi"
/ {
aliases {
spi1 = &spi_1;
spi2 = &spi_2;
spi3 = &spi_3;
spi4 = &spi_4;
spi5 = &spi_5;
spi6 = &spi_6;
spi7 = &spi_7;
spi8 = &spi_8;
i2c1 = &i2c_1;
i2c2 = &i2c_2;
i2c3 = &i2c_3;
i2c4 = &i2c_4;
i2c5 = &i2c_5;
i2c6 = &i2c_6;
i2c7 = &i2c_7;
i2c8 = &i2c_8;
};
};
&soc {
dma_blsp1: qcom,sps-dma@7884000 { /* BLSP1 */
#dma-cells = <4>;
compatible = "qcom,sps-dma";
reg = <0x7884000 0x1f000>;
interrupts = <0 238 IRQ_TYPE_LEVEL_HIGH>;
qcom,summing-threshold = <0x10>;
};
i2c_1: i2c@78b5000 { /* BLSP1 QUP1 */
compatible = "qcom,i2c-msm-v2";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x78b5000 0x600>;
reg-names = "qup_phys_addr";
interrupt-names = "qup_irq";
interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma_blsp1 4 64 0x20000020 0x20>,
<&dma_blsp1 5 32 0x20000020 0x20>;
dma-names = "tx", "rx";
qcom,master-id = <86>;
qcom,clk-freq-out = <400000>;
qcom,clk-freq-in = <19200000>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;
pinctrl-names = "i2c_active", "i2c_sleep";
pinctrl-0 = <&i2c_1_active>;
pinctrl-1 = <&i2c_1_sleep>;
status = "disabled";
};
i2c_2: i2c@78b6000 { /* BLSP1 QUP2 */
compatible = "qcom,i2c-msm-v2";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x78b6000 0x600>;
reg-names = "qup_phys_addr";
interrupt-names = "qup_irq";
interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma_blsp1 6 64 0x20000020 0x20>,
<&dma_blsp1 7 32 0x20000020 0x20>;
dma-names = "tx", "rx";
qcom,master-id = <86>;
qcom,clk-freq-out = <400000>;
qcom,clk-freq-in = <19200000>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
pinctrl-names = "i2c_active", "i2c_sleep";
pinctrl-0 = <&i2c_2_active>;
pinctrl-1 = <&i2c_2_sleep>;
status = "disabled";
};
i2c_3: i2c@78b7000 { /* BLSP1 QUP3 */
compatible = "qcom,i2c-msm-v2";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x78b7000 0x600>;
reg-names = "qup_phys_addr";
interrupt-names = "qup_irq";
interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma_blsp1 8 64 0x20000020 0x20>,
<&dma_blsp1 9 32 0x20000020 0x20>;
dma-names = "tx", "rx";
qcom,master-id = <86>;
qcom,clk-freq-out = <400000>;
qcom,clk-freq-in = <19200000>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
pinctrl-names = "i2c_active", "i2c_sleep";
pinctrl-0 = <&i2c_3_active>;
pinctrl-1 = <&i2c_3_sleep>;
status = "disabled";
};
i2c_4: i2c@78b8000 { /* BLSP1 QUP4 */
compatible = "qcom,i2c-msm-v2";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x78b8000 0x600>;
reg-names = "qup_phys_addr";
interrupt-names = "qup_irq";
interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma_blsp1 10 64 0x20000020 0x20>,
<&dma_blsp1 11 32 0x20000020 0x20>;
dma-names = "tx", "rx";
qcom,master-id = <86>;
qcom,clk-freq-out = <400000>;
qcom,clk-freq-in = <19200000>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
pinctrl-names = "i2c_active", "i2c_sleep";
pinctrl-0 = <&i2c_4_active>;
pinctrl-1 = <&i2c_4_sleep>;
status = "disabled";
};
spi_1: spi@78b5000 { /* BLSP1 QUP1 */
compatible = "qcom,spi-qup-v2";
#address-cells = <1>;
#size-cells = <0>;
reg-names = "spi_physical", "spi_bam_physical";
reg = <0x78b5000 0x600>,
<0x7884000 0x1f000>;
interrupt-names = "spi_irq", "spi_bam_irq";
interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>,
<0 238 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
qcom,use-bam;
qcom,ver-reg-exists;
qcom,bam-consumer-pipe-index = <4>;
qcom,bam-producer-pipe-index = <5>;
qcom,master-id = <86>;
qcom,use-pinctrl;
pinctrl-names = "spi_active", "spi_sleep";
pinctrl-0 = <&spi_1_active>;
pinctrl-1 = <&spi_1_sleep>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>;
status = "disabled";
};
spi_2: spi@78b6000 { /* BLSP1 QUP2 */
compatible = "qcom,spi-qup-v2";
#address-cells = <1>;
#size-cells = <0>;
reg-names = "spi_physical", "spi_bam_physical";
reg = <0x78b6000 0x600>,
<0x7884000 0x1f000>;
interrupt-names = "spi_irq", "spi_bam_irq";
interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>,
<0 238 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
qcom,use-bam;
qcom,ver-reg-exists;
qcom,bam-consumer-pipe-index = <6>;
qcom,bam-producer-pipe-index = <7>;
qcom,master-id = <86>;
qcom,use-pinctrl;
pinctrl-names = "spi_active", "spi_sleep";
pinctrl-0 = <&spi_2_active>;
pinctrl-1 = <&spi_2_sleep>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>;
status = "disabled";
};
spi_3: spi@78b7000 { /* BLSP1 QUP3 */
compatible = "qcom,spi-qup-v2";
#address-cells = <1>;
#size-cells = <0>;
reg-names = "spi_physical", "spi_bam_physical";
reg = <0x78b7000 0x600>,
<0x7884000 0x1f000>;
interrupt-names = "spi_irq", "spi_bam_irq";
interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>,
<0 238 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
qcom,use-bam;
qcom,ver-reg-exists;
qcom,bam-consumer-pipe-index = <8>;
qcom,bam-producer-pipe-index = <9>;
qcom,master-id = <86>;
qcom,use-pinctrl;
pinctrl-names = "spi_active", "spi_sleep";
pinctrl-0 = <&spi_3_active>;
pinctrl-1 = <&spi_3_sleep>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>;
status = "disabled";
};
spi_4: spi@78b8000 { /* BLSP1 QUP4 */
compatible = "qcom,spi-qup-v2";
#address-cells = <1>;
#size-cells = <0>;
reg-names = "spi_physical", "spi_bam_physical";
reg = <0x78b8000 0x600>,
<0x7884000 0x1f000>;
interrupt-names = "spi_irq", "spi_bam_irq";
interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>,
<0 238 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
qcom,use-bam;
qcom,ver-reg-exists;
qcom,bam-consumer-pipe-index = <10>;
qcom,bam-producer-pipe-index = <11>;
qcom,master-id = <86>;
qcom,use-pinctrl;
pinctrl-names = "spi_active", "spi_sleep";
pinctrl-0 = <&spi_4_active>;
pinctrl-1 = <&spi_4_sleep>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>;
status = "disabled";
};
blsp1_uart1_hs: uart@78af000 { /* BLSP1 UART1 */
compatible = "qcom,msm-hsuart-v14";
reg-names = "core_mem", "bam_mem";
reg = <0x78af000 0x200>,
<0x7884000 0x1f000>;
interrupt-names = "core_irq", "bam_irq", "wakeup_irq";
#address-cells = <0>;
interrupt-parent = <&blsp1_uart1_hs>;
interrupts = <0 1 2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xffffffff>;
interrupt-map = <0 &intc 0 107 IRQ_TYPE_LEVEL_HIGH
1 &intc 0 238 IRQ_TYPE_LEVEL_HIGH
2 &tlmm 1 IRQ_TYPE_LEVEL_HIGH>;
qcom,inject-rx-on-wakeup;
qcom,rx-char-to-inject = <0xfd>;
qcom,bam-tx-ep-pipe-index = <0>;
qcom,bam-rx-ep-pipe-index = <1>;
qcom,master-id = <86>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_UART1_APPS_CLK>;
pinctrl-names = "sleep", "default";
pinctrl-0 = <&blsp1_uart1_sleep>;
pinctrl-1 = <&blsp1_uart1_active>;
qcom,msm-bus,name = "blsp1_uart1";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<86 512 0 0>,
<86 512 500 800>;
status = "disabled";
};
dma_blsp2: qcom,sps-dma@7ac4000 { /* BLSP2 */
#dma-cells = <4>;
compatible = "qcom,sps-dma";
reg = <0x7ac4000 0x1f000>;
interrupts = <0 239 IRQ_TYPE_LEVEL_HIGH>;
qcom,summing-threshold = <0x10>;
};
i2c_5: i2c@7af5000 { /* BLSP2 QUP1 */
compatible = "qcom,i2c-msm-v2";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x7af5000 0x600>;
reg-names = "qup_phys_addr";
interrupt-names = "qup_irq";
interrupts = <0 299 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma_blsp2 4 64 0x20000020 0x20>,
<&dma_blsp2 5 32 0x20000020 0x20>;
dma-names = "tx", "rx";
qcom,master-id = <84>;
qcom,clk-freq-out = <400000>;
qcom,clk-freq-in = <19200000>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP2_AHB_CLK>,
<&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>;
pinctrl-names = "i2c_active", "i2c_sleep";
pinctrl-0 = <&i2c_5_active>;
pinctrl-1 = <&i2c_5_sleep>;
status = "disabled";
};
i2c_6: i2c@7af6000 { /* BLSP2 QUP2 */
compatible = "qcom,i2c-msm-v2";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x7af6000 0x600>;
reg-names = "qup_phys_addr";
interrupt-names = "qup_irq";
interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma_blsp2 6 64 0x20000020 0x20>,
<&dma_blsp2 7 32 0x20000020 0x20>;
dma-names = "tx", "rx";
qcom,master-id = <84>;
qcom,clk-freq-out = <400000>;
qcom,clk-freq-in = <19200000>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP2_AHB_CLK>,
<&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>;
pinctrl-names = "i2c_active", "i2c_sleep";
pinctrl-0 = <&i2c_6_active>;
pinctrl-1 = <&i2c_6_sleep>;
status = "disabled";
};
i2c_7: i2c@7af7000 { /* BLSP2 QUP3 */
compatible = "qcom,i2c-msm-v2";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x7af7000 0x600>;
reg-names = "qup_phys_addr";
interrupt-names = "qup_irq";
interrupts = <0 301 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma_blsp2 8 64 0x20000020 0x20>,
<&dma_blsp2 9 32 0x20000020 0x20>;
dma-names = "tx", "rx";
qcom,master-id = <84>;
qcom,clk-freq-out = <400000>;
qcom,clk-freq-in = <19200000>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP2_AHB_CLK>,
<&gcc GCC_BLSP2_QUP3_I2C_APPS_CLK>;
pinctrl-names = "i2c_active", "i2c_sleep";
pinctrl-0 = <&i2c_7_active>;
pinctrl-1 = <&i2c_7_sleep>;
status = "disabled";
};
i2c_8: i2c@7af8000 { /* BLSP2 QUP4 */
compatible = "qcom,i2c-msm-v2";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x7af8000 0x600>;
reg-names = "qup_phys_addr";
interrupt-names = "qup_irq";
interrupts = <0 302 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma_blsp2 10 64 0x20000020 0x20>,
<&dma_blsp2 11 32 0x20000020 0x20>;
dma-names = "tx", "rx";
qcom,master-id = <84>;
qcom,clk-freq-out = <400000>;
qcom,clk-freq-in = <19200000>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP2_AHB_CLK>,
<&gcc GCC_BLSP2_QUP4_I2C_APPS_CLK>;
pinctrl-names = "i2c_active", "i2c_sleep";
pinctrl-0 = <&i2c_8_active>;
pinctrl-1 = <&i2c_8_sleep>;
status = "disabled";
};
spi_5: spi@7af5000 { /* BLSP2 QUP1 */
compatible = "qcom,spi-qup-v2";
#address-cells = <1>;
#size-cells = <0>;
reg-names = "spi_physical", "spi_bam_physical";
reg = <0x7af5000 0x600>,
<0x7ac4000 0x1f000>;
interrupt-names = "spi_irq", "spi_bam_irq";
interrupts = <0 299 IRQ_TYPE_LEVEL_HIGH>,
<0 239 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
qcom,use-bam;
qcom,ver-reg-exists;
qcom,bam-consumer-pipe-index = <4>;
qcom,bam-producer-pipe-index = <5>;
qcom,master-id = <84>;
qcom,use-pinctrl;
pinctrl-names = "spi_active", "spi_sleep";
pinctrl-0 = <&spi_5_active>;
pinctrl-1 = <&spi_5_sleep>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP2_AHB_CLK>,
<&gcc GCC_BLSP2_QUP1_SPI_APPS_CLK>;
status = "disabled";
};
spi_6: spi@7af6000 { /* BLSP2 QUP2 */
compatible = "qcom,spi-qup-v2";
#address-cells = <1>;
#size-cells = <0>;
reg-names = "spi_physical", "spi_bam_physical";
reg = <0x7af6000 0x600>,
<0x7ac4000 0x1f000>;
interrupt-names = "spi_irq", "spi_bam_irq";
interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>,
<0 239 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
qcom,use-bam;
qcom,ver-reg-exists;
qcom,bam-consumer-pipe-index = <6>;
qcom,bam-producer-pipe-index = <7>;
qcom,master-id = <84>;
qcom,use-pinctrl;
pinctrl-names = "spi_active", "spi_sleep";
pinctrl-0 = <&spi_6_active>;
pinctrl-1 = <&spi_6_sleep>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP2_AHB_CLK>,
<&gcc GCC_BLSP2_QUP2_SPI_APPS_CLK>;
status = "disabled";
};
spi_7: spi@7af7000 { /* BLSP2 QUP3 */
compatible = "qcom,spi-qup-v2";
#address-cells = <1>;
#size-cells = <0>;
reg-names = "spi_physical", "spi_bam_physical";
reg = <0x7af7000 0x600>,
<0x7ac4000 0x1f000>;
interrupt-names = "spi_irq", "spi_bam_irq";
interrupts = <0 301 IRQ_TYPE_LEVEL_HIGH>,
<0 239 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
qcom,use-bam;
qcom,ver-reg-exists;
qcom,bam-consumer-pipe-index = <8>;
qcom,bam-producer-pipe-index = <9>;
qcom,master-id = <84>;
qcom,use-pinctrl;
pinctrl-names = "spi_active", "spi_sleep";
pinctrl-0 = <&spi_7_active>;
pinctrl-1 = <&spi_7_sleep>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP2_AHB_CLK>,
<&gcc GCC_BLSP2_QUP3_SPI_APPS_CLK>;
status = "disabled";
};
spi_8: spi@7af5000 { /* BLSP2 QUP4 */
compatible = "qcom,spi-qup-v2";
#address-cells = <1>;
#size-cells = <0>;
reg-names = "spi_physical", "spi_bam_physical";
reg = <0x7af5000 0x600>,
<0x7ac4000 0x1f000>;
interrupt-names = "spi_irq", "spi_bam_irq";
interrupts = <0 302 IRQ_TYPE_LEVEL_HIGH>,
<0 239 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
qcom,use-bam;
qcom,ver-reg-exists;
qcom,bam-consumer-pipe-index = <10>;
qcom,bam-producer-pipe-index = <11>;
qcom,master-id = <84>;
qcom,use-pinctrl;
pinctrl-names = "spi_active", "spi_sleep";
pinctrl-0 = <&spi_8_active>;
pinctrl-1 = <&spi_8_sleep>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP2_AHB_CLK>,
<&gcc GCC_BLSP2_QUP4_SPI_APPS_CLK>;
status = "disabled";
};
blsp2_uart1_hs: uart@7aef000 { /* BLSP2 UART1 */
compatible = "qcom,msm-hsuart-v14";
reg-names = "core_mem", "bam_mem";
reg = <0x7aef000 0x200>,
<0x7ac4000 0x1f000>;
interrupt-names = "core_irq", "bam_irq", "wakeup_irq";
#address-cells = <0>;
interrupt-parent = <&blsp2_uart1_hs>;
interrupts = <0 1 2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xffffffff>;
interrupt-map = <0 &intc 0 306 IRQ_TYPE_LEVEL_HIGH
1 &intc 0 239 IRQ_TYPE_LEVEL_HIGH
2 &tlmm 17 IRQ_TYPE_LEVEL_HIGH>;
qcom,inject-rx-on-wakeup;
qcom,rx-char-to-inject = <0xfd>;
qcom,bam-tx-ep-pipe-index = <0>;
qcom,bam-rx-ep-pipe-index = <1>;
qcom,master-id = <84>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP2_AHB_CLK>,
<&gcc GCC_BLSP2_UART1_APPS_CLK>;
pinctrl-names = "sleep", "default";
pinctrl-0 = <&blsp2_uart1_sleep>;
pinctrl-1 = <&blsp2_uart1_active>;
qcom,msm-bus,name = "blsp2_uart1";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<84 512 0 0>,
<84 512 500 800>;
status = "disabled";
};
blsp2_uart2_hs: uart@7af0000 { /* BLSP2 UART2 */
compatible = "qcom,msm-hsuart-v14";
reg-names = "core_mem", "bam_mem";
reg = <0x7af0000 0x200>,
<0x7ac4000 0x1f000>;
interrupt-names = "core_irq", "bam_irq", "wakeup_irq";
#address-cells = <0>;
interrupt-parent = <&blsp2_uart2_hs>;
interrupts = <0 1 2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xffffffff>;
interrupt-map = <0 &intc 0 307 IRQ_TYPE_LEVEL_HIGH
1 &intc 0 239 IRQ_TYPE_LEVEL_HIGH
2 &tlmm 21 IRQ_TYPE_LEVEL_HIGH>;
qcom,inject-rx-on-wakeup;
qcom,rx-char-to-inject = <0xfd>;
qcom,bam-tx-ep-pipe-index = <2>;
qcom,bam-rx-ep-pipe-index = <3>;
qcom,master-id = <84>;
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP2_AHB_CLK>,
<&gcc GCC_BLSP2_UART2_APPS_CLK>;
pinctrl-names = "sleep", "default";
pinctrl-0 = <&blsp2_uart2_sleep>;
pinctrl-1 = <&blsp2_uart2_active>;
qcom,msm-bus,name = "blsp2_uart2";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<84 512 0 0>,
<84 512 500 800>;
status = "disabled";
};
};

728
arch/arm64/boot/dts/qcom/sdm429-pinctrl.dtsi
View File

@@ -49,5 +49,733 @@
};
};
i2c_1{
i2c_1_active: i2c_1_active {
mux {
pins = "gpio2", "gpio3";
function = "blsp_i2c1";
};
config {
pins = "gpio2", "gpio3";
drive-strength = <2>;
bias-pull-up;
};
};
i2c_1_sleep: i2c_1_sleep {
mux {
pins = "gpio2", "gpio3";
function = "gpio";
};
config {
pins = "gpio2", "gpio3";
drive-strength = <2>;
bias-disable;
};
};
};
i2c_2{
i2c_2_active: i2c_2_active {
mux {
pins = "gpio6", "gpio7";
function = "blsp_i2c2";
};
config {
pins = "gpio6", "gpio7";
drive-strength = <2>;
bias-pull-up;
};
};
i2c_2_sleep: i2c_2_sleep {
mux {
pins = "gpio6", "gpio7";
function = "gpio";
};
config {
pins = "gpio6", "gpio7";
drive-strength = <2>;
bias-disable;
};
};
};
i2c_3{
i2c_3_active: i2c_3_active {
mux {
pins = "gpio10", "gpio11";
function = "blsp_i2c3";
};
config {
pins = "gpio10", "gpio11";
drive-strength = <2>;
bias-pull-up;
};
};
i2c_3_sleep: i2c_3_sleep {
mux {
pins = "gpio10", "gpio11";
function = "gpio";
};
config {
pins = "gpio10", "gpio11";
drive-strength = <2>;
bias-disable;
};
};
};
i2c_4{
i2c_4_active: i2c_4_active {
mux {
pins = "gpio14", "gpio15";
function = "blsp_i2c4";
};
config {
pins = "gpio14", "gpio15";
drive-strength = <2>;
bias-pull-up;
};
};
i2c_4_sleep: i2c_4_sleep {
mux {
pins = "gpio14", "gpio15";
function = "gpio";
};
config {
pins = "gpio14", "gpio15";
drive-strength = <2>;
bias-disable;
};
};
};
spi_1{
spi_1_active: spi_1_active {
mux {
pins = "gpio0", "gpio1",
"gpio2", "gpio3";
function = "blsp_spi1";
};
config {
pins = "gpio0", "gpio1",
"gpio2", "gpio3";
drive-strength = <6>;
bias-disable;
};
};
spi_1_sleep: spi_1_sleep {
mux {
pins = "gpio0", "gpio1",
"gpio2", "gpio3";
function = "gpio";
};
config {
pins = "gpio0", "gpio1",
"gpio2", "gpio3";
drive-strength = <6>;
bias-disable;
};
};
};
spi_2{
spi_2_active: spi_2_active {
mux {
pins = "gpio4", "gpio5",
"gpio6", "gpio7";
function = "blsp_spi2";
};
config {
pins = "gpio4", "gpio5",
"gpio6", "gpio7";
drive-strength = <6>;
bias-disable;
};
};
spi_2_sleep: spi_2_sleep {
mux {
pins = "gpio4", "gpio5",
"gpio6", "gpio7";
function = "gpio";
};
config {
pins = "gpio4", "gpio5",
"gpio6", "gpio7";
drive-strength = <6>;
bias-disable;
};
};
};
spi_3{
spi_3_active: spi_3_active {
mux {
pins = "gpio8", "gpio9",
"gpio10", "gpio11";
function = "blsp_spi3";
};
config {
pins = "gpio8", "gpio9",
"gpio10", "gpio11";
drive-strength = <6>;
bias-disable;
};
};
spi_3_sleep: spi_3_sleep {
mux {
pins = "gpio8", "gpio9",
"gpio10", "gpio11";
function = "gpio";
};
config {
pins = "gpio8", "gpio9",
"gpio10", "gpio11";
drive-strength = <6>;
bias-disable;
};
};
};
spi_4{
spi_4_active: spi_4_active {
mux {
pins = "gpio12", "gpio13",
"gpio14", "gpio15";
function = "blsp_spi4";
};
config {
pins = "gpio12", "gpio13",
"gpio14", "gpio15";
drive-strength = <6>;
bias-disable;
};
};
spi_4_sleep: spi_4_sleep {
mux {
pins = "gpio12", "gpio13",
"gpio14", "gpio15";
function = "gpio";
};
config {
pins = "gpio12", "gpio13",
"gpio14", "gpio15";
drive-strength = <6>;
bias-disable;
};
};
};
blsp1_uart1: blsp1_uart1 {
blsp1_uart1_active: blsp1_uart1_active {
mux {
pins = "gpio0", "gpio1",
"gpio2", "gpio3";
function = "blsp_uart1";
};
config {
pins = "gpio0", "gpio1",
"gpio2", "gpio3";
drive-strength = <2>;
bias-disable;
};
};
blsp1_uart1_sleep: blsp1_uart1_sleep {
mux {
pins = "gpio0", "gpio1",
"gpio2", "gpio3";
function = "gpio";
};
config {
pins = "gpio0", "gpio1",
"gpio2", "gpio3";
drive-strength = <2>;
bias-disable;
};
};
};
i2c_5{
i2c_5_active: i2c_5_active {
mux {
pins = "gpio18", "gpio19";
function = "blsp_i2c5";
};
config {
pins = "gpio18", "gpio19";
drive-strength = <2>;
bias-pull-up;
};
};
i2c_5_sleep: i2c_5_sleep {
mux {
pins = "gpio18", "gpio19";
function = "gpio";
};
config {
pins = "gpio18", "gpio19";
drive-strength = <2>;
bias-disable;
};
};
};
i2c_6{
i2c_6_active: i2c_6_active {
mux {
pins = "gpio22", "gpio23";
function = "blsp_i2c6";
};
config {
pins = "gpio22", "gpio23";
drive-strength = <2>;
bias-pull-up;
};
};
i2c_6_sleep: i2c_6_sleep {
mux {
pins = "gpio22", "gpio23";
function = "gpio";
};
config {
pins = "gpio22", "gpio23";
drive-strength = <2>;
bias-disable;
};
};
};
i2c_7{
i2c_7_active: i2c_7_active {
mux {
pins = "gpio87", "gpio88";
function = "blsp_i2c7";
};
config {
pins = "gpio87", "gpio88";
drive-strength = <2>;
bias-pull-up;
};
};
i2c_7_sleep: i2c_7_sleep {
mux {
pins = "gpio87", "gpio88";
function = "gpio";
};
config {
pins = "gpio87", "gpio88";
drive-strength = <2>;
bias-disable;
};
};
};
i2c_8{
i2c_8_active: i2c_8_active {
mux {
pins = "gpio98", "gpio99";
function = "blsp_i2c8";
};
config {
pins = "gpio98", "gpio99";
drive-strength = <2>;
bias-pull-up;
};
};
i2c_8_sleep: i2c_8_sleep {
mux {
pins = "gpio98", "gpio99";
function = "gpio";
};
config {
pins = "gpio98", "gpio99";
drive-strength = <2>;
bias-disable;
};
};
};
spi_5{
spi_5_active: spi_5_active {
mux {
pins = "gpio16", "gpio17",
"gpio18", "gpio19";
function = "blsp_spi5";
};
config {
pins = "gpio16", "gpio17",
"gpio18", "gpio19";
drive-strength = <6>;
bias-disable;
};
};
spi_5_sleep: spi_5_sleep {
mux {
pins = "gpio16", "gpio17",
"gpio18", "gpio19";
function = "gpio";
};
config {
pins = "gpio16", "gpio17",
"gpio18", "gpio19";
drive-strength = <6>;
bias-disable;
};
};
};
spi_6{
spi_6_active: spi_6_active {
mux {
pins = "gpio20", "gpio21",
"gpio22", "gpio23";
function = "blsp_spi6";
};
config {
pins = "gpio20", "gpio21",
"gpio22", "gpio23";
drive-strength = <6>;
bias-disable;
};
};
spi_6_sleep: spi_6_sleep {
mux {
pins = "gpio20", "gpio21",
"gpio22", "gpio23";
function = "gpio";
};
config {
pins = "gpio20", "gpio21",
"gpio22", "gpio23";
drive-strength = <6>;
bias-disable;
};
};
};
spi_7{
spi_7_active: spi_7_active {
mux {
pins = "gpio85", "gpio86",
"gpio87", "gpio88";
function = "blsp_spi7";
};
config {
pins = "gpio85", "gpio86",
"gpio87", "gpio88";
drive-strength = <6>;
bias-disable;
};
};
spi_7_sleep: spi_7_sleep {
mux {
pins = "gpio85", "gpio86",
"gpio87", "gpio88";
function = "gpio";
};
config {
pins = "gpio85", "gpio86",
"gpio87", "gpio88";
drive-strength = <6>;
bias-disable;
};
};
};
spi_8{
spi_8_active: spi_8_active {
mux {
pins = "gpio96", "gpio97",
"gpio98", "gpio99";
function = "blsp_spi8";
};
config {
pins = "gpio96", "gpio97",
"gpio98", "gpio99";
drive-strength = <6>;
bias-disable;
};
};
spi_8_sleep: spi_8_sleep {
mux {
pins = "gpio96", "gpio97",
"gpio98", "gpio99";
function = "gpio";
};
config {
pins = "gpio96", "gpio97",
"gpio98", "gpio99";
drive-strength = <6>;
bias-disable;
};
};
};
blsp2_uart1: blsp2_uart1 {
blsp2_uart1_active: blsp2_uart1_active {
mux {
pins = "gpio16", "gpio17",
"gpio18", "gpio19";
function = "blsp_uart5";
};
config {
pins = "gpio16", "gpio17",
"gpio18", "gpio19";
drive-strength = <2>;
bias-disable;
};
};
blsp2_uart1_sleep: blsp2_uart1_sleep {
mux {
pins = "gpio16", "gpio17",
"gpio18", "gpio19";
function = "gpio";
};
config {
pins = "gpio16", "gpio17",
"gpio18", "gpio19";
drive-strength = <2>;
bias-disable;
};
};
};
blsp2_uart2: blsp2_uart2 {
blsp2_uart2_active: blsp2_uart2_active {
mux {
pins = "gpio20", "gpio21",
"gpio22", "gpio23";
function = "blsp_uart6";
};
config {
pins = "gpio20", "gpio21",
"gpio22", "gpio23";
drive-strength = <2>;
bias-disable;
};
};
blsp2_uart2_sleep: blsp2_uart2_sleep {
mux {
pins = "gpio20", "gpio21",
"gpio22", "gpio23";
function = "gpio";
};
config {
pins = "gpio20", "gpio21",
"gpio22", "gpio23";
drive-strength = <2>;
bias-disable;
};
};
};
pmx_sdc1_rclk {
sdc1_rclk_on: sdc1_rclk_on {
config {
pins = "sdc1_rclk";
bias-pull-down; /* pull down */
};
};
sdc1_rclk_off: sdc1_rclk_off {
config {
pins = "sdc1_rclk";
bias-pull-down; /* pull down */
};
};
};
pmx_sdc1_clk {
sdc1_clk_on: sdc1_clk_on {
config {
pins = "sdc1_clk";
bias-disable; /* NO pull */
drive-strength = <16>; /* 16 MA */
};
};
sdc1_clk_off: sdc1_clk_off {
config {
pins = "sdc1_clk";
bias-disable; /* NO pull */
drive-strength = <2>; /* 2 MA */
};
};
};
pmx_sdc1_cmd {
sdc1_cmd_on: sdc1_cmd_on {
config {
pins = "sdc1_cmd";
bias-pull-up; /* pull up */
drive-strength = <10>; /* 10 MA */
};
};
sdc1_cmd_off: sdc1_cmd_off {
config {
pins = "sdc1_cmd";
bias-pull-up; /* pull up */
drive-strength = <2>; /* 2 MA */
};
};
};
pmx_sdc1_data {
sdc1_data_on: sdc1_data_on {
config {
pins = "sdc1_data";
bias-pull-up; /* pull up */
drive-strength = <10>; /* 10 MA */
};
};
sdc1_data_off: sdc1_data_off {
config {
pins = "sdc1_data";
bias-pull-up; /* pull up */
drive-strength = <2>; /* 2 MA */
};
};
};
sdhc2_cd_pin {
sdc2_cd_on: cd_on {
mux {
pins = "gpio67";
function = "gpio";
};
config {
pins = "gpio67";
drive-strength = <2>;
bias-pull-up;
};
};
sdc2_cd_off: cd_off {
mux {
pins = "gpio67";
function = "gpio";
};
config {
pins = "gpio67";
drive-strength = <2>;
bias-disable;
};
};
};
pmx_sdc2_clk {
sdc2_clk_on: sdc2_clk_on {
config {
pins = "sdc2_clk";
drive-strength = <16>; /* 16 MA */
bias-disable; /* NO pull */
};
};
sdc2_clk_off: sdc2_clk_off {
config {
pins = "sdc2_clk";
bias-disable; /* NO pull */
drive-strength = <2>; /* 2 MA */
};
};
};
pmx_sdc2_cmd {
sdc2_cmd_on: sdc2_cmd_on {
config {
pins = "sdc2_cmd";
bias-pull-up; /* pull up */
drive-strength = <16>; /* 16 MA */
};
};
sdc2_cmd_off: sdc2_cmd_off {
config {
pins = "sdc2_cmd";
bias-pull-up; /* pull up */
drive-strength = <2>; /* 2 MA */
};
};
};
pmx_sdc2_data {
sdc2_data_on: sdc2_data_on {
config {
pins = "sdc2_data";
bias-pull-up; /* pull up */
drive-strength = <16>; /* 16 MA */
};
};
sdc2_data_off: sdc2_data_off {
config {
pins = "sdc2_data";
bias-pull-up; /* pull up */
drive-strength = <2>; /* 2 MA */
};
};
};
};
};

41
arch/arm64/boot/dts/qcom/sdm429-wdp.dtsi
View File

@@ -11,3 +11,44 @@
* GNU General Public License for more details.
*/
&sdhc_1 {
/* device core power supply */
vdd-supply = <&L19A>;
qcom,vdd-voltage-level = <2900000 3200000>;
qcom,vdd-current-level = <200 570000>;
/* device communication power supply */
vdd-io-supply = <&L13A>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <0 60000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
status = "ok";
};
&sdhc_2 {
/* device core power supply for sd card*/
vdd-supply = <&vreg_sd_vdd>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <15000 800000>;
/* device communication power supply for msm_io*/
vdd-io-supply = <&vreg_sd_pad>;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <200 22000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&tlmm 67 0x1>;
status = "disabled";
};

41
arch/arm64/boot/dts/qcom/sdm429-wtp.dtsi
View File

@@ -11,3 +11,44 @@
* GNU General Public License for more details.
*/
&sdhc_1 {
/* device core power supply */
vdd-supply = <&L19A>;
qcom,vdd-voltage-level = <2900000 3200000>;
qcom,vdd-current-level = <200 570000>;
/* device communication power supply */
vdd-io-supply = <&L13A>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <0 60000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
status = "ok";
};
&sdhc_2 {
/* device core power supply for sd card*/
vdd-supply = <&vreg_sd_vdd>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <15000 800000>;
/* device communication power supply for msm_io*/
vdd-io-supply = <&vreg_sd_pad>;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <200 22000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&tlmm 67 0x1>;
status = "disabled";
};

504
arch/arm64/boot/dts/qcom/sdm429.dtsi
View File

@@ -123,8 +123,10 @@
};
aliases { };
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
sdhc2 = &sdhc_2; /* SDC2 for SD card */
};
soc: soc { };
@@ -132,6 +134,7 @@
#include "sdm429-bus.dtsi"
#include "sdm429-pinctrl.dtsi"
#include "sdm429-blsp.dtsi"
#include "sdm429-cpu.dtsi"
#include "sdm429-ion.dtsi"
@@ -262,6 +265,11 @@
status = "disabled";
};
qcom,sps {
compatible = "qcom,msm-sps-4k";
qcom,pipe-attr-ee;
};
blsp1_uart2: serial@78b0000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x78b0000 0x200>;
@@ -295,6 +303,95 @@
status = "disabled";
};
sdhc_1: sdhci@7824900 {
compatible = "qcom,sdhci-msm";
reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>;
reg-names = "hc_mem", "core_mem", "cmdq_mem";
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
qcom,bus-width = <8>;
qcom,large-address-bus;
qcom,clk-rates = <400000 20000000 25000000 50000000 100000000
192000000 384000000>;
qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
qcom,devfreq,freq-table = <50000000 200000000>;
qcom,msm-bus,name = "sdhc1";
qcom,msm-bus,num-cases = <9>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
<78 512 1046 3200>, /* 400 KB/s*/
<78 512 52286 160000>, /* 20 MB/s */
<78 512 65360 200000>, /* 25 MB/s */
<78 512 130718 400000>, /* 50 MB/s */
<78 512 130718 400000>, /* 100 MB/s */
<78 512 261438 800000>, /* 200 MB/s */
<78 512 261438 800000>, /* 400 MB/s */
<78 512 1338562 4096000>; /* Max. bandwidth */
qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000
50000000 100000000 200000000 400000000 4294967295>;
clocks = <&gcc GCC_SDCC1_AHB_CLK>,
<&gcc GCC_SDCC1_APPS_CLK>,
<&gcc GCC_SDCC1_ICE_CORE_CLK>;
clock-names = "iface_clk", "core_clk", "ice_core_clk";
qcom,scaling-lower-bus-speed-mode = "DDR52";
/* DLL HSR settings. Refer go/hsr - <Target> DLL settings */
qcom,dll-hsr-list = <0x00076400 0x0 0x0 0x0 0x00040874>;
qcom,nonremovable;
status = "disabled";
};
sdhc_2: sdhci@7864900 {
compatible = "qcom,sdhci-msm";
reg = <0x7864900 0x500>, <0x7864000 0x800>;
reg-names = "hc_mem", "core_mem";
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
qcom,bus-width = <4>;
qcom,large-address-bus;
qcom,clk-rates = <400000 20000000 25000000 50000000 100000000
200000000>;
qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50",
"SDR104";
qcom,msm-bus,name = "sdhc2";
qcom,msm-bus,num-cases = <8>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
<81 512 1046 3200>, /* 400 KB/s*/
<81 512 52286 160000>, /* 20 MB/s */
<81 512 65360 200000>, /* 25 MB/s */
<81 512 130718 400000>, /* 50 MB/s */
<81 512 261438 800000>, /* 100 MB/s */
<81 512 261438 800000>, /* 200 MB/s */
<81 512 1338562 4096000>; /* Max. bandwidth */
qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
100000000 200000000 4294967295>;
qcom,devfreq,freq-table = <50000000 200000000>;
clocks = <&gcc GCC_SDCC2_AHB_CLK>,
<&gcc GCC_SDCC2_APPS_CLK>;
clock-names = "iface_clk", "core_clk";
/* DLL HSR settings. Refer go/hsr - <Target> DLL settings */
qcom,dll-hsr-list = <0x00076400 0x0 0x0 0x0 0x00040874>;
status = "disabled";
};
qcom,msm-imem@8600000 {
compatible = "qcom,msm-imem";
reg = <0x08600000 0x1000>; /* Address and size of IMEM */
@@ -340,7 +437,90 @@
rpm_bus: qcom,rpm-smd { };
usb_otg: usb@78db000 { };
usb_otg: usb@78db000 {
compatible = "qcom,hsusb-otg";
reg = <0x78db000 0x400>, <0x6c000 0x200>;
reg-names = "core", "phy_csr";
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupts = <0 134 0>,<0 140 0>;
interrupt-names = "core_irq", "async_irq";
hsusb_vdd_dig-supply = <&L6A>;
HSUSB_1p8-supply = <&L12A>;
HSUSB_3p3-supply = <&L16A>;
qcom,vdd-voltage-level = <0 928000 928000>;
vbus_otg-supply = <&smb2_vbus>;
qcom,hsusb-otg-phy-init-seq = <0x43 0x80 0x06 0x82 0xffffffff>;
qcom,hsusb-otg-phy-type = <3>; /* SNPS Femto PHY */
qcom,hsusb-otg-mode = <3>; /* OTG mode */
qcom,hsusb-otg-otg-control = <2>; /* PMIC */
qcom,dp-manual-pullup;
qcom,phy-dvdd-always-on;
qcom,boost-sysclk-with-streaming;
qcom,axi-prefetch-enable;
qcom,hsusb-otg-delay-lpm;
qcom,enumeration-check-for-sdp;
qcom,msm-bus,name = "usb2";
qcom,msm-bus,num-cases = <3>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<87 512 0 0>,
<87 512 80000 0>,
<87 512 6000 6000>;
clocks = <&gcc GCC_USB_HS_AHB_CLK>,
<&gcc GCC_USB_HS_SYSTEM_CLK>,
<&gcc GCC_USB2A_PHY_SLEEP_CLK>,
<&rpmcc BIMC_USB_A_CLK>,
<&rpmcc SNOC_USB_A_CLK>,
<&rpmcc PNOC_USB_A_CLK>,
<&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
<&rpmcc CXO_SMD_OTG_CLK>;
clock-names = "iface_clk", "core_clk", "sleep_clk",
"bimc_clk", "snoc_clk", "pcnoc_clk",
"phy_csr_clk", "xo";
qcom,bus-clk-rate = <748800000 200000000 100000000>;
qcom,max-nominal-sysclk-rate = <133330000>;
resets = <&gcc GCC_USB_HS_BCR>,
<&gcc GCC_QUSB2_PHY_BCR>,
<&gcc GCC_USB2_HS_PHY_ONLY_BCR>;
reset-names = "core_reset", "phy_reset", "phy_por_reset";
qcom,usbbam@78c4000 {
compatible = "qcom,usb-bam-msm";
reg = <0x78c4000 0x17000>;
interrupt-parent = <&intc>;
interrupts = <0 135 0>;
qcom,bam-type = <1>;
qcom,usb-bam-num-pipes = <4>;
qcom,usb-bam-fifo-baseaddr = <0x08605000>;
qcom,ignore-core-reset-ack;
qcom,disable-clk-gating;
qcom,usb-bam-max-mbps-highspeed = <400>;
qcom,reset-bam-on-disconnect;
qcom,pipe0 {
label = "hsusb-qdss-in-0";
qcom,usb-bam-mem-type = <2>;
qcom,dir = <1>;
qcom,pipe-num = <0>;
qcom,peer-bam = <0>;
qcom,peer-bam-physical-address = <0x6044000>;
qcom,src-bam-pipe-index = <0>;
qcom,dst-bam-pipe-index = <0>;
qcom,data-fifo-offset = <0x0>;
qcom,data-fifo-size = <0xe00>;
qcom,descriptor-fifo-offset = <0xe00>;
qcom,descriptor-fifo-size = <0x200>;
};
};
};
spmi_bus: qcom,spmi@200f000 {
compatible = "qcom,spmi-pmic-arb";
@@ -362,6 +542,324 @@
};
thermal_zones: thermal-zones { };
tcsr_mutex_regs: syscon@1905000 {
compatible = "syscon";
reg = <0x1905000 0x8000>;
};
tcsr_mutex: hwlock {
compatible = "qcom,tcsr-mutex";
syscon = <&tcsr_mutex_regs 0 0x1000>;
#hwlock-cells = <1>;
};
apcs: syscon@0b011008 {
compatible = "syscon";
reg = <0x0b011008 0x04>;
};
rpm_msg_ram: memory@60000 {
compatible = "qcom,rpm-msg-ram";
reg = <0x60000 0x8000>;
};
smem_mem: smem_region@86300000 {
reg = <0x86300000 0x100000>;
no-map;
};
smem {
compatible = "qcom,smem";
memory-region = <&smem_mem>;
hwlocks = <&tcsr_mutex 3>;
};
qcom,smd {
compatible = "qcom,smd";
modem {
qcom,smd-edge = <0>;
qcom,ipc = <&apcs 0 12>;
qcom,remote-pid = <1>;
interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>;
label = "mpss";
qcom,smd-channels = "IPCRTR";
qcom,modem_qrtr {
qcom,net-id = <1>;
qcom,low-latency;
};
};
wcnss {
qcom,smd-edge = <6>;
qcom,ipc = <&apcs 0 17>;
qcom,remote-pid = <4>;
interrupts = <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>;
label = "wcnss";
qcom,smd-channels = "IPCRTR";
qcom,wcnss_qrtr {
qcom,net-id = <1>;
qcom,low-latency;
};
};
adsp {
qcom,smd-edge = <1>;
qcom,ipc = <&apcs 0 8>;
qcom,remote-pid = <2>;
interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
label = "adsp";
qcom,smd-channels = "IPCRTR";
qcom,adsp_qrtr {
qcom,net-id = <1>;
qcom,low-latency;
};
};
rpm {
qcom,smd-edge = <15>;
qcom,ipc = <&apcs 0 0>;
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
label = "rpm";
rpm_requests: rpm_requests@0 {
compatible = "qcom,rpm-smd";
qcom,smd-channels = "rpm_requests";
};
};
};
qcom,smsm {
compatible = "qcom,smsm";
#address-cells = <1>;
#size-cells = <0>;
qcom,ipc-1 = <&apcs 0 13>;
qcom,ipc-2 = <&apcs 0 9>;
qcom,ipc-6 = <&apcs 0 19>;
apps_smsm: apps@0 {
reg = <0>;
#qcom,smem-state-cells = <1>;
};
modem_smsm: modem@1 {
reg = <1>;
interrupts = <0 26 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
};
adsp_smsm: adsp@2 {
reg = <2>;
interrupts = <0 289 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
};
wcnss_smsm: wcnss@6 {
reg = <6>;
interrupts = <0 144 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
modem-smp2p {
compatible = "qcom,smp2p";
qcom,smem = <435>, <428>;
interrupts = <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 0 14>;
qcom,local-pid = <0>;
qcom,remote-pid = <1>;
modem_smp2p_out: master-kernel {
qcom,entry-name = "master-kernel";
#qcom,smem-state-cells = <1>;
};
modem_smp2p_in: slave-kernel {
qcom,entry-name = "slave-kernel";
interrupt-controller;
#interrupt-cells = <2>;
};
};
adsp-smp2p {
compatible = "qcom,smp2p";
qcom,smem = <443>, <429>;
interrupts = <GIC_SPI 291 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 0 10>;
qcom,local-pid = <0>;
qcom,remote-pid = <2>;
adsp_smp2p_out: master-kernel {
qcom,entry-name = "master-kernel";
#qcom,smem-state-cells = <1>;
};
adsp_smp2p_in: slave-kernel {
qcom,entry-name = "slave-kernel";
interrupt-controller;
#interrupt-cells = <2>;
};
};
wcnss-smp2p {
compatible = "qcom,smp2p";
qcom,smem = <451>, <431>;
interrupts = <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 0 18>;
qcom,local-pid = <0>;
qcom,remote-pid = <4>;
wcnss_smp2p_out: master-kernel {
qcom,entry-name = "master-kernel";
#qcom,smem-state-cells = <1>;
};
wcnss_smp2p_in: slave-kernel {
qcom,entry-name = "slave-kernel";
interrupt-controller;
#interrupt-cells = <2>;
};
};
qcom,smdpkt {
compatible = "qcom,smdpkt";
qcom,smdpkt-data5-cntl {
qcom,smdpkt-edge = "modem";
qcom,smdpkt-ch-name = "DATA5_CNTL";
qcom,smdpkt-dev-name = "smdcntl0";
};
qcom,smdpkt-data22 {
qcom,smdpkt-edge = "modem";
qcom,smdpkt-ch-name = "DATA22";
qcom,smdpkt-dev-name = "smd22";
};
qcom,smdpkt-data40-cntl {
qcom,smdpkt-edge = "modem";
qcom,smdpkt-ch-name = "DATA40_CNTL";
qcom,smdpkt-dev-name = "smdcntl8";
};
qcom,smdpkt-data2 {
qcom,smdpkt-edge = "modem";
qcom,smdpkt-ch-name = "DATA2";
qcom,smdpkt-dev-name = "at_mdm0";
};
qcom,smdpkt-apr-apps2 {
qcom,smdpkt-edge = "adsp";
qcom,smdpkt-ch-name = "apr_apps2";
qcom,smdpkt-dev-name = "apr_apps2";
};
qcom,smdpkt-apps-fm {
qcom,smdpkt-edge = "wcnss";
qcom,smdpkt-ch-name = "APPS_FM";
qcom,smdpkt-dev-name = "smd1";
};
qcom,smdpkt-apps-riva-bt-acl {
qcom,smdpkt-edge = "wcnss";
qcom,smdpkt-ch-name = "APPS_RIVA_BT_ACL";
qcom,smdpkt-dev-name = "smd2";
};
qcom,smdpkt-apps-riva-bt-cmd {
qcom,smdpkt-edge = "wcnss";
qcom,smdpkt-ch-name = "APPS_RIVA_BT_CMD";
qcom,smdpkt-dev-name = "smd3";
};
qcom,smdpkt-mbalbridge {
qcom,smdpkt-edge = "modem";
qcom,smdpkt-ch-name = "MBALBRIDGE";
qcom,smdpkt-dev-name = "smd4";
};
qcom,smdpkt-apps-riva-ant-cmd {
qcom,smdpkt-edge = "wcnss";
qcom,smdpkt-ch-name = "APPS_RIVA_ANT_CMD";
qcom,smdpkt-dev-name = "smd5";
};
qcom,smdpkt-apps-riva-ant-data {
qcom,smdpkt-edge = "wcnss";
qcom,smdpkt-ch-name = "APPS_RIVA_ANT_DATA";
qcom,smdpkt-dev-name = "smd6";
};
qcom,smdpkt-data1 {
qcom,smdpkt-edge = "modem";
qcom,smdpkt-ch-name = "DATA1";
qcom,smdpkt-dev-name = "smd7";
};
qcom,smdpkt-data4 {
qcom,smdpkt-edge = "modem";
qcom,smdpkt-ch-name = "DATA4";
qcom,smdpkt-dev-name = "smd8";
};
qcom,smdpkt-data11 {
qcom,smdpkt-edge = "modem";
qcom,smdpkt-ch-name = "DATA11";
qcom,smdpkt-dev-name = "smd11";
};
qcom,smdpkt-data21 {
qcom,smdpkt-edge = "modem";
qcom,smdpkt-ch-name = "DATA21";
qcom,smdpkt-dev-name = "smd21";
};
};
qcom,bam_dmux@4044000 {
compatible = "qcom,bam_dmux";
reg = <0x4044000 0x19000>;
qcom,rx-ring-size = <32>;
qcom,max-rx-mtu = <4096>;
qcom,fast-shutdown;
qcom,no-cpu-affinity;
qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>;
qcom,smem-state-names = "pwrctrl", "pwrctrlack";
interrupts-extended =
<&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
<&modem_smsm 1 IRQ_TYPE_EDGE_BOTH>,
<&modem_smsm 11 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "dmux", "ctrl", "ack";
};
slim_msm: slim@c140000{
cell-index = <1>;
compatible = "qcom,slim-ngd";
reg = <0xc140000 0x2c000>,
<0xc104000 0x2a000>;
reg-names = "slimbus_physical", "slimbus_bam_physical";
interrupts = <0 163 0>, <0 180 0>;
interrupt-names = "slimbus_irq", "slimbus_bam_irq";
qcom,apps-ch-pipes = <0x600000>;
qcom,ea-pc = <0x230>;
status = "disabled";
};
};
#include "sdm429-gdsc.dtsi"

4
arch/arm64/boot/dts/qcom/sdm429w-pm660.dtsi
View File

@@ -246,3 +246,7 @@
};
};
};
&usb_otg {
extcon = &pm660_charger;
};

110
arch/arm64/boot/dts/qcom/sdm429w-regulator.dtsi
View File

@@ -344,9 +344,115 @@
};
&soc {
regulator@b018000 {
apc_mem_acc_vreg: apc-mem-acc-regulator {
compatible = "qcom,mem-acc-regulator";
regulator-name = "apc_mem_acc_corner";
regulator-min-microvolt = <1>;
regulator-max-microvolt = <2>;
qcom,acc-reg-addr-list = <0x01942138 0x01942130 0x01946004>;
qcom,acc-init-reg-config = <1 0xff>;
qcom,num-acc-corners = <2>;
qcom,boot-acc-corner = <1>;
qcom,corner1-reg-config =
/* 1 -> 1 */
<(-1) (-1)>, <(-1) (-1)>,
/* 1 -> 2 */
< 2 0xffff>, < 3 0xff>;
qcom,corner2-reg-config =
/* 2 -> 1 */
< 2 0x5555>, < 3 0x55>,
/* 2 -> 2 */
<(-1) (-1)>, <(-1) (-1)>;
};
apc_vreg_corner: regulator@b018000 {
compatible = "qcom,cpr-regulator";
reg = <0xb018000 0x1000>, <0xb011064 4>, <0xa4000 0x1000>;
reg-names = "rbcpr", "rbcpr_clk", "efuse_addr";
interrupts = <0 15 0>;
regulator-name = "apc_corner";
regulator-min-microvolt = <1>;
regulator-max-microvolt = <6>;
qcom,cpr-fuse-corners = <3>;
qcom,cpr-voltage-ceiling = <810000 845000 980000>;
qcom,cpr-voltage-floor = <700000 700000 790000>;
vdd-apc-supply = <&pm660_s3>;
qcom,cpr-apc-volt-step = <4000>;
mem-acc-supply = <&apc_mem_acc_vreg>;
qcom,mem-acc-corner-map = <1 1 1 1 2 2>;
qcom,cpr-ref-clk = <19200>;
qcom,cpr-timer-delay = <5000>;
qcom,cpr-timer-cons-up = <0>;
qcom,cpr-timer-cons-down = <2>;
qcom,cpr-irq-line = <0>;
qcom,cpr-step-quotient = <10>;
qcom,cpr-up-threshold = <2>;
qcom,cpr-down-threshold = <4>;
qcom,cpr-idle-clocks = <15>;
qcom,cpr-gcnt-time = <1>;
qcom,vdd-apc-step-up-limit = <1>;
qcom,vdd-apc-step-down-limit = <1>;
qcom,cpr-apc-volt-step = <4000>; /* 4mV for PM660 */
qcom,cpr-fuse-row = <67 0>;
qcom,cpr-fuse-target-quot = <42 24 6>;
qcom,cpr-fuse-ro-sel = <60 57 54>;
qcom,cpr-init-voltage-ref = <760000 795000 910000>;
qcom,cpr-fuse-init-voltage =
<67 36 6 0>,
<67 18 6 0>,
<67 0 6 0>;
qcom,cpr-fuse-quot-offset =
<71 26 6 0>,
<71 20 6 0>,
<70 54 7 0>;
qcom,cpr-fuse-quot-offset-scale = <5 5 5>;
qcom,cpr-init-voltage-step = <10000>;
qcom,cpr-corner-map = <1 2 3 3 3 3>;
qcom,cpr-corner-frequency-map =
<1 1305600000>,
<2 1497600000>,
<3 1708800000>,
<4 1804800000>,
<5 1958400000>,
<6 2016000000>;
qcom,speed-bin-fuse-sel = <37 34 3 0>;
qcom,cpr-speed-bin-max-corners =
<0 (-1) 1 2 5>,
<1 (-1) 1 2 5>,
<4 (-1) 1 2 6>,
<5 (-1) 1 2 6>;
qcom,cpr-fuse-revision = <69 39 3 0>;
qcom,cpr-quot-adjust-scaling-factor-max = <0 1400 1400>;
qcom,cpr-voltage-scaling-factor-max = <0 2000 2000>;
qcom,cpr-scaled-init-voltage-as-ceiling;
qcom,cpr-fuse-version-map =
/* <Speed-bin pvs-version cpr-rev ... ... ...> */
<(-1) (-1) ( 0) (-1) (-1) (-1)>,
<(-1) (-1) ( 1) (-1) (-1) (-1)>,
<(-1) (-1) (-1) (-1) (-1) (-1)>;
qcom,cpr-quotient-adjustment =
<66 77 66>, /* SVSP/NOM/TUR:30/35/30 mV */
<(-74) 0 (-30)>, /* SVSP/NOM/TUR:-34/0/-14 mV */
<0 0 0>;
qcom,cpr-floor-to-ceiling-max-range =
<50000 50000 65000 65000 65000 65000>,
<50000 50000 65000 65000 65000 65000>,
<50000 50000 65000 65000 65000 65000>;
qcom,cpr-voltage-ceiling-override =
<(-1) (-1) 810000 845000 885000 980000 980000 980000>;
qcom,cpr-virtual-corner-quotient-adjustment =
<0 0 0 0 0 0>,
<0 0 (-22) 0 0 0>, /* NOMP: -10 mV */
<0 0 0 0 0 0>;
qcom,cpr-enable;
};
vreg_sd_pad: vreg_sd_pad {

127
arch/arm64/boot/dts/qcom/sdm660-audio.dtsi
View File

@@ -244,6 +244,116 @@
"SpkrLeft", "SpkrRight";
};
tasha_snd: sound-9335 {
compatible = "qcom,sdm660-asoc-snd-tasha";
qcom,model = "sdm660-tasha-snd-card";
qcom,wcn-btfm;
qcom,mi2s-audio-intf;
qcom,auxpcm-audio-intf;
qcom,ext-disp-audio-rx;
qcom,msm-mi2s-master = <1>, <1>, <1>, <1>;
qcom,audio-routing =
"AIF4 VI", "MCLK",
"RX_BIAS", "MCLK",
"MADINPUT", "MCLK",
"AMIC2", "MIC BIAS2",
"MIC BIAS2", "Headset Mic",
"AMIC3", "MIC BIAS2",
"MIC BIAS2", "ANCRight Headset Mic",
"AMIC4", "MIC BIAS2",
"MIC BIAS2", "ANCLeft Headset Mic",
"AMIC5", "MIC BIAS3",
"MIC BIAS3", "Handset Mic",
"AMIC6", "MIC BIAS4",
"MIC BIAS4", "Analog Mic6",
"DMIC0", "MIC BIAS1",
"MIC BIAS1", "Digital Mic0",
"DMIC1", "MIC BIAS1",
"MIC BIAS1", "Digital Mic1",
"DMIC2", "MIC BIAS3",
"MIC BIAS3", "Digital Mic2",
"DMIC3", "MIC BIAS3",
"MIC BIAS3", "Digital Mic3",
"DMIC4", "MIC BIAS4",
"MIC BIAS4", "Digital Mic4",
"DMIC5", "MIC BIAS4",
"MIC BIAS4", "Digital Mic5",
"SpkrLeft IN", "SPK1 OUT",
"SpkrRight IN", "SPK2 OUT";
qcom,msm-mbhc-hphl-swh = <1>;
qcom,msm-mbhc-gnd-swh = <1>;
qcom,us-euro-gpios = <&us_euro_gpio>;
qcom,hph-en0-gpio = <&tasha_hph_en0>;
qcom,hph-en1-gpio = <&tasha_hph_en1>;
qcom,msm-mclk-freq = <9600000>;
asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
<&loopback>, <&compress>, <&hostless>,
<&afe>, <&lsm>, <&routing>, <&cpe>, <&compr>,
<&pcm_noirq>, <&cpe3>;
asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
"msm-pcm-dsp.2", "msm-voip-dsp",
"msm-pcm-voice", "msm-pcm-loopback",
"msm-compress-dsp", "msm-pcm-hostless",
"msm-pcm-afe", "msm-lsm-client",
"msm-pcm-routing", "msm-cpe-lsm",
"msm-compr-dsp", "msm-pcm-dsp-noirq",
"msm-cpe-lsm.3";
asoc-cpu = <&dai_dp>, <&dai_mi2s0>,
<&dai_mi2s1>, <&dai_mi2s2>,
<&dai_mi2s3>, <&dai_mi2s4>,
<&dai_pri_auxpcm>, <&dai_sec_auxpcm>,
<&dai_tert_auxpcm>, <&dai_quat_auxpcm>,
<&dai_quin_auxpcm>,
<&sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>,
<&sb_2_rx>, <&sb_2_tx>, <&sb_3_rx>, <&sb_3_tx>,
<&sb_4_rx>, <&sb_4_tx>, <&sb_5_tx>,
<&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>,
<&afe_proxy_tx>, <&incall_record_rx>,
<&incall_record_tx>, <&incall_music_rx>,
<&incall_music_2_rx>, <&sb_5_rx>, <&sb_6_rx>,
<&sb_7_rx>, <&sb_7_tx>, <&sb_8_tx>, <&sb_8_rx>,
<&usb_audio_rx>, <&usb_audio_tx>,
<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_tx_0>,
<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_tx_0>,
<&dai_tert_tdm_rx_0>, <&dai_tert_tdm_tx_0>,
<&dai_quat_tdm_rx_0>, <&dai_quat_tdm_tx_0>,
<&dai_quin_tdm_rx_0>, <&dai_quin_tdm_tx_0>;
asoc-cpu-names = "msm-dai-q6-dp.24608", "msm-dai-q6-mi2s.0",
"msm-dai-q6-mi2s.1", "msm-dai-q6-mi2s.2",
"msm-dai-q6-mi2s.3", "msm-dai-q6-mi2s.4",
"msm-dai-q6-auxpcm.1", "msm-dai-q6-auxpcm.2",
"msm-dai-q6-auxpcm.3", "msm-dai-q6-auxpcm.4",
"msm-dai-q6-auxpcm.5",
"msm-dai-q6-dev.16384", "msm-dai-q6-dev.16385",
"msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387",
"msm-dai-q6-dev.16388", "msm-dai-q6-dev.16389",
"msm-dai-q6-dev.16390", "msm-dai-q6-dev.16391",
"msm-dai-q6-dev.16392", "msm-dai-q6-dev.16393",
"msm-dai-q6-dev.16395", "msm-dai-q6-dev.224",
"msm-dai-q6-dev.225", "msm-dai-q6-dev.241",
"msm-dai-q6-dev.240", "msm-dai-q6-dev.32771",
"msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773",
"msm-dai-q6-dev.32770", "msm-dai-q6-dev.16394",
"msm-dai-q6-dev.16396", "msm-dai-q6-dev.16398",
"msm-dai-q6-dev.16399", "msm-dai-q6-dev.16401",
"msm-dai-q6-dev.16400", "msm-dai-q6-dev.28672",
"msm-dai-q6-dev.28673", "msm-dai-q6-tdm.36864",
"msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36880",
"msm-dai-q6-tdm.36881", "msm-dai-q6-tdm.36896",
"msm-dai-q6-tdm.36897", "msm-dai-q6-tdm.36912",
"msm-dai-q6-tdm.36913", "msm-dai-q6-tdm.36928",
"msm-dai-q6-tdm.36929";
asoc-codec = <&stub_codec>, <&ext_disp_audio_codec>;
asoc-codec-names = "msm-stub-codec.1",
"msm-ext-disp-audio-codec-rx";
qcom,wsa-max-devs = <2>;
qcom,wsa-devs = <&wsa881x_211>, <&wsa881x_212>,
<&wsa881x_213>, <&wsa881x_214>;
qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight",
"SpkrLeft", "SpkrRight";
};
};
&slim_aud {
@@ -254,6 +364,7 @@
};
wcd9335: tasha_codec {
status = "disabled";
compatible = "qcom,tasha-slim-pgd";
elemental-addr = [00 01 a0 01 17 02];
@@ -265,8 +376,8 @@
qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>;
clock-names = "wcd_clk", "wcd_native_clk";
clocks = <&clock_audio AUDIO_PMI_CLK>,
<&clock_audio AUDIO_LPASS_MCLK_2>;
clocks = <&clock_audio 0>,
<&clock_audio_native 0>;
cdc-vdd-mic-bias-supply = <&pm660l_bob>;
qcom,cdc-vdd-mic-bias-voltage = <3300000 3300000>;
@@ -498,15 +609,3 @@
};
};
};
&pm660_gpios {
gpio@c200 {
status = "ok";
qcom,mode = <1>;
qcom,pull = <4>;
qcom,vin-sel = <0>;
qcom,src-sel = <2>;
qcom,master-en = <1>;
qcom,out-strength = <2>;
};
};

46
arch/arm64/boot/dts/qcom/sdm660-camera-sensor-cdp.dtsi
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2017, 2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2017, 2019-2020 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -125,6 +125,7 @@
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_rear_active
&cam_sensor_eldo4_default
&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_rear_suspend
@@ -169,7 +170,8 @@
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_rear2_active>;
&cam_sensor_rear2_active
&cam_sensor_eldo3_default>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_rear2_suspend>;
gpios = <&tlmm 34 0>,
@@ -261,7 +263,8 @@
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_rear_active>;
&cam_sensor_rear_active
&cam_sensor_eldo4_default>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_rear_suspend>;
gpios = <&tlmm 32 0>,
@@ -307,7 +310,8 @@
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_rear2_active>;
&cam_sensor_rear2_active
&cam_sensor_eldo3_default>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_rear2_suspend>;
gpios = <&tlmm 34 0>,
@@ -352,7 +356,8 @@
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_front_active>;
&cam_sensor_front_active
&cam_sensor_eldo3_default>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_front_suspend>;
gpios = <&tlmm 33 0>,
@@ -380,23 +385,20 @@
};
&pm660l_gpios {
gpio@c300 { /* GPIO4 -CAMERA SENSOR 0 VDIG*/
qcom,mode = <1>; /* Output */
qcom,pull = <5>; /* No Pull */
qcom,vin-sel = <0>; /* VIN1 GPIO_LV */
qcom,src-sel = <0>; /* GPIO */
qcom,invert = <0>; /* Invert */
qcom,master-en = <1>; /* Enable GPIO */
status = "ok";
cam_sensor_eldo3 {
cam_sensor_eldo3_default: cam_sensor_eldo3_default {
pins = "gpio3";
function = "normal";
output-enable;
bias-disable;
};
};
gpio@c200 { /* GPIO3 -CAMERA SENSOR 2 VDIG*/
qcom,mode = <1>; /* Output */
qcom,pull = <5>; /* No Pull */
qcom,vin-sel = <0>; /* VIN1 GPIO_LV */
qcom,src-sel = <0>; /* GPIO */
qcom,invert = <0>; /* Invert */
qcom,master-en = <1>; /* Enable GPIO */
status = "ok";
cam_sensor_eldo4 {
cam_sensor_eldo4_default: cam_sensor_eldo4_default {
pins = "gpio4";
function = "normal";
output-enable;
bias-disable;
};
};
};

41
arch/arm64/boot/dts/qcom/sdm660-camera-sensor-qrd.dtsi
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, 2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2017, 2019-2020 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -48,6 +48,8 @@
regulator-max-microvolt = <1350000>;
enable-active-high;
gpio = <&pm660l_gpios 4 0>;
pinctrl-names = "default";
pinctrl-0 = <&cam_sensor_eldo4_default>;
vin-supply = <&pm660_s5>;
};
};
@@ -258,7 +260,8 @@
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_front_active>;
&cam_sensor_front_active
&cam_sensor_eldo3_default>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_front_suspend>;
gpios = <&tlmm 33 0>,
@@ -380,7 +383,8 @@
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_front_active>;
&cam_sensor_front_active
&cam_sensor_eldo3_default>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_front_suspend>;
gpios = <&tlmm 33 0>,
@@ -405,23 +409,20 @@
};
&pm660l_gpios {
gpio@c300 { /* GPIO4 -CAMERA SENSOR 0 VDIG*/
qcom,mode = <1>; /* Output */
qcom,pull = <5>; /* No Pull */
qcom,vin-sel = <0>; /* VIN1 GPIO_LV */
qcom,src-sel = <0>; /* GPIO */
qcom,invert = <0>; /* Invert */
qcom,master-en = <1>; /* Enable GPIO */
status = "ok";
cam_sensor_eldo3 {
cam_sensor_eldo3_default: cam_sensor_eldo3_default {
pins = "gpio3";
function = "normal";
output-high;
bias-disable;
};
};
gpio@c200 { /* GPIO3 -CAMERA SENSOR 2 VDIG*/
qcom,mode = <1>; /* Output */
qcom,pull = <5>; /* No Pull */
qcom,vin-sel = <0>; /* VIN1 GPIO_LV */
qcom,src-sel = <0>; /* GPIO */
qcom,invert = <0>; /* Invert */
qcom,master-en = <1>; /* Enable GPIO */
status = "ok";
cam_sensor_eldo4 {
cam_sensor_eldo4_default: cam_sensor_eldo4_default {
pins = "gpio4";
function = "normal";
output-low;
bias-disable;
};
};
};

19
arch/arm64/boot/dts/qcom/sdm660-cdp.dtsi
View File

@@ -43,12 +43,13 @@
&pm660_gpios {
/* GPIO 4 (NFC_CLK_REQ) */
gpio@c300 {
qcom,mode = <0>;
qcom,vin-sel = <1>;
qcom,src-sel = <0>;
qcom,master-en = <1>;
status = "okay";
nfc_clk {
nfc_clk_default: nfc_clk_default {
pins = "gpio4";
function = "normal";
input-enable;
power-source = <1>;
};
};
};
@@ -63,11 +64,15 @@
qcom,nq-clkreq = <&pm660_gpios 4 0x00>;
qcom,nq-esepwr = <&tlmm 31 0x00>;
interrupt-parent = <&tlmm>;
qcom,clk-src = "BBCLK3";
interrupts = <28 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
pinctrl-0 = <&nfc_int_active &nfc_enable_active
&nfc_clk_default>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
clocks = <&clock_rpmcc RPM_SMD_LN_BB_CLK3_PIN>;
clock-names = "ref_clk";
};
};

2
arch/arm64/boot/dts/qcom/sdm660-mdss-pll.dtsi
View File

@@ -84,7 +84,7 @@
};
mdss_dp_pll: qcom,mdss_dp_pll@c011000 {
compatible = "qcom,mdss_dp_pll_14nm";
compatible = "qcom,mdss_dp_pll_sdm660";
status = "ok";
label = "MDSS DP PLL";
cell-index = <0>;

33
arch/arm64/boot/dts/qcom/sdm660-mtp.dtsi
View File

@@ -49,22 +49,23 @@
&pm660_gpios {
/* GPIO 4 (NFC_CLK_REQ) */
gpio@c300 {
qcom,mode = <0>;
qcom,vin-sel = <1>;
qcom,src-sel = <0>;
qcom,master-en = <1>;
status = "okay";
nfc_clk {
nfc_clk_default: nfc_clk_default {
pins = "gpio4";
function = "normal";
input-enable;
power-source = <1>;
};
};
/* GPIO 11 for Home Key */
gpio@ca00 {
status = "okay";
qcom,mode = <0>;
qcom,pull = <0>;
qcom,vin-sel = <0>;
qcom,src-sel = <0>;
qcom,out-strength = <1>;
home_key {
home_key_default: home_key_default {
pins = "gpio11";
function = "normal";
input-enable;
bias-pull-up;
};
};
};
@@ -79,11 +80,15 @@
qcom,nq-clkreq = <&pm660_gpios 4 0x00>;
qcom,nq-esepwr = <&tlmm 31 0x00>;
interrupt-parent = <&tlmm>;
qcom,clk-src = "BBCLK3";
interrupts = <28 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
pinctrl-0 = <&nfc_int_active &nfc_enable_active
&nfc_clk_default>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
clocks = <&clock_rpmcc RPM_SMD_LN_BB_CLK3_PIN>;
clock-names = "ref_clk";
};
};

146
arch/arm64/boot/dts/qcom/sdm660-pm660a-rumi.dts Normal file
View File

@@ -0,0 +1,146 @@
/* Copyright (c) 2016, 2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "sdm660.dtsi"
#include "sdm660-pinctrl.dtsi"
#include "msm-pm660a.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDM 660 PM660 + PM660A RUMI";
compatible = "qcom,sdm660-rumi", "qcom,sdm660", "qcom,rumi";
qcom,board-id = <15 0>;
qcom,pmic-id = <0x0001001b 0x0001011a 0x0 0x0>;
chosen {
bootargs = "lpm_levels.sleep_disabled=1";
};
};
&usb3 {
/delete-property/ USB3_GDSC-supply;
/delete-property/ extcon;
dwc3@a800000 {
maximum-speed = "high-speed";
};
};
&ssphy {
compatible = "usb-nop-xceiv";
};
&qusb_phy0 {
reg = <0x0a928000 0x8000>,
<0x0a8f8800 0x400>,
<0x0a920000 0x100>;
reg-names = "qusb_phy_base",
"qscratch_base",
"emu_phy_base";
qcom,emulation;
qcom,qusb-phy-init-seq = <0x19 0x1404
0x20 0x1414
0x79 0x1410
0x00 0x1418
0x99 0x1404
0x04 0x1408
0xd9 0x1404>;
qcom,emu-dcm-reset-seq = <0x100000 0x20
0x0 0x20
0x1a0 0x20
0x5 0x14>;
};
&uartblsp1dm1 {
status = "ok";
pinctrl-names = "default";
pinctrl-0 = <&uart_console_active>;
};
&sdhc_1 {
/* device core power supply */
vdd-supply = <&pm660l_l4>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <200 570000>;
/* device communication power supply */
vdd-io-supply = <&pm660_l8>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <200 325000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
qcom,clk-rates = <400000 20000000 25000000 50000000 192000000
384000000>;
qcom,nonremovable;
qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
status = "ok";
};
&clock_gcc {
compatible = "qcom,dummycc";
clock-output-names = "gcc_clocks";
};
&pm660_charger {
status = "disabled";
};
&pm660_fg {
status = "disabled";
};
&clock_gfx {
compatible = "qcom,dummycc";
clock-output-names = "gfx_clocks";
};
&pm660_pdphy {
status = "disabled";
};
&clock_mmss {
compatible = "qcom,dummycc";
clock-output-names = "mmss_clocks";
};
&ufsphy1 {
vdda-phy-supply = <&pm660l_l1>;
vdda-pll-supply = <&pm660_l10>;
vddp-ref-clk-supply = <&pm660_l1>;
vdda-phy-max-microamp = <51400>;
vdda-pll-max-microamp = <14200>;
vddp-ref-clk-max-microamp = <100>;
vddp-ref-clk-always-on;
};
&ufs1 {
vdd-hba-supply = <&gdsc_ufs>;
vdd-hba-fixed-regulator;
vcc-supply = <&pm660l_l4>;
vccq2-supply = <&pm660_l8>;
vcc-max-microamp = <500000>;
vccq2-max-microamp = <600000>;
qcom,disable-lpm;
};
&clock_debug {
compatible = "qcom,dummycc";
clock-output-names = "debug_clocks";
};

1
arch/arm64/boot/dts/qcom/sdm660-qrd-external-codec-overlay.dts
View File

@@ -20,7 +20,6 @@
#include <dt-bindings/regulator/qcom,rpm-smd-regulator.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "sdm660-wcd.dtsi"
#include "sdm660-qrd.dtsi"
/ {

121
arch/arm64/boot/dts/qcom/sdm660-qrd.dtsi
View File

@@ -10,6 +10,8 @@
* GNU General Public License for more details.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "sdm660-camera-sensor-qrd.dtsi"
#include "sdm660-external-codec.dtsi"
/ {
@@ -133,12 +135,13 @@
&pm660_gpios {
/* GPIO 4 (NFC_CLK_REQ) */
gpio@c300 {
qcom,mode = <0>;
qcom,vin-sel = <1>;
qcom,src-sel = <0>;
qcom,master-en = <1>;
status = "okay";
nfc_clk {
nfc_clk_default: nfc_clk_default {
pins = "gpio4";
function = "normal";
input-enable;
power-source = <1>;
};
};
};
@@ -153,23 +156,27 @@
qcom,nq-clkreq = <&pm660_gpios 4 0x00>;
qcom,nq-esepwr = <&tlmm 31 0x00>;
interrupt-parent = <&tlmm>;
qcom,clk-src = "BBCLK3";
interrupts = <28 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
pinctrl-0 = <&nfc_int_active &nfc_enable_active
&nfc_clk_default>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
clocks = <&clock_rpmcc RPM_SMD_LN_BB_CLK3_PIN>;
clock-names = "ref_clk";
};
};
&pm660l_gpios {
/* GPIO 7 for VOL_UP */
gpio@c600 {
status = "ok";
qcom,mode = <0>;
qcom,pull = <0>;
qcom,vin-sel = <0>;
qcom,src-sel = <0>;
qcom,out-strength = <1>;
key_vol_up {
key_vol_up_default: key_vol_up_default {
pins = "gpio7";
function = "normal";
input-enable;
bias-pull-up;
};
};
};
@@ -215,13 +222,15 @@
gpio_keys {
compatible = "gpio-keys";
input-name = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&key_vol_up_default>;
status = "ok";
vol_up {
label = "volume_up";
gpios = <&pm660l_gpios 7 0x1>;
gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
linux,code = <115>;
linux,code = <KEY_VOLUMEUP>;
gpio-key,wakeup;
debounce-interval = <15>;
};
@@ -259,30 +268,60 @@
};
};
/delete-node/ &tasha_hph_en0;
/delete-node/ &tasha_hph_en1;
&tasha_snd {
qcom,model = "sdm660-tasha-skus-snd-card";
qcom,audio-routing =
"AIF4 VI", "MCLK",
"RX_BIAS", "MCLK",
"MADINPUT", "MCLK",
"AMIC2", "MIC BIAS2",
"MIC BIAS2", "Headset Mic",
"DMIC0", "MIC BIAS1",
"MIC BIAS1", "Digital Mic0",
"DMIC3", "MIC BIAS3",
"MIC BIAS3", "Digital Mic3",
"DMIC5", "MIC BIAS3",
"MIC BIAS3", "Digital Mic5",
"SpkrLeft IN", "SPK1 OUT";
qcom,msm-mbhc-hphl-swh = <1>;
/delete-property/ qcom,us-euro-gpios;
/delete-property/ qcom,hph-en0-gpio;
/delete-property/ qcom,hph-en1-gpio;
qcom,wsa-max-devs = <1>;
qcom,wsa-devs = <&wsa881x_211>, <&wsa881x_213>;
qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrLeft";
&wcd934x_cdc {
status = "disabled";
};
&tavil_snd {
status = "disabled";
};
&clock_audio_lnbb {
status = "disabled";
};
&tasha_hph_en0 {
status = "disabled";
};
&tasha_hph_en1 {
status = "disabled";
};
&clock_audio {
status = "ok";
};
&clock_audio_native {
status = "ok";
};
&wcd9335 {
status = "ok";
};
&tasha_snd {
status = "ok";
qcom,model = "sdm660-tasha-skus-snd-card";
qcom,audio-routing =
"AIF4 VI", "MCLK",
"RX_BIAS", "MCLK",
"MADINPUT", "MCLK",
"AMIC2", "MIC BIAS2",
"MIC BIAS2", "Headset Mic",
"DMIC0", "MIC BIAS1",
"MIC BIAS1", "Digital Mic0",
"DMIC3", "MIC BIAS3",
"MIC BIAS3", "Digital Mic3",
"DMIC5", "MIC BIAS3",
"MIC BIAS3", "Digital Mic5",
"SpkrLeft IN", "SPK1 OUT";
qcom,msm-mbhc-hphl-swh = <1>;
qcom,msm-mbhc-gnd-swh = <1>;
/delete-property/ qcom,us-euro-gpios;
/delete-property/ qcom,hph-en0-gpio;
/delete-property/ qcom,hph-en1-gpio;
qcom,wsa-max-devs = <1>;
qcom,wsa-devs = <&wsa881x_211>, <&wsa881x_213>;
qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrLeft";
};

179
arch/arm64/boot/dts/qcom/sdm660-rumi.dts Normal file
View File

@@ -0,0 +1,179 @@
/* Copyright (c) 2016-2017, 2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "sdm660.dtsi"
#include "sdm660-pinctrl.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDM 660 PM660 + PM660L RUMI";
compatible = "qcom,sdm660-rumi", "qcom,sdm660", "qcom,rumi";
qcom,board-id = <15 0>;
qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
<0x0001001b 0x0201011a 0x0 0x0>;
chosen {
bootargs = "lpm_levels.sleep_disabled=1";
};
};
&usb3 {
/delete-property/ USB3_GDSC-supply;
/delete-property/ extcon;
dwc3@a800000 {
maximum-speed = "high-speed";
};
};
&ssphy {
compatible = "usb-nop-xceiv";
};
&qusb_phy0 {
reg = <0x0a928000 0x8000>,
<0x0a8f8800 0x400>,
<0x0a920000 0x100>;
reg-names = "qusb_phy_base",
"qscratch_base",
"emu_phy_base";
qcom,emulation;
qcom,qusb-phy-init-seq = <0x19 0x1404
0x20 0x1414
0x79 0x1410
0x00 0x1418
0x99 0x1404
0x04 0x1408
0xd9 0x1404>;
qcom,emu-dcm-reset-seq = <0x100000 0x20
0x0 0x20
0x1a0 0x20
0x5 0x14>;
};
&uartblsp1dm1 {
status = "ok";
pinctrl-names = "default";
pinctrl-0 = <&uart_console_active>;
};
&sdhc_1 {
/* device core power supply */
vdd-supply = <&pm660l_l4>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <200 570000>;
/* device communication power supply */
vdd-io-supply = <&pm660_l8>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <200 325000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000
384000000>;
qcom,nonremovable;
qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
status = "ok";
};
&sdhc_2 {
/* device core power supply */
vdd-supply = <&pm660l_l5>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <15000 800000>;
/* device communication power supply */
vdd-io-supply = <&pm660l_l2>;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <200 22000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
#address-cells = <0>;
interrupt-parent = <&sdhc_2>;
interrupts = <0 1 2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xffffffff>;
interrupt-map = <0 &intc 0 0 125 0
1 &intc 0 0 221 0
2 &tlmm 54 0>;
interrupt-names = "hc_irq", "pwr_irq", "status_irq";
cd-gpios = <&tlmm 54 0x1>;
qcom,clk-rates = <400000 20000000 25000000 50000000 100000000
200000000>;
qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
status = "ok";
};
&clock_gcc {
compatible = "qcom,dummycc";
clock-output-names = "gcc_clocks";
};
&pm660_charger {
status = "disabled";
};
&pm660_fg {
status = "disabled";
};
&clock_gfx {
compatible = "qcom,dummycc";
clock-output-names = "gfx_clocks";
};
&pm660_pdphy {
status = "disabled";
};
&clock_mmss {
compatible = "qcom,dummycc";
clock-output-names = "mmss_clocks";
};
&ufsphy1 {
vdda-phy-supply = <&pm660l_l1>;
vdda-pll-supply = <&pm660_l10>;
vddp-ref-clk-supply = <&pm660_l1>;
vdda-phy-max-microamp = <51400>;
vdda-pll-max-microamp = <14200>;
vddp-ref-clk-max-microamp = <100>;
vddp-ref-clk-always-on;
};
&ufs1 {
vdd-hba-supply = <&gdsc_ufs>;
vdd-hba-fixed-regulator;
vcc-supply = <&pm660l_l4>;
vccq2-supply = <&pm660_l8>;
vcc-max-microamp = <500000>;
vccq2-max-microamp = <600000>;
qcom,disable-lpm;
};
&clock_debug {
compatible = "qcom,dummycc";
clock-output-names = "debug_clocks";
};

222
arch/arm64/boot/dts/qcom/sdm660-smp2p.dtsi Normal file
View File

@@ -0,0 +1,222 @@
/* Copyright (c) 2016, 2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
smp2pgpio_smp2p_15_in: qcom,smp2pgpio-smp2p-15-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <15>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_15_in {
compatible = "qcom,smp2pgpio_test_smp2p_15_in";
gpios = <&smp2pgpio_smp2p_15_in 0 0>;
};
smp2pgpio_smp2p_15_out: qcom,smp2pgpio-smp2p-15-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <15>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_15_out {
compatible = "qcom,smp2pgpio_test_smp2p_15_out";
gpios = <&smp2pgpio_smp2p_15_out 0 0>;
};
smp2pgpio_smp2p_1_in: qcom,smp2pgpio-smp2p-1-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <1>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_1_in {
compatible = "qcom,smp2pgpio_test_smp2p_1_in";
gpios = <&smp2pgpio_smp2p_1_in 0 0>;
};
smp2pgpio_smp2p_1_out: qcom,smp2pgpio-smp2p-1-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <1>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_1_out {
compatible = "qcom,smp2pgpio_test_smp2p_1_out";
gpios = <&smp2pgpio_smp2p_1_out 0 0>;
};
smp2pgpio_smp2p_2_in: qcom,smp2pgpio-smp2p-2-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <2>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_2_in {
compatible = "qcom,smp2pgpio_test_smp2p_2_in";
gpios = <&smp2pgpio_smp2p_2_in 0 0>;
};
smp2pgpio_smp2p_2_out: qcom,smp2pgpio-smp2p-2-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <2>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_2_out {
compatible = "qcom,smp2pgpio_test_smp2p_2_out";
gpios = <&smp2pgpio_smp2p_2_out 0 0>;
};
smp2pgpio_sleepstate_2_out: qcom,smp2pgpio-sleepstate-gpio-2-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "sleepstate";
qcom,remote-pid = <2>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio-sleepstate-2-out {
compatible = "qcom,smp2pgpio-sleepstate-out";
gpios = <&smp2pgpio_sleepstate_2_out 0 0>;
};
smp2pgpio_smp2p_5_in: qcom,smp2pgpio-smp2p-5-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <5>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_5_in {
compatible = "qcom,smp2pgpio_test_smp2p_5_in";
gpios = <&smp2pgpio_smp2p_5_in 0 0>;
};
smp2pgpio_smp2p_5_out: qcom,smp2pgpio-smp2p-5-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <5>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_5_out {
compatible = "qcom,smp2pgpio_test_smp2p_5_out";
gpios = <&smp2pgpio_smp2p_5_out 0 0>;
};
/* ssr - inbound entry from mss */
smp2pgpio_ssr_smp2p_1_in: qcom,smp2pgpio-ssr-smp2p-1-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "slave-kernel";
qcom,remote-pid = <1>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
/* ssr - outbound entry to mss */
smp2pgpio_ssr_smp2p_1_out: qcom,smp2pgpio-ssr-smp2p-1-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "master-kernel";
qcom,remote-pid = <1>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
/* ssr - inbound entry from lpass */
smp2pgpio_ssr_smp2p_2_in: qcom,smp2pgpio-ssr-smp2p-2-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "slave-kernel";
qcom,remote-pid = <2>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
/* ssr - outbound entry to lpass */
smp2pgpio_ssr_smp2p_2_out: qcom,smp2pgpio-ssr-smp2p-2-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "master-kernel";
qcom,remote-pid = <2>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
/* ssr - inbound entry from turing */
smp2pgpio_ssr_smp2p_5_in: qcom,smp2pgpio-ssr-smp2p-5-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "slave-kernel";
qcom,remote-pid = <5>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
/* ssr - outbound entry to turing */
smp2pgpio_ssr_smp2p_5_out: qcom,smp2pgpio-ssr-smp2p-5-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "master-kernel";
qcom,remote-pid = <5>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};

94
arch/arm64/boot/dts/qcom/sdm660-thermal.dtsi
View File

@@ -252,28 +252,7 @@
};
};
mpm-usr {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
thermal-sensors = <&tsens 0>;
wake-capable-sensor;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
reset-mon-cfg {
temperature = <115000>;
hysteresis = <5000>;
type = "passive";
};
};
};
cpuss-0-usr {
tsens_tz_sensor0 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
@@ -281,7 +260,7 @@
wake-capable-sensor;
trips {
active-config0 {
active-config0{
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
@@ -294,7 +273,7 @@
};
};
cpuss-1-usr {
tsens_tz_sensor1 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
@@ -302,7 +281,7 @@
wake-capable-sensor;
trips {
active-config0 {
active-config0{
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
@@ -315,7 +294,7 @@
};
};
cpu-1-0-usr {
tsens_tz_sensor2 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
@@ -323,7 +302,7 @@
wake-capable-sensor;
trips {
active-config0 {
active-config0{
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
@@ -336,7 +315,7 @@
};
};
cpu-1-1-usr {
tsens_tz_sensor3 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
@@ -344,7 +323,7 @@
wake-capable-sensor;
trips {
active-config0 {
active-config0{
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
@@ -357,7 +336,7 @@
};
};
cpu-1-2-usr {
tsens_tz_sensor4 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
@@ -365,7 +344,7 @@
wake-capable-sensor;
trips {
active-config0 {
active-config0{
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
@@ -378,7 +357,7 @@
};
};
cpu-1-3-usr {
tsens_tz_sensor5 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
@@ -386,7 +365,7 @@
wake-capable-sensor;
trips {
active-config0 {
active-config0{
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
@@ -399,7 +378,7 @@
};
};
cpuss-2-usr {
tsens_tz_sensor6 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
@@ -407,7 +386,7 @@
wake-capable-sensor;
trips {
active-config0 {
active-config0{
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
@@ -420,7 +399,7 @@
};
};
gpu-usr {
tsens_tz_sensor7 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
@@ -428,7 +407,7 @@
wake-capable-sensor;
trips {
active-config0 {
active-config0{
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
@@ -441,7 +420,7 @@
};
};
video-usr {
tsens_tz_sensor8 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
@@ -449,7 +428,7 @@
wake-capable-sensor;
trips {
active-config0 {
active-config0{
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
@@ -462,7 +441,7 @@
};
};
mdm-core-usr {
tsens_tz_sensor9 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
@@ -470,7 +449,7 @@
wake-capable-sensor;
trips {
active-config0 {
active-config0{
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
@@ -483,7 +462,7 @@
};
};
camera-usr {
tsens_tz_sensor10 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
@@ -491,7 +470,7 @@
wake-capable-sensor;
trips {
active-config0 {
active-config0{
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
@@ -504,7 +483,7 @@
};
};
cpuss-3-usr {
tsens_tz_sensor11 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
@@ -512,7 +491,7 @@
wake-capable-sensor;
trips {
active-config0 {
active-config0{
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
@@ -525,7 +504,7 @@
};
};
cdsp-usr {
tsens_tz_sensor12 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
@@ -533,7 +512,28 @@
wake-capable-sensor;
trips {
active-config0 {
active-config0{
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
reset-mon-cfg {
temperature = <115000>;
hysteresis = <5000>;
type = "passive";
};
};
};
tsens_tz_sensor13 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
thermal-sensors = <&tsens 14>;
wake-capable-sensor;
trips {
active-config0{
temperature = <125000>;
hysteresis = <1000>;
type = "passive";

5
arch/arm64/boot/dts/qcom/sdm660-vidc.dtsi
View File

@@ -210,6 +210,7 @@
<&mmss_bimc_smmu 0x431>;
buffer-types = <0xfff>;
virtual-addr-pool = <0x79000000 0x60000000>;
cma-addr-pool = <0xD0000000 0x9000000>;
};
secure_bitstream_cb {
@@ -226,6 +227,7 @@
<&mmss_bimc_smmu 0x52b>;
buffer-types = <0x241>;
virtual-addr-pool = <0x51000000 0x28000000>;
cma-addr-pool = <0xC0000000 0x10000000>;
qcom,secure-context-bank;
};
@@ -238,6 +240,8 @@
<&mmss_bimc_smmu 0x52c>;
buffer-types = <0x106>;
virtual-addr-pool = <0x29000000 0x28000000>;
cma-addr-pool= <0xb6800000 0x9800000>;
qcom,cma-s1-bypass;
qcom,secure-context-bank;
};
@@ -255,6 +259,7 @@
<&mmss_bimc_smmu 0x540>;
buffer-types = <0x480>;
virtual-addr-pool = <0x1000000 0x28000000>;
cma-addr-pool= <0x1000000 0x28000000>;
qcom,secure-context-bank;
};
};

14
arch/arm64/boot/dts/qcom/sdm660.dtsi
View File

@@ -2045,12 +2045,13 @@
qcom,wlan-msa-memory = <0x100000>;
qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;
qcom,smmu-s1-bypass;
qcom,smp2p_map_wlan_1_in {
interrupts-extended = <&smp2p_wlan_1_in 0 0>,
<&smp2p_wlan_1_in 1 0>;
interrupt-names = "qcom,smp2p-force-fatal-error",
"qcom,smp2p-early-crash-ind";
};
qcom,smp2p_map_wlan_1_in {
interrupts-extended = <&smp2p_wlan_1_in 0 0>,
<&smp2p_wlan_1_in 1 0>;
interrupt-names = "qcom,smp2p-force-fatal-error",
"qcom,smp2p-early-crash-ind";
};
};
qcom,lpass@15700000 {
@@ -2693,7 +2694,6 @@
status = "ok";
};
#include "msm-arm-smmu-660.dtsi"
#include "msm-arm-smmu-impl-defs-660.dtsi"
#include "sdm660-common.dtsi"

5
arch/arm64/boot/dts/qcom/sdmshrike.dtsi
View File

@@ -2471,6 +2471,11 @@
mboxes = <&qmp_aop 0>;
mbox-names = "aop";
};
qcom,msm-rtb {
compatible = "qcom,msm-rtb";
qcom,rtb-size = <0x100000>;
};
};
&emac_gdsc {

70
arch/arm64/boot/dts/qcom/sdxprairie-usb.dtsi
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -286,3 +286,71 @@
reset-names = "phy_reset", "phy_phy_reset";
};
};
/ {
qcom_gadget {
compatible = "qcom,usb-gadget";
qcom,vid = <0x05c6>;
composition1 {
qcom,pid = <0x901c>;
qcom,composition = "diag.diag,uac2.0";
};
composition2 {
qcom,pid = <0x9021>;
qcom,composition = "diag.diag,gsi.rmnet";
};
composition3 {
qcom,pid = <0x904a>;
qcom,composition = "diag.diag,qdss.qdss";
};
composition4 {
qcom,pid = <0x9057>;
qcom,composition = "gsi.rndis|gsi.ecm";
};
composition5 {
qcom,pid = <0x905b>;
qcom,composition = "gsi.mbim";
qcom,bmAttributes = <0xa0>;
};
composition6 {
qcom,pid = <0x9063>;
qcom,composition = "gsi.rndis|gsi.ecm|gsi.mbim";
qcom,bmAttributes = <0xa0>;
};
composition7 {
qcom,pid = <0x9067>;
qcom,composition = "mass_storage.0,gsi.rmnet|mass_storage.1,gsi.mbim";
qcom,bmAttributes = <0xa0>;
};
composition8 {
qcom,pid = <0x90b1>;
qcom,composition = "gsi.ecm";
qcom,bmAttributes = <0xa0>;
};
composition9 {
qcom,pid = <0x90d6>;
qcom,composition = "diag.diag,gsi.mbim,gsi.gps,cser.dun.0";
qcom,bmAttributes = <0xa0>;
};
composition10 {
qcom,pid = <0x90e2>;
qcom,composition = "gsi.mbim,gsi.gps";
qcom,bmAttributes = <0xa0>;
};
composition11 {
qcom,pid = <0xf000>;
qcom,composition = "mass_storage.0";
};
};
};

5
arch/arm64/boot/dts/qcom/sdxprairie.dtsi
View File

@@ -545,6 +545,7 @@
qcom,mhi-event-ring-id-limits = <9 14>; /* start and end */
qcom,modem-cfg-emb-pipe-flt;
qcom,use-ipa-pm;
qcom,use-xbl-boot;
qcom,arm-smmu;
qcom,smmu-fast-map;
qcom,wlan-ce-db-over-pcie;
@@ -1061,6 +1062,7 @@
qcom,wlan-ramdump-dynamic = <0x400000>;
qcom,smmu-s1-enable;
qcom,set-wlaon-pwr-ctrl;
qcom,iommu-geometry;
mhi,max-channels = <30>;
mhi,buffer-len = <0x8000>;
@@ -1487,6 +1489,7 @@
<&tlmm 90 2>, <&pdc 0 290 1>, <&pdc 0 291 1>;
interrupt-names = "macirq", "eth_lpi",
"phy-intr", "ptp_pps_irq_0", "ptp_pps_irq_1";
snps,crc_strip;
qcom,msm-bus,name = "emac";
qcom,msm-bus,num-cases = <4>;
qcom,msm-bus,num-paths = <2>;
@@ -1567,7 +1570,7 @@
"eth_rgmii_clk", "eth_slave_ahb_clk";
qcom,phy-intr-redirect = <&tlmm 90 GPIO_ACTIVE_LOW>;
qcom,phy-reset = <&tlmm 91 GPIO_ACTIVE_LOW>;
qcom,phy-reset-delay-msecs = <10 50>;
qcom,phy-reset-delay-msecs = <11 70>;
qcom,emac-pps0-test-intr = <&tlmm 31 GPIO_ACTIVE_LOW>;
vreg_rgmii-supply = <&pmxprairie_vref_rgmii>;
vreg_emac_phy-supply = <&vreg_emac_phy>;

4
arch/arm64/boot/dts/qcom/sm8150-slpi-pinctrl.dtsi
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -48,7 +48,7 @@
qupv3_se21_i2c_pins: qupv3_se21_i2c_pins {
qupv3_se21_i2c_active: qupv3_se21_i2c_active {
mux {
pins = "gpi2", "gpio3";
pins = "gpio2", "gpio3";
function = "func1";
};

588
arch/arm64/boot/dts/qcom/trinket-sde-display.dtsi
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2019 - 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -196,7 +196,7 @@
&dsi_td4330_truly_cmd {
qcom,mdss-dsi-t-clk-post = <0x0e>;
qcom,mdss-dsi-t-clk-pre = <0x36>;
qcom,ulps-enabled;
qcom,mdss-dsi-panel-mode-switch;
qcom,esd-check-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
@@ -209,6 +209,12 @@
<1048269600 1030798440 1035166232 1039534024 1043901816>;
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-cmd-mode;
qcom,video-to-cmd-mode-post-switch-commands = [
15 01 00 00 00 00 02 B0 00
29 01 00 00 00 00 05 B7 40 00 00 00];
qcom,video-to-cmd-mode-post-switch-commands-state =
"dsi_lp_mode";
qcom,mdss-dsi-panel-phy-timings =
[26 20 09 0B 06 02 04 a0
26 20 09 0B 06 02 04 a0
@@ -221,16 +227,305 @@
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <40 40 40 40 40 40>;
};
timing@1{
qcom,mdss-dsi-video-mode;
qcom,mdss-dsi-panel-width = <1080>;
qcom,mdss-dsi-panel-height = <2280>;
qcom,mdss-dsi-h-front-porch = <75>;
qcom,mdss-dsi-h-back-porch = <20>;
qcom,mdss-dsi-h-pulse-width = <1>;
qcom,mdss-dsi-h-sync-skew = <0>;
qcom,mdss-dsi-v-back-porch = <90>;
qcom,mdss-dsi-v-front-porch = <5>;
qcom,mdss-dsi-v-pulse-width = <1>;
qcom,mdss-dsi-panel-framerate = <60>;
qcom,mdss-dsi-on-command = [
15 01 00 00 00 00 02 B0 04
15 01 00 00 00 00 02 B0 00
29 01 00 00 00 00 0D B6 30
6B 00 06 03 0A 13
1A 6C 18 19 02
29 01 00 00 00 00 05 B7 11 00 00
00
29 01 00 00 00 00 08 B8 57 3D 19
BE 1E 0A 0A
29 01 00 00 00 00 08 B9 6F 3D 28
BE 3C 14 0A
29 01 00 00 00 00 08 BA B5 33 41
BE 64 23 0A
29 01 00 00 00 00 0C BB 44 26 C3
1F 19 06 03 C0 00 00 10
29 01 00 00 00 00 0C BC 32 4C C3
52 32 1F 03 F2 00 00 13
29 01 00 00 00 00 0C BD 24 68 C3
AA 3F 32 03 FF 00 00 25
29 01 00 00 00 00 0D BE 00 00 00
00 00 00 00 00 00 00 00
00
29 01 00 00 00 00 0D C0 00 D9 01
2C 06 08 E8 00 06 00 00
08
29 01 00 00 00 00 24 C1 30 00 00
11 11 00 00 00 22 00 05
20 FA 00 08 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
29 01 00 00 00 00 79 C2 06 C0 6D
01 03 00 02 02 01 20 12
01 03 08 F0 01 00 00 00
00 00 00 00 00 01 20 D9
04 04 01 01 01 00 28 F1
00 00 01 08 00 00 11 00
28 F1 04 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 11 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 11 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 11 00
00 00 00 00 00 00 00 00
00 00 00 00 00
29 01 00 00 00 00 6D C3 01 20 12
01 8F 00 01 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 AA AA AA 00 00
00 00 00 00 09 00 09 00
00 00 00 00 80 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00
29 01 00 00 00 00 43 C4 00 00 00
00 4F 00 3E 3F 4F 00 00
44 06 02 10 10 0E 0E 61
61 5F 5F 5D 5D 00 00 00
00 4F 00 3E 3F 4F 00 00
44 06 02 11 11 0F 0F 61
61 5F 5F 5D 5D F0 FF FF
F0 FF FF E0 FF FF E0 FF
FF 10 00 00 10 00 00
29 01 00 00 00 00 06 C5 08 00 00
00 00
29 01 00 00 00 00 3A C6 02 0A 08
FC FF FF FF 00 00 13 01
FF 0F 22 01 3A 3A 3A 00
00 00 01 05 09 28 28 22
01 3A 3A 3A 00 00 00 01
21 00 00 00 1C 01 00 00
00 00 00 00 00 00 00 00
00 00 20 20 00 00
29 01 00 00 00 00 4D C7 00 00 01
11 02 15 02 AA 02 2E 02
B3 03 1A 02 5F 02 78 02
97 02 E2 02 2E 02 6B 02
CF 02 39 02 D0 03 41 03
96 03 A0 00 00 01 11 02
15 02 AA 02 2E 02 B3 03
1A 02 5F 02 78 02 97 02
E2 02 2E 02 6B 02 CF 02
39 02 D0 03 41 03 96 03
A0
29 01 00 00 00 00 42 C8 40 00 00
00 00 FF 00 00 00 00 00
FF 00 00 00 00 00 FF 00
00 00 00 00 FF 00 00 00
00 00 FF 00 00 00 00 FF
00 00 00 00 FF 00 00 00
00 FF 00 00 00 00 FF 00
00 00 00 FF 00 00 00 00
FF 00 00 00 00 FF
29 01 00 00 00 00 19 C9 00 00 00
00 FF 00 00 00 00 00 FF
00 00 00 00 00 FF 00 00
00 00 00 FF 00
29 01 00 00 00 00 42 CA 1C FC FC
FC 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00
29 01 00 00 00 00 0C CB A0 00 F0
00 20 81 00 00 00 00 FF
29 01 00 00 00 00 0B CC 00 00 4D
8B 55 4D 8B AA 4D 8B
29 01 00 00 00 00 24 CE 5D 40 49
53 59 5E 63 68 6E 74 7E
8A 98 A8 BB D0 E7 FF 04
00 04 04 42 00 69 5A 40
11 F4 00 00 04 FA 00 00
29 01 00 00 00 00 12 D0 F3 96 11
B1 55 C9 00 F3 D4 11 F0
01 12 C8 02 20 11
29 01 00 00 00 00 23 D1 E3 E3 33
33 07 03 3B 33 77 37 77
37 35 77 07 77 F7 33 73
07 33 33 03 33 1B 03 32
3D 0A 30 13 13 30 00
29 01 00 00 00 00 05 D2 00 00 07
00
29 01 00 00 00 00 9A D3 00 00 00
00 00 00 00 00 00 FF F7
FF FF F7 FF FF F7 FF FF
F7 FF FF F7 FF FF F7 FF
FF F7 FF FF F7 FF FF F7
FF FF F7 FF FF F7 FF FF
F7 FF FF F7 FF FF F7 FF
FF F7 FF FF F7 FF FF F7
FF FF F7 FF FF F7 FF FF
F7 FF FF F7 FF FF F7 FF
FF F7 FF FF F7 FF FF F7
FF FF F7 FF FF F7 FF FF
F7 FF FF F7 FF FF F7 FF
FF F7 FF FF F7 FF FF F7
FF FF F7 FF FF F7 FF FF
F7 FF FF F7 FF FF F7 FF
FF F7 FF FF F7 FF FF F7
FF FF F7 FF FF F7 FF FF
F7 FF FF F7 FF FF F7 FF
FF F7 FF FF F7 FF
15 01 00 00 00 00 02 E5 0F
29 01 00 00 00 00 09 D5 02 31 02
31 02 31 02 31
15 01 00 00 00 00 02 D6 00
29 01 00 00 00 00 05 DD 30 06 23
65
29 01 00 00 00 00 0D DE 00 00 00
0F FF 00 00 00 00 00 00
10
29 01 00 00 00 00 99 DF 80 80 80
FF FF FF FF FF FF FF 00
08 0F 08 08 D3 D3 D3 D3
D3 60 60 60 60 60 F5 F5
75 75 75 20 20 34 20 20
80 01 41 00 32 00 00 96
20 40 00 00 FF FF FF 0E
22 D0 04 0F 00 23 0D 18
14 C1 4D F1 10 FF 44 FF
4F 05 00 11 11 11 FF 08
13 00 80 05 0E 02 14 08
0E 00 00 00 00 FC 72 7C
72 7C 7C 61 40 50 40 90
90 20 A0 08 B1 00 00 00
22 22 22 17 63 06 4F 26
46 06 80 98 20 04 44 63
F8 FC 03 75 44 6B 6B 6B
26 40 C8 48 05 40 14 7F
14 7F 15 01 4B 10 00 24
01 00 00 00 00
15 01 00 00 00 00 02 E3 FF
29 01 00 00 00 00 05 E5 03 7F 00
00
29 01 00 00 00 00 07 E6 00 00 00
00 00 00
29 01 00 00 00 00 0B E7 50 00 00
00 00 00 00 00 00 00
29 01 00 00 00 00 1E EA 01 02 47
40 47 40 00 00 05 00 12
86 00 00 00 00 00 00 00
00 04 C2 00 11 00 30 0D
90 86
29 01 00 00 00 00 08 EB 00 00 00
00 01 00 11
29 01 00 00 00 00 04 EC 01 E0 00
29 01 00 00 00 00 21 ED 01 01 02
02 02 02 00 00 00 00 00
00 0A 00 00 00 00 10 00
18 00 00 00 B0 00 00 00
00 00 D0 10 00
29 01 00 00 00 00 61 EE 03 3F F0
03 00 F0 03 00 00 00 00
02 3F FC 00 00 00 00 00
00 00 00 00 00 3F 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 3F 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 48 8F 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00
29 01 00 00 00 00 8C EF 02 30 5D
09 70 00 00 00 00 2A 2A
2A 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
02 30 5D 09 70 00 00 00
00 2A 2A 2A 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
10 03 10 02 00 10 00 10
00 0A 0A 00 00 00 00 00
0F 00 03 40 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 03 00 02
15 01 00 00 00 00 02 35 00
15 01 00 00 00 00 02 B0 04
15 01 00 00 00 00 02 D6 00
29 01 00 00 00 00 02 B0 03
39 01 00 00 00 00 03 51 FF F0
15 01 00 00 00 00 02 53 0C
15 01 00 00 00 00 02 55 00
39 01 00 00 00 00 05 2A 00 00 04 37
39 01 00 00 00 00 05 2B 00 00 08 E7
39 01 00 00 00 00 05 30 00 00 02 A7
15 01 00 00 00 00 02 B0 04
05 01 00 00 64 00 02 29 00
05 01 00 00 C8 00 02 11 00];
qcom,mdss-dsi-off-command = [
05 01 00 00 32 00 02 28 00
05 01 00 00 96 00 02 10 00];
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
qcom,cmd-to-video-mode-post-switch-commands = [
15 01 00 00 00 00 02 B0 00
29 01 00 00 00 00 05 B7 51 00 00 00];
qcom,cmd-to-video-mode-post-switch-commands-state =
"dsi_lp_mode";
qcom,mdss-dsi-panel-phy-timings =
[25 20 09 0A 06 03 04 a0
25 20 09 0A 06 03 04 a0
25 20 09 0A 06 03 04 a0
25 20 09 0A 06 03 04 a0
25 1F 08 0A 06 03 04 a0];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_td4330_truly_video {
qcom,mdss-dsi-te-pin-select = <1>;
qcom,mdss-dsi-wr-mem-start = <0x2c>;
qcom,mdss-dsi-wr-mem-continue = <0x3c>;
qcom,mdss-dsi-te-dcs-command = <1>;
qcom,mdss-dsi-te-check-enable;
qcom,mdss-dsi-te-using-te-pin;
qcom,mdss-dsi-panel-mode-switch;
qcom,mdss-dsi-t-clk-post = <0x0e>;
qcom,mdss-dsi-t-clk-pre = <0x35>;
qcom,dsi-supported-dfps-list = <60 55 48>;
qcom,mdss-dsi-pan-enable-dynamic-fps;
qcom,mdss-dsi-pan-fps-update =
"dfps_immediate_porch_mode_vfp";
qcom,dsi-dyn-clk-type = "constant-fps-adjust-hfp";
qcom,esd-check-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
@@ -243,6 +538,12 @@
<1005903360 989138304 993329568 997520832 1001712096>;
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-video-mode;
qcom,cmd-to-video-mode-post-switch-commands = [
15 01 00 00 00 00 02 B0 00
29 01 00 00 00 00 05 B7 51 00 00 00];
qcom,cmd-to-video-mode-post-switch-commands-state =
"dsi_lp_mode";
qcom,mdss-dsi-panel-phy-timings =
[25 20 09 0A 06 03 04 a0
25 20 09 0A 06 03 04 a0
@@ -253,6 +554,289 @@
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
timing@1 {
qcom,mdss-dsi-cmd-mode;
qcom,mdss-dsi-panel-width = <1080>;
qcom,mdss-dsi-panel-height = <2280>;
qcom,mdss-dsi-h-front-porch = <80>;
qcom,mdss-dsi-h-back-porch = <80>;
qcom,mdss-dsi-h-pulse-width = <20>;
qcom,mdss-dsi-h-sync-skew = <0>;
qcom,mdss-dsi-v-back-porch = <13>;
qcom,mdss-dsi-v-front-porch = <16>;
qcom,mdss-dsi-v-pulse-width = <2>;
qcom,mdss-dsi-panel-framerate = <60>;
qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
qcom,mdss-dsi-on-command = [
15 01 00 00 00 00 02 B0 04
15 01 00 00 00 00 02 B0 00
39 01 00 00 00 00 0D B6 30 6B
00 06 03 0A 13 1A 6C 18
19 02
39 01 00 00 00 00 05 B7 00 00 00
00
39 01 00 00 00 00 08 B8 57 3D 19
BE 1E 0A 0A
39 01 00 00 00 00 08 B9 6F 3D 28
BE 3C 14 0A
39 01 00 00 00 00 08 BA B5 33 41
BE 64 23 0A
39 01 00 00 00 00 0C BB 44 26 C3
1F 19 06 03 C0 00 00 10
39 01 00 00 00 00 0C BC 32 4C C3
52 32 1F 03 F2 00 00 13
39 01 00 00 00 00 0C BD 24 68 C3
AA 3F 32 03 FF 00 00 25
39 01 00 00 00 00 0D BE 00 00 00
00 00 00 00 00 00 00 00
00
39 01 00 00 00 00 0D C0 00 D9 01
2C 06 08 E8 00 06 00 00
08
39 01 00 00 00 00 24 C1 30 00 00
11 11 00 00 00 22 00 05
20 FA 00 08 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
39 01 00 00 00 00 79 C2 06 C0 6D
01 03 00 02 02 01 20 12
01 03 08 F0 01 00 00 00
00 00 00 00 00 01 20 D9
04 04 01 01 01 00 28 F1
00 00 01 08 00 00 11 00
28 F1 04 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 11 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 11 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 11 00
00 00 00 00 00 00 00 00
00 00 00 00 00
39 01 00 00 00 00 6D C3 01 20 12
01 8F 00 01 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 AA AA AA 00 00
00 00 00 00 09 00 09 00
00 00 00 00 80 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00
39 01 00 00 00 00 43 C4 00 00 00
00 4F 00 3E 3F 4F 00 00
44 06 02 10 10 0E 0E 61
61 5F 5F 5D 5D 00 00 00
00 4F 00 3E 3F 4F 00 00
44 06 02 11 11 0F 0F 61
61 5F 5F 5D 5D F0 FF FF
F0 FF FF E0 FF FF E0 FF
FF 10 00 00 10 00 00
39 01 00 00 00 00 06 C5 08 00 00
00 00
39 01 00 00 00 00 3A C6 02 0A 08
FC FF FF FF 00 00 13 01
FF 0F 22 01 3A 3A 3A 00
00 00 01 05 09 28 28 22
01 3A 3A 3A 00 00 00 01
21 00 00 00 1C 01 00 00
00 00 00 00 00 00 00 00
00 00 20 20 00 00
39 01 00 00 00 00 4D C7 00 00 01
11 02 15 02 AA 02 2E 02
B3 03 1A 02 5F 02 78 02
97 02 E2 02 2E 02 6B 02
CF 02 39 02 D0 03 41 03
96 03 A0 00 00 01 11 02
15 02 AA 02 2E 02 B3 03
1A 02 5F 02 78 02 97 02
E2 02 2E 02 6B 02 CF 02
39 02 D0 03 41 03 96 03
A0
39 01 00 00 00 00 42 C8 40 00 00
00 00 FF 00 00 00 00 00
FF 00 00 00 00 00 FF 00
00 00 00 00 FF 00 00 00
00 00 FF 00 00 00 00 FF
00 00 00 00 FF 00 00 00
00 FF 00 00 00 00 FF 00
00 00 00 FF 00 00 00 00
FF 00 00 00 00 FF
39 01 00 00 00 00 19 C9 00 00 00
00 FF 00 00 00 00 00 FF
00 00 00 00 00 FF 00 00
00 00 00 FF 00
39 01 00 00 00 00 42 CA 1C FC FC
FC 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00
39 01 00 00 00 00 0C CB A0 00 F0
00 20 81 00 00 00 00 FF
39 01 00 00 00 00 0B CC 00 00 4D
8B 55 4D 8B AA 4D 8B
39 01 00 00 00 00 24 CE 5D 40 49
53 59 5E 63 68 6E 74 7E
8A 98 A8 BB D0 E7 FF 04
00 04 04 42 00 69 5A 40
11 F4 00 00 04 FA 00 00
39 01 00 00 00 00 12 D0 F3 96 11
B1 55 C9 00 F3 D4 11 F0
01 12 C8 02 20 11
39 01 00 00 00 00 23 D1 E3 E3 33
33 07 03 3B 33 77 37 77
37 35 77 07 77 F7 33 73
07 33 33 03 33 1B 03 32
3D 0A 30 13 13 30 00
39 01 00 00 00 00 05 D2 00 00 07
00
39 01 00 00 00 00 9A D3 00 00 00
00 00 00 00 00 00 FF F7
FF FF F7 FF FF F7 FF FF
F7 FF FF F7 FF FF F7 FF
FF F7 FF FF F7 FF FF F7
FF FF F7 FF FF F7 FF FF
F7 FF FF F7 FF FF F7 FF
FF F7 FF FF F7 FF FF F7
FF FF F7 FF FF F7 FF FF
F7 FF FF F7 FF FF F7 FF
FF F7 FF FF F7 FF FF F7
FF FF F7 FF FF F7 FF FF
F7 FF FF F7 FF FF F7 FF
FF F7 FF FF F7 FF FF F7
FF FF F7 FF FF F7 FF FF
F7 FF FF F7 FF FF F7 FF
FF F7 FF FF F7 FF FF F7
FF FF F7 FF FF F7 FF FF
F7 FF FF F7 FF FF F7 FF
FF F7 FF FF F7 FF
15 01 00 00 00 00 02 E5 0F
39 01 00 00 00 00 09 D5 02 31 02
31 02 31 02 31
15 01 00 00 00 00 02 D6 00
39 01 00 00 00 00 05 DD 30 06 23
65
39 01 00 00 00 00 0D DE 00 00 00
0F FF 00 00 00 00 00 00
10
39 01 00 00 00 00 99 DF 80 80 80
FF FF FF FF FF FF FF 00
08 0F 08 08 D3 D3 D3 D3
D3 60 60 60 60 60 F5 F5
75 75 75 20 20 34 20 20
80 01 41 00 32 00 00 96
20 40 00 00 FF FF FF 0E
22 D0 04 0F 00 23 0D 18
14 C1 4D F1 10 FF 44 FF
4F 05 00 11 11 11 FF 08
13 00 80 05 0E 02 14 08
0E 00 00 00 00 FC 72 7C
72 7C 7C 61 40 50 40 90
90 20 A0 08 B1 00 00 00
22 22 22 17 63 06 4F 26
46 06 80 98 20 04 44 63
F8 FC 03 75 44 6B 6B 6B
26 40 C8 48 05 40 14 7F
14 7F 15 01 4B 10 00 24
01 00 00 00 00
15 01 00 00 00 00 02 E3 FF
39 01 00 00 00 00 05 E5 03 7F 00
00
39 01 00 00 00 00 07 E6 00 00 00
00 00 00
39 01 00 00 00 00 0B E7 50 00 00
00 00 00 00 00 00 00
39 01 00 00 00 00 1E EA 01 02 47
40 47 40 00 00 05 00 14
C8 00 00 00 00 00 00 00
00 04 C2 00 11 00 30 0D
90 86
39 01 00 00 00 00 08 EB 00 00 00
00 01 00 11
39 01 00 00 00 00 04 EC 00 00 00
39 01 00 00 00 00 21 ED 01 01 02
02 02 02 00 00 00 00 00
00 0A 00 00 00 00 10 00
18 00 00 00 B0 00 00 00
00 00 D0 10 00
39 01 00 00 00 00 61 EE 03 3F F0
03 00 F0 03 00 00 00 00
02 3F FC 00 00 00 00 00
00 00 00 00 00 3F 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 3F 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 48 8F 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00
39 01 00 00 00 00 8C EF 02 30 5D
09 70 00 00 00 00 2A 2A
2A 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
02 30 5D 09 70 00 00 00
00 2A 2A 2A 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
10 03 10 02 00 10 00 10
00 0A 0A 00 00 00 00 00
0F 00 03 40 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 03 00 02
15 01 00 00 00 00 02 35 00
15 01 00 00 00 00 02 B0 04
29 01 00 00 00 00 02 D6 00
15 01 00 00 00 00 02 B0 03
39 01 00 00 00 00 03 51 FF F0
15 01 00 00 00 00 02 53 0C
15 01 00 00 00 00 02 55 00
39 01 00 00 00 00 05 2A 00 00 04 37
39 01 00 00 00 00 05 2B 00 00 08 E7
39 01 00 00 00 00 05 30 00 00 02 A7
15 01 00 00 00 00 02 B0 03
05 01 00 00 64 00 02 29 00
05 01 00 00 C8 00 02 11 00];
qcom,mdss-dsi-off-command = [
05 01 00 00 32 00 02 28 00
05 01 00 00 96 00 02 10 00];
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
qcom,video-to-cmd-mode-post-switch-commands = [
15 01 00 00 00 00 02 B0 00
29 01 00 00 00 00 05 B7 40 00 00 00];
qcom,video-to-cmd-mode-post-switch-commands-state =
"dsi_lp_mode";
qcom,mdss-dsi-panel-phy-timings =
[26 20 09 0B 06 02 04 a0
26 20 09 0B 06 02 04 a0
26 20 09 0B 06 02 04 a0
26 20 09 0B 06 02 04 a0
26 1F 09 0B 06 02 04 a0];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <40 40 40 40 40 40>;
};
};
};

1
arch/arm64/configs/vendor/atoll-perf_defconfig vendored
View File

@@ -282,6 +282,7 @@ CONFIG_MD=y
CONFIG_BLK_DEV_DM=y
CONFIG_DM_CRYPT=y
CONFIG_DM_DEFAULT_KEY=y
CONFIG_DM_SNAPSHOT=y
CONFIG_DM_UEVENT=y
CONFIG_DM_VERITY=y
CONFIG_DM_VERITY_FEC=y

1
arch/arm64/configs/vendor/atoll_defconfig vendored
View File

@@ -293,6 +293,7 @@ CONFIG_MD=y
CONFIG_BLK_DEV_DM=y
CONFIG_DM_CRYPT=y
CONFIG_DM_DEFAULT_KEY=y
CONFIG_DM_SNAPSHOT=y
CONFIG_DM_UEVENT=y
CONFIG_DM_VERITY=y
CONFIG_DM_VERITY_FEC=y

604
arch/arm64/configs/vendor/qcs610-minimal-perf_defconfig vendored Normal file
View File

@@ -0,0 +1,604 @@
CONFIG_LOCALVERSION="-perf"
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_FHANDLE is not set
CONFIG_AUDIT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_IRQ_TIME_ACCOUNTING=y
CONFIG_SCHED_WALT=y
CONFIG_TASKSTATS=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_RCU_EXPERT=y
CONFIG_RCU_FAST_NO_HZ=y
CONFIG_RCU_NOCB_CPU=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_CPU_MAX_BUF_SHIFT=17
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_BLK_CGROUP=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_BPF=y
CONFIG_SCHED_CORE_CTL=y
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_PID_NS is not set
CONFIG_SCHED_AUTOGROUP=y
CONFIG_SCHED_TUNE=y
CONFIG_DEFAULT_USE_ENERGY_AWARE=y
CONFIG_BLK_DEV_INITRD=y
# CONFIG_RD_XZ is not set
# CONFIG_RD_LZO is not set
# CONFIG_RD_LZ4 is not set
CONFIG_KALLSYMS_ALL=y
CONFIG_BPF_SYSCALL=y
CONFIG_EMBEDDED=y
# CONFIG_SLUB_DEBUG is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB_FREELIST_RANDOM=y
CONFIG_SLAB_FREELIST_HARDENED=y
CONFIG_PROFILING=y
CONFIG_CC_STACKPROTECTOR_STRONG=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SIG=y
CONFIG_MODULE_SIG_FORCE=y
CONFIG_MODULE_SIG_SHA512=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_CFQ_GROUP_IOSCHED=y
CONFIG_ARCH_QCOM=y
CONFIG_ARCH_SM6150=y
CONFIG_PCI=y
CONFIG_PCI_MSM=y
CONFIG_SCHED_MC=y
CONFIG_NR_CPUS=8
CONFIG_PREEMPT=y
CONFIG_HZ_100=y
CONFIG_CMA=y
CONFIG_ZSMALLOC=y
CONFIG_BALANCE_ANON_FILE_RECLAIM=y
CONFIG_SECCOMP=y
# CONFIG_UNMAP_KERNEL_AT_EL0 is not set
CONFIG_ARMV8_DEPRECATED=y
CONFIG_SWP_EMULATION=y
CONFIG_CP15_BARRIER_EMULATION=y
CONFIG_SETEND_EMULATION=y
CONFIG_ARM64_SW_TTBR0_PAN=y
# CONFIG_ARM64_VHE is not set
CONFIG_RANDOMIZE_BASE=y
# CONFIG_EFI is not set
CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE=y
CONFIG_KRYO_PMU_WORKAROUND=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_COMPAT=y
CONFIG_PM_WAKELOCKS=y
CONFIG_PM_WAKELOCKS_LIMIT=0
# CONFIG_PM_WAKELOCKS_GC is not set
CONFIG_CPU_IDLE=y
CONFIG_ARM_CPUIDLE=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_TIMES=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_BOOST=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_XFRM_INTERFACE=y
CONFIG_XFRM_STATISTICS=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_NET_IPGRE_DEMUX=y
CONFIG_SYN_COOKIES=y
CONFIG_NET_IPVTI=y
CONFIG_INET_AH=y
CONFIG_INET_ESP=y
CONFIG_INET_IPCOMP=y
CONFIG_INET_UDP_DIAG=y
CONFIG_INET_DIAG_DESTROY=y
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_IPV6_OPTIMISTIC_DAD=y
CONFIG_INET6_AH=y
CONFIG_INET6_ESP=y
CONFIG_INET6_IPCOMP=y
CONFIG_IPV6_MIP6=y
CONFIG_IPV6_VTI=y
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_IPV6_SUBTREES=y
CONFIG_NETFILTER=y
CONFIG_NF_CONNTRACK=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CONNTRACK_AMANDA=y
CONFIG_NF_CONNTRACK_FTP=y
CONFIG_NF_CONNTRACK_H323=y
CONFIG_NF_CONNTRACK_IRC=y
CONFIG_NF_CONNTRACK_NETBIOS_NS=y
CONFIG_NF_CONNTRACK_PPTP=y
CONFIG_NF_CONNTRACK_SANE=y
CONFIG_NF_CONNTRACK_TFTP=y
CONFIG_NF_CT_NETLINK=y
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
CONFIG_NETFILTER_XT_TARGET_DSCP=y
CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
CONFIG_NETFILTER_XT_TARGET_HARDIDLETIMER=y
CONFIG_NETFILTER_XT_TARGET_LOG=y
CONFIG_NETFILTER_XT_TARGET_MARK=y
CONFIG_NETFILTER_XT_TARGET_NFLOG=y
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
CONFIG_NETFILTER_XT_TARGET_NOTRACK=y
CONFIG_NETFILTER_XT_TARGET_TEE=y
CONFIG_NETFILTER_XT_TARGET_TPROXY=y
CONFIG_NETFILTER_XT_TARGET_TRACE=y
CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
CONFIG_NETFILTER_XT_MATCH_BPF=y
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
CONFIG_NETFILTER_XT_MATCH_DSCP=y
CONFIG_NETFILTER_XT_MATCH_ESP=y
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
CONFIG_NETFILTER_XT_MATCH_HELPER=y
CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
# CONFIG_NETFILTER_XT_MATCH_L2TP is not set
CONFIG_NETFILTER_XT_MATCH_LENGTH=y
CONFIG_NETFILTER_XT_MATCH_LIMIT=y
CONFIG_NETFILTER_XT_MATCH_MAC=y
CONFIG_NETFILTER_XT_MATCH_MARK=y
CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
CONFIG_NETFILTER_XT_MATCH_OWNER=y
CONFIG_NETFILTER_XT_MATCH_POLICY=y
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
CONFIG_NETFILTER_XT_MATCH_QUOTA=y
CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
CONFIG_NETFILTER_XT_MATCH_SOCKET=y
CONFIG_NETFILTER_XT_MATCH_STATE=y
CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
CONFIG_NETFILTER_XT_MATCH_STRING=y
CONFIG_NETFILTER_XT_MATCH_TIME=y
CONFIG_NETFILTER_XT_MATCH_U32=y
CONFIG_NF_CONNTRACK_IPV4=y
CONFIG_NF_SOCKET_IPV4=y
CONFIG_IP_NF_IPTABLES=y
CONFIG_IP_NF_MATCH_AH=y
CONFIG_IP_NF_MATCH_ECN=y
CONFIG_IP_NF_MATCH_RPFILTER=y
CONFIG_IP_NF_MATCH_TTL=y
CONFIG_IP_NF_FILTER=y
CONFIG_IP_NF_TARGET_REJECT=y
CONFIG_IP_NF_NAT=y
CONFIG_IP_NF_TARGET_MASQUERADE=y
CONFIG_IP_NF_TARGET_NETMAP=y
CONFIG_IP_NF_TARGET_REDIRECT=y
CONFIG_IP_NF_MANGLE=y
CONFIG_IP_NF_RAW=y
CONFIG_IP_NF_SECURITY=y
CONFIG_IP_NF_ARPTABLES=y
CONFIG_IP_NF_ARPFILTER=y
CONFIG_IP_NF_ARP_MANGLE=y
CONFIG_NF_CONNTRACK_IPV6=y
CONFIG_NF_SOCKET_IPV6=y
CONFIG_IP6_NF_IPTABLES=y
CONFIG_IP6_NF_MATCH_RPFILTER=y
CONFIG_IP6_NF_FILTER=y
CONFIG_IP6_NF_TARGET_REJECT=y
CONFIG_IP6_NF_MANGLE=y
CONFIG_IP6_NF_RAW=y
CONFIG_BRIDGE_NF_EBTABLES=y
CONFIG_BRIDGE_EBT_BROUTE=y
CONFIG_IP_SCTP=y
CONFIG_L2TP=y
CONFIG_L2TP_V3=y
CONFIG_L2TP_IP=y
CONFIG_L2TP_ETH=y
CONFIG_BRIDGE=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_HTB=y
CONFIG_NET_SCH_PRIO=y
CONFIG_NET_SCH_MULTIQ=y
CONFIG_NET_SCH_INGRESS=y
CONFIG_NET_CLS_FW=y
CONFIG_NET_CLS_U32=y
CONFIG_CLS_U32_MARK=y
CONFIG_NET_CLS_FLOW=y
CONFIG_NET_CLS_BPF=y
CONFIG_NET_EMATCH=y
CONFIG_NET_EMATCH_CMP=y
CONFIG_NET_EMATCH_NBYTE=y
CONFIG_NET_EMATCH_U32=y
CONFIG_NET_EMATCH_META=y
CONFIG_NET_EMATCH_TEXT=y
CONFIG_NET_CLS_ACT=y
CONFIG_NET_ACT_GACT=y
CONFIG_NET_ACT_MIRRED=y
CONFIG_NET_ACT_SKBEDIT=y
CONFIG_QRTR=y
CONFIG_QRTR_SMD=y
CONFIG_SOCKEV_NLMCAST=y
CONFIG_CFG80211=y
CONFIG_CFG80211_CERTIFICATION_ONUS=y
CONFIG_CFG80211_REG_CELLULAR_HINTS=y
CONFIG_CFG80211_INTERNAL_REGDB=y
CONFIG_RFKILL=y
CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
CONFIG_REGMAP_ALLOW_WRITE_DEBUGFS=y
CONFIG_DMA_CMA=y
CONFIG_ZRAM=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_LOOP_MIN_COUNT=16
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_HDCP_QSEECOM=y
CONFIG_QSEECOM=y
CONFIG_UID_SYS_STATS=y
CONFIG_MEMORY_STATE_TIME=y
CONFIG_QPNP_MISC=y
CONFIG_FPR_FPC=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_SG=y
CONFIG_CHR_DEV_SCH=y
CONFIG_SCSI_CONSTANTS=y
CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_SCSI_UFSHCD=y
CONFIG_SCSI_UFSHCD_PLATFORM=y
CONFIG_SCSI_UFS_QCOM=y
CONFIG_SCSI_UFS_QCOM_ICE=y
CONFIG_MD=y
CONFIG_BLK_DEV_DM=y
CONFIG_DM_CRYPT=y
CONFIG_DM_UEVENT=y
CONFIG_DM_BOW=y
CONFIG_NETDEVICES=y
CONFIG_BONDING=y
CONFIG_DUMMY=y
CONFIG_TUN=y
CONFIG_SKY2=y
CONFIG_RMNET=y
CONFIG_SMSC911X=y
CONFIG_AT803X_PHY=y
CONFIG_MICREL_PHY=y
CONFIG_PPP=y
CONFIG_PPP_BSDCOMP=y
CONFIG_PPP_DEFLATE=y
CONFIG_PPP_FILTER=y
CONFIG_PPP_MPPE=y
CONFIG_PPP_MULTILINK=y
CONFIG_PPPOE=y
CONFIG_PPTP=y
CONFIG_PPPOL2TP=y
CONFIG_PPPOLAC=y
CONFIG_PPPOPNS=y
CONFIG_PPP_ASYNC=y
CONFIG_PPP_SYNC_TTY=y
CONFIG_USB_RTL8152=y
CONFIG_USB_USBNET=y
CONFIG_WIL6210=m
CONFIG_WCNSS_MEM_PRE_ALLOC=y
CONFIG_CLD_LL_CORE=y
CONFIG_CNSS_GENL=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_MISC=y
CONFIG_INPUT_QPNP_POWER_ON=y
CONFIG_INPUT_UINPUT=y
# CONFIG_SERIO_SERPORT is not set
# CONFIG_LEGACY_PTYS is not set
# CONFIG_DEVMEM is not set
CONFIG_SERIAL_MSM_GENI=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_MSM_LEGACY=y
# CONFIG_DEVPORT is not set
CONFIG_DIAG_CHAR=y
CONFIG_MSM_FASTCVPD=y
CONFIG_MSM_ADSPRPC=y
CONFIG_MSM_RDBG=m
CONFIG_SPI=y
CONFIG_SPI_QCOM_GENI=y
CONFIG_SPI_SPIDEV=y
CONFIG_SPMI=y
CONFIG_SPMI_SIMULATOR=y
CONFIG_PM8150_PMIC_SIMULATOR=y
CONFIG_PM8150B_PMIC_SIMULATOR=y
CONFIG_PM8150L_PMIC_SIMULATOR=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
CONFIG_PINCTRL_SM6150=y
CONFIG_PINCTRL_SLPI=y
CONFIG_GPIO_SYSFS=y
CONFIG_POWER_RESET_QCOM=y
CONFIG_QCOM_DLOAD_MODE=y
CONFIG_POWER_RESET_XGENE=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_QPNP_QG=y
CONFIG_QPNP_SMB5=y
CONFIG_THERMAL=y
CONFIG_THERMAL_WRITABLE_TRIPS=y
CONFIG_THERMAL_GOV_USER_SPACE=y
CONFIG_THERMAL_GOV_LOW_LIMITS=y
CONFIG_CPU_THERMAL=y
CONFIG_DEVFREQ_THERMAL=y
CONFIG_QCOM_SPMI_TEMP_ALARM=y
CONFIG_THERMAL_TSENS=y
CONFIG_QTI_THERMAL_LIMITS_DCVS=y
CONFIG_QTI_VIRTUAL_SENSOR=y
CONFIG_QTI_AOP_REG_COOLING_DEVICE=y
CONFIG_QTI_QMI_COOLING_DEVICE=y
CONFIG_REGULATOR_COOLING_DEVICE=y
CONFIG_QTI_BCL_PMIC5=y
CONFIG_QTI_BCL_SOC_DRIVER=y
CONFIG_QTI_ADC_TM=y
CONFIG_QTI_CX_IPEAK_COOLING_DEVICE=y
CONFIG_MFD_SPMI_PMIC=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_PROXY_CONSUMER=y
CONFIG_REGULATOR_QPNP_AMOLED=y
CONFIG_REGULATOR_QPNP_LCDB=y
CONFIG_REGULATOR_REFGEN=y
CONFIG_REGULATOR_RPMH=y
CONFIG_REGULATOR_STUB=y
CONFIG_UHID=y
CONFIG_HID_APPLE=y
CONFIG_HID_ELECOM=y
CONFIG_HID_MAGICMOUSE=y
CONFIG_HID_MICROSOFT=y
CONFIG_HID_MULTITOUCH=y
CONFIG_HID_PLANTRONICS=y
CONFIG_HID_SONY=y
CONFIG_HID_QVR=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_MSM=y
CONFIG_USB_ISP1760=y
CONFIG_USB_ISP1760_HOST_ROLE=y
CONFIG_USB_EHSET_TEST_FIXTURE=y
CONFIG_USB_LINK_LAYER_TEST=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_QCOM_EMU_PHY=y
CONFIG_USB_MSM_SSPHY_QMP=y
CONFIG_MSM_QUSB_PHY=y
CONFIG_MSM_HSUSB_PHY=y
CONFIG_DUAL_ROLE_USB_INTF=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_VBUS_DRAW=900
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_NCM=y
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_USB_CONFIGFS_F_MTP=y
CONFIG_USB_CONFIGFS_F_PTP=y
CONFIG_USB_CONFIGFS_F_ACC=y
CONFIG_USB_CONFIGFS_UEVENT=y
CONFIG_USB_CONFIGFS_F_HID=y
CONFIG_USB_CONFIGFS_F_DIAG=y
CONFIG_USB_CONFIGFS_F_CDEV=y
CONFIG_USB_CONFIGFS_F_CCID=y
CONFIG_USB_CONFIGFS_F_GSI=y
CONFIG_USB_CONFIGFS_F_QDSS=y
CONFIG_USB_PD_POLICY=y
CONFIG_QPNP_USB_PDPHY=y
CONFIG_MMC=y
CONFIG_MMC_PERF_PROFILING=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_BLOCK_DEFERRED_RESUME=y
CONFIG_MMC_TEST=m
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_CLKGATE=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_MSM=y
CONFIG_MMC_SDHCI_MSM_ICE=y
CONFIG_MMC_CQ_HCI=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_QPNP_FLASH_V2=y
CONFIG_LEDS_QPNP_HAPTICS=y
CONFIG_LEDS_QTI_TRI_LED=y
CONFIG_LEDS_QPNP_VIBRATOR_LDO=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_EDAC=y
CONFIG_EDAC_KRYO_ARM64=y
CONFIG_EDAC_KRYO_ARM64_PANIC_ON_UE=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_QPNP=y
CONFIG_DMADEVICES=y
CONFIG_QCOM_GPI_DMA=y
CONFIG_UIO=y
CONFIG_UIO_MSM_SHAREDMEM=y
CONFIG_STAGING=y
CONFIG_ASHMEM=y
CONFIG_ANDROID_LOW_MEMORY_KILLER=y
CONFIG_ION=y
CONFIG_ION_DEFER_FREE_NO_SCHED_IDLE=y
CONFIG_QCOM_GENI_SE=y
CONFIG_QPNP_REVID=y
CONFIG_SPS=y
CONFIG_SPS_SUPPORT_NDP_BAM=y
CONFIG_USB_BAM=y
CONFIG_IPA3=y
CONFIG_IPA_WDI_UNIFIED_API=y
CONFIG_RMNET_IPA3=y
CONFIG_RNDIS_IPA=y
CONFIG_IPA_UT=y
CONFIG_MSM_11AD=m
CONFIG_SPMI_PMIC_CLKDIV=y
CONFIG_MSM_CLK_AOP_QMP=y
CONFIG_CLOCK_CPU_OSM=y
CONFIG_MSM_CLK_RPMH=y
CONFIG_MSM_GCC_SM6150=y
CONFIG_MSM_SCC_SM6150=y
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_QCOM=y
CONFIG_QCOM_APCS_IPC=y
CONFIG_MSM_QMP=y
CONFIG_IOMMU_IO_PGTABLE_FAST=y
CONFIG_ARM_SMMU=y
CONFIG_QCOM_LAZY_MAPPING=y
CONFIG_IOMMU_DEBUG=y
CONFIG_IOMMU_DEBUG_TRACKING=y
CONFIG_IOMMU_TESTS=y
CONFIG_RPMSG_CHAR=y
CONFIG_RPMSG_QCOM_GLINK_SMEM=y
CONFIG_RPMSG_QCOM_GLINK_SPI=y
CONFIG_QCOM_CPUSS_DUMP=y
CONFIG_QCOM_RUN_QUEUE_STATS=y
CONFIG_QCOM_LLCC=y
CONFIG_QCOM_SM6150_LLCC=y
CONFIG_QCOM_LLCC_PERFMON=m
CONFIG_QCOM_QMI_HELPERS=y
CONFIG_QCOM_SMEM=y
CONFIG_QCOM_MEMORY_DUMP_V2=y
CONFIG_QCOM_WATCHDOG_V2=y
CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y
CONFIG_QCOM_SMP2P=y
CONFIG_QPNP_PBS=y
CONFIG_MSM_SERVICE_LOCATOR=y
CONFIG_MSM_SERVICE_NOTIFIER=y
CONFIG_MSM_SUBSYSTEM_RESTART=y
CONFIG_MSM_PIL=y
CONFIG_MSM_SYSMON_QMI_COMM=y
CONFIG_MSM_PIL_SSR_GENERIC=y
CONFIG_SETUP_SSR_NOTIF_TIMEOUTS=y
CONFIG_SSR_SYSMON_NOTIF_TIMEOUT=20000
CONFIG_SSR_SUBSYS_NOTIF_TIMEOUT=20000
CONFIG_PANIC_ON_SSR_NOTIF_TIMEOUT=y
CONFIG_MSM_BOOT_STATS=y
CONFIG_QCOM_DCC_V2=y
CONFIG_QCOM_SECURE_BUFFER=y
CONFIG_ICNSS=y
CONFIG_ICNSS_QMI=y
CONFIG_QCOM_EUD=y
CONFIG_QCOM_MINIDUMP=y
CONFIG_QCOM_BUS_SCALING=y
CONFIG_QCOM_BUS_CONFIG_RPMH=y
CONFIG_QCOM_COMMAND_DB=y
CONFIG_QCOM_EARLY_RANDOM=y
CONFIG_QTI_RPMH_API=y
CONFIG_QSEE_IPC_IRQ=y
CONFIG_QCOM_GLINK=y
CONFIG_QCOM_GLINK_PKT=y
CONFIG_QTI_RPM_STATS_LOG=y
CONFIG_MSM_CDSP_LOADER=y
CONFIG_QCOM_SMCINVOKE=y
CONFIG_MSM_EVENT_TIMER=y
CONFIG_MSM_PM=y
CONFIG_MEM_SHARE_QMI_SERVICE=y
CONFIG_MSM_PERFORMANCE=y
CONFIG_QMP_DEBUGFS_CLIENT=y
CONFIG_QCOM_SMP2P_SLEEPSTATE=y
CONFIG_QCOM_CDSP_RM=y
CONFIG_QCOM_CX_IPEAK=y
CONFIG_DEVFREQ_GOV_PASSIVE=y
CONFIG_QCOM_BIMC_BWMON=y
CONFIG_ARM_MEMLAT_MON=y
CONFIG_QCOMCCI_HWMON=y
CONFIG_QCOM_M4M_HWMON=y
CONFIG_DEVFREQ_GOV_QCOM_BW_HWMON=y
CONFIG_DEVFREQ_GOV_QCOM_CACHE_HWMON=y
CONFIG_DEVFREQ_GOV_MEMLAT=y
CONFIG_DEVFREQ_SIMPLE_DEV=y
CONFIG_QCOM_DEVFREQ_DEVBW=y
CONFIG_DEVFREQ_GOV_CDSPL3=y
CONFIG_EXTCON_USB_GPIO=y
CONFIG_IIO=y
CONFIG_QCOM_SPMI_ADC5=y
CONFIG_PWM=y
CONFIG_PWM_QTI_LPG=y
CONFIG_ARM_GIC_V3_ACL=y
CONFIG_ARM_DSU_PMU=y
CONFIG_QCOM_LLCC_PMU=y
CONFIG_RAS=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_NVMEM_SPMI_SDAM=y
CONFIG_SENSORS_SSC=y
CONFIG_ESOC=y
CONFIG_ESOC_DEV=y
CONFIG_ESOC_CLIENT=y
CONFIG_ESOC_MDM_4x=y
CONFIG_ESOC_MDM_DRV=y
CONFIG_ESOC_MDM_DBG_ENG=y
CONFIG_MSM_TZ_LOG=y
CONFIG_EXT4_FS=y
CONFIG_F2FS_FS=y
CONFIG_QUOTA=y
CONFIG_QUOTA_NETLINK_INTERFACE=y
CONFIG_QFMT_V2=y
CONFIG_FUSE_FS=y
CONFIG_OVERLAY_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_ECRYPT_FS=y
CONFIG_ECRYPT_FS_MESSAGING=y
CONFIG_SDCARD_FS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_PRINTK_TIME=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_SCHEDSTATS=y
# CONFIG_DEBUG_PREEMPT is not set
CONFIG_DEBUG_ALIGN_RODATA=y
CONFIG_CORESIGHT=y
CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
CONFIG_CORESIGHT_DYNAMIC_REPLICATOR=y
CONFIG_CORESIGHT_STM=y
CONFIG_CORESIGHT_CTI=y
CONFIG_CORESIGHT_TPDA=y
CONFIG_CORESIGHT_TPDM=y
CONFIG_CORESIGHT_HWEVENT=y
CONFIG_CORESIGHT_DUMMY=y
CONFIG_CORESIGHT_REMOTE_ETM=y
CONFIG_CORESIGHT_REMOTE_ETM_DEFAULT_ENABLE=0
CONFIG_CORESIGHT_EVENT=y
CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
CONFIG_SECURITY=y
CONFIG_SECURITY_NETWORK=y
CONFIG_HARDENED_USERCOPY=y
CONFIG_FORTIFY_SOURCE=y
CONFIG_CRYPTO_GCM=y
CONFIG_CRYPTO_XCBC=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_ANSI_CPRNG=y
CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=y
CONFIG_CRYPTO_DEV_QCRYPTO=y
CONFIG_CRYPTO_DEV_QCEDEV=y
CONFIG_CRYPTO_DEV_QCOM_ICE=y
CONFIG_ARM64_CRYPTO=y
CONFIG_CRYPTO_SHA1_ARM64_CE=y
CONFIG_CRYPTO_SHA2_ARM64_CE=y
CONFIG_CRYPTO_GHASH_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y

8
arch/arm64/configs/vendor/qti-quin-gvm-perf_defconfig vendored
View File

@@ -305,6 +305,7 @@ CONFIG_TTY_PRINTK=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_MSM_LEGACY=y
CONFIG_DIAG_CHAR=y
CONFIG_VIRTIO_FASTRPC=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_I2C_QCOM_GENI=y
@@ -424,6 +425,12 @@ CONFIG_QCOM_GENI_SE=y
CONFIG_SPS=y
CONFIG_SPS_SUPPORT_NDP_BAM=y
CONFIG_USB_BAM=y
CONFIG_VETH_IPA=y
CONFIG_IPA3=y
CONFIG_IPA_DEBUG=y
CONFIG_IPA_WDI_UNIFIED_API=y
CONFIG_RNDIS_IPA=y
CONFIG_IPA_UT=y
CONFIG_QCOM_CLK_VIRT=y
CONFIG_VIRTIO_CLK=y
CONFIG_HWSPINLOCK=y
@@ -453,6 +460,7 @@ CONFIG_QCOM_HGSL=y
CONFIG_PM_DEVFREQ=y
CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
CONFIG_EXTCON_USB_GPIO=y
CONFIG_QTI_PDC_VIRT=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_EXT4_FS=y

8
arch/arm64/configs/vendor/qti-quin-gvm_defconfig vendored
View File

@@ -314,6 +314,7 @@ CONFIG_TTY_PRINTK=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_MSM_LEGACY=y
CONFIG_DIAG_CHAR=y
CONFIG_VIRTIO_FASTRPC=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_I2C_QCOM_GENI=y
@@ -435,6 +436,12 @@ CONFIG_QCOM_GENI_SE=y
CONFIG_SPS=y
CONFIG_SPS_SUPPORT_NDP_BAM=y
CONFIG_USB_BAM=y
CONFIG_VETH_IPA=y
CONFIG_IPA3=y
CONFIG_IPA_DEBUG=y
CONFIG_IPA_WDI_UNIFIED_API=y
CONFIG_RNDIS_IPA=y
CONFIG_IPA_UT=y
CONFIG_QCOM_CLK_VIRT=y
CONFIG_VIRTIO_CLK=y
CONFIG_HWSPINLOCK=y
@@ -464,6 +471,7 @@ CONFIG_QCOM_HGSL=y
CONFIG_PM_DEVFREQ=y
CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
CONFIG_EXTCON_USB_GPIO=y
CONFIG_QTI_PDC_VIRT=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_EXT4_FS=y

529
arch/arm64/configs/vendor/sa2150p-nand-perf_defconfig vendored Normal file
View File

@@ -0,0 +1,529 @@
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_AUDIT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_IRQ_TIME_ACCOUNTING=y
CONFIG_SCHED_WALT=y
CONFIG_TASKSTATS=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_RCU_EXPERT=y
CONFIG_RCU_FAST_NO_HZ=y
CONFIG_RCU_NOCB_CPU=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_CGROUPS=y
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_PID_NS is not set
CONFIG_DEFAULT_USE_ENERGY_AWARE=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_EMBEDDED=y
CONFIG_SLAB_FREELIST_HARDENED=y
CONFIG_PROFILING=y
CONFIG_CC_STACKPROTECTOR_STRONG=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SIG=y
CONFIG_MODULE_SIG_FORCE=y
CONFIG_MODULE_SIG_SHA512=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_ARCH_QCOM=y
CONFIG_ARCH_QCS403=y
CONFIG_PCI=y
CONFIG_PCI_MSM=y
CONFIG_PCI_MSM_MSI=y
CONFIG_NR_CPUS=4
CONFIG_PREEMPT=y
CONFIG_CMA=y
CONFIG_ZSMALLOC=y
CONFIG_SECCOMP=y
# CONFIG_HARDEN_BRANCH_PREDICTOR is not set
CONFIG_ARMV8_DEPRECATED=y
CONFIG_SWP_EMULATION=y
CONFIG_CP15_BARRIER_EMULATION=y
CONFIG_SETEND_EMULATION=y
CONFIG_ARM64_SW_TTBR0_PAN=y
CONFIG_RANDOMIZE_BASE=y
CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_COMPAT=y
CONFIG_PM_AUTOSLEEP=y
CONFIG_PM_WAKELOCKS=y
CONFIG_PM_WAKELOCKS_LIMIT=0
# CONFIG_PM_WAKELOCKS_GC is not set
CONFIG_CPU_IDLE=y
CONFIG_ARM_CPUIDLE=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_MSM=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_XFRM_STATISTICS=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_INET_AH=y
CONFIG_INET_ESP=y
CONFIG_INET_IPCOMP=y
# CONFIG_INET_XFRM_MODE_BEET is not set
CONFIG_INET_DIAG_DESTROY=y
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_IPV6_OPTIMISTIC_DAD=y
CONFIG_INET6_AH=y
CONFIG_INET6_ESP=y
CONFIG_INET6_IPCOMP=y
CONFIG_IPV6_MIP6=y
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_IPV6_SUBTREES=y
CONFIG_NETFILTER=y
CONFIG_NF_CONNTRACK=y
CONFIG_NF_CONNTRACK_SECMARK=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CONNTRACK_AMANDA=y
CONFIG_NF_CONNTRACK_FTP=y
CONFIG_NF_CONNTRACK_H323=y
CONFIG_NF_CONNTRACK_IRC=y
CONFIG_NF_CONNTRACK_NETBIOS_NS=y
CONFIG_NF_CONNTRACK_PPTP=y
CONFIG_NF_CONNTRACK_SANE=y
CONFIG_NF_CONNTRACK_TFTP=y
CONFIG_NF_CT_NETLINK=y
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
CONFIG_NETFILTER_XT_TARGET_LOG=y
CONFIG_NETFILTER_XT_TARGET_MARK=y
CONFIG_NETFILTER_XT_TARGET_NFLOG=y
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
CONFIG_NETFILTER_XT_TARGET_NOTRACK=y
CONFIG_NETFILTER_XT_TARGET_TEE=y
CONFIG_NETFILTER_XT_TARGET_TPROXY=y
CONFIG_NETFILTER_XT_TARGET_TRACE=y
CONFIG_NETFILTER_XT_TARGET_SECMARK=y
CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
CONFIG_NETFILTER_XT_MATCH_DSCP=y
CONFIG_NETFILTER_XT_MATCH_ESP=y
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
CONFIG_NETFILTER_XT_MATCH_HELPER=y
CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
CONFIG_NETFILTER_XT_MATCH_LENGTH=y
CONFIG_NETFILTER_XT_MATCH_LIMIT=y
CONFIG_NETFILTER_XT_MATCH_MAC=y
CONFIG_NETFILTER_XT_MATCH_MARK=y
CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
CONFIG_NETFILTER_XT_MATCH_POLICY=y
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
CONFIG_NETFILTER_XT_MATCH_QUOTA=y
CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
CONFIG_NETFILTER_XT_MATCH_STATE=y
CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
CONFIG_NETFILTER_XT_MATCH_STRING=y
CONFIG_NETFILTER_XT_MATCH_TIME=y
CONFIG_NETFILTER_XT_MATCH_U32=y
CONFIG_NF_CONNTRACK_IPV4=y
CONFIG_IP_NF_IPTABLES=y
CONFIG_IP_NF_MATCH_AH=y
CONFIG_IP_NF_MATCH_ECN=y
CONFIG_IP_NF_MATCH_RPFILTER=y
CONFIG_IP_NF_MATCH_TTL=y
CONFIG_IP_NF_FILTER=y
CONFIG_IP_NF_TARGET_REJECT=y
CONFIG_IP_NF_NAT=y
CONFIG_IP_NF_TARGET_MASQUERADE=y
CONFIG_IP_NF_TARGET_NETMAP=y
CONFIG_IP_NF_TARGET_REDIRECT=y
CONFIG_IP_NF_MANGLE=y
CONFIG_IP_NF_RAW=y
CONFIG_IP_NF_SECURITY=y
CONFIG_IP_NF_ARPTABLES=y
CONFIG_IP_NF_ARPFILTER=y
CONFIG_IP_NF_ARP_MANGLE=y
CONFIG_NF_CONNTRACK_IPV6=y
CONFIG_IP6_NF_IPTABLES=y
CONFIG_IP6_NF_MATCH_RPFILTER=y
CONFIG_IP6_NF_FILTER=y
CONFIG_IP6_NF_TARGET_REJECT=y
CONFIG_IP6_NF_MANGLE=y
CONFIG_IP6_NF_RAW=y
CONFIG_BRIDGE_NF_EBTABLES=y
CONFIG_BRIDGE_EBT_BROUTE=y
CONFIG_BRIDGE_EBT_T_FILTER=y
CONFIG_BRIDGE_EBT_T_NAT=y
CONFIG_BRIDGE_EBT_ARP=y
CONFIG_BRIDGE_EBT_IP=y
CONFIG_BRIDGE_EBT_IP6=y
CONFIG_BRIDGE_EBT_ARPREPLY=y
CONFIG_BRIDGE_EBT_DNAT=y
CONFIG_BRIDGE_EBT_SNAT=y
CONFIG_L2TP=y
CONFIG_L2TP_V3=y
CONFIG_L2TP_IP=y
CONFIG_L2TP_ETH=y
CONFIG_BRIDGE=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_HTB=y
CONFIG_NET_SCH_PRIO=y
CONFIG_NET_CLS_FW=y
CONFIG_NET_CLS_U32=y
CONFIG_CLS_U32_MARK=y
CONFIG_NET_CLS_FLOW=y
CONFIG_NET_EMATCH=y
CONFIG_NET_EMATCH_CMP=y
CONFIG_NET_EMATCH_NBYTE=y
CONFIG_NET_EMATCH_U32=y
CONFIG_NET_EMATCH_META=y
CONFIG_NET_EMATCH_TEXT=y
CONFIG_NET_CLS_ACT=y
CONFIG_QRTR=y
CONFIG_QRTR_SMD=y
CONFIG_CAN=y
CONFIG_QTI_CAN=y
CONFIG_BT=y
# CONFIG_BT_BREDR is not set
# CONFIG_BT_LE is not set
# CONFIG_BT_DEBUGFS is not set
CONFIG_MSM_BT_POWER=y
CONFIG_CFG80211=y
CONFIG_CFG80211_INTERNAL_REGDB=y
CONFIG_MAC80211=m
CONFIG_MAC80211_RC_MINSTREL_VHT=y
CONFIG_MAC80211_DEBUGFS=y
CONFIG_RFKILL=y
CONFIG_NTAG_NQ=y
CONFIG_REGMAP_ALLOW_WRITE_DEBUGFS=y
CONFIG_DMA_CMA=y
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_MSM_QPIC_NAND=y
CONFIG_MTD_NAND=y
CONFIG_MTD_UBI=y
CONFIG_ZRAM=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_QSEECOM=y
CONFIG_UID_SYS_STATS=y
CONFIG_QPNP_MISC=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_SG=y
CONFIG_CHR_DEV_SCH=y
CONFIG_SCSI_CONSTANTS=y
CONFIG_SCSI_LOGGING=y
CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_SCSI_UFSHCD=y
CONFIG_SCSI_UFSHCD_PLATFORM=y
CONFIG_SCSI_UFS_QCOM=y
CONFIG_SCSI_UFSHCD_CMD_LOGGING=y
CONFIG_MD=y
CONFIG_BLK_DEV_DM=y
CONFIG_DM_CRYPT=y
CONFIG_DM_VERITY=y
CONFIG_DM_VERITY_FEC=y
CONFIG_NETDEVICES=y
CONFIG_DUMMY=y
CONFIG_TUN=y
CONFIG_AT803X_PHY=y
CONFIG_MICREL_PHY=y
CONFIG_PPP=y
CONFIG_PPP_BSDCOMP=y
CONFIG_PPP_DEFLATE=y
CONFIG_PPP_FILTER=y
CONFIG_PPP_MPPE=y
CONFIG_PPP_MULTILINK=y
CONFIG_PPPOE=y
CONFIG_PPPOL2TP=y
CONFIG_PPPOLAC=y
CONFIG_PPPOPNS=y
CONFIG_PPP_ASYNC=y
CONFIG_PPP_SYNC_TTY=y
CONFIG_USB_USBNET=y
CONFIG_USB_NET_SMSC75XX=y
CONFIG_ATH10K=m
CONFIG_ATH10K_PCI=m
CONFIG_ATH10K_DEBUG=y
CONFIG_ATH10K_DEBUGFS=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
CONFIG_CLD_LL_CORE=y
CONFIG_CNSS=y
CONFIG_CNSS_SDIO=y
CONFIG_CLD_HL_SDIO_CORE=y
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
CONFIG_INPUT_KEYRESET=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_MISC=y
CONFIG_INPUT_QPNP_POWER_ON=y
CONFIG_INPUT_UINPUT=y
CONFIG_INPUT_GPIO=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_DEVMEM is not set
CONFIG_SERIAL_MSM=y
CONFIG_SERIAL_MSM_HS=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_MSM_LEGACY=y
CONFIG_MSM_ADSPRPC=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MSM_V2=y
CONFIG_SPI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=y
CONFIG_SPMI=y
CONFIG_SLIMBUS_MSM_NGD=y
CONFIG_PPS_CLIENT_GPIO=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PINCTRL_QCS405=y
CONFIG_FRAGMENTED_GPIO_ADDRESS_SPACE=y
CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
CONFIG_GPIO_SYSFS=y
CONFIG_POWER_RESET_QCOM=y
CONFIG_QCOM_DLOAD_MODE=y
CONFIG_SMB1351_USB_CHARGER=y
CONFIG_THERMAL=y
CONFIG_THERMAL_WRITABLE_TRIPS=y
CONFIG_THERMAL_GOV_USER_SPACE=y
CONFIG_THERMAL_GOV_LOW_LIMITS=y
CONFIG_CPU_THERMAL=y
CONFIG_DEVFREQ_THERMAL=y
CONFIG_QCOM_SPMI_TEMP_ALARM=y
CONFIG_THERMAL_TSENS=y
CONFIG_QTI_VIRTUAL_SENSOR=y
CONFIG_QTI_QMI_COOLING_DEVICE=y
CONFIG_REGULATOR_COOLING_DEVICE=y
CONFIG_QTI_ADC_TM=y
CONFIG_QTI_RPM_SMD_COOLING_DEVICE=y
CONFIG_MFD_SPMI_PMIC=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_FAN53555=y
CONFIG_REGULATOR_CPR=y
CONFIG_REGULATOR_MEM_ACC=y
CONFIG_REGULATOR_RPM_SMD=y
CONFIG_REGULATOR_SPM=y
CONFIG_REGULATOR_STUB=y
# CONFIG_RC_CORE is not set
# CONFIG_VGA_ARB is not set
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_DYNAMIC_MINORS=y
CONFIG_SND_USB_AUDIO=y
CONFIG_SND_SOC=y
CONFIG_HIDRAW=y
CONFIG_UHID=y
CONFIG_USB_HIDDEV=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_MON=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_ACM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_DATAFAB=y
CONFIG_USB_STORAGE_FREECOM=y
CONFIG_USB_STORAGE_ISD200=y
CONFIG_USB_STORAGE_USBAT=y
CONFIG_USB_STORAGE_SDDR09=y
CONFIG_USB_STORAGE_SDDR55=y
CONFIG_USB_STORAGE_JUMPSHOT=y
CONFIG_USB_STORAGE_ALAUDA=y
CONFIG_USB_STORAGE_KARMA=y
CONFIG_USB_STORAGE_CYPRESS_ATACB=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_MSM=y
CONFIG_USB_SERIAL=y
CONFIG_USB_EHSET_TEST_FIXTURE=y
CONFIG_USB_LINK_LAYER_TEST=y
CONFIG_USB_TYPEC_MUX_NXP5150A=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_MSM_SNPS_FEMTO_PHY=y
CONFIG_USB_MSM_SSPHY=y
CONFIG_USB_QCOM_EMU_PHY=y
CONFIG_DUAL_ROLE_USB_INTF=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_VBUS_DRAW=900
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_USB_CONFIGFS_UEVENT=y
CONFIG_MMC=y
CONFIG_MMC_PERF_PROFILING=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_BLOCK_DEFERRED_RESUME=y
CONFIG_MMC_TEST=m
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_CLKGATE=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_MSM=y
CONFIG_MMC_SDHCI_MSM_ICE=y
CONFIG_MMC_CQ_HCI=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_QPNP=y
CONFIG_DMADEVICES=y
CONFIG_QCOM_SPS_DMA=y
CONFIG_SYNC_FILE=y
CONFIG_UIO=y
CONFIG_STAGING=y
CONFIG_ASHMEM=y
CONFIG_ION=y
CONFIG_QPNP_REVID=y
CONFIG_SPS=y
CONFIG_SPS_SUPPORT_NDP_BAM=y
CONFIG_QCOM_CLK_SMD_RPM=y
CONFIG_SPMI_PMIC_CLKDIV=y
CONFIG_MDM_DEBUGCC_QCS405=y
CONFIG_CLOCK_CPU_QCS405=y
CONFIG_QCS_CMN_BLK_PLL=y
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_QCOM=y
CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y
CONFIG_MAILBOX=y
CONFIG_QCOM_APCS_IPC=y
CONFIG_ARM_SMMU=y
CONFIG_QCOM_LAZY_MAPPING=y
CONFIG_IOMMU_DEBUG=y
CONFIG_IOMMU_DEBUG_TRACKING=y
CONFIG_RPMSG_CHAR=y
CONFIG_RPMSG_QCOM_GLINK_RPM=y
CONFIG_RPMSG_QCOM_GLINK_SMEM=y
CONFIG_MSM_RPM_SMD=y
CONFIG_QCOM_QMI_HELPERS=y
CONFIG_QCOM_SMEM=y
CONFIG_QCOM_SMD_RPM=y
CONFIG_MSM_SPM=y
CONFIG_MSM_L2_SPM=y
CONFIG_QCOM_SCM=y
CONFIG_QCOM_MEMORY_DUMP_V2=y
CONFIG_QCOM_WATCHDOG_V2=y
CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y
CONFIG_QCOM_WDOG_IPI_ENABLE=y
CONFIG_QCOM_SMP2P=y
CONFIG_MSM_SERVICE_LOCATOR=y
CONFIG_MSM_SERVICE_NOTIFIER=y
CONFIG_MSM_SUBSYSTEM_RESTART=y
CONFIG_MSM_PIL=y
CONFIG_MSM_SYSMON_QMI_COMM=y
CONFIG_MSM_PIL_SSR_GENERIC=y
CONFIG_MSM_BOOT_STATS=y
CONFIG_MSM_BOOT_TIME_MARKER=y
CONFIG_QCOM_DCC_V2=y
CONFIG_ICNSS=y
CONFIG_ICNSS_QMI=y
CONFIG_QCOM_BUS_SCALING=y
CONFIG_MSM_TZ_SMMU=y
CONFIG_QCOM_GLINK=y
CONFIG_QCOM_GLINK_PKT=y
CONFIG_MSM_JTAGV8=y
CONFIG_QTI_RPM_STATS_LOG=y
CONFIG_MSM_CDSP_LOADER=y
CONFIG_QCOM_SMCINVOKE=y
CONFIG_MSM_PM=y
CONFIG_QCOM_SMP2P_SLEEPSTATE=y
CONFIG_QCOM_BIMC_BWMON=y
CONFIG_ARM_MEMLAT_MON=y
CONFIG_DEVFREQ_GOV_QCOM_BW_HWMON=y
CONFIG_DEVFREQ_GOV_MEMLAT=y
CONFIG_QCOM_DEVFREQ_DEVBW=y
CONFIG_EXTCON_USB_GPIO=y
CONFIG_IIO=y
CONFIG_QCOM_SPMI_ADC5=y
CONFIG_PWM=y
CONFIG_PWM_QTI_LPG=y
CONFIG_QCOM_KGSL=y
CONFIG_QTI_MPM=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_MSM_TZ_LOG=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT3_FS=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_QUOTA=y
CONFIG_QUOTA_NETLINK_INTERFACE=y
# CONFIG_PRINT_QUOTA_WARNING is not set
CONFIG_QFMT_V2=y
CONFIG_FUSE_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_SQUASHFS=y
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
CONFIG_SQUASHFS_XATTR=y
# CONFIG_SQUASHFS_ZLIB is not set
CONFIG_SQUASHFS_XZ=y
CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_ISO8859_1=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_PAGE_OWNER=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_PAGE_POISONING=y
CONFIG_PAGE_POISONING_ENABLE_DEFAULT=y
CONFIG_PANIC_ON_RECURSIVE_FAULT=y
CONFIG_PANIC_ON_OOPS=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_SCHEDSTATS=y
CONFIG_IPC_LOGGING=y
CONFIG_BUG_ON_DATA_CORRUPTION=y
CONFIG_CORESIGHT=y
CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
CONFIG_CORESIGHT_DYNAMIC_REPLICATOR=y
CONFIG_CORESIGHT_STM=y
CONFIG_CORESIGHT_CTI=y
CONFIG_CORESIGHT_TPDA=y
CONFIG_CORESIGHT_TPDM=y
CONFIG_CORESIGHT_HWEVENT=y
CONFIG_CORESIGHT_DUMMY=y
CONFIG_CORESIGHT_EVENT=y
CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
CONFIG_SECURITY=y
CONFIG_SECURITY_NETWORK=y
CONFIG_LSM_MMAP_MIN_ADDR=4096
CONFIG_HARDENED_USERCOPY=y
CONFIG_HARDENED_USERCOPY_PAGESPAN=y
CONFIG_SECURITY_SELINUX=y
CONFIG_CRYPTO_CTR=y
CONFIG_CRYPTO_XCBC=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=y
CONFIG_CRYPTO_DEV_QCRYPTO=y
CONFIG_CRYPTO_DEV_QCEDEV=y
CONFIG_CRYPTO_DEV_QCOM_ICE=y
CONFIG_STACK_HASH_ORDER_SHIFT=12

578
arch/arm64/configs/vendor/sa2150p-nand_defconfig vendored Normal file
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@@ -0,0 +1,578 @@
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_AUDIT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_IRQ_TIME_ACCOUNTING=y
CONFIG_SCHED_WALT=y
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_RCU_EXPERT=y
CONFIG_RCU_FAST_NO_HZ=y
CONFIG_RCU_NOCB_CPU=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_CGROUPS=y
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_DEBUG=y
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_PID_NS is not set
CONFIG_DEFAULT_USE_ENERGY_AWARE=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_EMBEDDED=y
CONFIG_SLAB_FREELIST_HARDENED=y
CONFIG_PROFILING=y
CONFIG_CC_STACKPROTECTOR_STRONG=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SIG=y
CONFIG_MODULE_SIG_FORCE=y
CONFIG_MODULE_SIG_SHA512=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_ARCH_QCOM=y
CONFIG_ARCH_QCS403=y
CONFIG_PCI=y
CONFIG_PCI_MSM=y
CONFIG_PCI_MSM_MSI=y
CONFIG_NR_CPUS=4
CONFIG_PREEMPT=y
CONFIG_CLEANCACHE=y
CONFIG_CMA=y
CONFIG_CMA_DEBUGFS=y
CONFIG_ZSMALLOC=y
CONFIG_SECCOMP=y
# CONFIG_HARDEN_BRANCH_PREDICTOR is not set
CONFIG_ARMV8_DEPRECATED=y
CONFIG_SWP_EMULATION=y
CONFIG_CP15_BARRIER_EMULATION=y
CONFIG_SETEND_EMULATION=y
CONFIG_ARM64_SW_TTBR0_PAN=y
CONFIG_RANDOMIZE_BASE=y
CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_COMPAT=y
CONFIG_PM_AUTOSLEEP=y
CONFIG_PM_WAKELOCKS=y
CONFIG_PM_WAKELOCKS_LIMIT=0
# CONFIG_PM_WAKELOCKS_GC is not set
CONFIG_PM_DEBUG=y
CONFIG_CPU_IDLE=y
CONFIG_ARM_CPUIDLE=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_MSM=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_XFRM_STATISTICS=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_INET_AH=y
CONFIG_INET_ESP=y
CONFIG_INET_IPCOMP=y
# CONFIG_INET_XFRM_MODE_BEET is not set
CONFIG_INET_DIAG_DESTROY=y
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_IPV6_OPTIMISTIC_DAD=y
CONFIG_INET6_AH=y
CONFIG_INET6_ESP=y
CONFIG_INET6_IPCOMP=y
CONFIG_IPV6_MIP6=y
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_IPV6_SUBTREES=y
CONFIG_NETFILTER=y
CONFIG_NF_CONNTRACK=y
CONFIG_NF_CONNTRACK_SECMARK=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CONNTRACK_AMANDA=y
CONFIG_NF_CONNTRACK_FTP=y
CONFIG_NF_CONNTRACK_H323=y
CONFIG_NF_CONNTRACK_IRC=y
CONFIG_NF_CONNTRACK_NETBIOS_NS=y
CONFIG_NF_CONNTRACK_PPTP=y
CONFIG_NF_CONNTRACK_SANE=y
CONFIG_NF_CONNTRACK_TFTP=y
CONFIG_NF_CT_NETLINK=y
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
CONFIG_NETFILTER_XT_TARGET_LOG=y
CONFIG_NETFILTER_XT_TARGET_MARK=y
CONFIG_NETFILTER_XT_TARGET_NFLOG=y
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
CONFIG_NETFILTER_XT_TARGET_NOTRACK=y
CONFIG_NETFILTER_XT_TARGET_TEE=y
CONFIG_NETFILTER_XT_TARGET_TPROXY=y
CONFIG_NETFILTER_XT_TARGET_TRACE=y
CONFIG_NETFILTER_XT_TARGET_SECMARK=y
CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
CONFIG_NETFILTER_XT_MATCH_DSCP=y
CONFIG_NETFILTER_XT_MATCH_ESP=y
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
CONFIG_NETFILTER_XT_MATCH_HELPER=y
CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
CONFIG_NETFILTER_XT_MATCH_LENGTH=y
CONFIG_NETFILTER_XT_MATCH_LIMIT=y
CONFIG_NETFILTER_XT_MATCH_MAC=y
CONFIG_NETFILTER_XT_MATCH_MARK=y
CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
CONFIG_NETFILTER_XT_MATCH_POLICY=y
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
CONFIG_NETFILTER_XT_MATCH_QUOTA=y
CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
CONFIG_NETFILTER_XT_MATCH_STATE=y
CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
CONFIG_NETFILTER_XT_MATCH_STRING=y
CONFIG_NETFILTER_XT_MATCH_TIME=y
CONFIG_NETFILTER_XT_MATCH_U32=y
CONFIG_NF_CONNTRACK_IPV4=y
CONFIG_IP_NF_IPTABLES=y
CONFIG_IP_NF_MATCH_AH=y
CONFIG_IP_NF_MATCH_ECN=y
CONFIG_IP_NF_MATCH_RPFILTER=y
CONFIG_IP_NF_MATCH_TTL=y
CONFIG_IP_NF_FILTER=y
CONFIG_IP_NF_TARGET_REJECT=y
CONFIG_IP_NF_NAT=y
CONFIG_IP_NF_TARGET_MASQUERADE=y
CONFIG_IP_NF_TARGET_NETMAP=y
CONFIG_IP_NF_TARGET_REDIRECT=y
CONFIG_IP_NF_MANGLE=y
CONFIG_IP_NF_RAW=y
CONFIG_IP_NF_SECURITY=y
CONFIG_IP_NF_ARPTABLES=y
CONFIG_IP_NF_ARPFILTER=y
CONFIG_IP_NF_ARP_MANGLE=y
CONFIG_NF_CONNTRACK_IPV6=y
CONFIG_IP6_NF_IPTABLES=y
CONFIG_IP6_NF_MATCH_RPFILTER=y
CONFIG_IP6_NF_FILTER=y
CONFIG_IP6_NF_TARGET_REJECT=y
CONFIG_IP6_NF_MANGLE=y
CONFIG_IP6_NF_RAW=y
CONFIG_BRIDGE_NF_EBTABLES=y
CONFIG_BRIDGE_EBT_BROUTE=y
CONFIG_BRIDGE_EBT_T_FILTER=y
CONFIG_BRIDGE_EBT_T_NAT=y
CONFIG_BRIDGE_EBT_ARP=y
CONFIG_BRIDGE_EBT_IP=y
CONFIG_BRIDGE_EBT_IP6=y
CONFIG_BRIDGE_EBT_ARPREPLY=y
CONFIG_BRIDGE_EBT_DNAT=y
CONFIG_BRIDGE_EBT_SNAT=y
CONFIG_L2TP=y
CONFIG_L2TP_DEBUGFS=y
CONFIG_L2TP_V3=y
CONFIG_L2TP_IP=y
CONFIG_L2TP_ETH=y
CONFIG_BRIDGE=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_HTB=y
CONFIG_NET_SCH_PRIO=y
CONFIG_NET_CLS_FW=y
CONFIG_NET_CLS_U32=y
CONFIG_CLS_U32_MARK=y
CONFIG_NET_CLS_FLOW=y
CONFIG_NET_EMATCH=y
CONFIG_NET_EMATCH_CMP=y
CONFIG_NET_EMATCH_NBYTE=y
CONFIG_NET_EMATCH_U32=y
CONFIG_NET_EMATCH_META=y
CONFIG_NET_EMATCH_TEXT=y
CONFIG_NET_CLS_ACT=y
CONFIG_QRTR=y
CONFIG_QRTR_SMD=y
CONFIG_CAN=y
CONFIG_QTI_CAN=y
CONFIG_BT=y
# CONFIG_BT_BREDR is not set
# CONFIG_BT_LE is not set
# CONFIG_BT_DEBUGFS is not set
CONFIG_MSM_BT_POWER=y
CONFIG_CFG80211=y
CONFIG_CFG80211_INTERNAL_REGDB=y
CONFIG_MAC80211=m
CONFIG_MAC80211_RC_MINSTREL_VHT=y
CONFIG_MAC80211_DEBUGFS=y
CONFIG_RFKILL=y
CONFIG_NTAG_NQ=y
CONFIG_REGMAP_ALLOW_WRITE_DEBUGFS=y
CONFIG_DMA_CMA=y
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_MSM_QPIC_NAND=y
CONFIG_MTD_NAND=y
CONFIG_MTD_UBI=y
CONFIG_ZRAM=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_QSEECOM=y
CONFIG_UID_SYS_STATS=y
CONFIG_QPNP_MISC=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_SG=y
CONFIG_CHR_DEV_SCH=y
CONFIG_SCSI_CONSTANTS=y
CONFIG_SCSI_LOGGING=y
CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_SCSI_UFSHCD=y
CONFIG_SCSI_UFSHCD_PLATFORM=y
CONFIG_SCSI_UFS_QCOM=y
CONFIG_SCSI_UFSHCD_CMD_LOGGING=y
CONFIG_MD=y
CONFIG_BLK_DEV_DM=y
CONFIG_DM_CRYPT=y
CONFIG_DM_VERITY=y
CONFIG_DM_VERITY_FEC=y
CONFIG_NETDEVICES=y
CONFIG_DUMMY=y
CONFIG_TUN=y
CONFIG_AT803X_PHY=y
CONFIG_MICREL_PHY=y
CONFIG_PPP=y
CONFIG_PPP_BSDCOMP=y
CONFIG_PPP_DEFLATE=y
CONFIG_PPP_FILTER=y
CONFIG_PPP_MPPE=y
CONFIG_PPP_MULTILINK=y
CONFIG_PPPOE=y
CONFIG_PPPOL2TP=y
CONFIG_PPPOLAC=y
CONFIG_PPPOPNS=y
CONFIG_PPP_ASYNC=y
CONFIG_PPP_SYNC_TTY=y
CONFIG_USB_USBNET=y
CONFIG_USB_NET_SMSC75XX=y
CONFIG_ATH10K=m
CONFIG_ATH10K_PCI=m
CONFIG_ATH10K_DEBUG=y
CONFIG_ATH10K_DEBUGFS=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
CONFIG_CLD_LL_CORE=y
CONFIG_CNSS=y
CONFIG_CNSS_SDIO=y
CONFIG_CLD_HL_SDIO_CORE=y
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
CONFIG_INPUT_KEYRESET=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_MISC=y
CONFIG_INPUT_QPNP_POWER_ON=y
CONFIG_INPUT_UINPUT=y
CONFIG_INPUT_GPIO=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_DEVMEM is not set
CONFIG_SERIAL_MSM=y
CONFIG_SERIAL_MSM_CONSOLE=y
CONFIG_SERIAL_MSM_HS=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_MSM_LEGACY=y
CONFIG_MSM_ADSPRPC=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MSM_V2=y
CONFIG_SPI=y
CONFIG_SPI_DEBUG=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=y
CONFIG_SPMI=y
CONFIG_SPMI_MSM_PMIC_ARB_DEBUG=y
CONFIG_SLIMBUS_MSM_NGD=y
CONFIG_PPS_CLIENT_GPIO=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PINCTRL_QCS405=y
CONFIG_FRAGMENTED_GPIO_ADDRESS_SPACE=y
CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
CONFIG_GPIO_SYSFS=y
CONFIG_POWER_RESET_QCOM=y
CONFIG_QCOM_DLOAD_MODE=y
CONFIG_SMB1351_USB_CHARGER=y
CONFIG_THERMAL=y
CONFIG_THERMAL_WRITABLE_TRIPS=y
CONFIG_THERMAL_GOV_USER_SPACE=y
CONFIG_THERMAL_GOV_LOW_LIMITS=y
CONFIG_CPU_THERMAL=y
CONFIG_DEVFREQ_THERMAL=y
CONFIG_QCOM_SPMI_TEMP_ALARM=y
CONFIG_THERMAL_TSENS=y
CONFIG_QTI_VIRTUAL_SENSOR=y
CONFIG_QTI_QMI_COOLING_DEVICE=y
CONFIG_REGULATOR_COOLING_DEVICE=y
CONFIG_QTI_ADC_TM=y
CONFIG_QTI_RPM_SMD_COOLING_DEVICE=y
CONFIG_MFD_SPMI_PMIC=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_FAN53555=y
CONFIG_REGULATOR_CPR=y
CONFIG_REGULATOR_MEM_ACC=y
CONFIG_REGULATOR_RPM_SMD=y
CONFIG_REGULATOR_SPM=y
CONFIG_REGULATOR_STUB=y
# CONFIG_RC_CORE is not set
# CONFIG_VGA_ARB is not set
# CONFIG_DSI_PARSER is not set
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_DYNAMIC_MINORS=y
CONFIG_SND_USB_AUDIO=y
CONFIG_SND_SOC=y
CONFIG_HIDRAW=y
CONFIG_UHID=y
CONFIG_USB_HIDDEV=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_MON=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_ACM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_DATAFAB=y
CONFIG_USB_STORAGE_FREECOM=y
CONFIG_USB_STORAGE_ISD200=y
CONFIG_USB_STORAGE_USBAT=y
CONFIG_USB_STORAGE_SDDR09=y
CONFIG_USB_STORAGE_SDDR55=y
CONFIG_USB_STORAGE_JUMPSHOT=y
CONFIG_USB_STORAGE_ALAUDA=y
CONFIG_USB_STORAGE_KARMA=y
CONFIG_USB_STORAGE_CYPRESS_ATACB=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_MSM=y
CONFIG_USB_SERIAL=y
CONFIG_USB_EHSET_TEST_FIXTURE=y
CONFIG_USB_LINK_LAYER_TEST=y
CONFIG_USB_TYPEC_MUX_NXP5150A=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_MSM_SNPS_FEMTO_PHY=y
CONFIG_USB_MSM_SSPHY=y
CONFIG_USB_QCOM_EMU_PHY=y
CONFIG_DUAL_ROLE_USB_INTF=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG_FILES=y
CONFIG_USB_GADGET_DEBUG_FS=y
CONFIG_USB_GADGET_VBUS_DRAW=900
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_USB_CONFIGFS_UEVENT=y
CONFIG_MMC=y
CONFIG_MMC_PERF_PROFILING=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_BLOCK_DEFERRED_RESUME=y
CONFIG_MMC_TEST=m
CONFIG_MMC_RING_BUFFER=y
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_CLKGATE=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_MSM=y
CONFIG_MMC_SDHCI_MSM_ICE=y
CONFIG_MMC_CQ_HCI=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_QPNP=y
CONFIG_DMADEVICES=y
CONFIG_QCOM_SPS_DMA=y
CONFIG_SYNC_FILE=y
CONFIG_UIO=y
CONFIG_STAGING=y
CONFIG_ASHMEM=y
CONFIG_ION=y
CONFIG_QPNP_REVID=y
CONFIG_SPS=y
CONFIG_SPS_SUPPORT_NDP_BAM=y
CONFIG_QCOM_CLK_SMD_RPM=y
CONFIG_SPMI_PMIC_CLKDIV=y
CONFIG_MDM_DEBUGCC_QCS405=y
CONFIG_CLOCK_CPU_QCS405=y
CONFIG_QCS_CMN_BLK_PLL=y
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_QCOM=y
CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y
CONFIG_MAILBOX=y
CONFIG_QCOM_APCS_IPC=y
CONFIG_ARM_SMMU=y
CONFIG_QCOM_LAZY_MAPPING=y
CONFIG_IOMMU_DEBUG=y
CONFIG_IOMMU_DEBUG_TRACKING=y
CONFIG_IOMMU_TESTS=y
CONFIG_RPMSG_CHAR=y
CONFIG_RPMSG_QCOM_GLINK_RPM=y
CONFIG_RPMSG_QCOM_GLINK_SMEM=y
CONFIG_MSM_RPM_SMD=y
CONFIG_QCOM_CPUSS_DUMP=y
CONFIG_QCOM_QMI_HELPERS=y
CONFIG_QCOM_SMEM=y
CONFIG_QCOM_SMD_RPM=y
CONFIG_MSM_SPM=y
CONFIG_MSM_L2_SPM=y
CONFIG_QCOM_SCM=y
CONFIG_QCOM_MEMORY_DUMP_V2=y
CONFIG_MSM_DEBUG_LAR_UNLOCK=y
CONFIG_QCOM_WATCHDOG_V2=y
CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y
CONFIG_QCOM_WDOG_IPI_ENABLE=y
CONFIG_QCOM_SMP2P=y
CONFIG_MSM_SERVICE_LOCATOR=y
CONFIG_MSM_SERVICE_NOTIFIER=y
CONFIG_MSM_SUBSYSTEM_RESTART=y
CONFIG_MSM_PIL=y
CONFIG_MSM_SYSMON_QMI_COMM=y
CONFIG_MSM_PIL_SSR_GENERIC=y
CONFIG_MSM_BOOT_STATS=y
CONFIG_MSM_BOOT_TIME_MARKER=y
CONFIG_MSM_CORE_HANG_DETECT=y
CONFIG_QCOM_DCC_V2=y
CONFIG_ICNSS=y
CONFIG_ICNSS_DEBUG=y
CONFIG_ICNSS_QMI=y
CONFIG_QCOM_BUS_SCALING=y
CONFIG_MSM_TZ_SMMU=y
CONFIG_QCOM_GLINK=y
CONFIG_QCOM_GLINK_PKT=y
CONFIG_QTI_RPM_STATS_LOG=y
CONFIG_MSM_CDSP_LOADER=y
CONFIG_QCOM_SMCINVOKE=y
CONFIG_MSM_PM=y
CONFIG_QCOM_SMP2P_SLEEPSTATE=y
CONFIG_QCOM_BIMC_BWMON=y
CONFIG_ARM_MEMLAT_MON=y
CONFIG_DEVFREQ_GOV_QCOM_BW_HWMON=y
CONFIG_DEVFREQ_GOV_MEMLAT=y
CONFIG_QCOM_DEVFREQ_DEVBW=y
CONFIG_EXTCON_USB_GPIO=y
CONFIG_IIO=y
CONFIG_QCOM_SPMI_ADC5=y
CONFIG_PWM=y
CONFIG_PWM_QTI_LPG=y
CONFIG_QCOM_KGSL=y
CONFIG_QTI_MPM=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_MSM_TZ_LOG=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT3_FS=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_QUOTA=y
CONFIG_QUOTA_NETLINK_INTERFACE=y
# CONFIG_PRINT_QUOTA_WARNING is not set
CONFIG_QFMT_V2=y
CONFIG_FUSE_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_SQUASHFS=y
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
CONFIG_SQUASHFS_XATTR=y
# CONFIG_SQUASHFS_ZLIB is not set
CONFIG_SQUASHFS_XZ=y
CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_ISO8859_1=y
CONFIG_PRINTK_TIME=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_INFO=y
CONFIG_PAGE_OWNER=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_PAGEALLOC=y
CONFIG_SLUB_DEBUG_PANIC_ON=y
CONFIG_DEBUG_PAGEALLOC_ENABLE_DEFAULT=y
CONFIG_PAGE_POISONING=y
CONFIG_PAGE_POISONING_ENABLE_DEFAULT=y
CONFIG_DEBUG_OBJECTS=y
CONFIG_DEBUG_OBJECTS_FREE=y
CONFIG_DEBUG_OBJECTS_TIMERS=y
CONFIG_DEBUG_OBJECTS_WORK=y
CONFIG_DEBUG_OBJECTS_RCU_HEAD=y
CONFIG_DEBUG_OBJECTS_PERCPU_COUNTER=y
CONFIG_SLUB_DEBUG_ON=y
CONFIG_DEBUG_KMEMLEAK=y
CONFIG_DEBUG_KMEMLEAK_EARLY_LOG_SIZE=4000
CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF=y
CONFIG_DEBUG_STACK_USAGE=y
CONFIG_DEBUG_MEMORY_INIT=y
CONFIG_PANIC_ON_RECURSIVE_FAULT=y
CONFIG_PANIC_ON_OOPS=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_SCHEDSTATS=y
CONFIG_SCHED_STACK_END_CHECK=y
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_MUTEXES=y
CONFIG_DEBUG_ATOMIC_SLEEP=y
CONFIG_FAULT_INJECTION=y
CONFIG_FAIL_PAGE_ALLOC=y
CONFIG_UFS_FAULT_INJECTION=y
CONFIG_FAULT_INJECTION_DEBUG_FS=y
CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y
CONFIG_IPC_LOGGING=y
CONFIG_QCOM_RTB=y
CONFIG_QCOM_RTB_SEPARATE_CPUS=y
CONFIG_BLK_DEV_IO_TRACE=y
CONFIG_LKDTM=y
CONFIG_BUG_ON_DATA_CORRUPTION=y
CONFIG_CORESIGHT=y
CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
CONFIG_CORESIGHT_SOURCE_ETM4X=y
CONFIG_CORESIGHT_DYNAMIC_REPLICATOR=y
CONFIG_CORESIGHT_STM=y
CONFIG_CORESIGHT_CTI=y
CONFIG_CORESIGHT_TPDA=y
CONFIG_CORESIGHT_TPDM=y
CONFIG_CORESIGHT_HWEVENT=y
CONFIG_CORESIGHT_DUMMY=y
CONFIG_CORESIGHT_REMOTE_ETM=y
CONFIG_CORESIGHT_REMOTE_ETM_DEFAULT_ENABLE=0
CONFIG_CORESIGHT_EVENT=y
CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
CONFIG_SECURITY=y
CONFIG_SECURITY_NETWORK=y
CONFIG_LSM_MMAP_MIN_ADDR=4096
CONFIG_HARDENED_USERCOPY=y
CONFIG_HARDENED_USERCOPY_PAGESPAN=y
CONFIG_SECURITY_SELINUX=y
CONFIG_CRYPTO_CTR=y
CONFIG_CRYPTO_XCBC=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=y
CONFIG_CRYPTO_DEV_QCRYPTO=y
CONFIG_CRYPTO_DEV_QCEDEV=y
CONFIG_CRYPTO_DEV_QCOM_ICE=y

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