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Merge remote-tracking branch 'origin/q' into auto-kernel

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* origin/q:
  Revert "iommu: arm-smmu: Make restore of smmu-context runtime detectable"
  Revert "iommu: arm-smmu: Use same callback for thaw and restore"
  Revert "soc: qcom: Implement hibernation callbacks for jtag-etm"
  Revert "firmware: qcom: Register call back functions for hibernation"
  Revert "soc: qcom: smp2p: Implementing thaw callback"
  Revert "soc: qcom: smem: Implementing thaw callback"
  Revert "i2c: i2c-qcom-geni: Implementing thaw callback"
  Revert "iio: adc: Implementing thaw callback"
  Revert "input: qpnp-power-on:  Implementing thaw callback"
  Revert "thermal: qcom-spmi-temp-alarm: Add support for thaw callback"
  Revert "rtc: qpnp-rtc: Add support for thaw callback"
  Revert "mmc: sdhci-msm: Add hibernation callbacks"
  Revert "clk: qcom: Add support for enabling the critical clocks"
  Revert "serial: msm-geni-serial: Add support for thaw callback"
  ARM: dts: msm: Bring all board specific changes to common file for QCS610
  msm: camera: Allow applying request if congestion comes
  ARM: dts: msm: Add initial dts support for QCM6125
  soc: qcom: socinfo: Add support for QCM6125/QCS6125 soc-id
  ARM: dts: qcom: Add support for POMS on sim-video-panel
  arm64: dts: msm: Add dt entry for manual fw loading
  ARM: dts: msm: remove default SA6155 DP pinctrl
  ARM: dts: msm: Enable USB type-C analog audio on SDM660
  net-ipv6-ndisc: add support for 'PREF64' dns64 prefix identifier
  fbdev: msm: call pxl clk unprepare during suspend
  msm: vidc: Fix in deciding power mode
  ARM: dts: msm: Include camera sensor DTSi file for QCS410
  USB: gadget: Add a print for Boot marker KPI
  msm: camera: isp: Add trace event in case of irq delay detected
  msm: camera: csiphy: Clear secure phy flags on release
  msm: ais: fix csid fatal error issue
  ANDROID: net: bpf: permit redirect from ingress L3 to egress L2 devices at near max mtu
  ARM: dts: msm: Enable sdx_ext_ipc and set policy to NOP in sa515m
  drivers: soc: sdx_ext_ipc: Add option to change default policy
  msm: adsprpc: Fix array index underflow problem
  power: smb1398: Fix array index out of bounds error
  msm: ipa: update MHI event id logic
  usb: dwc3: gadget: Avoid spuriously printing NO_PULLUP in log
  Add S2R and S2D support in KMD
  drm/bridge: add anx7625 to drm device pm link
  ARM: dts: msm: add hgsl to sa8195 vm for GPU doorbell

Signed-off-by: UtsavBalar1231 <utsavbalar1231@gmail.com>
This commit is contained in:
UtsavBalar1231
2020-06-23 13:03:27 +05:30
parent b60945b0aa 47a5dc7a8f
commit 66f533b6fa
64 changed files with 785 additions and 281 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
Documentation/devicetree/bindings/arm/msm/msm.txt
View File

@@ -106,6 +106,12 @@ SoCs:
- SDA429W
compatible = "qcom,sda429w"
- QCM6125
compatible = "qcom,qcm6125"
- QCS6125
compatible = "qcom,qcs6125"
Generic board variants:
- CDP device:
@@ -299,3 +305,5 @@ compatible = "qcom,sda429w-wdp"
compatible = "qcom,sda429-wdp"
compatible = "qcom,sdm429w-wdp"
compatible = "qcom,sdm429-wdp"
compatible = "qcom,qcm6125"
compatible = "qcom,qcs6125"

2
Documentation/devicetree/bindings/arm/msm/sdx-ext-ipc.txt
View File

@@ -21,6 +21,8 @@ Optional named gpio properties:
- qcom,ap2mdm-status2-gpio: gpio for APQ to indicate graceful shutdown to modem.
- qcom,default-policy-nop: Set default policy from PANIC to NOP.
Example:
sdx_ext_ipc: qcom,sdx_ext_ipc {
compatible = "qcom,sdx-ext-ipc";

1
Documentation/devicetree/bindings/platform/msm/ipa.txt
View File

@@ -115,6 +115,7 @@ memory allocation over a PCIe bridge
1 (override scm call as though it returned true), and
2 (override scm call as though it returned false)
- qcom,use-xbl-boot: Boolean to indicate XBL boot loading for IPA FW
- qcom,manual-fw-load: Manually load ipa fws by writing 1 to ipa dev node
IPA pipe sub nodes (A2 static pipes configurations):

21
arch/arm64/boot/dts/qcom/Makefile
View File

@@ -258,9 +258,9 @@ sa6155p-v2-adp-star-overlay.dtbo-base := sa6155p.dtb
sa6155-adp-air-overlay.dtbo-base := sa6155.dtb
sa6155p-adp-air-overlay.dtbo-base := sa6155p.dtb
sa6155p-v2-adp-air-overlay.dtbo-base := sa6155p.dtb
qcs610-iot-overlay.dtbo-base := sm6150.dtb
qcs610-ipc-overlay.dtbo-base := sm6150.dtb
qcs410-iot-overlay.dtbo-base := sm6150.dtb
qcs610-iot-overlay.dtbo-base := qcs610.dtb
qcs610-ipc-overlay.dtbo-base := qcs610.dtb
qcs410-iot-overlay.dtbo-base := qcs410.dtb
else
dtb-$(CONFIG_ARCH_SM6150) += sm6150-rumi.dtb \
sm6150-qrd.dtb \
@@ -327,7 +327,9 @@ ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y)
trinket-external-codec-idp-overlay.dtbo \
trinket-usbc-external-codec-idp-overlay.dtbo \
trinket-usbc-idp-overlay.dtbo \
trinket-dp-idp-overlay.dtbo
trinket-dp-idp-overlay.dtbo \
qcm6125-iot-idp-overlay.dtbo \
qcs6125-iot-idp-overlay.dtbo
trinket-rumi-overlay.dtbo-base := trinket.dtb
trinket-idp-overlay.dtbo-base := trinket.dtb
@@ -336,6 +338,8 @@ trinket-external-codec-idp-overlay.dtbo-base := trinket.dtb
trinket-usbc-external-codec-idp-overlay.dtbo-base := trinket.dtb
trinket-usbc-idp-overlay.dtbo-base := trinket.dtb
trinket-dp-idp-overlay.dtbo-base := trinket.dtb
qcm6125-iot-idp-overlay.dtbo-base := qcm6125.dtb
qcs6125-iot-idp-overlay.dtbo-base := qcs6125.dtb
else
dtb-$(CONFIG_ARCH_TRINKET) += trinket-rumi.dtb \
trinket-idp.dtb \
@@ -343,7 +347,9 @@ dtb-$(CONFIG_ARCH_TRINKET) += trinket-rumi.dtb \
trinket-external-codec-idp.dtb \
trinket-usbc-external-codec-idp.dtb \
trinket-usbc-idp.dtb \
trinket-dp-idp.dtb
trinket-dp-idp.dtb \
qcm6125-iot-idp.dtb \
qcs6125-iot-idp.dtb
endif
ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y)
@@ -443,7 +449,8 @@ ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y)
sdm660-rcm-internal-codec-overlay.dtbo \
sda660-mtp-external-codec-overlay.dtbo \
sda660-cdp-external-codec-overlay.dtbo \
sda660-rcm-external-codec-overlay.dtbo
sda660-rcm-external-codec-overlay.dtbo \
sdm660-usbc-audio-mtp-overlay.dtbo
sdm660-mtp-external-codec-overlay.dtbo-base := sdm660-pm660l.dtb
@@ -459,6 +466,8 @@ sdm660-rcm-external-codec-overlay.dtbo-base := sdm660-pm660l.dtb
sdm660-rcm-internal-codec-overlay.dtbo-base := sdm660-pm660l.dtb
sdm660-usbc-audio-mtp-overlay.dtbo-base := sdm660-pm660l.dtb
sda660-mtp-external-codec-overlay.dtbo-base := sda660-pm660l.dtb
sda660-cdp-external-codec-overlay.dtbo-base := sda660-pm660l.dtb

6
arch/arm64/boot/dts/qcom/atoll-idp.dtsi
View File

@@ -284,6 +284,12 @@
qcom,platform-reset-gpio = <&pm6150l_gpios 3 0>;
};
&dsi_sim_vid {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,platform-reset-gpio = <&pm6150l_gpios 3 0>;
};
&dsi_nt36672c_video {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";

6
arch/arm64/boot/dts/qcom/atoll-sde-display.dtsi
View File

@@ -293,6 +293,12 @@
<2 0 1>;
qcom,default-topology-index = <0>;
};
timing@1{
qcom,mdss-dsi-panel-phy-timings = [00 1c 07 07 23 21 07
07 05 02 04 00];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
};
};

45
arch/arm64/boot/dts/qcom/dsi-panel-sim-video.dtsi
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2012-2015, 2017, The Linux Foundation. All rights reserved.
/* Copyright (c) 2012-2015, 2017-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -22,6 +22,7 @@
qcom,mdss-dsi-panel-hdr-enabled;
qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000
17000 15500 30000 8000 3000>;
qcom,mdss-dsi-panel-mode-switch;
qcom,mdss-dsi-panel-peak-brightness = <4200000>;
qcom,mdss-dsi-panel-blackness-level = <3230>;
qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
@@ -37,9 +38,15 @@
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-reset-sequence = <1 0>, <0 0>, <1 0>;
qcom,panel-ack-disabled;
qcom,mdss-dsi-te-pin-select = <1>;
qcom,mdss-dsi-wr-mem-start = <0x2c>;
qcom,mdss-dsi-wr-mem-continue = <0x3c>;
qcom,mdss-dsi-te-dcs-command = <1>;
qcom,mdss-dsi-te-check-enable;
qcom,mdss-dsi-te-using-wd;
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-video-mode;
qcom,mdss-dsi-panel-width = <640>;
qcom,mdss-dsi-panel-height = <480>;
qcom,mdss-dsi-h-front-porch = <8>;
@@ -63,6 +70,40 @@
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
qcom,mdss-dsi-h-sync-pulse = <0>;
qcom,cmd-to-video-mode-post-switch-commands = [
32 01 00 00 00 00 02 00 00];
qcom,cmd-to-video-mode-post-switch-commands-state =
"dsi_lp_mode";
};
timing@1{
qcom,mdss-dsi-cmd-mode;
qcom,mdss-dsi-panel-width = <640>;
qcom,mdss-dsi-panel-height = <480>;
qcom,mdss-dsi-h-front-porch = <8>;
qcom,mdss-dsi-h-back-porch = <8>;
qcom,mdss-dsi-h-pulse-width = <8>;
qcom,mdss-dsi-h-sync-skew = <0>;
qcom,mdss-dsi-v-back-porch = <6>;
qcom,mdss-dsi-v-front-porch = <6>;
qcom,mdss-dsi-v-pulse-width = <2>;
qcom,mdss-dsi-h-left-border = <0>;
qcom,mdss-dsi-h-right-border = <0>;
qcom,mdss-dsi-v-top-border = <0>;
qcom,mdss-dsi-v-bottom-border = <0>;
qcom,mdss-dsi-panel-framerate = <60>;
qcom,mdss-dsi-panel-timings =
[00 00 00 00 00 00 00 00 00 00 00 00];
qcom,mdss-dsi-on-command =
[32 01 00 00 00 00 02 00 00];
qcom,mdss-dsi-off-command =
[22 01 00 00 00 00 02 00 00];
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
qcom,mdss-dsi-h-sync-pulse = <0>;
qcom,video-to-cmd-mode-post-switch-commands = [
32 01 00 00 00 00 02 00 00];
qcom,video-to-cmd-mode-post-switch-commands-state =
"dsi_lp_mode";
};
};
};

25
arch/arm64/boot/dts/qcom/qcm6125-iot-idp-overlay.dts Normal file
View File

@@ -0,0 +1,25 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/plugin/;
#include "qcm6125-iot-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCM6125 IOT IDP Overlay";
compatible = "qcom,qcm6125";
qcom,msm-id = <467 0x10000>;
qcom,board-id = <34 0>;
};

23
arch/arm64/boot/dts/qcom/qcm6125-iot-idp.dts Normal file
View File

@@ -0,0 +1,23 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "qcm6125.dtsi"
#include "qcm6125-iot-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCM6125 IOT IDP SoC";
compatible = "qcom,qcm6125";
qcom,board-id = <34 0>;
};

13
arch/arm64/boot/dts/qcom/qcm6125-iot-idp.dtsi Normal file
View File

@@ -0,0 +1,13 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "trinket-idp.dtsi"

22
arch/arm64/boot/dts/qcom/qcm6125.dts Normal file
View File

@@ -0,0 +1,22 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "qcm6125.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCM6125 IOT IDP SoC";
compatible = "qcom,qcm6125";
qcom,board-id = <0 0>;
};

21
arch/arm64/boot/dts/qcom/qcm6125.dtsi Normal file
View File

@@ -0,0 +1,21 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "trinket.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCM6125";
compatible = "qcom,qcm6125";
qcom,msm-id = <467 0x0>;
qcom,msm-name = "QCM6125";
};

1
arch/arm64/boot/dts/qcom/qcs410-iot.dtsi
View File

@@ -14,6 +14,7 @@
#include <dt-bindings/iio/qcom,spmi-vadc.h>
#include <dt-bindings/input/input.h>
#include "qcs410.dtsi"
#include "qcs610-camera-sensor-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS410 IOT";

4
arch/arm64/boot/dts/qcom/qcs610-iot-overlay.dts
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -18,7 +18,7 @@
#include "qcs610-iot.dtsi"
/ {
model = "IOT";
model = "Qualcomm Technologies, Inc. QCS610 IOT Overlay";
compatible = "qcom,qcs610-iot", "qcom,qcs610", "qcom,iot";
qcom,msm-id = <401 0x0>;
qcom,board-id = <32 0>;

8
arch/arm64/boot/dts/qcom/qcs610-iot.dts
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,7 +11,7 @@
*/
/dts-v1/;
#include "qcs610.dtsi"
#include "qcs610-iot.dtsi"
#include "sm6150-audio-overlay.dtsi"
@@ -20,7 +20,3 @@
compatible = "qcom,qcs610-iot", "qcom,qcs610", "qcom,iot";
qcom,board-id = <32 0>;
};
&sm6150_snd {
/delete-property/ fsa4480-i2c-handle;
};

23
arch/arm64/boot/dts/qcom/qcs610-iot.dtsi
View File

@@ -13,7 +13,14 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/iio/qcom,spmi-vadc.h>
#include <dt-bindings/input/input.h>
#include "qcs610.dtsi"
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,gcc-sm6150.h>
#include <dt-bindings/clock/qcom,camcc-sm6150.h>
#include <dt-bindings/clock/qcom,cpucc-sm8150.h>
#include <dt-bindings/clock/qcom,dispcc-sm6150.h>
#include <dt-bindings/clock/qcom,gpucc-sm6150.h>
#include "sm6150-sde.dtsi"
#include "sm6150-sde-pll.dtsi"
#include "sm6150-sde-display.dtsi"
@@ -25,6 +32,20 @@
qcom,board-id = <32 0>;
};
&soc {
qcom,rmnet-ipa {
status="disabled";
};
};
&ipa_hw {
status="disabled";
};
&sm6150_snd {
/delete-property/ fsa4480-i2c-handle;
};
&qupv3_se3_i2c {
status = "ok";
#include "smb1390.dtsi"

4
arch/arm64/boot/dts/qcom/qcs610-ipc-overlay.dts
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -18,7 +18,7 @@
#include "qcs610-ipc.dtsi"
/ {
model = "IOT";
model = "Qualcomm Technologies, Inc. QCS610 IOT IPC";
compatible = "qcom,qcs610-iot", "qcom,qcs610", "qcom,iot";
qcom,msm-id = <401 0x0>;
qcom,board-id = <32 1>;

4
arch/arm64/boot/dts/qcom/qcs610-ipc.dts
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,6 +12,8 @@
/dts-v1/;
#include "qcs610.dtsi"
#include "qcs610-iot.dtsi"
#include "qcs610-ipc.dtsi"
/ {

1
arch/arm64/boot/dts/qcom/qcs610-ipc.dtsi
View File

@@ -10,7 +10,6 @@
* GNU General Public License for more details.
*/
#include "qcs610-iot.dtsi"
#include "sm6150-audio-overlay.dtsi"
#include "sm6150-camera-sensor-idp.dtsi"
/ {

12
arch/arm64/boot/dts/qcom/qcs610.dtsi
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -17,13 +17,3 @@
qcom,msm-name = "QCS610";
qcom,msm-id = <401 0>;
};
&soc {
qcom,rmnet-ipa {
status="disabled";
};
};
&ipa_hw {
status="disabled";
};

25
arch/arm64/boot/dts/qcom/qcs6125-iot-idp-overlay.dts Normal file
View File

@@ -0,0 +1,25 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/plugin/;
#include "qcs6125-iot-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS6125 IOT IDP Overlay";
compatible = "qcom,qcs6125";
qcom,msm-id = <468 0x10000>;
qcom,board-id = <34 0>;
};

23
arch/arm64/boot/dts/qcom/qcs6125-iot-idp.dts Normal file
View File

@@ -0,0 +1,23 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "qcs6125.dtsi"
#include "qcs6125-iot-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS6125 IOT IDP SoC";
compatible = "qcom,qcs6125";
qcom,board-id = <34 0>;
};

13
arch/arm64/boot/dts/qcom/qcs6125-iot-idp.dtsi Normal file
View File

@@ -0,0 +1,13 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "trinket-idp.dtsi"

22
arch/arm64/boot/dts/qcom/qcs6125.dts Normal file
View File

@@ -0,0 +1,22 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "qcs6125.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS6125 SoC";
compatible = "qcom,qcs6125";
qcom,board-id = <0 0>;
};

21
arch/arm64/boot/dts/qcom/qcs6125.dtsi Normal file
View File

@@ -0,0 +1,21 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "trinket.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS6125";
compatible = "qcom,qcs6125";
qcom,msm-id = <468 0x0>;
qcom,msm-name = "QCS6125";
};

5
arch/arm64/boot/dts/qcom/sa515m-ccard-pcie-ep.dts
View File

@@ -71,3 +71,8 @@
&usb {
qcom,smmu-s1-bypass;
};
&sdx_ext_ipc {
qcom,default-policy-nop;
status = "okay";
};

1
arch/arm64/boot/dts/qcom/sa6155-display.dtsi
View File

@@ -49,6 +49,7 @@
vdda-1p2-supply = <&pm6155_1_l11>;
vdda-0p9-supply = <&pm6155_1_l5>;
/delete-property/ qcom,dp-aux-switch;
/delete-property/ pinctrl-names;
qcom,mst-enable;
qcom,dp-aux-bridge-sim = <&sde_dp_mst_sim>;

1
arch/arm64/boot/dts/qcom/sa8155-vm-la.dtsi
View File

@@ -107,6 +107,7 @@
qcom,smmu-fast-map;
qcom,use-ipa-pm;
qcom,bandwidth-vote-for-ipa;
qcom,manual-fw-load;
qcom,msm-bus,name = "ipa";
qcom,msm-bus,num-cases = <5>;
qcom,msm-bus,num-paths = <4>;

60
arch/arm64/boot/dts/qcom/sa8195-vm.dtsi
View File

@@ -764,6 +764,66 @@
clocks = <&clock_virt GCC_PRNG_AHB_CLK>;
clock-names = "iface_clk";
};
tcsr_compute_signal_glb: syscon@0x1fd8000 {
compatible = "syscon";
reg = <0x1fd8000 0x1000>;
};
tcsr_compute_signal_sender0: syscon@0x1fd9000 {
compatible = "syscon";
reg = <0x1fd9000 0x1000>;
};
tcsr_compute_signal_sender1: syscon@0x1fdd000 {
compatible = "syscon";
reg = <0x1fdd000 0x1000>;
};
tcsr_compute_signal_receiver0: syscon@0x1fdb000 {
compatible = "syscon";
reg = <0x1fdb000 0x1000>;
};
tcsr_compute_signal_receiver1: syscon@0x1fdf000 {
compatible = "syscon";
reg = <0x1fdf000 0x1000>;
};
hgsl_tcsr_sender0: hgsl_tcsr_sender0 {
compatible = "qcom,hgsl-tcsr-sender";
syscon = <&tcsr_compute_signal_sender0>;
syscon-glb = <&tcsr_compute_signal_glb>;
};
hgsl_tcsr_sender1: hgsl_tcsr_sender1 {
compatible = "qcom,hgsl-tcsr-sender";
syscon = <&tcsr_compute_signal_sender1>;
syscon-glb = <&tcsr_compute_signal_glb>;
};
hgsl_tcsr_receiver0: hgsl_tcsr_receiver0 {
compatible = "qcom,hgsl-tcsr-receiver";
syscon = <&tcsr_compute_signal_receiver0>;
interrupts = <0 238 0>;
};
hgsl_tcsr_receiver1: hgsl_tcsr_receiver1 {
compatible = "qcom,hgsl-tcsr-receiver";
syscon = <&tcsr_compute_signal_receiver1>;
interrupts = <0 239 0>;
};
msm_gpu_hyp: qcom,hgsl@0x2c00000 {
compatible = "qcom,hgsl";
reg = <0x2c00000 0x8>, <0x2c8f000 0x4>;
reg-names = "hgsl_reg_hwinf", "hgsl_reg_gmucx";
qcom,glb-db-senders = <&hgsl_tcsr_sender0
&hgsl_tcsr_sender1>;
qcom,glb-db-receivers = <&hgsl_tcsr_receiver0
&hgsl_tcsr_receiver1>;
};
};
#include "sdmshrike-pinctrl.dtsi"

29
arch/arm64/boot/dts/qcom/sdm660-usbc-audio-mtp-overlay.dts Normal file
View File

@@ -0,0 +1,29 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/qcom,mmcc-sdm660.h>
#include "sdm660-mtp.dtsi"
#include "sdm660-external-codec.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDM 660 Ext. USBC Audio Codec MTP";
compatible = "qcom,sdm660-mtp", "qcom,sdm660", "qcom,mtp";
qcom,board-id = <8 2>;
};
&tavil_snd {
qcom,msm-mbhc-usbc-audio-supported = <1>;
qcom,msm-mbhc-moist-cfg = <0>, <0>, <3>;
};

67
drivers/char/adsprpc.c
View File

@@ -706,12 +706,23 @@ static void fastrpc_mmap_free(struct fastrpc_mmap *map, uint32_t flags)
{
struct fastrpc_apps *me = &gfa;
struct fastrpc_file *fl;
int vmid;
int vmid, cid = -1, err = 0;
struct fastrpc_session_ctx *sess;
if (!map)
return;
fl = map->fl;
if (fl && !(map->flags == ADSP_MMAP_HEAP_ADDR ||
map->flags == ADSP_MMAP_REMOTE_HEAP_ADDR)) {
cid = fl->cid;
VERIFY(err, cid >= ADSP_DOMAIN_ID && cid < NUM_CHANNELS);
if (err) {
err = -ECHRNG;
pr_err("adsprpc: ERROR:%s, Invalid channel id: %d, err:%d",
__func__, cid, err);
return;
}
}
if (map->flags == ADSP_MMAP_HEAP_ADDR ||
map->flags == ADSP_MMAP_REMOTE_HEAP_ADDR) {
map->refs--;
@@ -783,20 +794,21 @@ static int fastrpc_mmap_create(struct fastrpc_file *fl, int fd,
struct fastrpc_apps *me = &gfa;
struct fastrpc_session_ctx *sess;
struct fastrpc_apps *apps = fl->apps;
int cid = fl->cid;
struct fastrpc_channel_ctx *chan = NULL;
struct fastrpc_mmap *map = NULL;
dma_addr_t region_phys = 0;
void *region_vaddr = NULL;
unsigned long flags;
int err = 0, vmid, sgl_index = 0;
int err = 0, vmid, sgl_index = 0, cid = -1;
struct scatterlist *sgl = NULL;
VERIFY(err, cid >= 0 && cid < NUM_CHANNELS);
if (err)
cid = fl->cid;
VERIFY(err, cid >= ADSP_DOMAIN_ID && cid < NUM_CHANNELS);
if (err) {
err = -ECHRNG;
goto bail;
}
chan = &apps->channel[cid];
if (!fastrpc_mmap_find(fl, fd, va, len, mflags, 1, ppmap))
return 0;
map = kzalloc(sizeof(*map), GFP_KERNEL);
@@ -1829,8 +1841,16 @@ static int fastrpc_invoke_send(struct smq_invoke_ctx *ctx,
{
struct smq_msg *msg = &ctx->msg;
struct fastrpc_file *fl = ctx->fl;
struct fastrpc_channel_ctx *channel_ctx = &fl->apps->channel[fl->cid];
int err = 0;
struct fastrpc_channel_ctx *channel_ctx = NULL;
int err = 0, cid = -1;
channel_ctx = &fl->apps->channel[fl->cid];
cid = fl->cid;
VERIFY(err, cid >= ADSP_DOMAIN_ID && cid < NUM_CHANNELS);
if (err) {
err = -ECHRNG;
goto bail;
}
mutex_lock(&channel_ctx->smd_mutex);
msg->pid = fl->tgid;
@@ -1895,11 +1915,22 @@ static int fastrpc_internal_invoke(struct fastrpc_file *fl, uint32_t mode,
{
struct smq_invoke_ctx *ctx = NULL;
struct fastrpc_ioctl_invoke *invoke = &inv->inv;
int cid = fl->cid;
int interrupted = 0;
int err = 0;
int err = 0, cid = -1, interrupted = 0;
struct timespec invoket = {0};
int64_t *perf_counter = getperfcounter(fl, PERF_COUNT);
int64_t *perf_counter = NULL;
cid = fl->cid;
VERIFY(err, cid >= ADSP_DOMAIN_ID && cid < NUM_CHANNELS);
if (err) {
err = -ECHRNG;
goto bail;
}
VERIFY(err, fl->sctx != NULL);
if (err) {
err = -EBADR;
goto bail;
}
perf_counter = getperfcounter(fl, PERF_COUNT);
if (fl->profile)
getnstimeofday(&invoket);
@@ -1913,14 +1944,6 @@ static int fastrpc_internal_invoke(struct fastrpc_file *fl, uint32_t mode,
}
}
VERIFY(err, fl->cid >= 0 && fl->cid < NUM_CHANNELS && fl->sctx != NULL);
if (err) {
pr_err("adsprpc: ERROR: %s: user application %s domain is not set\n",
__func__, current->comm);
err = -EBADR;
goto bail;
}
if (!kernel) {
VERIFY(err, 0 == context_restore_interrupted(fl, inv,
&ctx));
@@ -3238,8 +3261,7 @@ static const struct file_operations debugfs_fops = {
static int fastrpc_channel_open(struct fastrpc_file *fl)
{
struct fastrpc_apps *me = &gfa;
int cid, err = 0;
int cid = -1, err = 0;
VERIFY(err, fl && fl->sctx && fl->cid >= 0 && fl->cid < NUM_CHANNELS);
if (err) {
@@ -3249,7 +3271,6 @@ static int fastrpc_channel_open(struct fastrpc_file *fl)
return err;
}
cid = fl->cid;
mutex_lock(&me->channel[cid].rpmsg_mutex);
VERIFY(err, NULL != me->channel[cid].rpdev);
if (err) {

2
drivers/clk/qcom/gcc-sm6150.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and

2
drivers/clk/qcom/gcc-sm8150.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and

2
drivers/clk/qcom/gpucc-sm6150.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and

2
drivers/clk/qcom/npucc-sm8150.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and

2
drivers/clk/qcom/videocc-sm6150.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and

2
drivers/clk/qcom/videocc-sm8150.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and

37
drivers/firmware/qcom/tz_log.c
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2011-2020, The Linux Foundation. All rights reserved.
/* Copyright (c) 2011-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -25,7 +25,6 @@
#include <linux/of.h>
#include <linux/dma-buf.h>
#include <linux/ion_kernel.h>
#include <linux/pm.h>
#include <soc/qcom/scm.h>
#include <soc/qcom/qseecomi.h>
@@ -1130,6 +1129,7 @@ static int tz_log_probe(struct platform_device *pdev)
return 0;
}
static int tz_log_remove(struct platform_device *pdev)
{
kzfree(tzdbg.diag_buf);
@@ -1140,38 +1140,6 @@ static int tz_log_remove(struct platform_device *pdev)
return 0;
}
#ifdef CONFIG_PM
static int tz_log_freeze(struct device *dev)
{
dma_free_coherent(dev, QSEE_LOG_BUF_SIZE, (void *)g_qsee_log,
coh_pmem);
return 0;
}
static int tz_log_restore(struct device *dev)
{
/* Register the log bugger at TZ during hibernation resume.
* After hibernation the log buffer is with HLOS as TZ encountered
* a coldboot sequence.
*/
tzdbg_register_qsee_log_buf(to_platform_device(dev));
return 0;
}
static const struct dev_pm_ops tz_log_pmops = {
.freeze = tz_log_freeze,
.restore = tz_log_restore,
.thaw = tz_log_restore,
};
#define TZ_LOG_PMOPS (&tz_log_pmops)
#else
#define TZ_LOG_PMOPS NULL
#endif
static const struct of_device_id tzlog_match[] = {
{ .compatible = "qcom,tz-log",
},
@@ -1186,7 +1154,6 @@ static struct platform_driver tz_log_driver = {
.owner = THIS_MODULE,
.of_match_table = tzlog_match,
.probe_type = PROBE_PREFER_ASYNCHRONOUS,
.pm = TZ_LOG_PMOPS,
},
};

3
drivers/gpu/drm/bridge/analogix-anx7625.c
View File

@@ -1221,6 +1221,9 @@ static int anx7625_bridge_attach(struct drm_bridge *bridge)
return err;
}
device_link_add(bridge->dev->dev, &anx7625->client->dev,
DL_FLAG_PM_RUNTIME);
return 0;
}

3
drivers/i2c/busses/i2c-qcom-geni.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1168,7 +1168,6 @@ static const struct dev_pm_ops geni_i2c_pm_ops = {
.runtime_resume = geni_i2c_runtime_resume,
.freeze = geni_i2c_suspend_noirq,
.restore = geni_i2c_hib_resume_noirq,
.thaw = geni_i2c_hib_resume_noirq,
};
static void ssr_i2c_force_suspend(struct device *dev)

3
drivers/iio/adc/qcom-spmi-adc5.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1138,7 +1138,6 @@ static int adc_freeze(struct device *dev)
static const struct dev_pm_ops adc_pm_ops = {
.freeze = adc_freeze,
.restore = adc_restore,
.thaw = adc_restore,
};
static struct platform_driver adc_driver = {

3
drivers/input/misc/qpnp-power-on.c
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
/* Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -2513,7 +2513,6 @@ static int qpnp_pon_freeze(struct device *dev)
static const struct dev_pm_ops qpnp_pon_pm_ops = {
.freeze = qpnp_pon_freeze,
.restore = qpnp_pon_restore,
.thaw = qpnp_pon_restore,
};
#endif

23
drivers/iommu/arm-smmu.c
View File

@@ -320,7 +320,9 @@ struct arm_smmu_device {
struct arm_smmu_arch_ops *arch_ops;
void *archdata;
#ifdef CONFIG_HIBERNATION
bool smmu_restore;
#endif
enum tz_smmu_device_id sec_id;
};
@@ -1916,7 +1918,9 @@ static void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx,
struct arm_smmu_cb *cb = &smmu->cbs[idx];
struct arm_smmu_cfg *cfg = cb->cfg;
void __iomem *cb_base, *gr1_base;
#ifdef CONFIG_HIBERNATION
struct arm_smmu_domain *smmu_domain;
#endif
cb_base = ARM_SMMU_CB(smmu, idx);
@@ -1994,10 +1998,12 @@ static void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx,
/* Ensure bypass transactions are Non-shareable */
reg |= SCTLR_SHCFG_NSH << SCTLR_SHCFG_SHIFT;
#ifdef CONFIG_HIBERNATION
if (smmu->smmu_restore) {
smmu_domain = container_of(cfg, struct arm_smmu_domain, cfg);
attributes = smmu_domain->attributes;
}
#endif
if (attributes & (1 << DOMAIN_ATTR_CB_STALL_DISABLE)) {
reg &= ~SCTLR_CFCFG;
reg |= SCTLR_HUPCF;
@@ -4254,7 +4260,7 @@ static void arm_smmu_device_reset(struct arm_smmu_device *smmu)
* invalid and all S2CRn as bypass unless overridden.
*/
if (!(smmu->options & ARM_SMMU_OPT_SKIP_INIT) ||
(IS_ENABLED(CONFIG_HIBERNATION) && smmu->smmu_restore)) {
IS_ENABLED(CONFIG_HIBERNATION)) {
for (i = 0; i < smmu->num_mapping_groups; ++i)
arm_smmu_write_sme(smmu, i);
@@ -5192,6 +5198,11 @@ static int __maybe_unused arm_smmu_pm_resume(struct device *dev)
arm_smmu_device_reset(smmu);
arm_smmu_power_off(smmu->pwr);
#ifdef CONFIG_HIBERNATION
smmu->smmu_restore = false;
#endif
return 0;
}
@@ -5201,7 +5212,7 @@ static int __maybe_unused arm_smmu_pm_restore_early(struct device *dev)
struct arm_smmu_domain *smmu_domain;
struct io_pgtable_ops *pgtbl_ops;
struct arm_smmu_cb *cb;
int idx, ret;
int idx;
/* restore the secure pools */
for (idx = 0; idx < smmu->num_context_banks; idx++) {
@@ -5228,10 +5239,10 @@ static int __maybe_unused arm_smmu_pm_restore_early(struct device *dev)
arm_smmu_init_context_bank(smmu_domain,
&smmu_domain->pgtbl_cfg);
}
#ifdef CONFIG_HIBERNATION
smmu->smmu_restore = true;
ret = arm_smmu_pm_resume(dev);
smmu->smmu_restore = false;
return ret;
#endif
return arm_smmu_pm_resume(dev);
}
static int __maybe_unused arm_smmu_pm_freeze_late(struct device *dev)
@@ -5268,7 +5279,7 @@ static int __maybe_unused arm_smmu_pm_freeze_late(struct device *dev)
static const struct dev_pm_ops arm_smmu_pm_ops = {
.resume = arm_smmu_pm_resume,
.thaw_early = arm_smmu_pm_restore_early,
.thaw_early = arm_smmu_pm_resume,
.freeze_late = arm_smmu_pm_freeze_late,
.restore_early = arm_smmu_pm_restore_early,
};

112
drivers/media/platform/msm/ais/ais_isp/csid_hw/ais_ife_csid_core.c
View File

@@ -1075,6 +1075,49 @@ static int ais_ife_csid_force_reset(void *hw_priv,
return rc;
}
static int ais_ife_csid_reset_retain_sw_reg(
struct ais_ife_csid_hw *csid_hw)
{
int rc = 0;
uint32_t status;
const struct ais_ife_csid_reg_offset *csid_reg =
csid_hw->csid_info->csid_reg;
struct cam_hw_soc_info *soc_info;
soc_info = &csid_hw->hw_info->soc_info;
/* clear the top interrupt first */
cam_io_w_mb(1, soc_info->reg_map[0].mem_base +
csid_reg->cmn_reg->csid_top_irq_clear_addr);
cam_io_w_mb(1, soc_info->reg_map[0].mem_base +
csid_reg->cmn_reg->csid_irq_cmd_addr);
usleep_range(3000, 3010);
cam_io_w_mb(csid_reg->cmn_reg->csid_rst_stb,
soc_info->reg_map[0].mem_base +
csid_reg->cmn_reg->csid_rst_strobes_addr);
rc = readl_poll_timeout(soc_info->reg_map[0].mem_base +
csid_reg->cmn_reg->csid_top_irq_status_addr,
status, (status & 0x1) == 0x1,
AIS_IFE_CSID_TIMEOUT_SLEEP_US, AIS_IFE_CSID_TIMEOUT_ALL_US);
if (rc < 0) {
CAM_ERR(CAM_ISP, "CSID:%d csid_reset fail rc = %d",
csid_hw->hw_intf->hw_idx, rc);
rc = -ETIMEDOUT;
} else {
CAM_DBG(CAM_ISP, "CSID:%d hw reset completed %d",
csid_hw->hw_intf->hw_idx, rc);
rc = 0;
}
cam_io_w_mb(1, soc_info->reg_map[0].mem_base +
csid_reg->cmn_reg->csid_top_irq_clear_addr);
cam_io_w_mb(1, soc_info->reg_map[0].mem_base +
csid_reg->cmn_reg->csid_irq_cmd_addr);
return rc;
}
static int ais_ife_csid_reserve(void *hw_priv,
void *reserve_args, uint32_t arg_size)
{
@@ -1083,6 +1126,7 @@ static int ais_ife_csid_reserve(void *hw_priv,
struct cam_hw_info *csid_hw_info;
struct ais_ife_rdi_init_args *rdi_cfg;
const struct ais_ife_csid_reg_offset *csid_reg;
unsigned long flags;
if (!hw_priv || !reserve_args ||
(arg_size != sizeof(struct ais_ife_rdi_init_args))) {
@@ -1120,6 +1164,19 @@ static int ais_ife_csid_reserve(void *hw_priv,
if (rc)
goto end;
if (csid_hw->device_enabled == 0) {
rc = ais_ife_csid_reset_retain_sw_reg(csid_hw);
if (rc < 0) {
CAM_ERR(CAM_ISP, "CSID: Failed in SW reset");
goto disable_csi2;
} else {
CAM_DBG(CAM_ISP, "CSID: SW reset Successful");
spin_lock_irqsave(&csid_hw->lock_state, flags);
csid_hw->device_enabled = 1;
spin_unlock_irqrestore(&csid_hw->lock_state, flags);
}
}
rc = ais_ife_csid_config_rdi_path(csid_hw, rdi_cfg);
if (rc)
goto disable_csi2;
@@ -1185,57 +1242,12 @@ end:
return rc;
}
static int ais_ife_csid_reset_retain_sw_reg(
struct ais_ife_csid_hw *csid_hw)
{
int rc = 0;
uint32_t status;
const struct ais_ife_csid_reg_offset *csid_reg =
csid_hw->csid_info->csid_reg;
struct cam_hw_soc_info *soc_info;
soc_info = &csid_hw->hw_info->soc_info;
/* clear the top interrupt first */
cam_io_w_mb(1, soc_info->reg_map[0].mem_base +
csid_reg->cmn_reg->csid_top_irq_clear_addr);
cam_io_w_mb(1, soc_info->reg_map[0].mem_base +
csid_reg->cmn_reg->csid_irq_cmd_addr);
usleep_range(3000, 3010);
cam_io_w_mb(csid_reg->cmn_reg->csid_rst_stb,
soc_info->reg_map[0].mem_base +
csid_reg->cmn_reg->csid_rst_strobes_addr);
rc = readl_poll_timeout(soc_info->reg_map[0].mem_base +
csid_reg->cmn_reg->csid_top_irq_status_addr,
status, (status & 0x1) == 0x1,
AIS_IFE_CSID_TIMEOUT_SLEEP_US, AIS_IFE_CSID_TIMEOUT_ALL_US);
if (rc < 0) {
CAM_ERR(CAM_ISP, "CSID:%d csid_reset fail rc = %d",
csid_hw->hw_intf->hw_idx, rc);
rc = -ETIMEDOUT;
} else {
CAM_DBG(CAM_ISP, "CSID:%d hw reset completed %d",
csid_hw->hw_intf->hw_idx, rc);
rc = 0;
}
cam_io_w_mb(1, soc_info->reg_map[0].mem_base +
csid_reg->cmn_reg->csid_top_irq_clear_addr);
cam_io_w_mb(1, soc_info->reg_map[0].mem_base +
csid_reg->cmn_reg->csid_irq_cmd_addr);
return rc;
}
static int ais_ife_csid_init_hw(void *hw_priv,
void *init_args, uint32_t arg_size)
{
int rc = 0;
struct ais_ife_csid_hw *csid_hw;
struct cam_hw_info *csid_hw_info;
unsigned long flags;
if (!hw_priv || !init_args ||
(arg_size != sizeof(struct ais_ife_rdi_init_args))) {
@@ -1251,16 +1263,6 @@ static int ais_ife_csid_init_hw(void *hw_priv,
/* Initialize the csid hardware */
rc = ais_ife_csid_enable_hw(csid_hw);
if (csid_hw->device_enabled == 0) {
rc = ais_ife_csid_reset_retain_sw_reg(csid_hw);
if (rc < 0)
CAM_ERR(CAM_ISP, "CSID: Failed in SW reset");
}
spin_lock_irqsave(&csid_hw->lock_state, flags);
csid_hw->device_enabled = 1;
spin_unlock_irqrestore(&csid_hw->lock_state, flags);
mutex_unlock(&csid_hw->hw_info->hw_mutex);
CAM_DBG(CAM_ISP, "Exit (%d)", rc);

59
drivers/media/platform/msm/ais/cam_req_mgr/cam_req_mgr_dev.c
View File

@@ -745,6 +745,64 @@ static const struct of_device_id cam_req_mgr_dt_match[] = {
};
MODULE_DEVICE_TABLE(of, cam_dt_match);
static int cam_pm_suspend(struct device *pdev)
{
struct v4l2_event event;
event.id = V4L_EVENT_CAM_REQ_MGR_S2R_SUSPEND;
event.type = V4L_EVENT_CAM_REQ_MGR_EVENT;
CAM_DBG(CAM_CRM, "Queue S2R suspend event");
v4l2_event_queue(g_dev.video, &event);
return 0;
}
static int cam_pm_resume(struct device *pdev)
{
struct v4l2_event event;
event.id = V4L_EVENT_CAM_REQ_MGR_S2R_RESUME;
event.type = V4L_EVENT_CAM_REQ_MGR_EVENT;
CAM_DBG(CAM_CRM, "Queue S2R resume event");
v4l2_event_queue(g_dev.video, &event);
return 0;
}
static int cam_pm_freeze(struct device *pdev)
{
CAM_DBG(CAM_CRM, "Freeze done for cam_req_mgr driver");
return 0;
}
static int cam_pm_restore(struct device *pdev)
{
struct v4l2_event event;
event.id = V4L_EVENT_CAM_REQ_MGR_HIBERNATION_RESUME;
event.type = V4L_EVENT_CAM_REQ_MGR_EVENT;
CAM_DBG(CAM_CRM, "Queue hibernation restore event");
v4l2_event_queue(g_dev.video, &event);
return 0;
}
static int cam_pm_thaw(struct device *pdev)
{
struct v4l2_event event;
event.id = V4L_EVENT_CAM_REQ_MGR_HIBERNATION_SUSPEND;
event.type = V4L_EVENT_CAM_REQ_MGR_EVENT;
CAM_DBG(CAM_CRM, "Queue hibernation thaw event");
v4l2_event_queue(g_dev.video, &event);
return 0;
}
static const struct dev_pm_ops cam_pm_ops = {
.suspend = &cam_pm_suspend,
.resume = &cam_pm_resume,
.freeze = &cam_pm_freeze,
.restore = &cam_pm_restore,
.thaw = &cam_pm_thaw,
};
static struct platform_driver cam_req_mgr_driver = {
.probe = cam_req_mgr_probe,
.remove = cam_req_mgr_remove,
@@ -753,6 +811,7 @@ static struct platform_driver cam_req_mgr_driver = {
.owner = THIS_MODULE,
.of_match_table = cam_req_mgr_dt_match,
.suppress_bind_attrs = true,
.pm = &cam_pm_ops,
},
};

58
drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c
View File

@@ -596,8 +596,14 @@ static int __cam_isp_ctx_handle_buf_done_in_activated_state(
if (ctx_isp->frame_id == 1)
ctx_isp->irq_timestamps = done->irq_mono_boot_time;
else if (ctx_isp->fps && ((done->irq_mono_boot_time -
ctx_isp->irq_timestamps) > ((1000*1000)/ctx_isp->fps)))
ctx_isp->irq_timestamps) > ((1000*1000)/ctx_isp->fps))) {
ctx_isp->irq_delay_detect = true;
trace_cam_isp_irq_delay_detect("IRQ delay at buf_done",
ctx, req->request_id,
ctx_isp->substate_activated,
(done->irq_mono_boot_time -
ctx_isp->irq_timestamps));
}
ctx_isp->irq_timestamps = done->irq_mono_boot_time;
@@ -875,8 +881,14 @@ static int __cam_isp_ctx_reg_upd_in_epoch_state(
if (ctx_isp->frame_id == 1)
ctx_isp->irq_timestamps = rup_event_data->irq_mono_boot_time;
else if (ctx_isp->fps && ((rup_event_data->irq_mono_boot_time -
ctx_isp->irq_timestamps) > ((1000*1000)/ctx_isp->fps)))
ctx_isp->irq_timestamps) > ((1000*1000)/ctx_isp->fps))) {
ctx_isp->irq_delay_detect = true;
trace_cam_isp_irq_delay_detect("IRQ delay at reg_upd",
ctx, req->request_id,
ctx_isp->substate_activated,
(rup_event_data->irq_mono_boot_time -
ctx_isp->irq_timestamps));
}
ctx_isp->irq_timestamps = rup_event_data->irq_mono_boot_time;
return 0;
@@ -930,8 +942,14 @@ static int __cam_isp_ctx_reg_upd_in_activated_state(
if (ctx_isp->frame_id == 1)
ctx_isp->irq_timestamps = rup_event_data->irq_mono_boot_time;
else if (ctx_isp->fps && ((rup_event_data->irq_mono_boot_time -
ctx_isp->irq_timestamps) > ((1000*1000)/ctx_isp->fps)))
ctx_isp->irq_timestamps) > ((1000*1000)/ctx_isp->fps))) {
ctx_isp->irq_delay_detect = true;
trace_cam_isp_irq_delay_detect("IRQ delay at reg_upd",
ctx, req->request_id,
ctx_isp->substate_activated,
(rup_event_data->irq_mono_boot_time -
ctx_isp->irq_timestamps));
}
ctx_isp->irq_timestamps = rup_event_data->irq_mono_boot_time;
end:
@@ -1115,8 +1133,14 @@ static int __cam_isp_ctx_sof_in_activated_state(
if (ctx_isp->frame_id == 1)
ctx_isp->irq_timestamps = sof_event_data->irq_mono_boot_time;
else if (ctx_isp->fps && ((sof_event_data->irq_mono_boot_time -
ctx_isp->irq_timestamps) > ((1000*1000)/ctx_isp->fps)))
ctx_isp->irq_timestamps) > ((1000*1000)/ctx_isp->fps))) {
ctx_isp->irq_delay_detect = true;
trace_cam_isp_irq_delay_detect("IRQ delay at sof",
ctx, req->request_id,
ctx_isp->substate_activated,
(sof_event_data->irq_mono_boot_time -
ctx_isp->irq_timestamps));
}
ctx_isp->irq_timestamps = sof_event_data->irq_mono_boot_time;
@@ -1162,8 +1186,14 @@ static int __cam_isp_ctx_reg_upd_in_sof(struct cam_isp_context *ctx_isp,
if (ctx_isp->frame_id == 1)
ctx_isp->irq_timestamps = rup_event_data->irq_mono_boot_time;
else if (ctx_isp->fps && ((rup_event_data->irq_mono_boot_time -
ctx_isp->irq_timestamps) > ((1000*1000)/ctx_isp->fps)))
ctx_isp->irq_timestamps) > ((1000*1000)/ctx_isp->fps))) {
ctx_isp->irq_delay_detect = true;
trace_cam_isp_irq_delay_detect("IRQ delay at reg_upd",
ctx, req->request_id,
ctx_isp->substate_activated,
(rup_event_data->irq_mono_boot_time -
ctx_isp->irq_timestamps));
}
ctx_isp->irq_timestamps = rup_event_data->irq_mono_boot_time;
end:
@@ -1252,8 +1282,14 @@ end:
ctx_isp->irq_timestamps =
epoch_hw_event_data->irq_mono_boot_time;
else if (ctx_isp->fps && ((epoch_hw_event_data->irq_mono_boot_time -
ctx_isp->irq_timestamps) > ((1000*1000)/ctx_isp->fps)))
ctx_isp->irq_timestamps) > ((1000*1000)/ctx_isp->fps))) {
ctx_isp->irq_delay_detect = true;
trace_cam_isp_irq_delay_detect("IRQ delay at epoch",
ctx, req->request_id,
ctx_isp->substate_activated,
(epoch_hw_event_data->irq_mono_boot_time -
ctx_isp->irq_timestamps));
}
ctx_isp->irq_timestamps = epoch_hw_event_data->irq_mono_boot_time;
@@ -1292,8 +1328,14 @@ static int __cam_isp_ctx_sof_in_epoch(struct cam_isp_context *ctx_isp,
if (ctx_isp->frame_id == 1)
ctx_isp->irq_timestamps = sof_event_data->irq_mono_boot_time;
else if (ctx_isp->fps && ((sof_event_data->irq_mono_boot_time -
ctx_isp->irq_timestamps) > ((1000*1000)/ctx_isp->fps)))
ctx_isp->irq_timestamps) > ((1000*1000)/ctx_isp->fps))) {
ctx_isp->irq_delay_detect = true;
trace_cam_isp_irq_delay_detect("IRQ delay at sof",
ctx, 0,
ctx_isp->substate_activated,
(sof_event_data->irq_mono_boot_time -
ctx_isp->irq_timestamps));
}
ctx_isp->irq_timestamps = sof_event_data->irq_mono_boot_time;
@@ -2112,7 +2154,7 @@ static int __cam_isp_ctx_apply_req_in_activated_state(
req->request_id, ctx_isp->substate_activated, ctx->ctx_id);
req_isp = (struct cam_isp_ctx_req *) req->req_priv;
if (ctx_isp->active_req_cnt >= 2) {
if (ctx_isp->active_req_cnt >= 4) {
CAM_ERR_RATE_LIMIT(CAM_ISP,
"Reject apply request (id %lld) due to congestion(cnt = %d) ctx %u",
req->request_id,

26
drivers/media/platform/msm/camera/cam_sensor_module/cam_csiphy/cam_csiphy_core.c
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -51,6 +51,12 @@ static int cam_csiphy_notify_secure_mode(struct csiphy_device *csiphy_dev,
return -EINVAL;
}
CAM_INFO(CAM_CSIPHY, "PHY : %d offset: %d SEC: %d Mask: %d",
csiphy_dev->soc_info.index,
offset,
protect,
csiphy_dev->csiphy_cpas_cp_reg_mask[offset]);
return 0;
}
@@ -837,6 +843,7 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
}
break;
case CAM_RELEASE_DEV: {
int32_t offset;
struct cam_release_dev_cmd release;
if (!csiphy_dev->acquire_count) {
@@ -852,6 +859,23 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
goto release_mutex;
}
offset = cam_csiphy_get_instance_offset(csiphy_dev,
release.dev_handle);
if (offset < 0 || offset >= CSIPHY_MAX_INSTANCES) {
CAM_ERR(CAM_CSIPHY, "Invalid offset");
goto release_mutex;
}
if (csiphy_dev->csiphy_info.secure_mode[offset])
cam_csiphy_notify_secure_mode(
csiphy_dev,
CAM_SECURE_MODE_NON_SECURE, offset);
csiphy_dev->csiphy_info.secure_mode[offset] =
CAM_SECURE_MODE_NON_SECURE;
csiphy_dev->csiphy_cpas_cp_reg_mask[offset] = 0x0;
rc = cam_destroy_device_hdl(release.dev_handle);
if (rc < 0)
CAM_ERR(CAM_CSIPHY, "destroying the device hdl");

30
drivers/media/platform/msm/camera/cam_utils/cam_trace.h
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
/* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -286,6 +286,34 @@ TRACE_EVENT(cam_irq_handled,
)
);
TRACE_EVENT(cam_isp_irq_delay_detect,
TP_PROTO(const char *text, struct cam_context *ctx,
uint64_t request_id, uint32_t substate,
uint64_t timestamp),
TP_ARGS(text, ctx, request_id, substate, timestamp),
TP_STRUCT__entry(
__string(text, text)
__field(uint32_t, ctx_id)
__field(uint64_t, dev_id)
__field(uint64_t, req_id)
__field(uint32_t, substate)
__field(uint64_t, ts)
),
TP_fast_assign(
__assign_str(text, text);
__entry->ctx_id = ctx->ctx_id;
__entry->dev_id = ctx->dev_id;
__entry->req_id = request_id;
__entry->substate = substate;
__entry->ts = timestamp;
),
TP_printk(
"ISP: %s ctx=%u dev_id=%u req_id=%lld substate=%u event=%u delay_by=%llu",
__get_str(text), __entry->ctx_id, __entry->dev_id,
__entry->req_id, __entry->substate, __entry->ts
)
);
TRACE_EVENT(cam_cdm_cb,
TP_PROTO(const char *entity, uint32_t status),
TP_ARGS(entity, status),

17
drivers/media/platform/msm/vidc/msm_vidc_clocks.c
View File

@@ -1441,7 +1441,11 @@ static inline int msm_vidc_power_save_mode_enable(struct msm_vidc_inst *inst,
struct hfi_device *hdev = NULL;
enum hal_perf_mode venc_mode;
u32 rc_mode = 0;
u32 hq_mbs_per_sec = 0;
struct msm_vidc_core *core;
struct msm_vidc_inst *instance = NULL;
core = inst->core;
hdev = inst->core->device;
if (inst->session_type != MSM_VIDC_ENCODER) {
dprintk(VIDC_DBG,
@@ -1456,6 +1460,19 @@ static inline int msm_vidc_power_save_mode_enable(struct msm_vidc_inst *inst,
mbs_per_sec > inst->core->resources.max_hq_mbs_per_sec) {
enable = true;
}
if (!enable) {
mutex_lock(&core->lock);
list_for_each_entry(instance, &core->instances, list) {
if (instance->clk_data.core_id &&
!(instance->flags & VIDC_LOW_POWER))
hq_mbs_per_sec +=
msm_comm_get_inst_load_per_core(
instance, LOAD_CALC_NO_QUIRKS);
}
mutex_unlock(&core->lock);
if (hq_mbs_per_sec > inst->core->resources.max_hq_mbs_per_sec)
enable = true;
}
/* Power saving always disabled for CQ RC mode. */
rc_mode = msm_comm_g_ctrl_for_id(inst,
V4L2_CID_MPEG_VIDEO_BITRATE_MODE);

17
drivers/mmc/host/sdhci-msm.c
View File

@@ -5580,19 +5580,6 @@ static int sdhci_msm_suspend_noirq(struct device *dev)
return ret;
}
static int sdhci_msm_freeze(struct device *dev)
{
struct sdhci_host *host = dev_get_drvdata(dev);
struct mmc_host *mmc = host->mmc;
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_msm_host *msm_host = pltfm_host->priv;
if (gpio_is_valid(msm_host->pdata->status_gpio) &&
(msm_host->mmc->slot.cd_irq >= 0))
mmc_gpiod_free_cd_irq(mmc);
return 0;
}
static int sdhci_msm_restore(struct device *dev)
{
struct sdhci_host *host = dev_get_drvdata(dev);
@@ -5601,8 +5588,6 @@ static int sdhci_msm_restore(struct device *dev)
if (mmc->inlinecrypt_support)
mmc->inlinecrypt_reset_needed = true;
mmc_gpiod_restore_cd_irq(mmc);
return 0;
}
@@ -5612,9 +5597,7 @@ static const struct dev_pm_ops sdhci_msm_pmops = {
.runtime_suspend = sdhci_msm_runtime_suspend,
.runtime_resume = sdhci_msm_runtime_resume,
.suspend_noirq = sdhci_msm_suspend_noirq,
.freeze = sdhci_msm_freeze,
.restore = sdhci_msm_restore,
.thaw = sdhci_msm_restore,
};
#define SDHCI_MSM_PMOPS (&sdhci_msm_pmops)

3
drivers/platform/msm/ipa/ipa_clients/ipa_mhi_client.c
View File

@@ -1669,7 +1669,8 @@ int ipa_mhi_connect_pipe(struct ipa_mhi_connect_params *in, u32 *clnt_hdl)
internal.start.gsi.mhi = &channel->ch_scratch.mhi;
internal.start.gsi.cached_gsi_evt_ring_hdl =
&channel->cached_gsi_evt_ring_hdl;
internal.start.gsi.evchid = channel->index;
internal.start.gsi.evchid = channel->ch_ctx_host.erindex -
ipa_mhi_client_ctx->first_er_idx;
res = ipa_connect_mhi_pipe(&internal, clnt_hdl);
if (res) {

4
drivers/power/supply/qcom/smb1398-charger.c
View File

@@ -1470,7 +1470,7 @@ static int smb1398_get_irq_index_byname(const char *irq_name)
{
int i;
for (i = 0; i < NUM_IRQS; i++) {
for (i = 0; i < ARRAY_SIZE(smb_irqs); i++) {
if (smb_irqs[i].name != NULL)
if (strcmp(smb_irqs[i].name, irq_name) == 0)
return i;
@@ -1726,7 +1726,7 @@ static void smb1398_taper_work(struct work_struct *work)
struct smb1398_chip *chip = container_of(work,
struct smb1398_chip, taper_work);
union power_supply_propval pval = {0};
int rc, fcc_ua, fv_uv, stepper_ua, main_fcc_ua;
int rc, fcc_ua, fv_uv, stepper_ua, main_fcc_ua = 0;
bool slave_en;
if (!is_psy_voter_available(chip))

3
drivers/rtc/qpnp-rtc.c
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2012-2015, 2017-2020, The Linux Foundation. All rights reserved.
/* Copyright (c) 2012-2015, 2017-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -734,7 +734,6 @@ static int qpnp_rtc_freeze(struct device *dev)
static const struct dev_pm_ops qpnp_rtc_pm_ops = {
.freeze = qpnp_rtc_freeze,
.restore = qpnp_rtc_restore,
.thaw = qpnp_rtc_restore,
};
static const struct of_device_id spmi_match_table[] = {

56
drivers/soc/qcom/jtagv8-etm.c
View File

@@ -245,7 +245,6 @@ struct etm_ctx {
static struct etm_ctx *etm[NR_CPUS];
static int cnt;
static bool hibernation_freeze;
static struct clk *clock[NR_CPUS];
@@ -1438,8 +1437,7 @@ void msm_jtag_etm_save_state(void)
cpu = raw_smp_processor_id();
if (!etm[cpu] || etm[cpu]->save_restore_disabled
|| hibernation_freeze)
if (!etm[cpu] || etm[cpu]->save_restore_disabled)
return;
if (etm[cpu]->save_restore_enabled) {
@@ -1457,8 +1455,7 @@ void msm_jtag_etm_restore_state(void)
cpu = raw_smp_processor_id();
if (!etm[cpu] || etm[cpu]->save_restore_disabled
|| hibernation_freeze)
if (!etm[cpu] || etm[cpu]->save_restore_disabled)
return;
/*
@@ -1726,54 +1723,6 @@ static int jtag_mm_remove(struct platform_device *pdev)
return 0;
}
static void msm_jtag_etm_save_state_hib(void *unused_info)
{
msm_jtag_etm_save_state();
}
static void msm_jtag_etm_restore_state_hib(void *unused_info)
{
msm_jtag_etm_restore_state();
}
static int jtag_mm_freeze(struct device *dev)
{
int cpu;
if (hibernation_freeze)
return 0;
get_online_cpus();
on_each_cpu(msm_jtag_etm_save_state_hib,
NULL, true);
for_each_online_cpu(cpu)
clk_disable_unprepare(clock[cpu]);
put_online_cpus();
hibernation_freeze = true;
return 0;
}
static int jtag_mm_restore(struct device *dev)
{
int cpu;
if (!hibernation_freeze)
return 0;
get_online_cpus();
for_each_online_cpu(cpu)
clk_prepare_enable(clock[cpu]);
on_each_cpu(msm_jtag_etm_restore_state_hib,
NULL, true);
put_online_cpus();
hibernation_freeze = false;
return 0;
}
static const struct dev_pm_ops jtag_mm_pm_ops = {
.freeze = jtag_mm_freeze,
.restore = jtag_mm_restore,
.thaw = jtag_mm_restore,
};
static const struct of_device_id msm_qdss_mm_match[] = {
{ .compatible = "qcom,jtagv8-mm"},
{}
@@ -1786,7 +1735,6 @@ static struct platform_driver jtag_mm_driver = {
.name = "msm-jtagv8-mm",
.owner = THIS_MODULE,
.of_match_table = msm_qdss_mm_match,
.pm = &jtag_mm_pm_ops,
},
};

5
drivers/soc/qcom/sdx_ext_ipc.c
View File

@@ -232,7 +232,10 @@ static int sdx_ext_ipc_probe(struct platform_device *pdev)
mutex_init(&mdm->policy_lock);
mutex_init(&mdm->e911_lock);
mdm->policy = SUBSYS_NOP;
if (of_property_read_bool(pdev->dev.of_node, "qcom,default-policy-nop"))
mdm->policy = SUBSYS_NOP;
else
mdm->policy = SUBSYS_PANIC;
ret = device_create_file(mdm->dev, &dev_attr_policy);
if (ret) {

5
drivers/soc/qcom/smem.c
View File

@@ -1094,9 +1094,8 @@ static int qcom_smem_restore(struct device *dev)
}
static const struct dev_pm_ops qcom_smem_pm_ops = {
.freeze_late = qcom_smem_freeze,
.restore_early = qcom_smem_restore,
.thaw_early = qcom_smem_restore,
.freeze = qcom_smem_freeze,
.restore = qcom_smem_restore,
};
static const struct of_device_id qcom_smem_of_match[] = {

11
drivers/soc/qcom/smp2p.c
View File

@@ -720,7 +720,7 @@ static int qcom_smp2p_remove(struct platform_device *pdev)
return 0;
}
static int qcom_smp2p_restore(struct device *dev)
static int qcom_smp2p_resume(struct device *dev)
{
int ret = 0;
struct qcom_smp2p *smp2p = dev_get_drvdata(dev);
@@ -757,7 +757,6 @@ static int qcom_smp2p_restore(struct device *dev)
}
wakeup_source_init(&smp2p->ws, "smp2p");
enable_irq_wake(smp2p->irq);
/* Kick the outgoing edge after allocating entries */
qcom_smp2p_kick(smp2p);
@@ -768,13 +767,12 @@ print_err:
return ret;
}
static int qcom_smp2p_freeze(struct device *dev)
static int qcom_smp2p_suspend(struct device *dev)
{
struct qcom_smp2p *smp2p = dev_get_drvdata(dev);
struct smp2p_entry *entry;
struct smp2p_entry *next_entry;
disable_irq_wake(smp2p->irq);
/* Walk through the out bound list and release state and entry */
list_for_each_entry_safe(entry, next_entry, &smp2p->outbound, node) {
qcom_smem_state_unregister(entry->state);
@@ -796,9 +794,8 @@ static int qcom_smp2p_freeze(struct device *dev)
}
static const struct dev_pm_ops qcom_smp2p_pm_ops = {
.freeze = qcom_smp2p_freeze,
.restore = qcom_smp2p_restore,
.thaw = qcom_smp2p_restore,
.freeze = qcom_smp2p_suspend,
.restore = qcom_smp2p_resume,
};
static const struct of_device_id qcom_smp2p_of_match[] = {

12
drivers/soc/qcom/socinfo.c
View File

@@ -465,6 +465,10 @@ static struct msm_soc_info cpu_of_id[] = {
[416] = {MSM_CPU_SDM429W, "SDM429W"},
[437] = {MSM_CPU_SDA429W, "SDA429W"},
/* QCM6125 IDs*/
[467] = {MSM_CPU_QCM6125, "QCM6125"},
[468] = {MSM_CPU_QCS6125, "QCS6125"},
/* Uninitialized IDs are not known to run Linux.
* MSM_CPU_UNKNOWN is set to 0 to ensure these IDs are
* considered as unknown CPU.
@@ -1485,6 +1489,14 @@ static void * __init setup_dummy_socinfo(void)
dummy_socinfo.id = 437;
strlcpy(dummy_socinfo.build_id, "sda429w - ",
sizeof(dummy_socinfo.build_id));
} else if (early_machine_is_qcm6125()) {
dummy_socinfo.id = 467;
strlcpy(dummy_socinfo.build_id, "qcm6125 - ",
sizeof(dummy_socinfo.build_id));
} else if (early_machine_is_qcs6125()) {
dummy_socinfo.id = 468;
strlcpy(dummy_socinfo.build_id, "qcm6125 - ",
sizeof(dummy_socinfo.build_id));
} else
strlcat(dummy_socinfo.build_id, "Dummy socinfo",
sizeof(dummy_socinfo.build_id));

3
drivers/thermal/qcom-spmi-temp-alarm.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2011-2015, 2017-2020 The Linux Foundation. All rights reserved.
* Copyright (c) 2011-2015, 2017-2019 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -445,7 +445,6 @@ static int qpnp_tm_freeze(struct device *dev)
static const struct dev_pm_ops qpnp_tm_pm_ops = {
.freeze = qpnp_tm_freeze,
.restore = qpnp_tm_restore,
.thaw = qpnp_tm_restore,
};
static const struct of_device_id qpnp_tm_match_table[] = {

1
drivers/tty/serial/msm_geni_serial.c
View File

@@ -3282,7 +3282,6 @@ static const struct dev_pm_ops msm_geni_serial_pm_ops = {
.resume_noirq = msm_geni_serial_sys_resume_noirq,
.freeze = msm_geni_serial_sys_suspend_noirq,
.restore = msm_geni_serial_sys_hib_resume_noirq,
.thaw = msm_geni_serial_sys_hib_resume_noirq,
};
static void msm_geni_serial_ssr_down(struct device *dev)

21
drivers/usb/dwc3/gadget.c
View File

@@ -3887,20 +3887,6 @@ static irqreturn_t dwc3_check_event_buf(struct dwc3_event_buffer *evt)
if (dwc->err_evt_seen)
return IRQ_HANDLED;
/* Controller is being halted, ignore the interrupts */
if (!dwc->pullups_connected) {
/*
* Even with controller halted, there is a possibility
* that the interrupt line is kept asserted.
* As per the databook (3.00A - 6.3.57) read the GEVNTCOUNT
* to ensure that the interrupt line is de-asserted.
*/
count = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0));
count &= DWC3_GEVNTCOUNT_MASK;
dbg_event(0xFF, "NO_PULLUP", count);
return IRQ_HANDLED;
}
/*
* With PCIe legacy interrupt, test shows that top-half irq handler can
* be called again after HW interrupt deassertion. Check if bottom-half
@@ -3915,6 +3901,13 @@ static irqreturn_t dwc3_check_event_buf(struct dwc3_event_buffer *evt)
if (!count)
return IRQ_NONE;
/* Controller is halted; ignore new/pending events */
if (!dwc->pullups_connected) {
dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), count);
dbg_event(0xFF, "NO_PULLUP", count);
return IRQ_HANDLED;
}
if (count > evt->length) {
dbg_event(0xFF, "HUGE_EVCNT", count);
/*

2
drivers/usb/gadget/composite.c
View File

@@ -2438,7 +2438,7 @@ void composite_resume(struct usb_gadget *gadget)
/* REVISIT: should we have config level
* suspend/resume callbacks?
*/
DBG(cdev, "resume\n");
INFO(cdev, "USB Resume\n");
place_marker("M - USB device is resumed");
if (cdev->driver->resume)
cdev->driver->resume(cdev);

8
include/soc/qcom/socinfo.h
View File

@@ -121,6 +121,10 @@
of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,sdm429w")
#define early_machine_is_sda429w() \
of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,sda429w")
#define early_machine_is_qcm6125() \
of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,qcm6125")
#define early_machine_is_qcs6125() \
of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,qcs6125")
#else
#define of_board_is_sim() 0
#define of_board_is_rumi() 0
@@ -168,6 +172,8 @@
#define early_machine_is_sda660() 0
#define early_machine_is_sdm429w() 0
#define early_machine_is_sda429w() 0
#define early_machine_is_qcm6125() 0
#define early_machine_is_qcs6125() 0
#endif
#define PLATFORM_SUBTYPE_MDM 1
@@ -219,6 +225,8 @@ enum msm_cpu {
MSM_CPU_SDA660,
MSM_CPU_SDM429W,
MSM_CPU_SDA429W,
MSM_CPU_QCM6125,
MSM_CPU_QCS6125,
};
struct msm_soc_info {

12
include/uapi/media/cam_req_mgr.h
View File

@@ -43,9 +43,15 @@
#define V4L_EVENT_CAM_REQ_MGR_EVENT (V4L2_EVENT_PRIVATE_START + 0)
/* Specific event ids to get notified in user space */
#define V4L_EVENT_CAM_REQ_MGR_SOF 0
#define V4L_EVENT_CAM_REQ_MGR_ERROR 1
#define V4L_EVENT_CAM_REQ_MGR_SOF_BOOT_TS 2
#define V4L_EVENT_CAM_REQ_MGR_SOF 0
#define V4L_EVENT_CAM_REQ_MGR_ERROR 1
#define V4L_EVENT_CAM_REQ_MGR_SOF_BOOT_TS 2
/* Suspend to RAM and Hibernation events */
#define V4L_EVENT_CAM_REQ_MGR_S2R_SUSPEND 10
#define V4L_EVENT_CAM_REQ_MGR_S2R_RESUME 11
#define V4L_EVENT_CAM_REQ_MGR_HIBERNATION_SUSPEND 12
#define V4L_EVENT_CAM_REQ_MGR_HIBERNATION_RESUME 13
/* SOF Event status */
#define CAM_REQ_MGR_SOF_EVENT_SUCCESS 0