Merge remote-tracking branch 'origin/auto-kernel' into auto-kernel-oss

* origin/auto-kernel:
  README: update
  drone: integrate drone ci pipeline
  ARM64: configs: raphael: Enable char diagnostics driver
  ARM64: configs: raphael: Regenerate
  Revert "Workaround: These are work around which need to de addressed"
  init: completely remove Early init services support
  Dm: init: Enable rootfs mount as dm-verity during boot without ramdisk
  Revert "Remove Per File Key based hardware crypto framework"
  Revert "Integrate the new file encryption framework"
  Revert "Revert "Reverting crypto patches""
  Revert "Variant ops for UFS crypto and new crypto lib"
  Revert "mmc: host: Use request queue pointer for mmc crypto"
  Revert "mmc: cqhci: eMMC JEDEC v5.2 crypto spec addition"
  Revert "mmc: cqhci: Add eMMC crypto APIs"
  Revert "mmc: cqhci: Add inline crypto support to cqhci"
  Revert "mmc: host: Add variant ops for cqhci crypto"
  Revert "mmc: host: Fix the offset for ICE address"
  Revert "mmc: host: Set the supported dun size for crypto"
  Revert "mmc: host: Fix the condition to parse crypto clocks"
  Revert "fscrypt: support legacy inline crypto mode"
  Revert "dm: Support legacy on disk format in dm-default-key"
  Revert "defconfig: Enable new file encryption flags"
  Revert "ARM: dts: Make crypto address part of host controller node"
  Revert "Use correct endianness for encryption keys"
  Revert "ANDROID: block: backport the ability to specify max_dun_bytes"
  Revert "ANDROID: dm-default-key: set dun_bytes more precisely"
  Revert "ANDROID: fscrypt: set dun_bytes more precisely"
  Revert "BACKPORT: FROMLIST: fscrypt: add support for IV_INO_LBLK_32 policies"
  Revert "ANDROID: fscrypt: handle direct I/O with IV_INO_LBLK_32"
  Revert "dm: default-key: Adapt legacy disk format for new set of arguments"
  Revert "defconfig: Enable new file encryption flags for msmnile"
  kbuild: lto: remove duplicate dependencies from .mod files
  selinux: avc: fix build with CONFIG_AUDIT=y
  Revert "sched: walt: hardcode sched_coloc_downmigrate_ns to 40ms"
  ARM64: configs: raphael: Enable External SOCs Control Support
  ARM64: configs: raphael: Enable generic sound device drivers
  ARM64: configs: raphael: Enable Cleancache
  ARM64: configs: raphael: Enable HL/TTL nftable targets
  drm: msm: dsi_parser: Fix strlcpy usage
  sm8150: fix gcc LTO warnings
  teckpack: audio: tfa98xx: read original memtrack data from device
  drm/msm/sde: Clean up non-60 Hz panel reset code
  Makefile: Remove obsolete -fno-builtin flag
  lib/string.c: implement stpcpy
  Revert "Makefile: add -fno-builtin-stpcpy"
  Revert "Makefile: add -fno-builtin-bcmp"
  Revert "Revert "lib/string.c: implement a basic bcmp""
  msm: ipa3: fix the unmap logic
  net : stmmac: rgmii clock was not setting to low
  ARM: dts: msm: Changing the pet timeout as per granularity limit
  coresight: cti: Move CTI DEVID register read from cti_probe
  soc: qcom: qrtr: APIs for ethernet transport
  arch: arm64 : boot: dts : Removing mac addr entry
  net : stmmac : random mac addr assignment
  ARM: dts: msm: Add new QUPv3 SIDs for SA8155 VM
  ARM: dts: msm: add qoe and cv2x over eth support for sa515m
  ARM: dts: msm: add qmi and v2x over eth support for sa2150p
  Arm: dts: qsc405: Update num of tx queues to 4
  dfc: Enable TX when grant is received
  ARM: dts: sdxprairie: Update num of tx queues to 4
  ARM: dts: msm: Disable disp_rsc for sa8155-capture
  power: qpnp-smb2/5: Report TIME_TO_FULL_NOW and  CHARGE_FULL_DESIGN
  power: qpnp-qg/fg-gen3/gen4: Report TIME_TO_FULL_NOW property
  msm: kgsl: skip if requested address doesn't fall in the svm range
  defconfig: Enable new file encryption flags for msmnile
  rpmsg: glink: Enable irq wake for glink interrupt
  ARM: dts: msm: Update pmic alarm thermal zone mitigation configs for GEN3
  msm: ais: restrict cci user interface to VIDEOC_CAM_CONTROL
  ARM: dts: msm: disable avb for lv container
  binderfs: use refcount for binder control devices too
  msm: eth: Add user space interface for eth
  msm: ipa3: add support on detour lan2lan traffic to sw
  dm: default-key: Adapt legacy disk format for new set of arguments
  defconfig: sdm429: Update configs related to DCC
  net: stmmac: Add mac2mac feature support
  soc: qcom: bgcom: change BG TWM firmware name
  ARM: msm: dts: Disable U1U2 low power modes for QCS610
  UVC: Increase usb requests for better throughput
  Documentation: devicetree: net: Add doc for switch driver
  mmc: host: Set the supported dun size for crypto
  ANDROID: fscrypt: handle direct I/O with IV_INO_LBLK_32
  BACKPORT: FROMLIST: fscrypt: add support for IV_INO_LBLK_32 policies
  ANDROID: fscrypt: set dun_bytes more precisely
  ANDROID: dm-default-key: set dun_bytes more precisely
  ANDROID: block: backport the ability to specify max_dun_bytes
  ARM: dts: msm: Add vbus_detect as USB extcon for Telematics AU MTP
  msm: kgsl: Correctly clean up dma buffer attachment in case of error
  ARM: dts: msm: Add multiple dri device nodes for sa8195 lxc gvm
  Use correct endianness for encryption keys
  ARM: dts: sa2150p: enable rgmii level shifter on nand vt som
  ARM: dts: msm: disable disk rename in LV GVM
  sdm429w: add bg-rsg driver changes
  mtd: msm_qpic_nand: Use logical unit count in flash density
  mmc: host: Fix the condition to parse crypto clocks
  defconfig: Disable wlan vendors to optimize memory
  ARM: dts: Make crypto address part of host controller node
  defconfig: Enable new file encryption flags
  dm: Support legacy on disk format in dm-default-key
  fscrypt: support legacy inline crypto mode
  mmc: host: Fix the offset for ICE address
  mmc: host: Add variant ops for cqhci crypto
  mmc: cqhci: Add inline crypto support to cqhci
  mmc: cqhci: Add eMMC crypto APIs
  mmc: cqhci: eMMC JEDEC v5.2 crypto spec addition
  mmc: host: Use request queue pointer for mmc crypto
  Variant ops for UFS crypto and new crypto lib
  Revert "Reverting crypto patches"
  Integrate the new file encryption framework
  Remove Per File Key based hardware crypto framework
  ARM: dts: msm: Disable cti apps node for sa8155
  ARM: dts: add audio device tree for sda429
  usb: f_gsi: Implement remote wakeup feature for gsi for bus suspend
  diag: Synchronize USB notifications handling event queues
  diag: Add usb events to a queue
  msm: ais: change the buffer SOF timestamp match
  net: stmmac: Fix the ioctl case for timestamping
  usb: gadget: u_ether: Add skb check in eth_start_xmit
  net: stmmac: FR60005 unused data cleanup
  lkdtm: Correct the size value for WRITE_KERN
  net: stmmac: Enable RX parameter configuration from device tree
  msm: camera: Fix uninitialized and Null pointer dereference
  serial: msm_geni_serial: Fix the issue with PM usage
  ARM: defconfig: Enable intermediate functional block support for sdm429w
  clk: qcom: gcc: Add freq support for emac clk in qcs405
  msm: kgsl: Use regulator_is_enabled api when gpu-quirk-cx-gdsc is defined
  msm: kgsl: Reset CM3 during GMU suspend
  soc: qcom: socinfo: Add support for trinket-iot soc-id
  msm: kgsl: Always boot GMU with default CM3 config
  ARM: dts: qcom: Enable SE2 I2C for SA8195
  msm: pcie: validate speed switch request
  msm: pcie: correct cached PCIe link BW max gen speed
  soc: qcom: socinfo: Remove Unnecessary soc-id
  ARM: dts: msm: Remove unnecessary files for qcm6125
  ARM: dts: msm: add support of DP PCLK bond mode for SA8195p
  msm: kgsl: Add handler for GPC interrupt on A6xx GPU
  msm: ipa3: add eth ep_pair info
  msm: ipa3: add v2x ethernet pipes
  msm: kgsl: Poll GDSCR to ensure CX collapse
  ARM: dts: msm: Add WLAN PD auxilary minidump ID for sdmmagpie
  ARM: dts: msm: Add WLAN PD auxilary minidump ID for MSS on SM6150
  RM: dts: msm: add support for gpio based jack detection on qcs610

Signed-off-by: UtsavBalar1231 <utsavbalar1231@gmail.com>
This commit is contained in:
UtsavBalar1231
2020-08-29 22:33:06 +05:30
149 changed files with 2835 additions and 1164 deletions

29
.drone.yml Normal file
View File

@@ -0,0 +1,29 @@
---
kind: pipeline
type: docker
name: kernel_xiaomi_raphael
platform:
os: linux
arch: amd64
clone:
depth: 1
steps:
- name: immensity_kernel
image: ubuntu:latest
environment:
CI_CHANNEL_ID:
from_secret: ci_channel_id
BOT_API_KEY:
from_secret: bot_api_key
RELEASE_VERSION: "test"
commands:
- apt-get update && apt-get install -y bison build-essential bc bison curl libssl-dev git zip python flex
- git clone --depth=1 https://github.com/UtsavBalar1231/scripts.git -b master script && cd script
- ./dronesetup.sh --proton
- ./kernel.sh --proton
when:
branch:
- auto-kernel-ci

View File

@@ -106,12 +106,6 @@ SoCs:
- SDA429W
compatible = "qcom,sda429w"
- QCM6125
compatible = "qcom,qcm6125"
- QCS6125
compatible = "qcom,qcs6125"
- SA2145P
compatible = "qcom,sa2145p"
@@ -168,6 +162,11 @@ Generic board variants:
- TTP device:
compatible = "qcom,ttp"
- TRINKET-IOT
compatible = "qcom,trinket-iot"
- TRINKETP-IOT
compatible = "qcom,trinketp-iot"
Boards (SoC type + board variant):
@@ -311,7 +310,7 @@ compatible = "qcom,sda429w-wdp"
compatible = "qcom,sda429-wdp"
compatible = "qcom,sdm429w-wdp"
compatible = "qcom,sdm429-wdp"
compatible = "qcom,qcm6125"
compatible = "qcom,qcs6125"
compatible = "qcom,qcm6125-idp"
compatible = "qcom,qcs6125-idp"
compatible = "qcom,trinket-iot"
compatible = "qcom,trinketp-iot"
compatible = "qcom,trinket-iot-idp"
compatible = "qcom,trinketp-iot-idp"

View File

@@ -0,0 +1,64 @@
* NXP SJA1105P 10/100/1000 Ethernet Switch Driver
Required properties:
### Properties of top level
- compatible: Should be "qcom,nxp,sja1105p-switch".
- reg: Should contain SPI chip select.
- spi-max-frequency: Should contain maximum spi clock frequency
for slave device.
- spi-cpha: SPI configuration to enable shift clock phase (CPHA) mode.
- switch-speed: Should contain switch ports speed 10/100/1000 Mbps.
- pinctrl-names : Names corresponding to the numbered pinctrl states
- pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt
- qcom,reset-gpio: Reference to the GPIO connected to the reset input.
### Properties of the port-X child node
- `null-phy`: Determines if the port has a PHY connected to it or not
- `phy-ref`: _phandle_ to the connected ethernet PHY
**NOTE**: Must be `0x00` in case there is no PHY connected to port-X
(for example if port-X is a host port or a cascaded port)
- `logical-port-num`: logical port number, used for the port mapping
**NOTE**: Must be `0xff` in case port-X is a cascaded port.
Example:
sja1105: ethernet-switch@0{
compatible = "qcom,nxp,sja1105p-switch";
reg = <0>;
spi-max-frequency = <12000000>;
spi-cpha;
switch-speed = <1000>;
pinctrl-names = "default";
pinctrl-0 = <&sja1105_default>;
qcom,reset-gpio = <&tlmm 91 0x1>;
port-0 {
null-phy = <0x1>;
phy-ref = < 0 >;
logical-port-num = < 0 >;
};
port-1 {
null-phy = <0x1>;
phy-ref = < 0 >;
logical-port-num = < 1 >;
};
port-2 {
null-phy = <0x1>;
phy-ref = < 0 >;
logical-port-num = < 2 >;
};
port-3 {
null-phy = <0x1>;
phy-ref = < 0 >;
logical-port-num = < 3 >;
};
port-4 {
null-phy = <0x1>;
phy-ref = < 0 >;
logical-port-num = < 4 >;
};
};

View File

@@ -0,0 +1,19 @@
Qualcomm technologies, Inc. bg-rsb
BG-RSB : bg-rsb is used to communicate with Blackghost over
Glink to configure the RSB events. bg-rsb enable/disable
LDO11 and LDO15 before making any communication to BG
regarding RSB. It also provides an input device, which is
used to send the RSB/Button events to input framework.
Required properties:
- compatible : should be "qcom,bg-rsb"
- vdd-ldo1-supply : for powering main supply
- vdd-ldo2-supply : for powering sensor
Example:
qcom,bg-rsb {
compatible = "qcom,bg-rsb";
vdd-ldo1-supply = <&pm660_l11>;
vdd-ldo2-supply = <&pm660_l15>;
};

View File

@@ -526,8 +526,6 @@ export CLANG_FLAGS
ifeq ($(ld-name),lld)
KBUILD_CFLAGS += -fuse-ld=lld
endif
CLANG_FLAGS += -fno-builtin-stpcpy
CLANG_FLAGS += -fno-builtin-bcmp
KBUILD_CPPFLAGS += -Qunused-arguments
endif
@@ -795,7 +793,6 @@ ifeq ($(cc-name),clang)
KBUILD_CFLAGS += $(call cc-disable-warning, format-invalid-specifier)
KBUILD_CFLAGS += $(call cc-disable-warning, gnu)
KBUILD_CFLAGS += $(call cc-disable-warning, duplicate-decl-specifier)
KBUILD_CFLAGS += -fno-builtin
KBUILD_CFLAGS += $(call cc-option, -Wno-undefined-optimized)
KBUILD_CFLAGS += $(call cc-option, -Wno-tautological-constant-out-of-range-compare)
KBUILD_CFLAGS += $(call cc-option, -mllvm -disable-struct-const-merge)

View File

@@ -1,7 +1,8 @@
# IMMENSiTY KERNAL for Redmi K20pro / Mi9Tpro
[![Build Status](https://cloud.drone.io/api/badges/UtsavBalar1231/kernel_xiaomi_raphael/status.svg?ref=refs/heads/auto-kernel-ci)](https://cloud.drone.io/UtsavBalar1231/kernel_xiaomi_raphael)
![logo](https://github.com/UtsavBalar1231/xda-stuff/raw/master/immensity-new.png "logo here")
> Merged AOSP android-4.14-stable [4.14.192]
> Latest CAF tag: **LE.UM.3.2.3-45100-SA2150p**
> Merged AOSP android-4.14-stable [4.14.195]
> Latest CAF tag: **LE.UM.3.2.3-00110-SA2150p**

View File

@@ -277,6 +277,7 @@ CONFIG_DM_VERITY_FEC=y
CONFIG_NETDEVICES=y
CONFIG_BONDING=y
CONFIG_DUMMY=y
CONFIG_IFB=y
CONFIG_TUN=y
CONFIG_MSM_RMNET_BAM=y
CONFIG_PPP=y
@@ -294,7 +295,21 @@ CONFIG_PPP_ASYNC=y
CONFIG_PPP_SYNC_TTY=y
CONFIG_USB_RTL8152=y
CONFIG_USB_USBNET=y
CONFIG_WIL6210=m
# CONFIG_WLAN_VENDOR_ADMTEK is not set
# CONFIG_WLAN_VENDOR_ATMEL is not set
# CONFIG_WLAN_VENDOR_BROADCOM is not set
# CONFIG_WLAN_VENDOR_CISCO is not set
# CONFIG_WLAN_VENDOR_INTEL is not set
# CONFIG_WLAN_VENDOR_INTERSIL is not set
# CONFIG_WLAN_VENDOR_MARVELL is not set
# CONFIG_WLAN_VENDOR_MEDIATEK is not set
# CONFIG_WLAN_VENDOR_RALINK is not set
# CONFIG_WLAN_VENDOR_REALTEK is not set
# CONFIG_WLAN_VENDOR_RSI is not set
# CONFIG_WLAN_VENDOR_ST is not set
# CONFIG_WLAN_VENDOR_TI is not set
# CONFIG_WLAN_VENDOR_ZYDAS is not set
# CONFIG_WLAN_VENDOR_QUANTENNA is not set
CONFIG_WCNSS_MEM_PRE_ALLOC=y
CONFIG_CLD_LL_CORE=y
CONFIG_INPUT_EVDEV=y
@@ -544,7 +559,7 @@ CONFIG_SSR_SYSMON_NOTIF_TIMEOUT=20000
CONFIG_SSR_SUBSYS_NOTIF_TIMEOUT=20000
CONFIG_PANIC_ON_SSR_NOTIF_TIMEOUT=y
CONFIG_MSM_BOOT_STATS=y
CONFIG_QCOM_DCC_V2=y
CONFIG_QCOM_DCC=y
CONFIG_QCOM_SECURE_BUFFER=y
CONFIG_ICNSS=y
CONFIG_ICNSS_QMI=y

View File

@@ -284,6 +284,7 @@ CONFIG_DM_VERITY_FEC=y
CONFIG_NETDEVICES=y
CONFIG_BONDING=y
CONFIG_DUMMY=y
CONFIG_IFB=y
CONFIG_TUN=y
CONFIG_MSM_RMNET_BAM=y
CONFIG_PPP=y
@@ -301,6 +302,21 @@ CONFIG_PPP_ASYNC=y
CONFIG_PPP_SYNC_TTY=y
CONFIG_USB_RTL8152=y
CONFIG_USB_USBNET=y
# CONFIG_WLAN_VENDOR_ADMTEK is not set
# CONFIG_WLAN_VENDOR_ATMEL is not set
# CONFIG_WLAN_VENDOR_BROADCOM is not set
# CONFIG_WLAN_VENDOR_CISCO is not set
# CONFIG_WLAN_VENDOR_INTEL is not set
# CONFIG_WLAN_VENDOR_INTERSIL is not set
# CONFIG_WLAN_VENDOR_MARVELL is not set
# CONFIG_WLAN_VENDOR_MEDIATEK is not set
# CONFIG_WLAN_VENDOR_RALINK is not set
# CONFIG_WLAN_VENDOR_REALTEK is not set
# CONFIG_WLAN_VENDOR_RSI is not set
# CONFIG_WLAN_VENDOR_ST is not set
# CONFIG_WLAN_VENDOR_TI is not set
# CONFIG_WLAN_VENDOR_ZYDAS is not set
# CONFIG_WLAN_VENDOR_QUANTENNA is not set
CONFIG_WCNSS_MEM_PRE_ALLOC=y
CONFIG_CLD_LL_CORE=y
CONFIG_INPUT_EVDEV=y
@@ -564,7 +580,7 @@ CONFIG_SSR_SUBSYS_NOTIF_TIMEOUT=20000
CONFIG_PANIC_ON_SSR_NOTIF_TIMEOUT=y
CONFIG_MSM_BOOT_STATS=y
CONFIG_MSM_CORE_HANG_DETECT=y
CONFIG_QCOM_DCC_V2=y
CONFIG_QCOM_DCC=y
CONFIG_MSM_GLADIATOR_HANG_DETECT=y
CONFIG_MSM_GLADIATOR_ERP=y
CONFIG_PANIC_ON_GLADIATOR_ERROR=y

View File

@@ -348,17 +348,7 @@ ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y)
trinket-external-codec-idp-overlay.dtbo \
trinket-usbc-external-codec-idp-overlay.dtbo \
trinket-usbc-idp-overlay.dtbo \
trinket-dp-idp-overlay.dtbo \
qcm6125-iot-idp-overlay.dtbo \
qcs6125-iot-idp-overlay.dtbo \
qcm6125-iot-external-codec-idp-overlay.dtbo \
qcs6125-iot-external-codec-idp-overlay.dtbo \
qcm6125-iot-usbc-external-codec-idp-overlay.dtbo \
qcs6125-iot-usbc-external-codec-idp-overlay.dtbo \
qcm6125-iot-usbc-idp-overlay.dtbo \
qcs6125-iot-usbc-idp-overlay.dtbo \
qcm6125-iot-dp-idp-overlay.dtbo \
qcs6125-iot-dp-idp-overlay.dtbo
trinket-dp-idp-overlay.dtbo
trinket-rumi-overlay.dtbo-base := trinket.dtb
trinket-idp-overlay.dtbo-base := trinket.dtb
@@ -367,16 +357,6 @@ trinket-external-codec-idp-overlay.dtbo-base := trinket.dtb
trinket-usbc-external-codec-idp-overlay.dtbo-base := trinket.dtb
trinket-usbc-idp-overlay.dtbo-base := trinket.dtb
trinket-dp-idp-overlay.dtbo-base := trinket.dtb
qcm6125-iot-idp-overlay.dtbo-base := qcm6125.dtb
qcs6125-iot-idp-overlay.dtbo-base := qcs6125.dtb
qcm6125-iot-external-codec-idp-overlay.dtbo-base := qcm6125.dtb
qcs6125-iot-external-codec-idp-overlay.dtbo-base := qcs6125.dtb
qcm6125-iot-usbc-external-codec-idp-overlay.dtbo-base := qcm6125.dtb
qcs6125-iot-usbc-external-codec-idp-overlay.dtbo-base := qcs6125.dtb
qcm6125-iot-usbc-idp-overlay.dtbo-base := qcm6125.dtb
qcs6125-iot-usbc-idp-overlay.dtbo-base := qcs6125.dtb
qcm6125-iot-dp-idp-overlay.dtbo-base := qcm6125.dtb
qcs6125-iot-dp-idp-overlay.dtbo-base := qcs6125.dtb
else
dtb-$(CONFIG_ARCH_TRINKET) += trinket-rumi.dtb \
trinket-idp.dtb \
@@ -384,17 +364,7 @@ dtb-$(CONFIG_ARCH_TRINKET) += trinket-rumi.dtb \
trinket-external-codec-idp.dtb \
trinket-usbc-external-codec-idp.dtb \
trinket-usbc-idp.dtb \
trinket-dp-idp.dtb \
qcm6125-iot-idp.dtb \
qcs6125-iot-idp.dtb \
qcm6125-iot-external-codec-idp.dtb \
qcs6125-iot-external-codec-idp.dtb \
qcm6125-iot-usbc-external-codec-idp.dtb \
qcs6125-iot-usbc-external-codec-idp.dtb \
qcm6125-iot-usbc-idp.dtb \
qcs6125-iot-usbc-idp.dtb \
qcm6125-iot-dp-idp.dtb \
qcs6125-iot-dp-idp.dtb
trinket-dp-idp.dtb
endif
ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y)

View File

@@ -1,51 +0,0 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-trinket.h>
#include "qcm6125-iot-idp.dtsi"
#include "trinket-audio-overlay.dtsi"
/ {
model = "Display Port Enable IDP";
compatible = "qcom,qcm6125-idp", "qcom,qcm6125", "qcom,idp";
qcom,msm-id = <467 0x10000>;
qcom,board-id = <34 4>;
};
&dsi_td4330_truly_cmd_display {
qcom,dsi-display-active;
};
&sde_dp {
status = "ok";
qcom,dp-hpd-gpio = <&tlmm 100 0>;
qcom,dp-low-power-hw-hpd;
};
&mdss_dp_pll {
status = "ok";
};
&usb0 {
dwc3@4e00000 {
usb-phy = <&qusb_phy0>, <&usb_nop_phy>;
maximum-speed = "high-speed";
};
};
&mdss_mdp {
connectors = <&sde_wb &sde_dsi &sde_dp>;
};

View File

@@ -1,44 +0,0 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "qcm6125.dtsi"
#include "qcm6125-iot-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCM6125 IOT Disp. Port Enable IDP";
compatible = "qcom,qcm6125-idp", "qcom,qcm6125", "qcom,idp";
qcom,board-id = <34 4>;
};
&sde_dp {
status = "ok";
qcom,dp-hpd-gpio = <&tlmm 100 0>;
qcom,dp-low-power-hw-hpd;
};
&mdss_dp_pll {
status = "ok";
};
&usb0 {
dwc3@4e00000 {
usb-phy = <&qusb_phy0>, <&usb_nop_phy>;
maximum-speed = "high-speed";
};
};
&mdss_mdp {
connectors = <&sde_wb &sde_dsi &sde_dp>;
};

View File

@@ -1,31 +0,0 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "qcm6125-iot-idp.dtsi"
#include "trinket-tasha-codec-audio-overlay.dtsi"
#include "trinket-tasha-codec.dtsi"
/ {
model = "Ext Audio Codec IDP";
compatible = "qcom,qcm6125-idp", "qcom,qcm6125", "qcom,idp";
qcom,msm-id = <467 0x10000>;
qcom,board-id = <34 1>;
};
&dsi_td4330_truly_cmd_display {
qcom,dsi-display-active;
};

View File

@@ -1,24 +0,0 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "qcm6125.dtsi"
#include "qcm6125-iot-idp.dtsi"
#include "trinket-tasha-codec-audio-overlay.dtsi"
#include "trinket-tasha-codec.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCM6125 IOT Ext Audio Codec IDP";
compatible = "qcom,qcm6125-idp", "qcom,qcm6125", "qcom,idp";
qcom,board-id = <34 1>;
};

View File

@@ -1,25 +0,0 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/plugin/;
#include "qcm6125-iot-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCM6125 IOT IDP Overlay";
compatible = "qcom,qcm6125";
qcom,msm-id = <467 0x10000>;
qcom,board-id = <34 0>;
};

View File

@@ -1,23 +0,0 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "qcm6125.dtsi"
#include "qcm6125-iot-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCM6125 IOT IDP SoC";
compatible = "qcom,qcm6125";
qcom,board-id = <34 0>;
};

View File

@@ -1,13 +0,0 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "trinket-idp.dtsi"

View File

@@ -1,29 +0,0 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "qcm6125-iot-idp.dtsi"
/ {
model = "USB-C Ext Audio Codec IDP";
compatible = "qcom,qcm6125-idp", "qcom,qcm6125", "qcom,idp";
qcom,msm-id = <467 0x10000>;
qcom,board-id = <34 3>;
};
&dsi_td4330_truly_cmd_display {
qcom,dsi-display-active;
};

View File

@@ -1,22 +0,0 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "qcm6125.dtsi"
#include "qcm6125-iot-idp.dtsi"
/ {
model = "Qualcomm Technologies,Inc. QCM6125 IOT USBC Ext Aud Codec IDP";
compatible = "qcom,qcm6125-idp", "qcom,qcm6125", "qcom,idp";
qcom,board-id = <34 3>;
};

View File

@@ -1,30 +0,0 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "qcm6125-iot-idp.dtsi"
#include "qcm6125-iot-usbc-idp.dtsi"
/ {
model = "USBC Audio IDP";
compatible = "qcom,qcm6125-idp", "qcom,qcm6125", "qcom,idp";
qcom,msm-id = <467 0x10000>;
qcom,board-id = <34 2>;
};
&dsi_td4330_truly_cmd_display {
qcom,dsi-display-active;
};

View File

@@ -1,23 +0,0 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "qcm6125.dtsi"
#include "qcm6125-iot-idp.dtsi"
#include "qcm6125-iot-usbc-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCM6125 IOT USBC Audio IDP";
compatible = "qcom,qcm6125-idp", "qcom,qcm6125", "qcom,idp";
qcom,board-id = <34 2>;
};

View File

@@ -1,19 +0,0 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "trinket-audio-overlay.dtsi"
&sm6150_snd {
qcom,msm-mbhc-usbc-audio-supported = <1>;
qcom,msm-mbhc-hphl-swh = <1>;
qcom,msm-mbhc-gnd-swh = <1>;
};

View File

@@ -1,22 +0,0 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "qcm6125.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCM6125 IOT IDP SoC";
compatible = "qcom,qcm6125";
qcom,board-id = <0 0>;
};

View File

@@ -1,21 +0,0 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "trinket.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCM6125";
compatible = "qcom,qcm6125";
qcom,msm-id = <467 0x0>;
qcom,msm-name = "QCM6125";
};

View File

@@ -1584,7 +1584,7 @@
};
mtl_tx_setup: tx-queues-config {
snps,tx-queues-to-use = <5>;
snps,tx-queues-to-use = <4>;
snps,tx-sched-sp;
queue0 {
snps,dcb-algorithm;
@@ -1611,7 +1611,7 @@
};
};
ethqos_hw: qcom,ethernet@00020000 {
ethqos_hw: qcom,ethernet@07A80000 {
compatible = "qcom,stmmac-ethqos";
reg = <0x07A80000 0x10000>,
<0x7A96000 0x100>;
@@ -1642,7 +1642,6 @@
qcom,bus-vector-names = "0", "10", "100", "1000";
snps,tso;
snps,pbl = <32>;
mac-address = [00 55 7B B5 7D f7];
clocks = <&clock_gcc GCC_ETH_AXI_CLK>,
<&clock_gcc GCC_ETH_SLAVE_AHB_CLK>,
<&clock_gcc GCC_ETH_PTP_CLK>,

View File

@@ -365,6 +365,12 @@
status = "ok";
};
&usb0 {
dwc3@a600000 {
snps,usb3-u1u2-disable;
};
};
&L16A {
regulator-max-microvolt = <3304000>;
};

View File

@@ -67,6 +67,13 @@
qcom,wsa-max-devs = <1>;
qcom,wsa-devs = <&wsa881x_0211>, <&wsa881x_0213>;
qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrLeft";
qcom,linein-det-swh = <1>;
qcom,lineout-det-swh = <1>;
qcom,linein-det-gpio = <&tlmm 1 0>;
qcom,lineout-det-gpio = <&tlmm 60 0>;
pinctrl-names = "default";
pinctrl-0 = <&jack_det_linein_default
&jack_det_lineout_default>;
};
&pm6150_charger {

View File

@@ -1,51 +0,0 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-trinket.h>
#include "qcs6125-iot-idp.dtsi"
#include "trinket-audio-overlay.dtsi"
/ {
model = "Display Port Enable IDP";
compatible = "qcom,qcs6125-idp", "qcom,qcs6125", "qcom,idp";
qcom,msm-id = <468 0x10000>;
qcom,board-id = <34 4>;
};
&dsi_td4330_truly_cmd_display {
qcom,dsi-display-active;
};
&sde_dp {
status = "ok";
qcom,dp-hpd-gpio = <&tlmm 100 0>;
qcom,dp-low-power-hw-hpd;
};
&mdss_dp_pll {
status = "ok";
};
&usb0 {
dwc3@4e00000 {
usb-phy = <&qusb_phy0>, <&usb_nop_phy>;
maximum-speed = "high-speed";
};
};
&mdss_mdp {
connectors = <&sde_wb &sde_dsi &sde_dp>;
};

View File

@@ -1,44 +0,0 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "qcs6125.dtsi"
#include "qcs6125-iot-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCM6125 IOT Disp. Port Enable IDP";
compatible = "qcom,qcs6125-idp", "qcom,qcs6125", "qcom,idp";
qcom,board-id = <34 4>;
};
&sde_dp {
status = "ok";
qcom,dp-hpd-gpio = <&tlmm 100 0>;
qcom,dp-low-power-hw-hpd;
};
&mdss_dp_pll {
status = "ok";
};
&usb0 {
dwc3@4e00000 {
usb-phy = <&qusb_phy0>, <&usb_nop_phy>;
maximum-speed = "high-speed";
};
};
&mdss_mdp {
connectors = <&sde_wb &sde_dsi &sde_dp>;
};

View File

@@ -1,31 +0,0 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "qcs6125-iot-idp.dtsi"
#include "trinket-tasha-codec-audio-overlay.dtsi"
#include "trinket-tasha-codec.dtsi"
/ {
model = "Ext Audio Codec IDP";
compatible = "qcom,qcs6125-idp", "qcom,qcs6125", "qcom,idp";
qcom,msm-id = <468 0x10000>;
qcom,board-id = <34 1>;
};
&dsi_td4330_truly_cmd_display {
qcom,dsi-display-active;
};

View File

@@ -1,24 +0,0 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "qcs6125.dtsi"
#include "qcs6125-iot-idp.dtsi"
#include "trinket-tasha-codec-audio-overlay.dtsi"
#include "trinket-tasha-codec.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS6125 IOT Ext Audio Codec IDP";
compatible = "qcom,qcs6125-idp", "qcom,qcs6125", "qcom,idp";
qcom,board-id = <34 1>;
};

View File

@@ -1,25 +0,0 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/plugin/;
#include "qcs6125-iot-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS6125 IOT IDP Overlay";
compatible = "qcom,qcs6125";
qcom,msm-id = <468 0x10000>;
qcom,board-id = <34 0>;
};

View File

@@ -1,23 +0,0 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "qcs6125.dtsi"
#include "qcs6125-iot-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS6125 IOT IDP SoC";
compatible = "qcom,qcs6125";
qcom,board-id = <34 0>;
};

View File

@@ -1,29 +0,0 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "qcs6125-iot-idp.dtsi"
/ {
model = "USB-C Ext Audio Codec IDP";
compatible = "qcom,qcs6125-idp", "qcom,qcs6125", "qcom,idp";
qcom,msm-id = <468 0x10000>;
qcom,board-id = <34 3>;
};
&dsi_td4330_truly_cmd_display {
qcom,dsi-display-active;
};

View File

@@ -1,22 +0,0 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "qcs6125.dtsi"
#include "qcs6125-iot-idp.dtsi"
/ {
model = "Qualcomm Technologies,Inc. QCS6125IOT USBC Ext AudioCodec IDP";
compatible = "qcom,qcs6125-idp", "qcom,qcs6125", "qcom,idp";
qcom,board-id = <34 3>;
};

View File

@@ -1,30 +0,0 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "qcs6125-iot-idp.dtsi"
#include "qcs6125-iot-usbc-idp.dtsi"
/ {
model = "USBC Audio IDP";
compatible = "qcom,qcs6125-idp", "qcom,qcs6125", "qcom,idp";
qcom,msm-id = <468 0x10000>;
qcom,board-id = <34 2>;
};
&dsi_td4330_truly_cmd_display {
qcom,dsi-display-active;
};

View File

@@ -1,23 +0,0 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "qcs6125.dtsi"
#include "qcs6125-iot-idp.dtsi"
#include "qcs6125-iot-usbc-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS6125 IOT USBC Audio IDP";
compatible = "qcom,qcs6125-idp", "qcom,qcs6125", "qcom,idp";
qcom,board-id = <34 2>;
};

View File

@@ -1,19 +0,0 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "trinket-audio-overlay.dtsi"
&sm6150_snd {
qcom,msm-mbhc-usbc-audio-supported = <1>;
qcom,msm-mbhc-hphl-swh = <1>;
qcom,msm-mbhc-gnd-swh = <1>;
};

View File

@@ -1,22 +0,0 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "qcs6125.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS6125 SoC";
compatible = "qcom,qcs6125";
qcom,board-id = <0 0>;
};

View File

@@ -1,21 +0,0 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "trinket.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS6125";
compatible = "qcom,qcs6125";
qcom,msm-id = <468 0x0>;
qcom,msm-name = "QCS6125";
};

View File

@@ -81,3 +81,33 @@
rx-dll-bypass;
};
};
&tlmm {
/delete-node/ mdss_hdmi_ddc_active;
/delete-node/ mdss_hdmi_ddc_suspend;
rgmii_level_shifter: rgmii_level_shifter {
mux {
pins = "gpio16";
function = "gpio";
};
config {
pins = "gpio16";
drive-strength = <2>;
bias-pull-down;
output-low;
};
};
};
&ethqos_hw {
pinctrl-names = "dev-emac-mdc", "dev-emac-mdio",
"dev-emac-rgmii_txd0_state", "dev-emac-rgmii_txd1_state",
"dev-emac-rgmii_txd2_state", "dev-emac-rgmii_txd3_state",
"dev-emac-rgmii_txc_state", "dev-emac-rgmii_tx_ctl_state",
"dev-emac-rgmii_rxd0_state", "dev-emac-rgmii_rxd1_state",
"dev-emac-rgmii_rxd2_state", "dev-emac-rgmii_rxd3_state",
"dev-emac-rgmii_rxc_state", "dev-emac-rgmii_rx_ctl_state",
"dev-emac-phy_intr", "dev-emac-phy_reset_state",
"dev-emac-rgmii_lvl_shift_state";
pinctrl-16 = <&rgmii_level_shifter>;
};

View File

@@ -155,3 +155,33 @@
rx-dll-bypass;
};
};
&tlmm {
/delete-node/ mdss_hdmi_ddc_active;
/delete-node/ mdss_hdmi_ddc_suspend;
rgmii_level_shifter: rgmii_level_shifter {
mux {
pins = "gpio16";
function = "gpio";
};
config {
pins = "gpio16";
drive-strength = <2>;
bias-pull-down;
output-low;
};
};
};
&ethqos_hw {
pinctrl-names = "dev-emac-mdc", "dev-emac-mdio",
"dev-emac-rgmii_txd0_state", "dev-emac-rgmii_txd1_state",
"dev-emac-rgmii_txd2_state", "dev-emac-rgmii_txd3_state",
"dev-emac-rgmii_txc_state", "dev-emac-rgmii_tx_ctl_state",
"dev-emac-rgmii_rxd0_state", "dev-emac-rgmii_rxd1_state",
"dev-emac-rgmii_rxd2_state", "dev-emac-rgmii_rxd3_state",
"dev-emac-rgmii_rxc_state", "dev-emac-rgmii_rx_ctl_state",
"dev-emac-phy_intr", "dev-emac-phy_reset_state",
"dev-emac-rgmii_lvl_shift_state";
pinctrl-16 = <&rgmii_level_shifter>;
};

View File

@@ -213,11 +213,39 @@
extcon = <&usb2_extcon>;
};
&mtl_rx_setup {
queue2 {
snps,dcb-algorithm;
};
queue3 {
snps,dcb-algorithm;
};
};
&mtl_tx_setup {
queue2 {
snps,dcb-algorithm;
};
queue3 {
snps,dcb-algorithm;
};
};
&ethqos_hw {
status = "okay";
vreg_emac_phy-supply = <&vreg_emac_phy>;
vreg_rgmii_io_pads-supply = <&vreg_rgmii_io_pads>;
rxc-skew-ps = <0>;
qcom,qoe_mode = <1>;
qcom,qoe-queue = <2>;
qcom,qoe-vlan-offset = <0>;
snps,mtl-rx-config = <&mtl_rx_setup>;
snps,mtl-tx-config = <&mtl_tx_setup>;
qcom,cv2x_mode = <2>;
qcom,cv2x-queue = <3>;
qcom,cv2x-vlan-offset = <1>;
pinctrl-names = "dev-emac-mdc", "dev-emac-mdio",
"dev-emac-rgmii_txd0_state", "dev-emac-rgmii_txd1_state",

View File

@@ -54,3 +54,34 @@
qcom,default-policy-nop;
status = "okay";
};
&mtl_rx_setup {
queue2 {
snps,dcb-algorithm;
};
queue3 {
snps,dcb-algorithm;
};
};
&mtl_tx_setup {
queue2 {
snps,dcb-algorithm;
};
queue3 {
snps,dcb-algorithm;
};
};
&ethqos_hw {
qcom,qoe_mode = <1>;
qcom,qoe-queue = <2>;
qcom,qoe-vlan-offset = <0>;
snps,mtl-rx-config = <&mtl_rx_setup>;
snps,mtl-tx-config = <&mtl_tx_setup>;
qcom,cv2x_mode = <1>;
qcom,cv2x-queue = <3>;
qcom,cv2x-vlan-offset = <1>;
};

View File

@@ -54,3 +54,34 @@
qcom,default-policy-nop;
status = "okay";
};
&mtl_rx_setup {
queue2 {
snps,dcb-algorithm;
};
queue3 {
snps,dcb-algorithm;
};
};
&mtl_tx_setup {
queue2 {
snps,dcb-algorithm;
};
queue3 {
snps,dcb-algorithm;
};
};
&ethqos_hw {
qcom,qoe_mode = <1>;
qcom,qoe-queue = <2>;
qcom,qoe-vlan-offset = <0>;
snps,mtl-rx-config = <&mtl_rx_setup>;
snps,mtl-tx-config = <&mtl_tx_setup>;
qcom,cv2x_mode = <1>;
qcom,cv2x-queue = <3>;
qcom,cv2x-vlan-offset = <1>;
};

View File

@@ -338,6 +338,15 @@
pm6155-1-tz {
cooling-maps {
/*
* trip0 cooling map is dummy node to enable
* passive polling on trip0 violation.
*/
trip0_cpu0 {
trip = <&pm6155_trip0>;
cooling-device = <&CPU0 0 0>;
};
trip1_cpu0 {
trip = <&pm6155_trip1>;
cooling-device =

View File

@@ -186,6 +186,7 @@
<WAKE_TCS 1>,
<ACTIVE_TCS 2>,
<CONTROL_TCS 0>;
status = "disabled";
};
qmp_aop: qcom,qmp-aop@c300000 {

View File

@@ -193,6 +193,15 @@ pm8150_1_gpios: &pm8150_gpios {
};
cooling-maps {
/*
* trip0 cooling map is dummy node to enable
* passive polling on trip0 violation.
*/
trip0_cpu0 {
trip = <&pm8150_2_trip0>;
cooling-device = <&CPU0 0 0>;
};
trip1_cpu0 {
trip = <&pm8150_2_trip1>;
cooling-device =
@@ -253,6 +262,15 @@ pm8150_1_gpios: &pm8150_gpios {
pm8150_tz {
cooling-maps {
/*
* trip0 cooling map is dummy node to enable
* passive polling on trip0 violation.
*/
trip0_cpu0 {
trip = <&pm8150_trip0>;
cooling-device = <&CPU0 0 0>;
};
trip1_cpu0 {
trip = <&pm8150_trip1>;
cooling-device =

View File

@@ -21,6 +21,7 @@
};
/delete-node/ cpus;
/delete-node/ rename_blk;
};
&hab {

View File

@@ -19,6 +19,8 @@
label = "pmem_shared_mem";
};
};
/delete-node/ rename_blk;
};
&hab {

View File

@@ -1046,3 +1046,19 @@
&tlmm {
dirconn-list = <37 216 1>;
};
&iommu_qupv3_0_geni_se_cb {
iommus = <&apps_smmu 0xd8 0x0>;
};
&iommu_qupv3_1_geni_se_cb {
iommus = <&apps_smmu 0x618 0x0>;
};
&iommu_qupv3_2_geni_se_cb {
iommus = <&apps_smmu 0x7b8 0x0>;
};
&iommu_qupv3_3_geni_se_cb {
iommus = <&apps_smmu 0x4f8 0x0>;
};

View File

@@ -786,6 +786,38 @@
status="disabled";
};
&cti_cpu0 {
status = "disabled";
};
&cti_cpu1 {
status = "disabled";
};
&cti_cpu2 {
status = "disabled";
};
&cti_cpu3 {
status = "disabled";
};
&cti_cpu4 {
status = "disabled";
};
&cti_cpu5 {
status = "disabled";
};
&cti_cpu6 {
status = "disabled";
};
&cti_cpu7 {
status = "disabled";
};
#include "sa8155-audio.dtsi"
#include "sa8155-camera.dtsi"
#include "sa8155-camera-sensor.dtsi"

View File

@@ -122,6 +122,15 @@
};
cooling-maps {
/*
* trip0 cooling map is dummy node to enable
* passive polling on trip0 violation.
*/
trip0_cpu0 {
trip = <&pm8195_1_trip0>;
cooling-device = <&CPU0 0 0>;
};
trip1_cpu0 {
trip = <&pm8195_1_trip1>;
cooling-device =
@@ -206,6 +215,15 @@
};
cooling-maps {
/*
* trip0 cooling map is dummy node to enable
* passive polling on trip0 violation.
*/
trip0_cpu0 {
trip = <&pm8195_2_trip0>;
cooling-device = <&CPU0 0 0>;
};
trip1_cpu0 {
trip = <&pm8195_2_trip1>;
cooling-device =
@@ -290,6 +308,15 @@
};
cooling-maps {
/*
* trip0 cooling map is dummy node to enable
* passive polling on trip0 violation.
*/
trip0_cpu0 {
trip = <&pm8195_3_trip0>;
cooling-device = <&CPU0 0 0>;
};
trip1_cpu0 {
trip = <&pm8195_3_trip1>;
cooling-device =

View File

@@ -20,6 +20,7 @@
};
/delete-node/ cpus;
/delete-node/ rename_blk;
};
&hab {

View File

@@ -19,6 +19,7 @@
};
};
/delete-node/ rename_blk;
};
&hab {

View File

@@ -774,3 +774,8 @@
};
};
};
&qupv3_se2_i2c {
qcom,clk-freq-out = <400000>;
status = "ok";
};

View File

@@ -15,6 +15,7 @@
/plugin/;
#include "sda429-wdp.dtsi"
#include "sdm429-spyro-qrd-evt-audio.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDA429 QRD BG WDP Overlay";

View File

@@ -17,6 +17,7 @@
#include <dt-bindings/clock/qcom,rpmcc.h>
#include "sda429-wtp.dtsi"
#include "sdm429-mdss-panels.dtsi"
#include "sdm429-spyro-qrd-evt-audio.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDA429 QRD BG WTP Overlay";

View File

@@ -2631,6 +2631,7 @@
qcom,smem-id = <421>;
qcom,signal-aop;
qcom,minidump-id = <3>;
qcom,aux-minidump-ids = <4>;
qcom,complete-ramdump;
qcom,msm-bus,name = "pil-modem";

View File

@@ -618,6 +618,7 @@
qcom,phy-index = <0>;
qcom,bond-dual-ctrl = <1 0>;
qcom,bond-tri-ctrl = <2 0 1>;
reg = <0xae90000 0x0dc>,
<0xae90200 0x0c0>,
@@ -653,13 +654,15 @@
<&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>,
<&mdss_dp0_pll DP_VCO_DIVIDED_CLK_SRC_MUX>,
<&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
<&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
<&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>,
<&mdss_dp2_pll DP_VCO_DIVIDED_CLK_SRC_MUX>;
clock-names = "core_aux_clk", "core_usb_ref_clk_src",
"core_usb_ref_clk", "core_usb_pipe_clk",
"link_clk", "link_iface_clk",
"crypto_clk", "pixel_clk_rcg", "pixel_parent",
"pixel1_clk_rcg", "pixel1_parent",
"strm0_pixel_clk", "strm1_pixel_clk";
"strm0_pixel_clk", "strm1_pixel_clk",
"bond_pixel_parent";
qcom,phy-version = <0x420>;
qcom,phy-mode = "dp";
@@ -766,13 +769,15 @@
<&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>,
<&mdss_dp1_pll DP_VCO_DIVIDED_CLK_SRC_MUX>,
<&clock_dispcc DISP_CC_MDSS_DP_PIXEL2_CLK>,
<&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
<&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>,
<&mdss_dp2_pll DP_VCO_DIVIDED_CLK_SRC_MUX>;
clock-names = "core_aux_clk", "core_usb_ref_clk_src",
"core_usb_ref_clk", "core_usb_pipe_clk",
"link_clk", "link_iface_clk",
"crypto_clk", "pixel_clk_rcg", "pixel_parent",
"pixel1_clk_rcg", "pixel1_parent",
"strm0_pixel_clk", "strm1_pixel_clk";
"strm0_pixel_clk", "strm1_pixel_clk",
"bond_pixel_parent";
qcom,phy-version = <0x420>;
qcom,phy-mode = "dp";
@@ -872,11 +877,13 @@
<&clock_dispcc DISP_CC_MDSS_EDP_LINK_INTF_CLK>,
<&clock_dispcc DISP_CC_MDSS_EDP_PIXEL_CLK_SRC>,
<&mdss_edp_pll DP_VCO_DIVIDED_CLK_SRC_MUX>,
<&clock_dispcc DISP_CC_MDSS_EDP_PIXEL_CLK>;
<&clock_dispcc DISP_CC_MDSS_EDP_PIXEL_CLK>,
<&mdss_dp2_pll DP_VCO_DIVIDED_CLK_SRC_MUX>;
clock-names = "core_aux_clk", "core_ref_clk",
"link_clk", "link_iface_clk",
"pixel_clk_rcg", "pixel_parent",
"strm0_pixel_clk";
"strm0_pixel_clk",
"bond_pixel_parent";
qcom,phy-version = <0x500>;
qcom,phy-mode = "edp";
@@ -895,6 +902,7 @@
qcom,dsc-feature-enable;
qcom,fec-feature-enable;
qcom,widebus-enable;
qcom,max-dp-dsc-blks = <2>;
qcom,max-dp-dsc-input-width-pixs = <2048>;

View File

@@ -46,6 +46,7 @@
hsuart0 = &qupv3_se13_4uart;
spi0 = &qupv3_se3_spi;
i2c0 = &qupv3_se4_i2c;
i2c2 = &qupv3_se2_i2c;
};
cpus {

View File

@@ -21,4 +21,10 @@
qcom,board-id = <0x08010008 0x0>;
};
&usb {
extcon = <&vbus_detect>;
};
&vbus_detect {
status = "okay";
};

View File

@@ -264,7 +264,7 @@
reg-names = "wdt-base";
interrupts = <1 3 0>, <1 2 0>;
qcom,bark-time = <11000>;
qcom,pet-time = <10000>;
qcom,pet-time = <9360>;
qcom,wakeup-enable;
};
@@ -1459,7 +1459,7 @@
};
mtl_tx_setup: tx-queues-config {
snps,tx-queues-to-use = <5>;
snps,tx-queues-to-use = <4>;
snps,tx-sched-sp;
queue0 {
snps,dcb-algorithm;

View File

@@ -1146,6 +1146,35 @@
};
};
gpio_jack_det_line_in {
jack_det_linein_default: jack_det_linein_default {
mux {
pins = "gpio1";
function = "gpio";
};
config {
pins = "gpio1";
bias-pull-up; /* pull up */
input-enable;
};
};
};
gpio_jack_det_line_out {
jack_det_lineout_default: jack_det_lineout_default {
mux {
pins = "gpio60";
function = "gpio";
};
config {
pins = "gpio60";
bias-pull-up; /* pull up */
input-enable;
};
};
};
ter_i2s_sck_ws {
ter_i2s_sck_sleep: ter_i2s_sck_sleep {
mux {

View File

@@ -2428,6 +2428,7 @@
qcom,smem-id = <421>;
qcom,signal-aop;
qcom,minidump-id = <3>;
qcom,aux-minidump-ids = <4>;
qcom,complete-ramdump;
/* Inputs from mss */

View File

@@ -589,7 +589,7 @@ CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
# CONFIG_MEMORY_FAILURE is not set
# CONFIG_TRANSPARENT_HUGEPAGE is not set
# CONFIG_ARCH_WANTS_THP_SWAP is not set
# CONFIG_CLEANCACHE is not set
CONFIG_CLEANCACHE=y
# CONFIG_FRONTSWAP is not set
CONFIG_CMA=y
CONFIG_CMA_AREAS=7
@@ -1048,7 +1048,7 @@ CONFIG_IP_NF_TARGET_REDIRECT=y
CONFIG_IP_NF_MANGLE=y
# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
# CONFIG_IP_NF_TARGET_ECN is not set
# CONFIG_IP_NF_TARGET_TTL is not set
CONFIG_IP_NF_TARGET_TTL=y
CONFIG_IP_NF_RAW=y
CONFIG_IP_NF_SECURITY=y
CONFIG_IP_NF_ARPTABLES=y
@@ -1075,7 +1075,7 @@ CONFIG_IP6_NF_MATCH_HL=y
# CONFIG_IP6_NF_MATCH_MH is not set
CONFIG_IP6_NF_MATCH_RPFILTER=y
# CONFIG_IP6_NF_MATCH_RT is not set
# CONFIG_IP6_NF_TARGET_HL is not set
CONFIG_IP6_NF_TARGET_HL=y
CONFIG_IP6_NF_FILTER=y
CONFIG_IP6_NF_TARGET_REJECT=y
# CONFIG_IP6_NF_TARGET_SYNPROXY is not set
@@ -2072,6 +2072,8 @@ CONFIG_HW_RANDOM_MSM_LEGACY=y
#
# Diag Support
#
CONFIG_DIAG_CHAR=y
CONFIG_DIAG_OVER_USB=y
CONFIG_MSM_FASTCVPD=y
CONFIG_MSM_ADSPRPC=y
# CONFIG_MSM_RDBG is not set
@@ -2170,6 +2172,7 @@ CONFIG_SPI_QCOM_GENI=y
CONFIG_SPI_SPIDEV=y
# CONFIG_SPI_TLE62X0 is not set
# CONFIG_SPI_SLAVE is not set
# CONFIG_SPI_DYNAMIC is not set
CONFIG_SPMI=y
CONFIG_SPMI_MSM_PMIC_ARB=y
# CONFIG_SPMI_MSM_PMIC_ARB_DEBUG is not set
@@ -3084,13 +3087,18 @@ CONFIG_SND_PROC_FS=y
# CONFIG_SND_SEQUENCER is not set
# CONFIG_SND_OPL3_LIB_SEQ is not set
# CONFIG_SND_OPL4_LIB_SEQ is not set
# CONFIG_SND_DRIVERS is not set
CONFIG_SND_DRIVERS=y
# CONFIG_SND_DUMMY is not set
# CONFIG_SND_ALOOP is not set
# CONFIG_SND_MTPAV is not set
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
#
# HD-Audio
#
CONFIG_SND_HDA_PREALLOC_SIZE=64
# CONFIG_SND_SPI is not set
CONFIG_SND_SPI=y
CONFIG_SND_USB=y
CONFIG_SND_USB_AUDIO=y
# CONFIG_SND_USB_UA101 is not set
@@ -3522,6 +3530,7 @@ CONFIG_USB_F_MTP=y
CONFIG_USB_F_PTP=y
CONFIG_USB_F_AUDIO_SRC=y
CONFIG_USB_F_ACC=y
CONFIG_USB_F_DIAG=y
CONFIG_USB_F_CDEV=y
CONFIG_USB_F_CCID=y
CONFIG_USB_F_GSI=y
@@ -3553,7 +3562,7 @@ CONFIG_USB_CONFIGFS_F_MIDI=y
# CONFIG_USB_CONFIGFS_F_HID is not set
# CONFIG_USB_CONFIGFS_F_UVC is not set
# CONFIG_USB_CONFIGFS_F_PRINTER is not set
# CONFIG_USB_CONFIGFS_F_DIAG is not set
CONFIG_USB_CONFIGFS_F_DIAG=y
CONFIG_USB_CONFIGFS_F_CDEV=y
CONFIG_USB_CONFIGFS_F_CCID=y
CONFIG_USB_CONFIGFS_F_GSI=y
@@ -4243,6 +4252,7 @@ CONFIG_QCOM_AOP_DDRSS_COMMANDS=y
# CONFIG_QCOM_ADSP_MANUAL_VOTE is not set
# CONFIG_MSM_BAM_DMUX is not set
# CONFIG_MSM_BGCOM is not set
# CONFIG_MSM_BGRSB is not set
# CONFIG_MSM_PIL_SSR_BG is not set
CONFIG_QCOM_SOC_INFO=y
# CONFIG_RENAME_BLOCK_DEVICE is not set
@@ -4711,7 +4721,14 @@ CONFIG_NVMEM_SPMI_SDAM=y
# CONFIG_FSI is not set
# CONFIG_TEE is not set
CONFIG_SENSORS_SSC=y
# CONFIG_ESOC is not set
CONFIG_ESOC=y
CONFIG_ESOC_DEV=y
CONFIG_ESOC_CLIENT=y
# CONFIG_ESOC_DEBUG is not set
CONFIG_ESOC_MDM_4x=y
CONFIG_ESOC_MDM_DRV=y
CONFIG_ESOC_MDM_DBG_ENG=y
# CONFIG_MDM_DBG_REQ_ENG is not set
#
# Qualcomm RmNet extensions

View File

@@ -445,8 +445,7 @@ static ssize_t diag_dbgfs_read_usbinfo(struct file *file, char __user *ubuf,
"write count: %lu\n"
"read work pending: %d\n"
"read done work pending: %d\n"
"connect work pending: %d\n"
"disconnect work pending: %d\n"
"event work pending: %d\n"
"max size supported: %d\n\n",
usb_info->id,
usb_info->name,
@@ -460,8 +459,7 @@ static ssize_t diag_dbgfs_read_usbinfo(struct file *file, char __user *ubuf,
usb_info->write_cnt,
work_pending(&usb_info->read_work),
work_pending(&usb_info->read_done_work),
work_pending(&usb_info->connect_work),
work_pending(&usb_info->disconnect_work),
work_pending(&usb_info->event_work),
usb_info->max_size);
bytes_in_buffer += bytes_written;

View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2014-2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2014-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -94,7 +94,29 @@ struct diag_usb_info diag_usb[NUM_DIAG_USB_DEV] = {
}
#endif
};
static int diag_usb_event_add(struct diag_usb_info *usb_info, int data)
{
struct diag_usb_event_q *entry = NULL;
entry = kzalloc(sizeof(struct diag_usb_event_q), GFP_ATOMIC);
if (!entry)
return -ENOMEM;
entry->data = data;
INIT_LIST_HEAD(&entry->link);
list_add_tail(&entry->link, &usb_info->event_q);
return 0;
}
static void diag_usb_event_remove(struct diag_usb_event_q *entry)
{
if (!entry)
return;
list_del(&entry->link);
kfree(entry);
entry = NULL;
}
static int diag_usb_buf_tbl_add(struct diag_usb_info *usb_info,
unsigned char *buf, uint32_t len, int ctxt)
{
@@ -202,25 +224,6 @@ static void usb_connect(struct diag_usb_info *ch)
queue_work(ch->usb_wq, &(ch->read_work));
}
static void usb_connect_work_fn(struct work_struct *work)
{
struct diag_usb_info *ch = container_of(work, struct diag_usb_info,
connect_work);
wait_event_interruptible(ch->wait_q, ch->enabled > 0);
ch->max_size = usb_diag_request_size(ch->hdl);
atomic_set(&ch->connected, 1);
DIAG_LOG(DIAG_DEBUG_PERIPHERALS,
"diag: USB channel %s: disconnected_status: %d, connected_status: %d\n",
ch->name, atomic_read(&ch->disconnected), atomic_read(&ch->connected));
usb_connect(ch);
if (atomic_read(&ch->disconnected))
wake_up_interruptible(&ch->wait_q);
}
/*
* This function is called asynchronously when USB is disconnected
* and synchronously when Diag wants to disconnect from USB
@@ -232,32 +235,63 @@ static void usb_disconnect(struct diag_usb_info *ch)
ch->ops->close(ch->ctxt, DIAG_USB_MODE);
}
static void usb_disconnect_work_fn(struct work_struct *work)
static void usb_event_work_fn(struct work_struct *work)
{
struct diag_usb_info *ch = container_of(work, struct diag_usb_info,
disconnect_work);
event_work);
struct diag_usb_event_q *entry = NULL;
unsigned long flags;
if (!ch)
return;
spin_lock_irqsave(&ch->event_lock, flags);
entry = list_first_entry(&(ch->event_q), struct diag_usb_event_q, link);
if (!entry) {
spin_unlock_irqrestore(&ch->event_lock, flags);
return;
}
atomic_set(&ch->disconnected, 1);
DIAG_LOG(DIAG_DEBUG_PERIPHERALS,
"diag: USB channel %s: disconnected_status: %d, connected_status: %d\n",
ch->name, atomic_read(&ch->disconnected), atomic_read(&ch->connected));
switch (entry->data) {
case USB_DIAG_CONNECT:
wait_event_interruptible(ch->wait_q, atomic_read(&ch->connected) > 0);
atomic_set(&ch->connected, 0);
atomic_set(&ch->disconnected, 0);
DIAG_LOG(DIAG_DEBUG_PERIPHERALS,
"diag: USB channel %s: Cleared disconnected(%d) and connected(%d) status\n",
ch->name, atomic_read(&ch->disconnected), atomic_read(&ch->connected));
diag_usb_event_remove(entry);
spin_unlock_irqrestore(&ch->event_lock, flags);
if (!atomic_read(&ch->connected) &&
driver->usb_connected && diag_mask_param() &&
ch->id == DIAG_USB_LOCAL)
diag_clear_masks(0);
wait_event_interruptible(ch->wait_q, ch->enabled > 0);
ch->max_size = usb_diag_request_size(ch->hdl);
atomic_set(&ch->connected, 1);
DIAG_LOG(DIAG_DEBUG_PERIPHERALS,
"diag: USB channel %s: connected_status: %d\n",
ch->name, atomic_read(&ch->connected));
usb_connect(ch);
break;
case USB_DIAG_DISCONNECT:
diag_usb_event_remove(entry);
spin_unlock_irqrestore(&ch->event_lock, flags);
atomic_set(&ch->connected, 0);
DIAG_LOG(DIAG_DEBUG_PERIPHERALS,
"diag: USB channel %s: Cleared connected(%d) status\n",
ch->name, atomic_read(&ch->connected));
if (!atomic_read(&ch->connected) &&
driver->usb_connected &&
(ch->id == DIAG_USB_LOCAL) && diag_mask_param())
diag_clear_masks(0);
usb_disconnect(ch);
break;
default:
spin_unlock_irqrestore(&ch->event_lock, flags);
break;
}
if (!list_empty(&ch->event_q))
queue_work(ch->usb_wq, &(ch->event_work));
usb_disconnect(ch);
}
static void usb_read_work_fn(struct work_struct *work)
@@ -352,8 +386,7 @@ static void diag_usb_write_done(struct diag_usb_info *ch,
spin_unlock_irqrestore(&ch->write_lock, flags);
return;
}
DIAG_LOG(DIAG_DEBUG_MUX, "full write_done, ctxt: %d\n",
ctxt);
DIAG_LOG(DIAG_DEBUG_MUX, "full write_done\n");
list_del(&entry->track);
ctxt = entry->ctxt;
buf = entry->buf;
@@ -386,15 +419,20 @@ static void diag_usb_notifier(void *priv, unsigned int event,
case USB_DIAG_CONNECT:
pr_info("diag: USB channel %s: Received Connect event\n",
usb_info->name);
if (!atomic_read(&usb_info->connected))
queue_work(usb_info->usb_wq,
&usb_info->connect_work);
spin_lock_irqsave(&usb_info->event_lock, flags);
diag_usb_event_add(usb_info, USB_DIAG_CONNECT);
spin_unlock_irqrestore(&usb_info->event_lock, flags);
queue_work(usb_info->usb_wq,
&usb_info->event_work);
break;
case USB_DIAG_DISCONNECT:
pr_info("diag: USB channel %s: Received Disconnect event\n",
usb_info->name);
spin_lock_irqsave(&usb_info->event_lock, flags);
diag_usb_event_add(usb_info, USB_DIAG_DISCONNECT);
spin_unlock_irqrestore(&usb_info->event_lock, flags);
queue_work(usb_info->usb_wq,
&usb_info->disconnect_work);
&usb_info->event_work);
break;
case USB_DIAG_READ_DONE:
spin_lock_irqsave(&usb_info->lock, flags);
@@ -665,6 +703,7 @@ int diag_usb_register(int id, int ctxt, struct diag_mux_ops *ops)
ch->ctxt = ctxt;
spin_lock_init(&ch->lock);
spin_lock_init(&ch->write_lock);
spin_lock_init(&ch->event_lock);
ch->read_buf = kzalloc(USB_MAX_OUT_BUF, GFP_KERNEL);
if (!ch->read_buf)
goto err;
@@ -672,7 +711,6 @@ int diag_usb_register(int id, int ctxt, struct diag_mux_ops *ops)
if (!ch->read_ptr)
goto err;
atomic_set(&ch->connected, 0);
atomic_set(&ch->disconnected, 0);
atomic_set(&ch->read_pending, 0);
/*
* This function is called when the mux registers with Diag-USB.
@@ -681,11 +719,11 @@ int diag_usb_register(int id, int ctxt, struct diag_mux_ops *ops)
*/
atomic_set(&ch->diag_state, 1);
INIT_LIST_HEAD(&ch->buf_tbl);
INIT_LIST_HEAD(&ch->event_q);
diagmem_init(driver, ch->mempool);
INIT_WORK(&(ch->read_work), usb_read_work_fn);
INIT_WORK(&(ch->read_done_work), usb_read_done_work_fn);
INIT_WORK(&(ch->connect_work), usb_connect_work_fn);
INIT_WORK(&(ch->disconnect_work), usb_disconnect_work_fn);
INIT_WORK(&(ch->event_work), usb_event_work_fn);
init_waitqueue_head(&ch->wait_q);
strlcpy(wq_name, "DIAG_USB_", sizeof(wq_name));
strlcat(wq_name, ch->name, sizeof(wq_name));

View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2014-2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2014-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -46,6 +46,11 @@ struct diag_usb_buf_tbl_t {
int ctxt;
};
struct diag_usb_event_q {
struct list_head link;
int data;
};
struct diag_usb_info {
int id;
int ctxt;
@@ -53,7 +58,6 @@ struct diag_usb_info {
atomic_t connected;
atomic_t diag_state;
atomic_t read_pending;
atomic_t disconnected;
int enabled;
int mempool;
int max_size;
@@ -62,16 +66,17 @@ struct diag_usb_info {
unsigned long write_cnt;
spinlock_t lock;
spinlock_t write_lock;
spinlock_t event_lock;
struct usb_diag_ch *hdl;
struct diag_mux_ops *ops;
unsigned char *read_buf;
struct diag_request *read_ptr;
struct work_struct read_work;
struct work_struct read_done_work;
struct work_struct connect_work;
struct work_struct disconnect_work;
struct work_struct event_work;
struct workqueue_struct *usb_wq;
wait_queue_head_t wait_q;
struct list_head event_q;
};
#ifdef CONFIG_DIAG_OVER_USB

View File

@@ -69,7 +69,7 @@ static struct hlist_head *all_lists[] = {
NULL,
};
static struct hlist_head *orphan_list[] = {
static struct hlist_head __maybe_unused *orphan_list[] = {
&clk_orphan_list,
NULL,
};

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -853,7 +853,9 @@ static struct clk_rcg2 byte0_clk_src = {
};
static const struct freq_tbl ftbl_emac_clk_src[] = {
F(2500000, P_GPLL1_OUT_MAIN, 4, 1, 50),
F(5000000, P_GPLL1_OUT_MAIN, 2, 1, 50),
F(25000000, P_GPLL1_OUT_MAIN, 1, 1, 20),
F(50000000, P_GPLL1_OUT_MAIN, 10, 0, 0),
F(125000000, P_GPLL1_OUT_MAIN, 4, 0, 0),
F(250000000, P_GPLL1_OUT_MAIN, 2, 0, 0),

View File

@@ -332,7 +332,7 @@ int drm_primary_helper_update(struct drm_plane *plane, struct drm_crtc *crtc,
};
struct drm_connector **connector_list;
int num_connectors, ret;
bool visible;
bool visible = false;
ret = drm_plane_helper_check_update(plane, crtc, fb,
&src, &dest, &clip,

View File

@@ -242,7 +242,7 @@ static bool dsi_parser_parse_prop(struct device *dev,
if (!prop->raw)
goto end;
strlcpy(prop->raw, buf, strlen(buf) + 1);
strlcpy(prop->raw, buf, strlen(prop->raw));
found = true;

View File

@@ -224,6 +224,7 @@ enum sde_enc_rc_states {
* @cur_conn_roi: current connector roi
* @prv_conn_roi: previous connector roi to optimize if unchanged
* @crtc pointer to drm_crtc
* @first_kickoff_done: boolean for whether the first kickoff is done
* @recovery_events_enabled: status of hw recovery feature enable by client
* @elevated_ahb_vote: increase AHB bus speed for the first frame
* after power collapse
@@ -284,6 +285,7 @@ struct sde_encoder_virt {
struct sde_rect cur_conn_roi;
struct sde_rect prv_conn_roi;
struct drm_crtc *crtc;
bool first_kickoff_done;
bool recovery_events_enabled;
bool elevated_ahb_vote;
@@ -4700,7 +4702,7 @@ static int _sde_encoder_reset_ctl_hw(struct drm_encoder *drm_enc)
void sde_encoder_kickoff(struct drm_encoder *drm_enc, bool is_error)
{
static bool first_run = true;
static __maybe_unused bool first_run = true;
struct sde_encoder_virt *sde_enc;
struct sde_encoder_phys *phys;
ktime_t wakeup_time;
@@ -4740,17 +4742,15 @@ void sde_encoder_kickoff(struct drm_encoder *drm_enc, bool is_error)
* Trigger a panel reset if this is the first kickoff and the refresh
* rate is not 60 Hz
*/
if (cmpxchg(&first_run, true, false) &&
if (!cmpxchg(&sde_enc->first_kickoff_done, false, true) &&
sde_enc->crtc->mode.vrefresh != 60) {
struct sde_connector *conn = container_of(phys->connector, struct sde_connector, base);
struct sde_connector *conn = to_sde_connector(phys->connector);
struct drm_event event = {
.type = DRM_EVENT_PANEL_DEAD,
.length = sizeof(bool)
};
conn->panel_dead = true;
event.type = DRM_EVENT_PANEL_DEAD;
event.length = sizeof(bool);
msm_mode_object_event_notify(&conn->base.base,
conn->base.dev, &event, (u8 *) &conn->panel_dead);
}

View File

@@ -1076,6 +1076,7 @@
/* GPUCC registers */
#define A6XX_GPU_CC_GX_GDSCR 0x24403
#define A6XX_GPU_CC_GX_DOMAIN_MISC 0x24542
#define A6XX_GPU_CC_CX_GDSCR 0x2441B
/* GPU RSC sequencer registers */
#define A6XX_RSCC_PDC_SEQ_START_ADDR 0x23408

View File

@@ -3315,11 +3315,11 @@ static void a5xx_gpmu_int_callback(struct adreno_device *adreno_dev, int bit)
}
/*
* a5x_gpc_err_int_callback() - Isr for GPC error interrupts
* a5xx_gpc_err_int_callback() - Isr for GPC error interrupts
* @adreno_dev: Pointer to device
* @bit: Interrupt bit
*/
void a5x_gpc_err_int_callback(struct adreno_device *adreno_dev, int bit)
static void a5xx_gpc_err_int_callback(struct adreno_device *adreno_dev, int bit)
{
struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
@@ -3329,7 +3329,7 @@ void a5x_gpc_err_int_callback(struct adreno_device *adreno_dev, int bit)
* with help of register dump.
*/
KGSL_DRV_CRIT(device, "RBBM: GPC error\n");
KGSL_DRV_CRIT_RATELIMIT(device, "RBBM: GPC error\n");
adreno_irqctrl(adreno_dev, 0);
/* Trigger a fault in the dispatcher - this will effect a restart */
@@ -3367,7 +3367,7 @@ static struct adreno_irq_funcs a5xx_irq_funcs[32] = {
ADRENO_IRQ_CALLBACK(a5xx_err_callback),
/* 6 - RBBM_ATB_ASYNC_OVERFLOW */
ADRENO_IRQ_CALLBACK(a5xx_err_callback),
ADRENO_IRQ_CALLBACK(a5x_gpc_err_int_callback), /* 7 - GPC_ERR */
ADRENO_IRQ_CALLBACK(a5xx_gpc_err_int_callback), /* 7 - GPC_ERR */
ADRENO_IRQ_CALLBACK(a5xx_preempt_callback),/* 8 - CP_SW */
ADRENO_IRQ_CALLBACK(a5xx_cp_hw_err_callback), /* 9 - CP_HW_ERROR */
/* 10 - CP_CCU_FLUSH_DEPTH_TS */

View File

@@ -1760,6 +1760,29 @@ static void a6xx_cp_callback(struct adreno_device *adreno_dev, int bit)
adreno_dispatcher_schedule(device);
}
/*
* a6xx_gpc_err_int_callback() - Isr for GPC error interrupts
* @adreno_dev: Pointer to device
* @bit: Interrupt bit
*/
static void a6xx_gpc_err_int_callback(struct adreno_device *adreno_dev, int bit)
{
struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
/*
* GPC error is typically the result of mistake SW programming.
* Force GPU fault for this interrupt so that we can debug it
* with help of register dump.
*/
KGSL_DRV_CRIT_RATELIMIT(device, "RBBM: GPC error\n");
adreno_irqctrl(adreno_dev, 0);
/* Trigger a fault in the dispatcher - this will effect a restart */
adreno_set_gpu_fault(adreno_dev, ADRENO_SOFT_FAULT);
adreno_dispatcher_schedule(device);
}
#define A6XX_INT_MASK \
((1 << A6XX_INT_CP_AHB_ERROR) | \
(1 << A6XX_INT_ATB_ASYNCFIFO_OVERFLOW) | \
@@ -1785,7 +1808,7 @@ static struct adreno_irq_funcs a6xx_irq_funcs[32] = {
ADRENO_IRQ_CALLBACK(NULL), /* 5 - UNUSED */
/* 6 - RBBM_ATB_ASYNC_OVERFLOW */
ADRENO_IRQ_CALLBACK(a6xx_err_callback),
ADRENO_IRQ_CALLBACK(NULL), /* 7 - GPC_ERR */
ADRENO_IRQ_CALLBACK(a6xx_gpc_err_int_callback), /* 7 - GPC_ERR */
ADRENO_IRQ_CALLBACK(a6xx_preemption_callback),/* 8 - CP_SW */
ADRENO_IRQ_CALLBACK(a6xx_cp_hw_err_callback), /* 9 - CP_HW_ERROR */
ADRENO_IRQ_CALLBACK(NULL), /* 10 - CP_CCU_FLUSH_DEPTH_TS */

View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -350,6 +350,8 @@ static int a6xx_gmu_start(struct kgsl_device *device)
/* Bring GMU out of reset */
gmu_core_regwrite(device, A6XX_GMU_CM3_SYSRESET, 0);
/* Make sure the request completes before continuing */
wmb();
if (timed_poll_check(device,
A6XX_GMU_CM3_FW_INIT_RESULT,
0xBABEFACE,
@@ -828,6 +830,21 @@ static bool a6xx_gmu_gx_is_on(struct adreno_device *adreno_dev)
return is_on(val);
}
/*
* a6xx_gmu_cx_is_on() - Check if CX is on using GPUCC register
* @device - Pointer to KGSL device struct
*/
static bool a6xx_gmu_cx_is_on(struct kgsl_device *device)
{
unsigned int val;
if (ADRENO_QUIRK(ADRENO_DEVICE(device), ADRENO_QUIRK_CX_GDSC))
return regulator_is_enabled(KGSL_GMU_DEVICE(device)->cx_gdsc);
gmu_core_regread(device, A6XX_GPU_CC_CX_GDSCR, &val);
return (val & BIT(31));
}
/*
* a6xx_gmu_sptprac_is_on() - Check if SPTP is on using pwr status register
* @adreno_dev - Pointer to adreno_device
@@ -1047,6 +1064,13 @@ static int a6xx_gmu_fw_start(struct kgsl_device *device,
gmu_core_regwrite(device, A6XX_GMU_AHB_FENCE_RANGE_0,
GMU_FENCE_RANGE_MASK);
/*
* Make sure that CM3 state is at reset value. Snapshot is changing
* NMI bit and if we boot up GMU with NMI bit set.GMU will boot straight
* in to NMI handler without executing __main code
*/
gmu_core_regwrite(device, A6XX_GMU_CM3_CFG, 0x4052);
/* Pass chipid to GMU FW, must happen before starting GMU */
/* Keep Core and Major bitfields unchanged */
@@ -1188,6 +1212,8 @@ static int a6xx_gmu_suspend(struct kgsl_device *device)
/* Check no outstanding RPMh voting */
a6xx_complete_rpmh_votes(device);
gmu_core_regwrite(device, A6XX_GMU_CM3_SYSRESET, 1);
/*
* This is based on the assumption that GMU is the only one controlling
* the GX HS. This code path is the only client voting for GX through
@@ -1546,6 +1572,7 @@ struct gmu_dev_ops adreno_a6xx_gmudev = {
.enable_lm = a6xx_gmu_enable_lm,
.rpmh_gpu_pwrctrl = a6xx_gmu_rpmh_gpu_pwrctrl,
.gx_is_on = a6xx_gmu_gx_is_on,
.cx_is_on = a6xx_gmu_cx_is_on,
.wait_for_lowest_idle = a6xx_gmu_wait_for_lowest_idle,
.wait_for_gmu_idle = a6xx_gmu_wait_for_idle,
.ifpc_store = a6xx_gmu_ifpc_store,

View File

@@ -2683,7 +2683,7 @@ long kgsl_ioctl_gpuobj_import(struct kgsl_device_private *dev_priv,
return 0;
unmap:
if (param->type == KGSL_USER_MEM_TYPE_DMABUF) {
if (kgsl_memdesc_usermem_type(&entry->memdesc) == KGSL_MEM_ENTRY_ION) {
kgsl_destroy_ion(entry->priv_data);
entry->memdesc.sgt = NULL;
}
@@ -2997,7 +2997,7 @@ long kgsl_ioctl_map_user_mem(struct kgsl_device_private *dev_priv,
return result;
error_attach:
switch (memtype) {
switch (kgsl_memdesc_usermem_type(&entry->memdesc)) {
case KGSL_MEM_ENTRY_ION:
kgsl_destroy_ion(entry->priv_data);
entry->memdesc.sgt = NULL;
@@ -4901,7 +4901,7 @@ int kgsl_device_platform_probe(struct kgsl_device *device)
{
int status = -EINVAL;
struct resource *res;
int cpu;
__maybe_unused int cpu;
status = _register_device(device);
if (status)

View File

@@ -964,6 +964,8 @@ static int gmu_rpmh_init(struct kgsl_device *device,
static void send_nmi_to_gmu(struct adreno_device *adreno_dev)
{
u32 val;
/* Mask so there's no interrupt caused by NMI */
adreno_write_gmureg(adreno_dev,
ADRENO_REG_GMU_GMU2HOST_INTR_MASK, 0xFFFFFFFF);
@@ -972,9 +974,10 @@ static void send_nmi_to_gmu(struct adreno_device *adreno_dev)
wmb();
adreno_write_gmureg(adreno_dev,
ADRENO_REG_GMU_NMI_CONTROL_STATUS, 0);
adreno_write_gmureg(adreno_dev,
ADRENO_REG_GMU_CM3_CFG,
(1 << GMU_CM3_CFG_NONMASKINTR_SHIFT));
adreno_read_gmureg(adreno_dev, ADRENO_REG_GMU_CM3_CFG, &val);
val |= 1 << GMU_CM3_CFG_NONMASKINTR_SHIFT;
adreno_write_gmureg(adreno_dev, ADRENO_REG_GMU_CM3_CFG, val);
/* Make sure the NMI is invoked before we proceed*/
wmb();
@@ -1538,8 +1541,9 @@ static int gmu_enable_gdsc(struct gmu_device *gmu)
}
#define CX_GDSC_TIMEOUT 5000 /* ms */
static int gmu_disable_gdsc(struct gmu_device *gmu)
static int gmu_disable_gdsc(struct kgsl_device *device)
{
struct gmu_device *gmu = KGSL_GMU_DEVICE(device);
int ret;
unsigned long t;
@@ -1561,13 +1565,13 @@ static int gmu_disable_gdsc(struct gmu_device *gmu)
*/
t = jiffies + msecs_to_jiffies(CX_GDSC_TIMEOUT);
do {
if (!regulator_is_enabled(gmu->cx_gdsc))
if (!gmu_core_dev_cx_is_on(device))
return 0;
usleep_range(10, 100);
} while (!(time_after(jiffies, t)));
if (!regulator_is_enabled(gmu->cx_gdsc))
if (!gmu_core_dev_cx_is_on(device))
return 0;
dev_err(&gmu->pdev->dev, "GMU CX gdsc off timeout");
@@ -1595,7 +1599,7 @@ static int gmu_suspend(struct kgsl_device *device)
if (ADRENO_QUIRK(adreno_dev, ADRENO_QUIRK_CX_GDSC))
regulator_set_mode(gmu->cx_gdsc, REGULATOR_MODE_IDLE);
gmu_disable_gdsc(gmu);
gmu_disable_gdsc(device);
if (ADRENO_QUIRK(adreno_dev, ADRENO_QUIRK_CX_GDSC))
regulator_set_mode(gmu->cx_gdsc, REGULATOR_MODE_NORMAL);
@@ -1752,7 +1756,7 @@ static void gmu_stop(struct kgsl_device *device)
gmu_dev_ops->rpmh_gpu_pwrctrl(adreno_dev, GMU_FW_STOP, 0, 0);
gmu_disable_clks(device);
gmu_disable_gdsc(gmu);
gmu_disable_gdsc(device);
msm_bus_scale_client_update_request(gmu->pcl, 0);
return;
@@ -1862,7 +1866,7 @@ static bool gmu_is_initialized(struct kgsl_device *device)
ret = gmu_dev_ops->is_initialized(adreno_dev);
gmu_disable_clks(device);
gmu_disable_gdsc(gmu);
gmu_disable_gdsc(device);
return ret;
}

View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -275,6 +275,16 @@ void gmu_core_regrmw(struct kgsl_device *device,
gmu_core_regwrite(device, offsetwords, val | bits);
}
bool gmu_core_dev_cx_is_on(struct kgsl_device *device)
{
struct gmu_dev_ops *ops = GMU_DEVICE_OPS(device);
if (ops && ops->cx_is_on)
return ops->cx_is_on(device);
return true;
}
bool gmu_core_is_initialized(struct kgsl_device *device)
{
struct gmu_core_ops *gmu_core_ops = GMU_CORE_OPS(device);

View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -164,6 +164,7 @@ struct gmu_dev_ops {
unsigned int val);
unsigned int (*ifpc_show)(struct adreno_device *adreno_dev);
void (*snapshot)(struct adreno_device *, struct kgsl_snapshot *);
bool (*cx_is_on)(struct kgsl_device *device);
void (*halt_execution)(struct kgsl_device *device);
int (*wait_for_active_transition)(struct adreno_device *adreno_dev);
bool (*is_initialized)(struct adreno_device *adreno_dev);
@@ -231,6 +232,7 @@ void gmu_core_blkwrite(struct kgsl_device *device, unsigned int offsetwords,
void gmu_core_regrmw(struct kgsl_device *device, unsigned int offsetwords,
unsigned int mask, unsigned int bits);
const char *gmu_core_oob_type_str(enum oob_request req);
bool gmu_core_dev_cx_is_on(struct kgsl_device *device);
bool gmu_core_is_initialized(struct kgsl_device *device);
u64 gmu_core_dev_read_ao_counter(struct kgsl_device *device);
#endif /* __KGSL_GMU_CORE_H */

View File

@@ -2502,6 +2502,22 @@ static uint64_t kgsl_iommu_find_svm_region(struct kgsl_pagetable *pagetable,
return addr;
}
static bool iommu_addr_in_svm_ranges(struct kgsl_iommu_pt *pt,
u64 gpuaddr, u64 size)
{
if ((gpuaddr >= pt->compat_va_start && gpuaddr < pt->compat_va_end) &&
((gpuaddr + size) > pt->compat_va_start &&
(gpuaddr + size) <= pt->compat_va_end))
return true;
if ((gpuaddr >= pt->svm_start && gpuaddr < pt->svm_end) &&
((gpuaddr + size) > pt->svm_start &&
(gpuaddr + size) <= pt->svm_end))
return true;
return false;
}
static int kgsl_iommu_set_svm_region(struct kgsl_pagetable *pagetable,
uint64_t gpuaddr, uint64_t size)
{
@@ -2509,9 +2525,8 @@ static int kgsl_iommu_set_svm_region(struct kgsl_pagetable *pagetable,
struct kgsl_iommu_pt *pt = pagetable->priv;
struct rb_node *node;
/* Make sure the requested address doesn't fall in the global range */
if (ADDR_IN_GLOBAL(pagetable->mmu, gpuaddr) ||
ADDR_IN_GLOBAL(pagetable->mmu, gpuaddr + size))
/* Make sure the requested address doesn't fall out of SVM range */
if (!iommu_addr_in_svm_ranges(pt, gpuaddr, size))
return -ENOMEM;
spin_lock(&pagetable->lock);

View File

@@ -2471,8 +2471,7 @@ int kgsl_pwrctrl_init(struct kgsl_device *device)
KGSL_PWR_ERR(device,
"Failed to register client with CX Ipeak %d\n",
result);
//goto error_cleanup_pwr_limit;
result = 0;
goto error_cleanup_pwr_limit;
}
}
return result;

View File

@@ -94,8 +94,6 @@ struct cti_drvdata {
struct coresight_cti cti;
int refcnt;
int cpu;
unsigned int trig_num_max;
unsigned int ch_num_max;
bool cti_save;
bool cti_hwclk;
bool l2_off;
@@ -1363,14 +1361,52 @@ static ssize_t cti_store_disable_gate(struct device *dev,
}
static DEVICE_ATTR(disable_gate, 0200, NULL, cti_store_disable_gate);
static ssize_t show_info_show(struct device *dev, struct device_attribute *attr,
char *buf)
struct cti_reg {
void __iomem *addr;
u32 data;
};
static void do_smp_cross_read(void *data)
{
struct cti_reg *reg = data;
reg->data = readl_relaxed(reg->addr);
}
static u32 cti_devid_cross_read(const struct cti_drvdata *drvdata)
{
struct cti_reg reg;
reg.addr = drvdata->base + DEVID;
smp_call_function_single(drvdata->cpu, do_smp_cross_read, &reg, 1);
return reg.data;
}
static ssize_t show_info_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
ssize_t size = 0;
unsigned int ctidevid, trig_num_max, chan_num_max;
mutex_lock(&drvdata->mutex);
pm_runtime_get_sync(drvdata->dev);
if (drvdata->cpu == -ENODEV)
ctidevid = cti_readl(drvdata, DEVID);
else
ctidevid = cti_devid_cross_read(drvdata);
pm_runtime_put_sync(drvdata->dev);
trig_num_max = (ctidevid & GENMASK(15, 8)) >> 8;
chan_num_max = (ctidevid & GENMASK(21, 16)) >> 16;
size = scnprintf(&buf[size], PAGE_SIZE, "%d %d\n",
drvdata->trig_num_max, drvdata->ch_num_max);
trig_num_max, chan_num_max);
mutex_unlock(&drvdata->mutex);
return size;
}
@@ -1433,7 +1469,6 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id)
{
int ret;
int trig;
unsigned int ctidevid;
struct device *dev = &adev->dev;
struct coresight_platform_data *pdata;
struct cti_drvdata *drvdata;
@@ -1541,9 +1576,6 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id)
registered++;
}
ctidevid = cti_readl(drvdata, DEVID);
drvdata->trig_num_max = (ctidevid & GENMASK(15, 8)) >> 8;
drvdata->ch_num_max = (ctidevid & GENMASK(21, 16)) >> 16;
pm_runtime_put(&adev->dev);
dev_dbg(dev, "CTI initialized\n");
return 0;

View File

@@ -803,7 +803,6 @@ static int geni_i2c_probe(struct platform_device *pdev)
struct platform_device *wrapper_pdev;
struct device_node *wrapper_ph_node;
int ret;
char boot_marker[40];
u32 geni_i2c_clk_map_dt[5];
gi2c = devm_kzalloc(&pdev->dev, sizeof(*gi2c), GFP_KERNEL);

View File

@@ -6,6 +6,7 @@
*/
#include "dm-core.h"
#include "dm-ioctrl.h"
#include <linux/module.h>
#include <linux/vmalloc.h>
@@ -2056,3 +2057,37 @@ out:
return r;
}
int __init dm_ioctrl(uint cmd, struct dm_ioctl *param)
{
int r = 0;
int ioctl_flags;
ioctl_fn fn = NULL;
size_t input_param_size;
/*
* Nothing more to do for the version command.
*/
if (cmd == DM_VERSION_CMD)
return 0;
DMDEBUG("dm_ctl_ioctl: command 0x%x", cmd);
fn = lookup_ioctl(cmd, &ioctl_flags);
if (!fn) {
DMWARN("dm_ctl_ioctl: unknown command 0x%x", cmd);
return -ENOTTY;
}
input_param_size = param->data_size;
param->data_size = sizeof(*param);
r = fn(NULL, param, input_param_size);
if (unlikely(param->flags & DM_BUFFER_FULL_FLAG) &&
unlikely(ioctl_flags & IOCTL_FLAGS_NO_PARAMS))
DMERR("ioctl %d but has IOCTL_FLAGS_NO_PARAMS set", cmd);
return r;
}
EXPORT_SYMBOL(dm_ioctrl);

View File

@@ -1,5 +1,4 @@
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -10,4 +9,12 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "trinket-idp.dtsi"
#ifndef DM_IOCTRL_INTERNAL_H
#define DM_IOCTRL_INTERNAL_H
#include <linux/dm-ioctl.h>
int dm_ioctrl(uint cmd, struct dm_ioctl *param);
#endif

View File

@@ -686,6 +686,7 @@ static void ais_vfe_q_bufs_to_hw(struct ais_vfe_hw_core_info *core_info,
struct ais_vfe_bus_ver2_reg_offset_bus_client *client_regs = NULL;
uint32_t fifo_status = 0;
bool is_full = false;
struct ais_ife_rdi_get_timestamp_args get_ts;
rdi_path = &core_info->rdi_out[path];
bus_hw_info = core_info->vfe_hw_info->bus_hw_info;
@@ -704,10 +705,19 @@ static void ais_vfe_q_bufs_to_hw(struct ais_vfe_hw_core_info *core_info,
struct ais_vfe_buffer_t, list);
list_del_init(&vfe_buf->list);
CAM_DBG(CAM_ISP, "IFE%d|RDI%d: Q %d(0x%x) FIFO:%d",
get_ts.path = path;
get_ts.ts = &vfe_buf->ts_hw;
core_info->csid_hw->hw_ops.process_cmd(
core_info->csid_hw->hw_priv,
AIS_IFE_CSID_CMD_GET_TIME_STAMP,
&get_ts,
sizeof(get_ts));
CAM_DBG(CAM_ISP, "IFE%d|RDI%d: Q %d(0x%x) FIFO:%d ts %llu",
core_info->vfe_idx, path,
vfe_buf->bufIdx, vfe_buf->iova_addr,
rdi_path->num_buffer_hw_q);
rdi_path->num_buffer_hw_q, vfe_buf->ts_hw.cur_sof_ts);
cam_io_w_mb(vfe_buf->iova_addr,
core_info->mem_base + client_regs->image_addr);
@@ -715,6 +725,7 @@ static void ais_vfe_q_bufs_to_hw(struct ais_vfe_hw_core_info *core_info,
list_add_tail(&vfe_buf->list, &rdi_path->buffer_hw_q);
++rdi_path->num_buffer_hw_q;
fifo_status = cam_io_r_mb(core_info->mem_base +
bus_hw_info->common_reg.addr_fifo_status);
is_full = fifo_status & (1 << path);
@@ -906,9 +917,10 @@ static int ais_vfe_q_sof(struct ais_vfe_hw_core_info *core_info,
} else {
rc = -1;
CAM_ERR(CAM_ISP, "I%d|R%d|F%llu: free timestamp empty (%d)",
CAM_ERR(CAM_ISP,
"I%d|R%d|F%llu: free timestamp empty (%d) sof %llu",
core_info->vfe_idx, path, p_sof->frame_cnt,
p_rdi->num_buffer_hw_q);
p_rdi->num_buffer_hw_q, p_sof->cur_sof_hw_ts);
}
return rc;
@@ -948,6 +960,13 @@ static void ais_vfe_handle_sof_rdi(struct ais_vfe_hw_core_info *core_info,
prev_sof_hw_ts,
p_rdi->last_sof_info.cur_sof_hw_ts,
ts_delta);
CAM_DBG(CAM_ISP,
"I%d R%d miss_sof %u prev %llu last %llu cur %llu",
core_info->vfe_idx, path,
miss_sof, prev_sof_hw_ts,
p_rdi->last_sof_info.cur_sof_hw_ts,
cur_sof_hw_ts);
}
}
@@ -1151,6 +1170,7 @@ static void ais_vfe_bus_handle_client_frame_done(
uint64_t cur_sof_hw_ts;
bool last_addr_match = false;
CAM_DBG(CAM_ISP, "I%d|R%d last_addr 0x%x",
core_info->vfe_idx, path, last_addr);
@@ -1168,6 +1188,7 @@ static void ais_vfe_bus_handle_client_frame_done(
while (rdi_path->num_buffer_hw_q && !last_addr_match) {
struct ais_sof_info_t *p_sof_info = NULL;
bool is_sof_match = false;
if (list_empty(&rdi_path->buffer_hw_q)) {
CAM_DBG(CAM_ISP, "I%d|R%d: FD while HW Q empty",
@@ -1192,10 +1213,29 @@ static void ais_vfe_bus_handle_client_frame_done(
rdi_path->num_buffer_hw_q, last_addr);
if (!list_empty(&rdi_path->sof_info_q)) {
p_sof_info = list_first_entry(&rdi_path->sof_info_q,
struct ais_sof_info_t, list);
list_del_init(&p_sof_info->list);
rdi_path->num_sof_info_q--;
while (!is_sof_match &&
!list_empty(&rdi_path->sof_info_q)) {
p_sof_info =
list_first_entry(&rdi_path->sof_info_q,
struct ais_sof_info_t, list);
list_del_init(&p_sof_info->list);
rdi_path->num_sof_info_q--;
if (p_sof_info->cur_sof_hw_ts >
vfe_buf->ts_hw.cur_sof_ts) {
is_sof_match = true;
break;
}
list_add_tail(&p_sof_info->list,
&rdi_path->free_sof_info_list);
}
if (!is_sof_match) {
p_sof_info = NULL;
CAM_ERR(CAM_ISP,
"I%d|R%d: can't find the match sof",
core_info->vfe_idx, path);
}
} else
CAM_ERR(CAM_ISP, "I%d|R%d: SOF info Q is empty",
core_info->vfe_idx, path);
@@ -1554,6 +1594,7 @@ irqreturn_t ais_vfe_irq(int irq_num, void *data)
CAM_DBG(CAM_ISP, "IFE%d BUS_WR", core_info->vfe_idx);
work_data.evt_type = AIS_VFE_HW_IRQ_EVENT_BUS_WR;
ais_vfe_irq_fill_bus_wr_status(core_info, &work_data);
ais_vfe_dispatch_irq(vfe_hw, &work_data);
}
if (ife_status[1]) {

View File

@@ -82,6 +82,7 @@ struct ais_vfe_buffer_t {
int32_t mem_handle;
uint64_t iova_addr;
uint32_t bufIdx;
struct ais_ife_rdi_timestamps ts_hw;
};
struct ais_sof_info_t {

View File

@@ -2016,7 +2016,14 @@ int32_t cam_cci_core_cfg(struct v4l2_subdev *sd,
struct cam_cci_ctrl *cci_ctrl)
{
int32_t rc = 0;
struct cci_device *cci_dev = v4l2_get_subdevdata(sd);
struct cci_device *cci_dev;
if (sd == NULL || cci_ctrl == NULL) {
CAM_ERR(CAM_CCI, "cci_ctrl or sd null");
rc = -ENODEV;
return rc;
}
cci_dev = v4l2_get_subdevdata(sd);
CAM_DBG(CAM_CCI, "cmd %d", cci_ctrl->cmd);
@@ -2074,12 +2081,10 @@ int32_t cam_cci_core_cam_ctrl(struct v4l2_subdev *sd,
CAM_DBG(CAM_CCI, "cmd %d", cmd->op_code);
if (cmd->op_code != AIS_SENSOR_I2C_POWER_DOWN) {
if (cmd->handle_type != CAM_HANDLE_USER_POINTER) {
CAM_ERR(CAM_CCI, "Invalid handle type: %d",
if (cmd->handle_type != CAM_HANDLE_USER_POINTER) {
CAM_ERR(CAM_CCI, "Invalid handle type: %d",
cmd->handle_type);
return -EINVAL;
}
return -EINVAL;
}
cci_ctrl.cci_info = kzalloc(sizeof(struct cam_sensor_cci_client),
@@ -2093,7 +2098,7 @@ int32_t cam_cci_core_cam_ctrl(struct v4l2_subdev *sd,
sensor_cap.slot_info = cci_dev->soc_info.index;
if (copy_to_user(u64_to_user_ptr(cmd->handle),
&sensor_cap, sizeof(struct cam_sensor_query_cap))) {
&sensor_cap, sizeof(sensor_cap))) {
CAM_ERR(CAM_CCI, "Failed Copy to User");
rc = -EFAULT;
}

View File

@@ -37,9 +37,6 @@ static long cam_cci_subdev_ioctl(struct v4l2_subdev *sd,
}
switch (cmd) {
case VIDIOC_MSM_CCI_CFG:
rc = cam_cci_core_cfg(sd, arg);
break;
case VIDIOC_CAM_CONTROL:
rc = cam_cci_core_cam_ctrl(sd, arg);
break;

View File

@@ -324,7 +324,5 @@ static inline struct v4l2_subdev *cam_cci_get_subdev(int cci_dev_index)
}
#endif
#define VIDIOC_MSM_CCI_CFG \
_IOWR('V', BASE_VIDIOC_PRIVATE + 23, struct cam_cci_ctrl *)
#endif /* _CAM_CCI_DEV_H_ */

View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
/* Copyright (c) 2017-2018,2020 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,7 +12,7 @@
#include "cam_sensor_cmn_header.h"
#include "cam_sensor_i2c.h"
#include "cam_cci_dev.h"
#include "cam_cci_core.h"
int32_t cam_cci_i2c_read(struct cam_sensor_cci_client *cci_client,
uint32_t addr, uint32_t *data,
@@ -36,8 +36,8 @@ int32_t cam_cci_i2c_read(struct cam_sensor_cci_client *cci_client,
cci_ctrl.cfg.cci_i2c_read_cfg.data_type = data_type;
cci_ctrl.cfg.cci_i2c_read_cfg.data = buf;
cci_ctrl.cfg.cci_i2c_read_cfg.num_byte = data_type;
rc = v4l2_subdev_call(cci_client->cci_subdev,
core, ioctl, VIDIOC_MSM_CCI_CFG, &cci_ctrl);
rc = cam_cci_core_cfg(cci_client->cci_subdev, &cci_ctrl);
if (rc < 0) {
CAM_ERR(CAM_SENSOR, "rc = %d", rc);
return rc;
@@ -88,14 +88,18 @@ int32_t cam_camera_cci_i2c_read_seq(struct cam_sensor_cci_client *cci_client,
cci_ctrl.cfg.cci_i2c_read_cfg.data = buf;
cci_ctrl.cfg.cci_i2c_read_cfg.num_byte = num_byte;
cci_ctrl.status = -EFAULT;
rc = v4l2_subdev_call(cci_client->cci_subdev,
core, ioctl, VIDIOC_MSM_CCI_CFG, &cci_ctrl);
rc = cci_ctrl.status;
rc = cam_cci_core_cfg(cci_client->cci_subdev, &cci_ctrl);
CAM_DBG(CAM_SENSOR, "addr = 0x%x, rc = %d", addr, rc);
for (i = 0; i < num_byte; i++) {
data[i] = buf[i];
CAM_DBG(CAM_SENSOR, "Byte %d: Data: 0x%x\n", i, data[i]);
if (!rc) {
for (i = 0; i < num_byte; i++) {
data[i] = buf[i];
CAM_DBG(CAM_SENSOR, "Byte %d: Data: 0x%x",
i, data[i]);
}
}
kfree(buf);
return rc;
}
@@ -124,13 +128,13 @@ static int32_t cam_cci_i2c_write_table_cmd(
cci_ctrl.cfg.cci_i2c_write_cfg.data_type = write_setting->data_type;
cci_ctrl.cfg.cci_i2c_write_cfg.addr_type = write_setting->addr_type;
cci_ctrl.cfg.cci_i2c_write_cfg.size = write_setting->size;
rc = v4l2_subdev_call(cci_client->cci_subdev,
core, ioctl, VIDIOC_MSM_CCI_CFG, &cci_ctrl);
rc = cam_cci_core_cfg(cci_client->cci_subdev, &cci_ctrl);
if (rc < 0) {
CAM_ERR(CAM_SENSOR, "Failed rc = %d", rc);
return rc;
}
rc = cci_ctrl.status;
if (write_setting->delay > 20)
msleep(write_setting->delay);
else if (write_setting->delay)
@@ -229,11 +233,11 @@ int32_t cam_sensor_cci_i2c_util(struct cam_sensor_cci_client *cci_client,
cci_ctrl.cmd = cci_cmd;
cci_ctrl.cci_info = cci_client;
rc = v4l2_subdev_call(cci_client->cci_subdev,
core, ioctl, VIDIOC_MSM_CCI_CFG, &cci_ctrl);
rc = cam_cci_core_cfg(cci_client->cci_subdev, &cci_ctrl);
if (rc < 0) {
CAM_ERR(CAM_SENSOR, "Failed rc = %d", rc);
return rc;
}
return cci_ctrl.status;
return rc;
}

View File

@@ -900,11 +900,13 @@ static int __cam_isp_ctx_reg_upd_in_epoch_state(
else if (ctx_isp->fps && ((rup_event_data->irq_mono_boot_time -
ctx_isp->irq_timestamps) > ((1000*1000)/ctx_isp->fps))) {
ctx_isp->irq_delay_detect = true;
trace_cam_isp_irq_delay_detect("IRQ delay at reg_upd",
ctx, req->request_id,
ctx_isp->substate_activated,
(rup_event_data->irq_mono_boot_time -
ctx_isp->irq_timestamps));
if (req)
trace_cam_isp_irq_delay_detect("IRQ delay at reg_upd",
ctx, req->request_id,
ctx_isp->substate_activated,
(rup_event_data->irq_mono_boot_time -
ctx_isp->irq_timestamps));
}
ctx_isp->irq_timestamps = rup_event_data->irq_mono_boot_time;
@@ -1220,7 +1222,7 @@ end:
static int __cam_isp_ctx_epoch_in_applied(struct cam_isp_context *ctx_isp,
void *evt_data)
{
struct cam_ctx_request *req;
struct cam_ctx_request *req = NULL;
struct cam_isp_ctx_req *req_isp = NULL;
struct cam_context *ctx = ctx_isp->base;
uint64_t request_id = 0;
@@ -2332,7 +2334,7 @@ static int __cam_isp_ctx_dump_in_top_state(struct cam_context *ctx,
struct timeval cur_time;
int rc = 0;
uintptr_t cpu_addr;
size_t buf_len;
size_t buf_len = 0;
struct cam_isp_context_dump_header *hdr;
uint64_t *addr, *start;
uint8_t *dst;
@@ -2511,6 +2513,7 @@ static int __cam_isp_ctx_flush_req_in_top_state(
struct cam_hw_stop_args stop_args;
struct cam_isp_start_args start_isp;
struct cam_hw_reset_args reset_args;
if (flush_req->type == CAM_REQ_MGR_FLUSH_TYPE_ALL) {
CAM_INFO(CAM_ISP, "ctx id:%d Last request id to flush is %lld",
ctx->ctx_id, flush_req->req_id);

View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
/* Copyright (c) 2017-2018, 2020 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -273,13 +273,15 @@ static int cam_lrme_hw_dev_remove(struct platform_device *pdev)
kfree(lrme_core);
deinit_platform_res:
rc = cam_lrme_soc_deinit_resources(&lrme_hw->soc_info);
if (rc)
CAM_ERR(CAM_LRME, "Error in LRME soc deinit, rc=%d", rc);
mutex_destroy(&lrme_hw->hw_mutex);
kfree(lrme_hw);
if (lrme_hw) {
rc = cam_lrme_soc_deinit_resources(&lrme_hw->soc_info);
if (rc)
CAM_ERR(CAM_LRME,
"Error in LRME soc deinit, rc=%d", rc);
mutex_destroy(&lrme_hw->hw_mutex);
kfree(lrme_hw);
}
return rc;
}

View File

@@ -147,7 +147,7 @@ void vbif_lock(struct platform_device *parent_pdev)
if (!parent_pdev)
return;
// mdp_vbif_lock(parent_pdev, true);
mdp_vbif_lock(parent_pdev, true);
}
void vbif_unlock(struct platform_device *parent_pdev)
@@ -155,7 +155,7 @@ void vbif_unlock(struct platform_device *parent_pdev)
if (!parent_pdev)
return;
// mdp_vbif_lock(parent_pdev, false);
mdp_vbif_lock(parent_pdev, false);
}
void sde_mdp_halt_vbif_xin(struct sde_mdp_vbif_halt_params *params)

View File

@@ -109,7 +109,12 @@ void lkdtm_WRITE_KERN(void)
size_t size;
unsigned char *ptr;
size = (unsigned long)do_overwritten - (unsigned long)do_nothing;
if ((unsigned long)do_overwritten < (unsigned long)do_nothing)
size = (unsigned long)do_nothing -
(unsigned long)do_overwritten;
else
size = (unsigned long)do_overwritten -
(unsigned long)do_nothing;
ptr = (unsigned char *)do_overwritten;
pr_info("attempting bad %zu byte write at %px\n", size, ptr);

View File

@@ -1056,8 +1056,9 @@ static int msm_nand_flash_onfi_probe(struct msm_nand_info *info)
flash->blksize = onfi_param_page_ptr->number_of_pages_per_block *
flash->pagesize;
flash->oobsize = onfi_param_page_ptr->number_of_spare_bytes_per_page;
flash->density = onfi_param_page_ptr->number_of_blocks_per_logical_unit
* flash->blksize;
flash->density = onfi_param_page_ptr->number_of_logical_units *
onfi_param_page_ptr->number_of_blocks_per_logical_unit *
flash->blksize;
flash->ecc_correctability =
onfi_param_page_ptr->number_of_bits_ecc_correctability;

View File

@@ -23,10 +23,6 @@
#include <linux/ip.h>
#include <linux/ipv6.h>
#include <linux/rtnetlink.h>
#include <linux/route.h>
#include <linux/if_arp.h>
#include <linux/inet.h>
#include <net/inet_common.h>
#include "stmmac.h"
#include "stmmac_platform.h"
#include "dwmac-qcom-ethqos.h"
@@ -44,7 +40,6 @@ static int phy_digital_loopback_config(
struct qcom_ethqos *ethqos, int speed, int config);
bool phy_intr_en;
static char buf[2000];
static struct ethqos_emac_por emac_por[] = {
{ .offset = RGMII_IO_MACRO_CONFIG, .value = 0x0 },
@@ -73,7 +68,7 @@ int stmmac_enable_ipc_low;
char tmp_buff[MAX_PROC_SIZE];
static struct qmp_pkt pkt;
static char qmp_buf[MAX_QMP_MSG_SIZE + 1] = {0};
static struct ip_params pparams = {"", "", "", ""};
static struct ip_params pparams;
static void qcom_ethqos_read_iomacro_por_values(struct qcom_ethqos *ethqos)
{
@@ -630,9 +625,10 @@ static int ethqos_dll_configure(struct qcom_ethqos *ethqos)
rgmii_updatel(ethqos, SDCC_DLL_CONFIG_CK_OUT_EN,
0, SDCC_HC_REG_DLL_CONFIG);
/* Set DLL_EN */
rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_EN,
SDCC_DLL_CONFIG_DLL_EN, SDCC_HC_REG_DLL_CONFIG);
if (!ethqos->io_macro.rx_dll_bypass)
/* Set DLL_EN */
rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_EN,
SDCC_DLL_CONFIG_DLL_EN, SDCC_HC_REG_DLL_CONFIG);
if (ethqos->emac_ver != EMAC_HW_v2_3_2 &&
ethqos->emac_ver != EMAC_HW_v2_1_2) {
@@ -677,8 +673,9 @@ static int ethqos_dll_configure(struct qcom_ethqos *ethqos)
if (ethqos->emac_ver != EMAC_HW_v2_3_2 &&
ethqos->emac_ver != EMAC_HW_v2_1_2) {
rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DLL_CLOCK_DIS,
0, SDCC_HC_REG_DLL_CONFIG2);
if (!ethqos->io_macro.rx_dll_bypass)
rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DLL_CLOCK_DIS,
0, SDCC_HC_REG_DLL_CONFIG2);
rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_MCLK_FREQ_CALC,
0x1A << 10, SDCC_HC_REG_DLL_CONFIG2);
@@ -728,15 +725,19 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos)
RGMII_IO_MACRO_CONFIG2);
/* Set PRG_RCLK_DLY to 57 for 1.8 ns delay */
if (ethqos->emac_ver == EMAC_HW_v2_3_2)
if (ethqos->emac_ver == EMAC_HW_v2_3_2) {
rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_RCLK_DLY,
69, SDCC_HC_REG_DDR_CONFIG);
else if (ethqos->emac_ver == EMAC_HW_v2_1_2)
} else if (ethqos->emac_ver == EMAC_HW_v2_1_2) {
rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_RCLK_DLY,
52, SDCC_HC_REG_DDR_CONFIG);
else
rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_RCLK_DLY,
57, SDCC_HC_REG_DDR_CONFIG);
} else {
if (!ethqos->io_macro.rx_dll_bypass)
rgmii_updatel(ethqos,
SDCC_DDR_CONFIG_PRG_RCLK_DLY,
57, SDCC_HC_REG_DDR_CONFIG);
}
rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_DLY_EN,
SDCC_DDR_CONFIG_PRG_DLY_EN,
SDCC_HC_REG_DDR_CONFIG);
@@ -770,8 +771,7 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos)
BIT(6), RGMII_IO_MACRO_CONFIG);
rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15,
0, RGMII_IO_MACRO_CONFIG2);
if (ethqos->emac_ver == EMAC_HW_v2_3_2 ||
ethqos->emac_ver == EMAC_HW_v2_1_2)
if (ethqos->io_macro.rx_prog_swap)
rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,
RGMII_CONFIG2_RX_PROG_SWAP,
RGMII_IO_MACRO_CONFIG2);
@@ -825,8 +825,7 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos)
RGMII_IO_MACRO_CONFIG);
rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15,
0, RGMII_IO_MACRO_CONFIG2);
if (ethqos->emac_ver == EMAC_HW_v2_3_2 ||
ethqos->emac_ver == EMAC_HW_v2_1_2)
if (ethqos->io_macro.rx_prog_swap)
rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,
RGMII_CONFIG2_RX_PROG_SWAP,
RGMII_IO_MACRO_CONFIG2);
@@ -890,33 +889,56 @@ static int ethqos_configure(struct qcom_ethqos *ethqos)
SDCC_HC_REG_DLL_CONFIG);
if (ethqos->speed != SPEED_100 && ethqos->speed != SPEED_10) {
/* Set DLL_EN */
rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_EN,
SDCC_DLL_CONFIG_DLL_EN, SDCC_HC_REG_DLL_CONFIG);
if (ethqos->io_macro.rx_dll_bypass) {
/* Set DLL_CLOCK_DISABLE */
rgmii_updatel(ethqos,
SDCC_DLL_CONFIG2_DLL_CLOCK_DIS,
SDCC_DLL_CONFIG2_DLL_CLOCK_DIS,
SDCC_HC_REG_DLL_CONFIG2);
/* Set CK_OUT_EN */
rgmii_updatel(ethqos, SDCC_DLL_CONFIG_CK_OUT_EN,
SDCC_DLL_CONFIG_CK_OUT_EN,
SDCC_HC_REG_DLL_CONFIG);
/* Clear DLL_EN */
rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_EN,
0, SDCC_HC_REG_DLL_CONFIG);
/* Set USR_CTL bit 26 with mask of 3 bits */
rgmii_updatel(ethqos, GENMASK(26, 24), BIT(26), SDCC_USR_CTL);
/* Set PDN */
rgmii_updatel(ethqos,
SDCC_DLL_CONFIG_PDN,
SDCC_DLL_CONFIG_PDN,
SDCC_HC_REG_DLL_CONFIG);
/* wait for DLL LOCK */
do {
mdelay(1);
dll_lock = rgmii_readl(ethqos, SDC4_STATUS);
if (dll_lock & SDC4_STATUS_DLL_LOCK)
break;
retry--;
} while (retry > 0);
if (!retry)
dev_err(&ethqos->pdev->dev,
"Timeout while waiting for DLL lock\n");
}
/* Set USR_CTL bit 30 */
rgmii_updatel(ethqos, BIT(30), BIT(30), SDCC_USR_CTL);
} else {
/* Set DLL_EN */
rgmii_updatel(ethqos,
SDCC_DLL_CONFIG_DLL_EN,
SDCC_DLL_CONFIG_DLL_EN,
SDCC_HC_REG_DLL_CONFIG);
/* Set CK_OUT_EN */
rgmii_updatel(ethqos, SDCC_DLL_CONFIG_CK_OUT_EN,
SDCC_DLL_CONFIG_CK_OUT_EN,
SDCC_HC_REG_DLL_CONFIG);
/* Set USR_CTL bit 26 with mask of 3 bits */
rgmii_updatel(ethqos, GENMASK(26, 24), BIT(26),
SDCC_USR_CTL);
/* wait for DLL LOCK */
do {
mdelay(1);
dll_lock = rgmii_readl(ethqos, SDC4_STATUS);
if (dll_lock & SDC4_STATUS_DLL_LOCK)
break;
retry--;
} while (retry > 0);
if (!retry)
dev_err(&ethqos->pdev->dev,
"Timeout while waiting for DLL lock\n");
}
if (ethqos->speed == SPEED_1000)
ethqos_dll_configure(ethqos);
}
ethqos_rgmii_macro_init(ethqos);
@@ -970,44 +992,6 @@ static int ethqos_mdio_read(struct stmmac_priv *priv, int phyaddr, int phyreg)
return data;
}
static int ethqos_mdio_write(struct stmmac_priv *priv, int phyaddr, int phyreg,
u16 phydata)
{
unsigned int mii_address = priv->hw->mii.addr;
unsigned int mii_data = priv->hw->mii.data;
u32 v;
u32 value = MII_BUSY;
struct qcom_ethqos *ethqos = priv->plat->bsp_priv;
if (ethqos->phy_state == PHY_IS_OFF) {
ETHQOSINFO("Phy is in off state writing is not possible\n");
return -EOPNOTSUPP;
}
value |= (phyaddr << priv->hw->mii.addr_shift)
& priv->hw->mii.addr_mask;
value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask;
value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift)
& priv->hw->mii.clk_csr_mask;
if (priv->plat->has_gmac4)
value |= MII_GMAC4_WRITE;
else
value |= MII_WRITE;
/* Wait until any existing MII operation is complete */
if (readl_poll_timeout(priv->ioaddr + mii_address, v, !(v & MII_BUSY),
100, 10000))
return -EBUSY;
/* Set the MII address register to write */
writel_relaxed(phydata, priv->ioaddr + mii_data);
writel_relaxed(value, priv->ioaddr + mii_address);
/* Wait until any existing MII operation is complete */
return readl_poll_timeout(priv->ioaddr + mii_address, v,
!(v & MII_BUSY), 100, 10000);
}
static int ethqos_phy_intr_config(struct qcom_ethqos *ethqos)
{
int ret = 0;
@@ -1269,8 +1253,18 @@ static ssize_t read_phy_off(struct file *file,
size_t count, loff_t *ppos)
{
unsigned int len = 0, buf_len = 2000;
char *buf;
ssize_t ret_cnt;
struct qcom_ethqos *ethqos = file->private_data;
if (!ethqos) {
ETHQOSERR("NULL Pointer\n");
return -EINVAL;
}
buf = kzalloc(buf_len, GFP_KERNEL);
if (!buf)
return -ENOMEM;
if (ethqos->current_phy_mode == DISABLE_PHY_IMMEDIATELY)
len += scnprintf(buf + len, buf_len - len,
"Disable phy immediately enabled\n");
@@ -1295,10 +1289,14 @@ static ssize_t read_phy_off(struct file *file,
len += scnprintf(buf + len, buf_len - len,
"Invalid Phy State\n");
if (len > buf_len)
if (len > buf_len) {
ETHQOSERR("(len > buf_len) buffer not sufficient\n");
len = buf_len;
}
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
ret_cnt = simple_read_from_buffer(user_buf, count, ppos, buf, len);
kfree(buf);
return ret_cnt;
}
static ssize_t phy_off_config(
@@ -1436,9 +1434,12 @@ static int phy_digital_loopback_config(
return -EINVAL;
}
if (phydata != 0) {
ethqos_mdio_write(
priv, priv->plat->phy_addr, MII_BMCR, phydata);
ETHQOSINFO("write done for phy loopback\n");
if (priv->phydev) {
phy_write(priv->phydev, MII_BMCR, phydata);
ETHQOSINFO("write done for phy loopback\n");
} else {
ETHQOSINFO("Phy dev is NULL\n");
}
}
return 0;
}
@@ -1694,6 +1695,16 @@ static ssize_t read_loopback_config(struct file *file,
{
unsigned int len = 0, buf_len = 2000;
struct qcom_ethqos *ethqos = file->private_data;
char *buf;
ssize_t ret_cnt;
if (!ethqos) {
ETHQOSERR("NULL Pointer\n");
return -EINVAL;
}
buf = kzalloc(buf_len, GFP_KERNEL);
if (!buf)
return -ENOMEM;
if (ethqos->current_loopback == DISABLE_LOOPBACK)
len += scnprintf(buf + len, buf_len - len,
@@ -1713,7 +1724,9 @@ static ssize_t read_loopback_config(struct file *file,
if (len > buf_len)
len = buf_len;
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
ret_cnt = simple_read_from_buffer(user_buf, count, ppos, buf, len);
kfree(buf);
return ret_cnt;
}
static const struct file_operations fops_phy_reg_dump = {
@@ -2111,8 +2124,13 @@ inline bool qcom_ethqos_is_phy_link_up(struct qcom_ethqos *ethqos)
*/
struct stmmac_priv *priv = qcom_ethqos_get_priv(ethqos);
return ((priv->oldlink != -1) &&
(priv->dev->phydev && priv->dev->phydev->link));
if (priv->plat->mac2mac_en) {
return true;
} else {
return ((priv->oldlink != -1) &&
(priv->dev->phydev &&
priv->dev->phydev->link));
}
}
static void qcom_ethqos_phy_resume_clks(struct qcom_ethqos *ethqos)
@@ -2283,8 +2301,9 @@ static void ethqos_is_ipv6_NW_stack_ready(struct work_struct *work)
flush_delayed_work(&ethqos->ipv6_addr_assign_wq);
}
static int ethqos_set_early_eth_param(struct stmmac_priv *priv,
struct qcom_ethqos *ethqos)
static void ethqos_set_early_eth_param(
struct stmmac_priv *priv,
struct qcom_ethqos *ethqos)
{
int ret = 0;
@@ -2311,12 +2330,7 @@ static int ethqos_set_early_eth_param(struct stmmac_priv *priv,
schedule_delayed_work(&ethqos->ipv6_addr_assign_wq,
msecs_to_jiffies(1000));
}
if (pparams.is_valid_mac_addr) {
ether_addr_copy(dev_addr, pparams.mac_addr);
memcpy(priv->dev->dev_addr, dev_addr, ETH_ALEN);
}
return ret;
return;
}
bool qcom_ethqos_ipa_enabled(void)
@@ -2330,6 +2344,7 @@ bool qcom_ethqos_ipa_enabled(void)
static int qcom_ethqos_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct device_node *io_macro_node = NULL;
struct plat_stmmacenet_data *plat_dat;
struct stmmac_resources stmmac_res;
struct qcom_ethqos *ethqos;
@@ -2429,6 +2444,14 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
plat_dat->tso_en = of_property_read_bool(np, "snps,tso");
plat_dat->early_eth = ethqos->early_eth_enabled;
/* Get rgmii interface speed for mac2c from device tree */
if (of_property_read_u32(np, "mac2mac-rgmii-speed",
&plat_dat->mac2mac_rgmii_speed))
plat_dat->mac2mac_rgmii_speed = -1;
else
ETHQOSINFO("mac2mac rgmii speed = %d\n",
plat_dat->mac2mac_rgmii_speed);
if (of_property_read_bool(pdev->dev.of_node, "qcom,arm-smmu")) {
stmmac_emb_smmu_ctx.pdev_master = pdev;
ret = of_platform_populate(pdev->dev.of_node,
@@ -2475,6 +2498,24 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
ETHQOSINFO("emac-phy-off-suspend = %d\n",
ethqos->current_phy_mode);
io_macro_node = of_find_node_by_name(pdev->dev.of_node,
"io-macro-info");
if (ethqos->emac_ver == EMAC_HW_v2_3_2 ||
ethqos->emac_ver == EMAC_HW_v2_1_2) {
ethqos->io_macro.rx_prog_swap = 1;
} else if (!io_macro_node) {
ethqos->io_macro.rx_prog_swap = 0;
} else {
if (of_property_read_bool(io_macro_node, "rx-prog-swap"))
ethqos->io_macro.rx_prog_swap = 1;
}
if (io_macro_node) {
if (of_property_read_bool(io_macro_node, "rx-dll-bypass"))
ethqos->io_macro.rx_dll_bypass = 1;
}
ethqos->ioaddr = (&stmmac_res)->addr;
ethqos_update_rgmii_tx_drv_strength(ethqos);
@@ -2511,6 +2552,11 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
ndev = dev_get_drvdata(&ethqos->pdev->dev);
priv = netdev_priv(ndev);
if (pparams.is_valid_mac_addr) {
ether_addr_copy(dev_addr, pparams.mac_addr);
memcpy(priv->dev->dev_addr, dev_addr, ETH_ALEN);
}
if (ethqos->early_eth_enabled) {
/* Initialize work*/
INIT_WORK(&ethqos->early_eth,
@@ -2662,9 +2708,10 @@ static int qcom_ethqos_resume(struct device *dev)
ethqos_reset_phy_enable_interrupt(ethqos);
if (ethqos->backup_autoneg == AUTONEG_DISABLE) {
priv->phydev->autoneg = ethqos->backup_autoneg;
ethqos_mdio_write(
priv, priv->plat->phy_addr,
MII_BMCR, ethqos->backup_bmcr);
if (priv->phydev)
phy_write(priv->phydev, MII_BMCR, ethqos->backup_bmcr);
} else {
ETHQOSINFO("Phy dev is NULL\n");
}
}

View File

@@ -408,6 +408,11 @@ struct ethqos_emac_driver_data {
unsigned int num_por;
};
struct ethqos_io_macro {
bool rx_prog_swap;
bool rx_dll_bypass;
};
struct qcom_ethqos {
struct platform_device *pdev;
void __iomem *rgmii_base;
@@ -495,6 +500,9 @@ struct qcom_ethqos {
int backup_suspend_speed;
u32 backup_bmcr;
unsigned backup_autoneg:1;
/* IO Macro parameters */
struct ethqos_io_macro io_macro;
};
struct pps_cfg {

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