Evolution-X-Devices/kernel_xiaomi_raphael
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Merge remote-tracking branch 'origin/q' into auto-kernel

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* origin/q:
  Revert "msm: kgsl: Mark the scratch buffer as privileged"
  arm: dts: qcom: Enable msm ion heap for qseecom
  ion: don't call free_buffer_page on failure of ion_hyp_unassign_sg
  f2fs: avoid to wait writeback on evicted inode
  msm: adsprpc: Avoid race condition during map find and free
  qcacld-3.0: Increase unsafe channel max num for 6G
  ARM: dts: sa2150p: Enable EMAC settings for SA2150P
  msm: ep_pcie: Prevent apps suspend in active state
  ARM: dts: msm: Enable BAM mode for spi dtsi node
  ARM: dts: add audio device tree for sda429
  msm: ipa: Add IPv6 NAT uc activation interface
  ARM: dts: msm: Include qcs610 changes for qcs410 also
  AndroidKernel: Disable debugfs for user builds
  mtd: msm_qpic_nand: Skip erased page check upon error
  defconfig: msm: Enable switchdev for SA515m
  ARM: dts: msm: Remove "qcom,ilim-ma" property for SDM429W
  power: smb-lib: fix OTG enable error handling
  iio: qcom-rradc: Add batt_id delay property for RRADC
  iio: qcom-rradc: Force conversion for die_temp channel on RRADC
  ARM: dts: sa2150p: use gpio 77 for wakeup on sa2150p side
  serail: msm_geni_serial: Stop TX Engine during port close
  ARM: align the start and end of v7_setup_stack to cache line
  dts: sdx: add support for tdm for sa515m TTP
  diag: Prevent possible integer overflow while processing cntl pkt
  platform: qcom-geni-se: Disable CMD_DONE in DMA mode for I2C and SPI
  msm: ipa: Fix deleting the routing entries
  ARM: dts: msm: Remove TWM Haptics entry for SDM429w + BG
  ARM: dts: msm: Keep a DDR proxy vote for modem pil for sdmmagpie
  msm: camera: csiphy: Update phy settings for atoll
  msm: dts: add secure nested cb for ife
  msm: ais: add support for nested smmu
  usb: dwc3: Initialize val,val1 with 0 as they can be used uninitialized
  input: qti-haptics: Add support for cmd based haptics-twm
  net: stmmac: FR60005 Loopback & phy off support
  msm: ais: Do not attach iommu if its already attached
  ANDROID: dm-bow: Add block_size option
  power: smb1398-charger: Fix use of uninitialized variable error
  diag: Prevent out-of-bound read while processing peripheral ctrl_pkt
  defconfig: quin_gvmq: enable disk renaming
  msm: ais: fix to enqueue current sof timestamp
  jpeg: Add DMA driver implementation
  msm: ipa3: Fix to save the ntn buffers in SMMU disabled case
  ARM: dts: msm: Increasing the CMA size
  net: stmmac: Reset mmc counters on read
  defconfig: sa2150p-nand: Enable SPIDEV driver
  ANDROID: Incremental fs: Clean up incfs_test build process
  defconfig: Enable Incremental FS support for trinket
  defconfig: Disable CONFIG_CNSS_GENL for sdm429
  ARM: dts: msm: Add device tree for sa8195 lxc gvm
  defconfig: sa2150p-nand: Enable STMMAC driver
  ARM: dts: msm: Add qrtr ethernet entry for sa515m
  ARM: dts: msm: Add qrtr ethernet entry for sa2150p
  dt-bindings: net: qrtr: Add Ethernet Device transport bindings
  Release 5.2.03.29X
  qcacld-3.0: Parse FTIE with MIC length 24 for SHA384 AKMs
  msm: ais: stop vfe path on error
  drivers: ion: add dma type support
  Release 5.2.03.29W
  ath10k: Add mesh point interface creation combination
  ath10k: fix 4vap iface limit missing
  ath10k: tweak interface combinations
  mtd: msm_qpic_nand: Add support to read one codeword
  defconfig: Enable DEBUG LIST defconfig
  dma-buf: fix sleep-while-atomic in dmabuffs_dname
  msm: camera: core: Change return type
  msm: camera: reqmgr: Stop slot reset on buf done
  defconfig: msm: Sync config with Android-4.14 configs
  msm: camera: reqmgr: Skip apply for initial sync req on slave link
  msm: camera: reqmgr: increase the rd idx if no lower pd device
  msm: camera: reqmgr: reset slots after deactivating session
  f2fs: prepare a waiter before entering io_schedule
  f2fs: update_sit_entry: Make the judgment condition of f2fs_bug_on more intuitive
  f2fs: replace test_and_set/clear_bit() with set/clear_bit()
  f2fs: make file immutable even if releasing zero compression block
  f2fs: compress: disable compression mount option if compression is off
  qcacld-3.0: Validate mac handle before accessing
  msm: kgsl: Mark the scratch buffer as privileged
  qcacmn: Fix possible OOB access while sending ext stats request
  mtd: msm_qpic_nand: Use flash device ECC capability for erase page
  cnss: Enable cnss utils code for Auto platforms
  soc: qcom: hgsl: Support DBQ count upto 9
  defconfig: Sync  with Android-4.14 configs
  msm: ipa3: Configure correct aggeragtion byte limit
  msm: ipa: eth: Prevent suspend for 2 seconds after device resume
  ARM: dts: msm: add rpmcc header for SDM660
  Release 5.2.03.29V
  qcacld-3.0: Add pointer sanity check for sta_ds
  defconfig: sa515m: Disable UAC driver
  msm: camera: isp: Dumping state monitor array to debug logs
  qcacmn: FT-SAE roam fails due to null TLV in RSO Command
  arm: dts: qcom: add support for bus scaling
  ARM: dts: Update AXI bus votes for EMAC in QCS405
  Release 5.2.03.29U
  qcacld-3.0: Avoid vdev deleted but roam capability is held
  qcacmn: Fix KW issue in the regulatory component
  Release 5.2.03.29T
  ARM: dts: msm: enable virtio_blk names
  qcacld-3.0: Print current RSSI of AP after roam scan is complete
  Release 5.2.03.29S
  qcacld-3.0: Complete the wait events out of the lock in ssr
  ARM: dts: msm: Disable dma mode for SSC QUPV3 on SA6155P VM
  Release 5.2.03.29R
  qcacld-3.0: Extend Tdls external mode config support
  fw-api: CL 11145073 - update fw common interface files
  Release 5.2.03.29Q
  qcacld-3.0: Allow the driver to process multiple measurement req
  defconfig: msm: Disable STACKPROTECTOR_STRONG to compile 32 bit kernel
  drivers: rpmsg: fix to avoid dump stack in rpm-smd driver
  Release 5.2.03.29P
  qcacld-3.0: Free blacklist when user turns off Wifi
  Release 5.2.03.29O
  qcacld-3.0: Flush pmksa cache for SAP when SAP stop
  qcacld-3.0: Fix data stall after sta roaming disabled and reconnection
  Release 5.2.03.29N
  qcacld-3.0: Don't set mon iface chan if iface is down during SSR
  qcacmn: Extend Tdls external mode config support
  fw-api: CL 11101099 - update fw common interface files
  fw-api: CL 11091714 - update fw common interface files
  Release 5.2.03.29M
  qcacld-3.0: Don't allow roam invoke if roaming offload is not initialized
  Release 5.2.03.29L
  qcacld-3.0: Gracefully deregister packet capture callbacks
  Release 5.2.03.29K
  qcacld-3.0: Change the size of Measurement Request IE
  Release 5.2.03.29J
  qcacld-3.0: Remove ucfg_pkt_capture_deregister_callbacks
  fw-api: CL 11068717 - update fw common interface files
  usb: gadget: Revert increase write buffer size
  diag: Clear the local masks only during local usb disconnect

Signed-off-by: UtsavBalar1231 <utsavbalar1231@gmail.com>

Conflicts:
	arch/arm64/boot/dts/qcom/sm8150-camera.dtsi
	drivers/gpu/msm/kgsl.h
	drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c
	drivers/staging/android/ion/ion.c
	drivers/tty/serial/msm_geni_serial.c
This commit is contained in:
UtsavBalar1231
2020-08-20 20:30:16 +05:30
parent 362bcd6bb4 fb4e037e1d
commit eb0acdaa05
138 changed files with 3120 additions and 472 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
AndroidKernel.mk
View File

@@ -10,6 +10,8 @@ ifneq ($(TARGET_KERNEL_APPEND_DTB), true)
$(info Using DTB Image)
INSTALLED_DTBIMAGE_TARGET := $(PRODUCT_OUT)/dtb.img
endif
MAKE_ARGS := $(strip $(TARGET_KERNEL_MAKE_ARGS))
KERNEL_DISABLE_DEBUGFS := $(TARGET_KERNEL_DISABLE_DEBUGFS)
TARGET_KERNEL_MAKE_ENV := $(strip $(TARGET_KERNEL_MAKE_ENV))
ifeq ($(TARGET_KERNEL_MAKE_ENV),)
@@ -138,6 +140,7 @@ $(info Using appended DTB)
TARGET_PREBUILT_INT_KERNEL := $(TARGET_PREBUILT_INT_KERNEL)-dtb
endif
KERNEL_DEBUGFS := $(KERNEL_OUT)/tmp
KERNEL_HEADERS_INSTALL := $(KERNEL_OUT)/usr
KERNEL_MODULES_INSTALL ?= system
KERNEL_MODULES_OUT ?= $(PRODUCT_OUT)/$(KERNEL_MODULES_INSTALL)/lib/modules
@@ -162,6 +165,9 @@ mpath=`dirname $$mdpath`; rm -rf $$mpath;\
fi
endef
$(KERNEL_OUT): $(KERNEL_DEBUGFS)
mkdir -p $(KERNEL_OUT)
ifneq ($(KERNEL_LEGACY_DIR),true)
$(KERNEL_USR): $(KERNEL_HEADERS_INSTALL)
rm -rf $(KERNEL_SYMLINK)
@@ -170,9 +176,6 @@ $(KERNEL_USR): $(KERNEL_HEADERS_INSTALL)
$(TARGET_PREBUILT_INT_KERNEL): $(KERNEL_USR)
endif
$(KERNEL_OUT):
mkdir -p $(KERNEL_OUT)
$(KERNEL_CONFIG): $(KERNEL_OUT)
$(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_DEFCONFIG)
$(hide) if [ ! -z "$(KERNEL_CONFIG_OVERRIDE)" ]; then \
@@ -206,6 +209,17 @@ $(TARGET_PREBUILT_INT_KERNEL): $(KERNEL_OUT) $(KERNEL_HEADERS_INSTALL)
$(clean-module-folder)
endif
$(KERNEL_DEBUGFS):
KERNEL_DIR=$(TARGET_KERNEL_SOURCE) \
DEFCONFIG=$(KERNEL_DEFCONFIG) \
OUT_DIR=$(KERNEL_OUT) \
ARCH=$(KERNEL_ARCH) \
CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) \
DISABLE_DEBUGFS=$(KERNEL_DISABLE_DEBUGFS) \
$(TARGET_KERNEL_SOURCE)/disable_dbgfs.sh \
$(real_cc) \
$(TARGET_KERNEL_MAKE_ARGS)
$(KERNEL_HEADERS_INSTALL): $(KERNEL_OUT)
$(hide) if [ ! -z "$(KERNEL_HEADER_DEFCONFIG)" ]; then \
rm -f $(BUILD_ROOT_LOC)$(KERNEL_CONFIG) && \

4
Documentation/devicetree/bindings/iio/adc/qcom-rradc.txt
View File

@@ -45,6 +45,10 @@ Optional property:
- qcom,pmic-revid : Phandle pointing to the revision peripheral node. Use it to query the
PMIC fabrication ID for applying the appropriate temperature
compensation parameters.
- qcom,batt-id-delay-ms :
Value type: <u32>
Definition: Used to specify HW settling time in MS for measuring BATT_ID.
Possible values are: 0, 1, 4, 12, 20, 40, 60, 80.
Example:
/* RRADC node */

5
Documentation/devicetree/bindings/media/video/msm-cam-smmu.txt
View File

@@ -67,6 +67,11 @@ Second Level Node - CAM SMMU context bank device or firmware device
Value type: boolean
Definition: Specifies if the context bank is a secure context bank.
- qcom,secure-pixel-cb
Usage: optional
Value type: boolean
Definition: Specifies if the context bank is a secure pixel context bank.
=============================================
Third Level Node - CAM SMMU memory map device
=============================================

30
Documentation/devicetree/bindings/net/qrtr-ethernet-dev.txt Normal file
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@@ -0,0 +1,30 @@
QTI QRTR Ethernet Device transport binding
- compatible:
Usage: required
Value type: <stringlist>
Definition: must be "qcom,qrtr-ethernet-dev"
- qcom,net-id:
Usage: optional
Value type: <u32>
Definition: indicates what subnet this transport belongs to. Should be
passed into the qrtr core logic to determine if forwarding
is needed on this endpoint.
- qcom,low-latency:
Usage: optional
Value type: <bool>
Definition: indicates whether this transport receiving thread needs to
be set to realtime priority for enhanced performance.
= EXAMPLE
The following example represents the qrtr ethernet dev transport node on a
device configured as an ethernet endpoint and needs to forward data from the
host to a modem co-processor.
qcom,eth_dev_qrtr {
compatible = "qcom,qrtr-ethernet-dev";
qcom,net-id = <4>;
qcom,low-latency;
};

18
Documentation/devicetree/bindings/soc/qcom/blocknames.txt Normal file
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@@ -0,0 +1,18 @@
* rename block devices
Required properties:
- compatible: "qcom,blkdev-rename" compatibility string
- actual-dev: Name of the disk assigned by generic driver
- rename-dev: Re-name of the disk to set for disks
Example:
rename_blk: rename_blk {
compatible = "qcom,blkdev-rename";
actual-dev = "vda", "vdb", "vdc",
"vdd", "vde", "vdf",
"vdg", "vdh";
rename-dev = "la_system", "la_userdata", "la_vendor",
"la_persist", "modem", "bluetooth",
"la_misc", "vbmeta";

2
arch/arm/configs/vendor/sa515m-perf_defconfig vendored
View File

@@ -166,6 +166,7 @@ CONFIG_BRIDGE=y
CONFIG_VLAN_8021Q=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_PRIO=y
CONFIG_NET_SWITCHDEV=y
CONFIG_QRTR=y
CONFIG_QRTR_NODE_ID=2
CONFIG_QRTR_SMD=y
@@ -322,7 +323,6 @@ CONFIG_USB_CONFIGFS_RNDIS=y
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_USB_CONFIGFS_UEVENT=y
CONFIG_USB_CONFIGFS_F_UAC1=y
CONFIG_USB_CONFIGFS_F_DIAG=y
CONFIG_USB_CONFIGFS_F_CDEV=y
CONFIG_USB_CONFIGFS_F_GSI=y

2
arch/arm/configs/vendor/sa515m_defconfig vendored
View File

@@ -166,6 +166,7 @@ CONFIG_BRIDGE=y
CONFIG_VLAN_8021Q=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_PRIO=y
CONFIG_NET_SWITCHDEV=y
CONFIG_QRTR=y
CONFIG_QRTR_NODE_ID=2
CONFIG_QRTR_SMD=y
@@ -324,7 +325,6 @@ CONFIG_USB_CONFIGFS_RNDIS=y
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_USB_CONFIGFS_UEVENT=y
CONFIG_USB_CONFIGFS_F_UAC1=y
CONFIG_USB_CONFIGFS_F_DIAG=y
CONFIG_USB_CONFIGFS_F_CDEV=y
CONFIG_USB_CONFIGFS_F_GSI=y

2
arch/arm/configs/vendor/sdm429-bg-perf_defconfig vendored
View File

@@ -41,7 +41,6 @@ CONFIG_EMBEDDED=y
CONFIG_SLAB_FREELIST_RANDOM=y
CONFIG_SLAB_FREELIST_HARDENED=y
CONFIG_PROFILING=y
CONFIG_CC_STACKPROTECTOR_STRONG=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
@@ -298,7 +297,6 @@ CONFIG_USB_USBNET=y
CONFIG_WIL6210=m
CONFIG_WCNSS_MEM_PRE_ALLOC=y
CONFIG_CLD_LL_CORE=y
CONFIG_CNSS_GENL=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set

2
arch/arm/configs/vendor/sdm429-bg_defconfig vendored
View File

@@ -42,7 +42,6 @@ CONFIG_EMBEDDED=y
CONFIG_SLAB_FREELIST_RANDOM=y
CONFIG_SLAB_FREELIST_HARDENED=y
CONFIG_PROFILING=y
CONFIG_CC_STACKPROTECTOR_STRONG=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
@@ -304,7 +303,6 @@ CONFIG_USB_RTL8152=y
CONFIG_USB_USBNET=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
CONFIG_CLD_LL_CORE=y
CONFIG_CNSS_GENL=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set

5
arch/arm/mm/proc-v7.S
View File

@@ -18,6 +18,7 @@
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/memory.h>
#include <asm/cache.h>
#include "proc-macros.S"
@@ -547,10 +548,10 @@ __v7_setup_stack_ptr:
ENDPROC(__v7_setup)
.bss
.align 2
.align L1_CACHE_SHIFT
__v7_setup_stack:
.space 4 * 7 @ 7 registers
.align L1_CACHE_SHIFT
__INITDATA
.weak cpu_v7_bugs_init

1
arch/arm64/boot/dts/qcom/Makefile
View File

@@ -214,6 +214,7 @@ dtb-$(CONFIG_QTI_GVM) += sa8155-vm-la.dtb \
sa8195-vm-la.dtb \
sa8195-vm-la-mt.dtb \
sa8195-vm-lv.dtb \
sa8195-vm-lv-lxc.dtb \
sa8195-vm-lv-mt.dtb
ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y)

2
arch/arm64/boot/dts/qcom/mdm9607-ion.dtsi
View File

@@ -32,7 +32,7 @@
reg = <27>;
memory-region = <&qseecom_mem>;
qcom,ion-heap-type = "DMA";
status = "disabled";
status = "ok";
};
};
};

3
arch/arm64/boot/dts/qcom/mdm9607.dtsi
View File

@@ -1679,7 +1679,7 @@
qcom,ce-opp-freq = <100000000>;
};
qcom_seecom: qseecom@87a80000 {
qcom_seecom: qseecom@88000000 {
compatible = "qcom,qseecom";
reg = <0x88000000 0x500000>;
reg-names = "secapp-region";
@@ -1687,6 +1687,7 @@
qcom,hlos-num-ce-hw-instances = <1>;
qcom,hlos-ce-hw-instance = <0>;
qcom,qsee-ce-hw-instance = <0>;
qcom,support-bus-scaling;
qcom,msm-bus,name = "qseecom-noc";
qcom,msm-bus,num-cases = <4>;
qcom,msm-bus,num-paths = <1>;

11
arch/arm64/boot/dts/qcom/qcs405.dtsi
View File

@@ -962,6 +962,11 @@
qcom,proc-img-to-load = "cdsp";
};
qcom,eth_dev_qrtr {
compatible = "qcom,qrtr-ethernet-dev";
qcom,low-latency;
};
qcom,glink {
compatible = "qcom,glink";
#address-cells = <1>;
@@ -1718,9 +1723,9 @@
qcom,msm-bus,num-paths = <2>;
qcom,msm-bus,vectors-KBps =
<98 512 0 0>, <1 781 0 0>, /* No vote */
<98 512 1250 0>, <1 781 0 40000>, /* 10Mbps vote */
<98 512 12500 0>, <1 781 0 40000>, /* 100Mbps vote */
<98 512 125000 0>, <1 781 0 40000>; /* 1000Mbps vote */
<98 512 2500 0>, <1 781 0 40000>, /* 10Mbps vote */
<98 512 25000 0>, <1 781 0 40000>, /* 100Mbps vote */
<98 512 250000 0>, <1 781 0 40000>; /* 1000Mbps vote */
qcom,bus-vector-names = "0", "10", "100", "1000";
clocks = <&clock_gcc GCC_ETH_AXI_CLK>,
<&clock_gcc GCC_ETH_PTP_CLK>,

10
arch/arm64/boot/dts/qcom/quin-vm-common.dtsi
View File

@@ -79,6 +79,16 @@
};
};
};
rename_blk: rename_blk {
compatible = "qcom,blkdev-rename";
actual-dev = "vda", "vdb", "vdc",
"vdd", "vde", "vdf",
"vdg", "vdh";
rename-dev = "la_system", "la_userdata", "la_vendor",
"la_persist", "modem", "bluetooth",
"la_misc", "vbmeta";
};
};
&soc {

27
arch/arm64/boot/dts/qcom/sa2145p-ccard-nand-dc.dts
View File

@@ -54,3 +54,30 @@
/delete-node/ wlan_msa_region@88E0000;
/delete-node/ wlan_fw_mem@86400000;
};
&tlmm {
wakeup_gpio_default: wakeup_gpio_default {
mux {
pins = "gpio77";
function = "gpio";
};
config {
pins = "gpio77";
drive-strength = <2>;
bias-pull-down;
};
};
};
&sdx_ext_ipc {
qcom,wakeup-gpio-out = <&tlmm 77 0x00>;
};
&ethqos_hw {
rxc-skew-ps = <720>;
io-macro-info {
rx-prog-swap;
rx-dll-bypass;
};
};

27
arch/arm64/boot/dts/qcom/sa2150p-ccard-nand-dc.dts
View File

@@ -128,3 +128,30 @@
/delete-node/ wlan_msa_region@88E0000;
/delete-node/ wlan_fw_mem@86400000;
};
&tlmm {
wakeup_gpio_default: wakeup_gpio_default {
mux {
pins = "gpio77";
function = "gpio";
};
config {
pins = "gpio77";
drive-strength = <2>;
bias-pull-down;
};
};
};
&sdx_ext_ipc {
qcom,wakeup-gpio-out = <&tlmm 77 0x00>;
};
&ethqos_hw {
rxc-skew-ps = <720>;
io-macro-info {
rx-prog-swap;
rx-dll-bypass;
};
};

20
arch/arm64/boot/dts/qcom/sa6155p-camera.dtsi
View File

@@ -46,6 +46,26 @@
status = "disabled";
};
&cam_smmu {
msm_cam_smmu_ife_cp {
compatible = "qcom,msm-cam-smmu-cb";
iommus = <&apps_smmu 0x821 0x1C0>,
<&apps_smmu 0x841 0x0>,
<&apps_smmu 0x861 0x1C0>;
label = "ife-cp";
qcom,secure-pixel-cb;
ife_cp_iova_mem_map: iova-mem-map {
/* IO region is approximately 2.5 GB */
iova-mem-region-io {
iova-region-name = "io";
iova-region-start = <0x7400000>;
iova-region-len = <0x98C00000>;
iova-region-id = <0x3>;
status = "ok";
};
};
};
};
&soc {
/delete-node/ cam_isp_mgr;

4
arch/arm64/boot/dts/qcom/sa6155p-vm-qupv3.dtsi
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -426,6 +426,7 @@
pinctrl-1 = <&qupv3_se9_spi_sleep>;
spi-max-frequency = <50000000>;
qcom,wrapper-core = <&qupv3_2>;
qcom,disable-dma;
status = "disabled";
};
@@ -445,6 +446,7 @@
pinctrl-1 = <&qupv3_se10_spi_sleep>;
spi-max-frequency = <50000000>;
qcom,wrapper-core = <&qupv3_2>;
qcom,disable-dma;
status = "disabled";
};
};

25
arch/arm64/boot/dts/qcom/sa8155-camera.dtsi
View File

@@ -62,6 +62,31 @@
status = "disabled";
};
&cam_smmu {
msm_cam_smmu_ife_cp {
compatible = "qcom,msm-cam-smmu-cb";
iommus = <&apps_smmu 0x841 0x620>,
<&apps_smmu 0x861 0x620>,
<&apps_smmu 0xA41 0x620>,
<&apps_smmu 0xA61 0x620>,
<&apps_smmu 0xC41 0x620>,
<&apps_smmu 0xC61 0x620>,
<&apps_smmu 0xE41 0x620>,
<&apps_smmu 0xE61 0x620>;
label = "ife-cp";
qcom,secure-pixel-cb;
ife_cp_iova_mem_map: iova-mem-map {
/* IO region is approximately 2.5 GB */
iova-mem-region-io {
iova-region-name = "io";
iova-region-start = <0x7400000>;
iova-region-len = <0x98C00000>;
iova-region-id = <0x3>;
status = "ok";
};
};
};
};
&soc {
/delete-node/ cam_isp_mgr;

23
arch/arm64/boot/dts/qcom/sa8195-vm-lv-lxc.dts Normal file
View File

@@ -0,0 +1,23 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "sa8195-vm.dtsi"
#include "sa8195-vm-lv-lxc.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SA8195 Single LV Virtual Machine";
compatible = "qcom,sa8195p";
qcom,pmic-name = "PM8195";
qcom,board-id = <0x1000002 0>;
};

59
arch/arm64/boot/dts/qcom/sa8195-vm-lv-lxc.dtsi Normal file
View File

@@ -0,0 +1,59 @@
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/ {
reserved_memory: reserved-memory {
pmem_shared: pmem_shared_region@a0000000 {
reg = <0x0 0xa0000000 0x0 0x20000000>;
label = "pmem_shared_mem";
};
};
};
&hab {
vmid = <3>;
};
&slpi_tlmm {
status = "ok";
};
&apps_smmu {
status = "ok";
};
&qupv3_se13_4uart {
status = "ok";
};
&usb0 {
status = "ok";
};
&usb2_phy0 {
status = "ok";
};
&pcie0_msi {
status = "ok";
};
&pcie0 {
status = "ok";
};
&sde_kms_hyp {
/delete-property/ qcom,client-id;
qcom,client-id = "7816";
};

52
arch/arm64/boot/dts/qcom/sa8195p-camera.dtsi
View File

@@ -532,14 +532,22 @@
msm_cam_smmu_ife {
compatible = "qcom,msm-cam-smmu-cb";
iommus = <&apps_smmu 0xAA0 0x4E0>,
<&apps_smmu 0xA20 0x4E0>,
<&apps_smmu 0xA00 0x4E0>,
iommus = <&apps_smmu 0xA00 0x4E0>,
<&apps_smmu 0xAA0 0x4E0>,
<&apps_smmu 0xA40 0x4E0>,
<&apps_smmu 0xA60 0x4E0>,
<&apps_smmu 0xA80 0x4E0>,
<&apps_smmu 0xEA0 0x4E0>,
<&apps_smmu 0xE20 0x4E0>,
<&apps_smmu 0xA20 0x4E0>,
<&apps_smmu 0xAC0 0x4E0>,
<&apps_smmu 0xAE0 0x4E0>,
<&apps_smmu 0xE00 0x4E0>,
<&apps_smmu 0xE80 0x4E0>;
<&apps_smmu 0xEA0 0x4E0>,
<&apps_smmu 0xE40 0x4E0>,
<&apps_smmu 0xE60 0x4E0>,
<&apps_smmu 0xE80 0x4E0>,
<&apps_smmu 0xE20 0x4E0>,
<&apps_smmu 0xEC0 0x4E0>,
<&apps_smmu 0xEE0 0x4E0>;
label = "ife";
ife_iova_mem_map: iova-mem-map {
/* IO region is approximately 3.4 GB */
@@ -553,6 +561,38 @@
};
};
msm_cam_smmu_ife_cp {
compatible = "qcom,msm-cam-smmu-cb";
iommus = <&apps_smmu 0xA01 0x5E0>,
<&apps_smmu 0xAA1 0x5E0>,
<&apps_smmu 0xA41 0x5E0>,
<&apps_smmu 0xA61 0x5E0>,
<&apps_smmu 0xA81 0x5E0>,
<&apps_smmu 0xA21 0x5E0>,
<&apps_smmu 0xAC1 0x5E0>,
<&apps_smmu 0xAE1 0x5E0>,
<&apps_smmu 0xE01 0x5E0>,
<&apps_smmu 0xEA1 0x5E0>,
<&apps_smmu 0xE41 0x5E0>,
<&apps_smmu 0xE61 0x5E0>,
<&apps_smmu 0xE81 0x5E0>,
<&apps_smmu 0xE21 0x5E0>,
<&apps_smmu 0xEC1 0x5E0>,
<&apps_smmu 0xEE1 0x5E0>;
label = "ife-cp";
qcom,secure-pixel-cb;
ife_cp_iova_mem_map: iova-mem-map {
/* IO region is approximately 2.5 GB */
iova-mem-region-io {
iova-region-name = "io";
iova-region-start = <0x7400000>;
iova-region-len = <0x98C00000>;
iova-region-id = <0x3>;
status = "ok";
};
};
};
msm_cam_smmu_jpeg {
compatible = "qcom,msm-cam-smmu-cb";
iommus = <&apps_smmu 0x2100 0x20>,

1
arch/arm64/boot/dts/qcom/sda429-bg-dvt2-wtp-overlay.dts
View File

@@ -17,6 +17,7 @@
#include <dt-bindings/clock/qcom,rpmcc.h>
#include "sda429-bg-dvt2-wtp.dtsi"
#include "sdm429-mdss-panels.dtsi"
#include "sdm429-spyro-qrd-evt-audio.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDA429 QRD BG WTP Overlay";

1
arch/arm64/boot/dts/qcom/sdm429-blsp.dtsi
View File

@@ -198,6 +198,7 @@
interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>,
<0 238 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
qcom,use-bam;
qcom,ver-reg-exists;
qcom,bam-consumer-pipe-index = <8>;
qcom,bam-producer-pipe-index = <9>;

4
arch/arm64/boot/dts/qcom/sdm429w-bg-pm660.dtsi
View File

@@ -29,7 +29,3 @@
&pm660_fg {
qcom,fg-disable-in-twm;
};
&pm660_haptics {
qcom,haptics-ext-pin-twm;
};

1
arch/arm64/boot/dts/qcom/sdm429w-pm660.dtsi
View File

@@ -131,7 +131,6 @@
/delete-property/ qcom,lra-allow-variable-play;
/delete-property/ qcom,lra-allow-variable-play-rate;
qcom,actuator-type = "erm";
qcom,ilim-ma = <400>;
qcom,play-rate-us = <10000>;
wf_0 {

1
arch/arm64/boot/dts/qcom/sdm660-usbc-audio-mtp-overlay.dts
View File

@@ -13,6 +13,7 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/qcom,mmcc-sdm660.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include "sdm660-mtp.dtsi"
#include "sdm660-external-codec.dtsi"

7
arch/arm64/boot/dts/qcom/sdmmagpie.dtsi
View File

@@ -2633,6 +2633,13 @@
qcom,minidump-id = <3>;
qcom,complete-ramdump;
qcom,msm-bus,name = "pil-modem";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<129 512 0 0>,
<129 512 0 7000000>;
/* Inputs from mss */
interrupts-extended = <&pdc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 0 IRQ_TYPE_NONE>,

2
arch/arm64/boot/dts/qcom/sdmshrike.dtsi
View File

@@ -719,7 +719,7 @@
alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
reusable;
alignment = <0x0 0x400000>;
size = <0x0 0x2800000>;
size = <0x0 0x3c00000>;
linux,cma-default;
};
};

4
arch/arm64/boot/dts/qcom/sdxprairie-audio.dtsi
View File

@@ -38,7 +38,9 @@
<&afe_proxy_tx>, <&incall_record_rx>,
<&incall_record_tx>, <&incall_music_rx>,
<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_tx_0>,
<&dai_pri_tdm_rx_1>, <&dai_pri_tdm_tx_1>,
<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_tx_0>,
<&dai_sec_tdm_rx_1>, <&dai_sec_tdm_tx_1>,
<&dai_sec_auxpcm>, <&incall2_record_rx>,
<&incall_music_2_rx>, <&incall_music_dl_rx>;
asoc-cpu-names = "msm-dai-q6-auxpcm.1",
@@ -50,7 +52,9 @@
"msm-dai-q6-dev.240", "msm-dai-q6-dev.32771",
"msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773",
"msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36865",
"msm-dai-q6-tdm.36866", "msm-dai-q6-tdm.36867",
"msm-dai-q6-tdm.36880", "msm-dai-q6-tdm.36881",
"msm-dai-q6-tdm.36882", "msm-dai-q6-tdm.36883",
"msm-dai-q6-auxpcm.2", "msm-dai-q6-dev.32769",
"msm-dai-q6-dev.32770", "msm-dai-q6-dev.32774";
};

6
arch/arm64/boot/dts/qcom/sdxprairie.dtsi
View File

@@ -704,6 +704,12 @@
qcom,net-id = <3>;
};
eth_dev_qrtr: qcom,eth_dev_qrtr {
compatible = "qcom,qrtr-ethernet-dev";
qcom,net-id = <4>;
qcom,low-latency;
};
qcom,glinkpkt {
compatible = "qcom,glinkpkt";

2
arch/arm64/boot/dts/qcom/sm6150-camera.dtsi
View File

@@ -227,7 +227,7 @@
};
};
qcom,cam_smmu {
cam_smmu: qcom,cam_smmu {
compatible = "qcom,msm-cam-smmu";
status = "ok";

2
arch/arm64/boot/dts/qcom/sm8150-camera.dtsi
View File

@@ -316,7 +316,7 @@
};
};
msm_cam_smmu: qcom,cam_smmu {
cam_smmu: qcom,cam_smmu {
compatible = "qcom,msm-cam-smmu";
status = "ok";

13
arch/arm64/configs/vendor/atoll-perf_defconfig vendored
View File

@@ -17,18 +17,17 @@ CONFIG_RCU_FAST_NO_HZ=y
CONFIG_RCU_NOCB_CPU=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_IKHEADERS=y
CONFIG_LOG_CPU_MAX_BUF_SHIFT=17
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_BLK_CGROUP=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_BPF=y
CONFIG_SCHED_CORE_CTL=y
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_PID_NS is not set
CONFIG_SCHED_AUTOGROUP=y
CONFIG_SCHED_TUNE=y
@@ -39,6 +38,7 @@ CONFIG_BLK_DEV_INITRD=y
# CONFIG_RD_LZ4 is not set
CONFIG_KALLSYMS_ALL=y
CONFIG_BPF_SYSCALL=y
CONFIG_BPF_JIT_ALWAYS_ON=y
CONFIG_EMBEDDED=y
# CONFIG_SLUB_DEBUG is not set
# CONFIG_COMPAT_BRK is not set
@@ -48,7 +48,6 @@ CONFIG_PROFILING=y
CONFIG_CC_STACKPROTECTOR_STRONG=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SIG=y
CONFIG_MODULE_SIG_FORCE=y
@@ -78,6 +77,7 @@ CONFIG_ARMV8_DEPRECATED=y
CONFIG_SWP_EMULATION=y
CONFIG_CP15_BARRIER_EMULATION=y
CONFIG_SETEND_EMULATION=y
CONFIG_ARM64_SW_TTBR0_PAN=y
# CONFIG_ARM64_VHE is not set
CONFIG_RANDOMIZE_BASE=y
# CONFIG_EFI is not set
@@ -245,6 +245,7 @@ CONFIG_NET_ACT_MIRRED=y
CONFIG_NET_ACT_SKBEDIT=y
CONFIG_QRTR=y
CONFIG_QRTR_SMD=y
CONFIG_BPF_JIT=y
CONFIG_SOCKEV_NLMCAST=y
CONFIG_BT=y
CONFIG_MSM_BT_POWER=y
@@ -320,6 +321,8 @@ CONFIG_CNSS_GENL=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_JOYSTICK_XPAD=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MXT=y
CONFIG_TOUCHSCREEN_ST=y
@@ -457,7 +460,6 @@ CONFIG_HID_NINTENDO=y
CONFIG_HID_PLANTRONICS=y
CONFIG_HID_SONY=y
CONFIG_HID_QVR=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
@@ -660,6 +662,7 @@ CONFIG_QCOM_LLCC_PMU=y
CONFIG_RAS=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_ANDROID_BINDERFS=y
CONFIG_QCOM_QFPROM=y
CONFIG_NVMEM_SPMI_SDAM=y
CONFIG_SENSORS_SSC=y
@@ -702,6 +705,7 @@ CONFIG_MAGIC_SYSRQ=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_SCHEDSTATS=y
# CONFIG_DEBUG_PREEMPT is not set
CONFIG_DEBUG_LIST=y
CONFIG_IPC_LOGGING=y
CONFIG_DEBUG_ALIGN_RODATA=y
CONFIG_CORESIGHT=y
@@ -721,6 +725,7 @@ CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
CONFIG_SECURITY=y
CONFIG_HARDENED_USERCOPY=y
CONFIG_FORTIFY_SOURCE=y
CONFIG_STATIC_USERMODEHELPER=y
CONFIG_SECURITY_SELINUX=y
CONFIG_SECURITY_SMACK=y
CONFIG_CRYPTO_GCM=y

11
arch/arm64/configs/vendor/atoll_defconfig vendored
View File

@@ -16,12 +16,12 @@ CONFIG_RCU_FAST_NO_HZ=y
CONFIG_RCU_NOCB_CPU=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_IKHEADERS=y
CONFIG_LOG_CPU_MAX_BUF_SHIFT=17
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_BLK_CGROUP=y
CONFIG_DEBUG_BLK_CGROUP=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
@@ -29,7 +29,6 @@ CONFIG_CGROUP_BPF=y
CONFIG_CGROUP_DEBUG=y
CONFIG_SCHED_CORE_CTL=y
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_PID_NS is not set
CONFIG_SCHED_AUTOGROUP=y
CONFIG_SCHED_TUNE=y
@@ -41,6 +40,7 @@ CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_BPF_SYSCALL=y
CONFIG_BPF_JIT_ALWAYS_ON=y
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB_FREELIST_RANDOM=y
@@ -50,7 +50,6 @@ CONFIG_KPROBES=y
CONFIG_CC_STACKPROTECTOR_STRONG=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SIG=y
CONFIG_MODULE_SIG_FORCE=y
@@ -84,6 +83,7 @@ CONFIG_ARMV8_DEPRECATED=y
CONFIG_SWP_EMULATION=y
CONFIG_CP15_BARRIER_EMULATION=y
CONFIG_SETEND_EMULATION=y
CONFIG_ARM64_SW_TTBR0_PAN=y
# CONFIG_ARM64_VHE is not set
CONFIG_RANDOMIZE_BASE=y
CONFIG_KRYO_PMU_WORKAROUND=y
@@ -253,6 +253,7 @@ CONFIG_NET_ACT_SKBEDIT=y
CONFIG_DNS_RESOLVER=y
CONFIG_QRTR=y
CONFIG_QRTR_SMD=y
CONFIG_BPF_JIT=y
CONFIG_SOCKEV_NLMCAST=y
CONFIG_BT=y
CONFIG_MSM_BT_POWER=y
@@ -330,6 +331,7 @@ CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_JOYSTICK_XPAD=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MXT=y
CONFIG_TOUCHSCREEN_ST=y
@@ -472,7 +474,6 @@ CONFIG_HID_NINTENDO=y
CONFIG_HID_PLANTRONICS=y
CONFIG_HID_SONY=y
CONFIG_HID_QVR=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
@@ -690,6 +691,7 @@ CONFIG_QCOM_LLCC_PMU=y
CONFIG_RAS=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_ANDROID_BINDERFS=y
CONFIG_QCOM_QFPROM=y
CONFIG_NVMEM_SPMI_SDAM=y
CONFIG_SENSORS_SSC=y
@@ -809,6 +811,7 @@ CONFIG_SECURITY=y
CONFIG_HARDENED_USERCOPY=y
CONFIG_HARDENED_USERCOPY_PAGESPAN=y
CONFIG_FORTIFY_SOURCE=y
CONFIG_STATIC_USERMODEHELPER=y
CONFIG_SECURITY_SELINUX=y
CONFIG_SECURITY_SMACK=y
CONFIG_CRYPTO_GCM=y

1
arch/arm64/configs/vendor/qti-quin-gvm-perf_defconfig vendored
View File

@@ -463,6 +463,7 @@ CONFIG_MEM_SHARE_QMI_SERVICE=y
CONFIG_MSM_HAB=y
CONFIG_QCOM_HGSL_TCSR_SIGNAL=y
CONFIG_QCOM_HGSL=y
CONFIG_RENAME_BLOCK_DEVICE=y
CONFIG_PM_DEVFREQ=y
CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
CONFIG_EXTCON_USB_GPIO=y

1
arch/arm64/configs/vendor/qti-quin-gvm_defconfig vendored
View File

@@ -474,6 +474,7 @@ CONFIG_MEM_SHARE_QMI_SERVICE=y
CONFIG_MSM_HAB=y
CONFIG_QCOM_HGSL_TCSR_SIGNAL=y
CONFIG_QCOM_HGSL=y
CONFIG_RENAME_BLOCK_DEVICE=y
CONFIG_PM_DEVFREQ=y
CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
CONFIG_EXTCON_USB_GPIO=y

5
arch/arm64/configs/vendor/sa2150p-nand-perf_defconfig vendored
View File

@@ -238,6 +238,9 @@ CONFIG_DM_VERITY_FEC=y
CONFIG_NETDEVICES=y
CONFIG_DUMMY=y
CONFIG_TUN=y
CONFIG_STMMAC_ETH=y
# CONFIG_DWMAC_GENERIC is not set
# CONFIG_DWMAC_IPQ806X is not set
CONFIG_AT803X_PHY=y
CONFIG_MICREL_PHY=y
CONFIG_PPP=y
@@ -276,11 +279,11 @@ CONFIG_I2C_MUX=y
CONFIG_I2C_MSM_V2=y
CONFIG_SPI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=y
CONFIG_SPMI=y
CONFIG_SLIMBUS=y
CONFIG_SLIMBUS_MSM_NGD=y
CONFIG_PPS_CLIENT_GPIO=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PINCTRL_QCS405=y
CONFIG_FRAGMENTED_GPIO_ADDRESS_SPACE=y
CONFIG_PINCTRL_QCOM_SPMI_PMIC=y

4
arch/arm64/configs/vendor/sa2150p-nand_defconfig vendored
View File

@@ -238,6 +238,9 @@ CONFIG_DM_VERITY_FEC=y
CONFIG_NETDEVICES=y
CONFIG_DUMMY=y
CONFIG_TUN=y
CONFIG_STMMAC_ETH=y
# CONFIG_DWMAC_GENERIC is not set
# CONFIG_DWMAC_IPQ806X is not set
CONFIG_AT803X_PHY=y
CONFIG_MICREL_PHY=y
CONFIG_PPP=y
@@ -282,7 +285,6 @@ CONFIG_SPMI=y
CONFIG_SLIMBUS=y
CONFIG_SLIMBUS_MSM_NGD=y
CONFIG_PPS_CLIENT_GPIO=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PINCTRL_QCS405=y
CONFIG_FRAGMENTED_GPIO_ADDRESS_SPACE=y
CONFIG_PINCTRL_QCOM_SPMI_PMIC=y

1
arch/arm64/configs/vendor/sa2150p-perf_defconfig vendored
View File

@@ -290,6 +290,7 @@ CONFIG_I2C_MUX=y
CONFIG_I2C_MSM_V2=y
CONFIG_SPI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=y
CONFIG_SPMI=y
CONFIG_SLIMBUS_MSM_NGD=y
CONFIG_PPS_CLIENT_GPIO=y

1
arch/arm64/configs/vendor/sa8155-perf_defconfig vendored
View File

@@ -318,6 +318,7 @@ CONFIG_CNSS2=y
CONFIG_CNSS2_DEBUG=y
CONFIG_CNSS2_QMI=y
CONFIG_CNSS_ASYNC=y
CONFIG_CNSS_UTILS=y
CONFIG_CNSS_GENL=y
CONFIG_NVM=y
CONFIG_NVM_RRPC=y

1
arch/arm64/configs/vendor/sa8155_defconfig vendored
View File

@@ -329,6 +329,7 @@ CONFIG_CNSS2=y
CONFIG_CNSS2_DEBUG=y
CONFIG_CNSS2_QMI=y
CONFIG_CNSS_ASYNC=y
CONFIG_CNSS_UTILS=y
CONFIG_CNSS_GENL=y
CONFIG_NVM=y
CONFIG_NVM_RRPC=y

13
arch/arm64/configs/vendor/sdmsteppe-perf_defconfig vendored
View File

@@ -16,18 +16,17 @@ CONFIG_RCU_FAST_NO_HZ=y
CONFIG_RCU_NOCB_CPU=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_IKHEADERS=y
CONFIG_LOG_CPU_MAX_BUF_SHIFT=17
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_BLK_CGROUP=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_BPF=y
CONFIG_SCHED_CORE_CTL=y
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_PID_NS is not set
CONFIG_SCHED_AUTOGROUP=y
CONFIG_SCHED_TUNE=y
@@ -38,6 +37,7 @@ CONFIG_BLK_DEV_INITRD=y
# CONFIG_RD_LZ4 is not set
CONFIG_KALLSYMS_ALL=y
CONFIG_BPF_SYSCALL=y
CONFIG_BPF_JIT_ALWAYS_ON=y
CONFIG_EMBEDDED=y
# CONFIG_SLUB_DEBUG is not set
# CONFIG_COMPAT_BRK is not set
@@ -47,7 +47,6 @@ CONFIG_PROFILING=y
CONFIG_CC_STACKPROTECTOR_STRONG=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SIG=y
CONFIG_MODULE_SIG_FORCE=y
@@ -73,6 +72,7 @@ CONFIG_ARMV8_DEPRECATED=y
CONFIG_SWP_EMULATION=y
CONFIG_CP15_BARRIER_EMULATION=y
CONFIG_SETEND_EMULATION=y
CONFIG_ARM64_SW_TTBR0_PAN=y
# CONFIG_ARM64_VHE is not set
CONFIG_RANDOMIZE_BASE=y
# CONFIG_EFI is not set
@@ -241,6 +241,7 @@ CONFIG_NET_ACT_MIRRED=y
CONFIG_NET_ACT_SKBEDIT=y
CONFIG_QRTR=y
CONFIG_QRTR_SMD=y
CONFIG_BPF_JIT=y
CONFIG_SOCKEV_NLMCAST=y
CONFIG_BT=y
CONFIG_MSM_BT_POWER=y
@@ -316,6 +317,8 @@ CONFIG_CNSS_GENL=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_JOYSTICK_XPAD=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ST=y
CONFIG_TOUCHSCREEN_HIMAX_CHIPSET=y
@@ -442,7 +445,6 @@ CONFIG_HID_NINTENDO=y
CONFIG_HID_PLANTRONICS=y
CONFIG_HID_SONY=y
CONFIG_HID_QVR=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
@@ -640,6 +642,7 @@ CONFIG_QCOM_LLCC_PMU=y
CONFIG_RAS=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_ANDROID_BINDERFS=y
CONFIG_NVMEM_SPMI_SDAM=y
CONFIG_SENSORS_SSC=y
CONFIG_ESOC=y
@@ -681,6 +684,7 @@ CONFIG_MAGIC_SYSRQ=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_SCHEDSTATS=y
# CONFIG_DEBUG_PREEMPT is not set
CONFIG_DEBUG_LIST=y
CONFIG_IPC_LOGGING=y
CONFIG_DEBUG_ALIGN_RODATA=y
CONFIG_CORESIGHT=y
@@ -700,6 +704,7 @@ CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
CONFIG_SECURITY=y
CONFIG_HARDENED_USERCOPY=y
CONFIG_FORTIFY_SOURCE=y
CONFIG_STATIC_USERMODEHELPER=y
CONFIG_SECURITY_SELINUX=y
CONFIG_SECURITY_SMACK=y
CONFIG_CRYPTO_GCM=y

11
arch/arm64/configs/vendor/sdmsteppe_defconfig vendored
View File

@@ -15,12 +15,12 @@ CONFIG_RCU_FAST_NO_HZ=y
CONFIG_RCU_NOCB_CPU=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_IKHEADERS=y
CONFIG_LOG_CPU_MAX_BUF_SHIFT=17
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_BLK_CGROUP=y
CONFIG_DEBUG_BLK_CGROUP=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
@@ -28,7 +28,6 @@ CONFIG_CGROUP_BPF=y
CONFIG_CGROUP_DEBUG=y
CONFIG_SCHED_CORE_CTL=y
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_PID_NS is not set
CONFIG_SCHED_AUTOGROUP=y
CONFIG_SCHED_TUNE=y
@@ -40,6 +39,7 @@ CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_BPF_SYSCALL=y
CONFIG_BPF_JIT_ALWAYS_ON=y
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB_FREELIST_RANDOM=y
@@ -48,7 +48,6 @@ CONFIG_PROFILING=y
CONFIG_CC_STACKPROTECTOR_STRONG=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SIG=y
CONFIG_MODULE_SIG_FORCE=y
@@ -79,6 +78,7 @@ CONFIG_ARMV8_DEPRECATED=y
CONFIG_SWP_EMULATION=y
CONFIG_CP15_BARRIER_EMULATION=y
CONFIG_SETEND_EMULATION=y
CONFIG_ARM64_SW_TTBR0_PAN=y
# CONFIG_ARM64_VHE is not set
CONFIG_RANDOMIZE_BASE=y
CONFIG_KRYO_PMU_WORKAROUND=y
@@ -249,6 +249,7 @@ CONFIG_NET_ACT_SKBEDIT=y
CONFIG_DNS_RESOLVER=y
CONFIG_QRTR=y
CONFIG_QRTR_SMD=y
CONFIG_BPF_JIT=y
CONFIG_SOCKEV_NLMCAST=y
CONFIG_BT=y
CONFIG_MSM_BT_POWER=y
@@ -326,6 +327,7 @@ CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_JOYSTICK_XPAD=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ST=y
CONFIG_TOUCHSCREEN_HIMAX_CHIPSET=y
@@ -466,7 +468,6 @@ CONFIG_HID_NINTENDO=y
CONFIG_HID_PLANTRONICS=y
CONFIG_HID_SONY=y
CONFIG_HID_QVR=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
@@ -677,6 +678,7 @@ CONFIG_QCOM_LLCC_PMU=y
CONFIG_RAS=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_ANDROID_BINDERFS=y
CONFIG_NVMEM_SPMI_SDAM=y
CONFIG_SENSORS_SSC=y
CONFIG_ESOC=y
@@ -795,6 +797,7 @@ CONFIG_SECURITY=y
CONFIG_HARDENED_USERCOPY=y
CONFIG_HARDENED_USERCOPY_PAGESPAN=y
CONFIG_FORTIFY_SOURCE=y
CONFIG_STATIC_USERMODEHELPER=y
CONFIG_SECURITY_SELINUX=y
CONFIG_SECURITY_SMACK=y
CONFIG_CRYPTO_GCM=y

13
arch/arm64/configs/vendor/sm8150-perf_defconfig vendored
View File

@@ -17,18 +17,17 @@ CONFIG_RCU_FAST_NO_HZ=y
CONFIG_RCU_NOCB_CPU=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_IKHEADERS=y
CONFIG_LOG_CPU_MAX_BUF_SHIFT=17
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_BLK_CGROUP=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_BPF=y
CONFIG_SCHED_CORE_CTL=y
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_PID_NS is not set
CONFIG_SCHED_AUTOGROUP=y
CONFIG_SCHED_TUNE=y
@@ -39,6 +38,7 @@ CONFIG_BLK_DEV_INITRD=y
# CONFIG_RD_LZ4 is not set
CONFIG_KALLSYMS_ALL=y
CONFIG_BPF_SYSCALL=y
CONFIG_BPF_JIT_ALWAYS_ON=y
CONFIG_EMBEDDED=y
# CONFIG_SLUB_DEBUG is not set
# CONFIG_COMPAT_BRK is not set
@@ -49,7 +49,6 @@ CONFIG_CC_STACKPROTECTOR_STRONG=y
CONFIG_REFCOUNT_FULL=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SIG=y
CONFIG_MODULE_SIG_FORCE=y
@@ -78,6 +77,7 @@ CONFIG_ARMV8_DEPRECATED=y
CONFIG_SWP_EMULATION=y
CONFIG_CP15_BARRIER_EMULATION=y
CONFIG_SETEND_EMULATION=y
CONFIG_ARM64_SW_TTBR0_PAN=y
# CONFIG_ARM64_VHE is not set
CONFIG_RANDOMIZE_BASE=y
# CONFIG_EFI is not set
@@ -249,6 +249,7 @@ CONFIG_QRTR=y
CONFIG_QRTR_SMD=y
CONFIG_QRTR_MHI=y
CONFIG_QRTR_FIFO=y
CONFIG_BPF_JIT=y
CONFIG_SOCKEV_NLMCAST=y
CONFIG_BT=y
CONFIG_MSM_BT_POWER=y
@@ -325,6 +326,8 @@ CONFIG_CNSS_GENL=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_JOYSTICK_XPAD=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ST=y
CONFIG_TOUCHSCREEN_SYNAPTICS_TCM=y
@@ -451,7 +454,6 @@ CONFIG_HID_PLANTRONICS=y
CONFIG_HID_SONY=y
CONFIG_HID_QVR=y
CONFIG_USB_HIDDEV=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
@@ -647,6 +649,7 @@ CONFIG_QCOM_LLCC_PMU=y
CONFIG_RAS=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_ANDROID_BINDERFS=y
CONFIG_NVMEM_SPMI_SDAM=y
CONFIG_SENSORS_SSC=y
CONFIG_ESOC=y
@@ -688,6 +691,7 @@ CONFIG_MAGIC_SYSRQ=y
CONFIG_PANIC_TIMEOUT=-1
CONFIG_SCHEDSTATS=y
# CONFIG_DEBUG_PREEMPT is not set
CONFIG_DEBUG_LIST=y
CONFIG_IPC_LOGGING=y
CONFIG_DEBUG_ALIGN_RODATA=y
CONFIG_CORESIGHT=y
@@ -709,6 +713,7 @@ CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
CONFIG_SECURITY=y
CONFIG_HARDENED_USERCOPY=y
CONFIG_FORTIFY_SOURCE=y
CONFIG_STATIC_USERMODEHELPER=y
CONFIG_SECURITY_SELINUX=y
CONFIG_SECURITY_SMACK=y
CONFIG_CRYPTO_GCM=y

11
arch/arm64/configs/vendor/sm8150_defconfig vendored
View File

@@ -16,12 +16,12 @@ CONFIG_RCU_FAST_NO_HZ=y
CONFIG_RCU_NOCB_CPU=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_IKHEADERS=y
CONFIG_LOG_CPU_MAX_BUF_SHIFT=17
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_BLK_CGROUP=y
CONFIG_DEBUG_BLK_CGROUP=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
@@ -29,7 +29,6 @@ CONFIG_CGROUP_BPF=y
CONFIG_CGROUP_DEBUG=y
CONFIG_SCHED_CORE_CTL=y
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_PID_NS is not set
CONFIG_SCHED_AUTOGROUP=y
CONFIG_SCHED_TUNE=y
@@ -41,6 +40,7 @@ CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_BPF_SYSCALL=y
CONFIG_BPF_JIT_ALWAYS_ON=y
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB_FREELIST_RANDOM=y
@@ -51,7 +51,6 @@ CONFIG_REFCOUNT_FULL=y
CONFIG_PANIC_ON_REFCOUNT_ERROR=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SIG=y
CONFIG_MODULE_SIG_FORCE=y
@@ -85,6 +84,7 @@ CONFIG_ARMV8_DEPRECATED=y
CONFIG_SWP_EMULATION=y
CONFIG_CP15_BARRIER_EMULATION=y
CONFIG_SETEND_EMULATION=y
CONFIG_ARM64_SW_TTBR0_PAN=y
# CONFIG_ARM64_VHE is not set
CONFIG_RANDOMIZE_BASE=y
CONFIG_BUILD_ARM64_UNCOMPRESSED_KERNEL=y
@@ -258,6 +258,7 @@ CONFIG_QRTR=y
CONFIG_QRTR_SMD=y
CONFIG_QRTR_MHI=y
CONFIG_QRTR_FIFO=y
CONFIG_BPF_JIT=y
CONFIG_SOCKEV_NLMCAST=y
CONFIG_BT=y
CONFIG_MSM_BT_POWER=y
@@ -337,6 +338,7 @@ CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_JOYSTICK_XPAD=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ST=y
CONFIG_TOUCHSCREEN_SYNAPTICS_TCM=y
@@ -467,7 +469,6 @@ CONFIG_HID_PLANTRONICS=y
CONFIG_HID_SONY=y
CONFIG_HID_QVR=y
CONFIG_USB_HIDDEV=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
@@ -677,6 +678,7 @@ CONFIG_QCOM_LLCC_PMU=y
CONFIG_RAS=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_ANDROID_BINDERFS=y
CONFIG_NVMEM_SPMI_SDAM=y
CONFIG_SENSORS_SSC=y
CONFIG_ESOC=y
@@ -796,6 +798,7 @@ CONFIG_SECURITY=y
CONFIG_HARDENED_USERCOPY=y
CONFIG_HARDENED_USERCOPY_PAGESPAN=y
CONFIG_FORTIFY_SOURCE=y
CONFIG_STATIC_USERMODEHELPER=y
CONFIG_SECURITY_SELINUX=y
CONFIG_SECURITY_SMACK=y
CONFIG_CRYPTO_GCM=y

13
arch/arm64/configs/vendor/trinket-perf_defconfig vendored
View File

@@ -17,18 +17,17 @@ CONFIG_RCU_FAST_NO_HZ=y
CONFIG_RCU_NOCB_CPU=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_IKHEADERS=y
CONFIG_LOG_CPU_MAX_BUF_SHIFT=17
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_BLK_CGROUP=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_BPF=y
CONFIG_SCHED_CORE_CTL=y
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_PID_NS is not set
CONFIG_SCHED_AUTOGROUP=y
CONFIG_SCHED_TUNE=y
@@ -39,6 +38,7 @@ CONFIG_BLK_DEV_INITRD=y
# CONFIG_RD_LZ4 is not set
CONFIG_KALLSYMS_ALL=y
CONFIG_BPF_SYSCALL=y
CONFIG_BPF_JIT_ALWAYS_ON=y
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB_FREELIST_RANDOM=y
@@ -47,7 +47,6 @@ CONFIG_PROFILING=y
CONFIG_CC_STACKPROTECTOR_STRONG=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SIG=y
CONFIG_MODULE_SIG_FORCE=y
@@ -244,6 +243,7 @@ CONFIG_NET_ACT_MIRRED=y
CONFIG_NET_ACT_SKBEDIT=y
CONFIG_QRTR=y
CONFIG_QRTR_SMD=y
CONFIG_BPF_JIT=y
CONFIG_SOCKEV_NLMCAST=y
CONFIG_BT=y
CONFIG_MSM_BT_POWER=y
@@ -316,6 +316,8 @@ CONFIG_CNSS_GENL=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_JOYSTICK_XPAD=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_HIMAX_CHIPSET=y
CONFIG_TOUCHSCREEN_HIMAX_I2C=y
@@ -458,7 +460,6 @@ CONFIG_HID_MULTITOUCH=y
CONFIG_HID_NINTENDO=y
CONFIG_HID_PLANTRONICS=y
CONFIG_HID_SONY=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
@@ -631,6 +632,7 @@ CONFIG_QTI_MPM=y
CONFIG_RAS=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_ANDROID_BINDERFS=y
CONFIG_QCOM_QFPROM=y
CONFIG_NVMEM_SPMI_SDAM=y
CONFIG_SENSORS_SSC=y
@@ -648,6 +650,7 @@ CONFIG_QUOTA_NETLINK_INTERFACE=y
CONFIG_QFMT_V2=y
CONFIG_FUSE_FS=y
CONFIG_OVERLAY_FS=y
CONFIG_INCREMENTAL_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS_POSIX_ACL=y
@@ -665,6 +668,7 @@ CONFIG_MAGIC_SYSRQ=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_SCHEDSTATS=y
# CONFIG_DEBUG_PREEMPT is not set
CONFIG_DEBUG_LIST=y
CONFIG_IPC_LOGGING=y
CONFIG_DEBUG_ALIGN_RODATA=y
CONFIG_CORESIGHT=y
@@ -684,6 +688,7 @@ CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
CONFIG_SECURITY=y
CONFIG_HARDENED_USERCOPY=y
CONFIG_FORTIFY_SOURCE=y
CONFIG_STATIC_USERMODEHELPER=y
CONFIG_SECURITY_SELINUX=y
CONFIG_SECURITY_SMACK=y
CONFIG_CRYPTO_GCM=y

11
arch/arm64/configs/vendor/trinket_defconfig vendored
View File

@@ -16,12 +16,12 @@ CONFIG_RCU_FAST_NO_HZ=y
CONFIG_RCU_NOCB_CPU=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_IKHEADERS=y
CONFIG_LOG_CPU_MAX_BUF_SHIFT=17
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_BLK_CGROUP=y
CONFIG_DEBUG_BLK_CGROUP=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
@@ -29,7 +29,6 @@ CONFIG_CGROUP_BPF=y
CONFIG_CGROUP_DEBUG=y
CONFIG_SCHED_CORE_CTL=y
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_PID_NS is not set
CONFIG_SCHED_AUTOGROUP=y
CONFIG_SCHED_TUNE=y
@@ -41,6 +40,7 @@ CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_BPF_SYSCALL=y
CONFIG_BPF_JIT_ALWAYS_ON=y
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB_FREELIST_RANDOM=y
@@ -49,7 +49,6 @@ CONFIG_PROFILING=y
CONFIG_CC_STACKPROTECTOR_STRONG=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SIG=y
CONFIG_MODULE_SIG_FORCE=y
@@ -253,6 +252,7 @@ CONFIG_NET_ACT_SKBEDIT=y
CONFIG_DNS_RESOLVER=y
CONFIG_QRTR=y
CONFIG_QRTR_SMD=y
CONFIG_BPF_JIT=y
CONFIG_SOCKEV_NLMCAST=y
CONFIG_BT=y
CONFIG_MSM_BT_POWER=y
@@ -328,6 +328,7 @@ CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_JOYSTICK_XPAD=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_HIMAX_CHIPSET=y
CONFIG_TOUCHSCREEN_HIMAX_I2C=y
@@ -474,7 +475,6 @@ CONFIG_HID_MULTITOUCH=y
CONFIG_HID_NINTENDO=y
CONFIG_HID_PLANTRONICS=y
CONFIG_HID_SONY=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
@@ -663,6 +663,7 @@ CONFIG_PHY_XGENE=y
CONFIG_RAS=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_ANDROID_BINDERFS=y
CONFIG_QCOM_QFPROM=y
CONFIG_NVMEM_SPMI_SDAM=y
CONFIG_SENSORS_SSC=y
@@ -680,6 +681,7 @@ CONFIG_QUOTA_NETLINK_INTERFACE=y
CONFIG_QFMT_V2=y
CONFIG_FUSE_FS=y
CONFIG_OVERLAY_FS=y
CONFIG_INCREMENTAL_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS_POSIX_ACL=y
@@ -772,6 +774,7 @@ CONFIG_SECURITY=y
CONFIG_HARDENED_USERCOPY=y
CONFIG_HARDENED_USERCOPY_PAGESPAN=y
CONFIG_FORTIFY_SOURCE=y
CONFIG_STATIC_USERMODEHELPER=y
CONFIG_SECURITY_SELINUX=y
CONFIG_SECURITY_SMACK=y
CONFIG_CRYPTO_GCM=y

29
disable_dbgfs.sh Executable file
View File

@@ -0,0 +1,29 @@
#!/bin/bash
# SPDX-License-Identifier: GPL-2.0
# disable debugfs for user builds
export MAKE_ARGS=$@
if [ ${DISABLE_DEBUGFS} == "true" ]; then
echo "build variant ${TARGET_BUILD_VARIANT}"
if [ ${TARGET_BUILD_VARIANT} == "user" ] && \
[ ${ARCH} == "arm64" ]; then
echo "combining fragments for user build"
(cd $KERNEL_DIR && \
ARCH=${ARCH} CROSS_COMPILE=${CROSS_COMPILE}\
./scripts/kconfig/merge_config.sh \
./arch/${ARCH}/configs/$DEFCONFIG \
./arch/${ARCH}/configs/vendor/debugfs.config
make ${MAKE_ARGS} ARCH=${ARCH} \
CROSS_COMPILE=${CROSS_COMPILE} savedefconfig
mv defconfig ./arch/${ARCH}/configs/$DEFCONFIG
rm .config)
else
if [[ ${DEFCONFIG} == *"perf_defconfig" ]] && \
[ ${ARCH} == "arm64" ]; then
echo "resetting perf defconfig"
(cd ${KERNEL_DIR} && \
git checkout arch/$ARCH/configs/$DEFCONFIG)
fi
fi
fi

2
drivers/char/adsprpc.c
View File

@@ -738,9 +738,11 @@ static void fastrpc_mmap_free(struct fastrpc_mmap *map, uint32_t flags)
}
if (map->flags == ADSP_MMAP_HEAP_ADDR ||
map->flags == ADSP_MMAP_REMOTE_HEAP_ADDR) {
spin_lock(&me->hlock);
map->refs--;
if (!map->refs)
hlist_del_init(&map->hn);
spin_unlock(&me->hlock);
if (map->refs > 0)
return;
} else {

5
drivers/char/diag/diagfwd_cntl.c
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2011-2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2011-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -886,6 +886,9 @@ void diag_cntl_process_read_data(struct diagfwd_info *p_info, void *buf,
while (read_len + header_len < len) {
ctrl_pkt = (struct diag_ctrl_pkt_header_t *)ptr;
if (((size_t)read_len + (size_t)ctrl_pkt->len +
header_len) > len)
return;
switch (ctrl_pkt->pkt_id) {
case DIAG_CTRL_MSG_REG:
process_command_registration(ptr, ctrl_pkt->len,

4
drivers/dma-buf/dma-buf.c
View File

@@ -104,10 +104,10 @@ static char *dmabuffs_dname(struct dentry *dentry, char *buffer, int buflen)
goto out;
}
spin_unlock(&dentry->d_lock);
mutex_lock(&dmabuf->lock);
spin_lock(&dmabuf->name_lock);
if (dmabuf->name)
ret = strlcpy(name, dmabuf->name, DMA_BUF_NAME_LEN);
mutex_unlock(&dmabuf->lock);
spin_unlock(&dmabuf->name_lock);
dmabuf_dent_put(dmabuf);
out:
return dynamic_dname(dentry, buffer, buflen, "/%s:%s",

2
drivers/gpu/msm/kgsl.h
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2008-2018, The Linux Foundation. All rights reserved.
/* Copyright (c) 2008-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and

60
drivers/iio/adc/qcom-rradc.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2017, 2019-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -199,6 +199,9 @@
#define FG_RR_TP_REV_VERSION2 29
#define FG_RR_TP_REV_VERSION3 32
#define BATT_ID_SETTLE_SHIFT 5
#define RRADC_BATT_ID_DELAY_MAX 8
/*
* The channel number is not a physical index in hardware,
* rather it's a list of supported channels and an index to
@@ -229,6 +232,7 @@ struct rradc_chip {
struct mutex lock;
struct regmap *regmap;
u16 base;
int batt_id_delay;
struct iio_chan_spec *iio_chans;
unsigned int nchannels;
struct rradc_chan_prop *chan_props;
@@ -256,6 +260,8 @@ struct rradc_chan_prop {
u16 adc_code, int *result);
};
static const int batt_id_delays[] = {0, 1, 4, 12, 20, 40, 60, 80};
static int rradc_masked_write(struct rradc_chip *rr_adc, u16 offset, u8 mask,
u8 val)
{
@@ -767,8 +773,7 @@ static int rradc_check_status_ready_with_retry(struct rradc_chip *chip,
if (((prop->channel == RR_ADC_CHG_TEMP) ||
(prop->channel == RR_ADC_SKIN_TEMP) ||
(prop->channel == RR_ADC_USBIN_I) ||
(prop->channel == RR_ADC_DIE_TEMP)) &&
(prop->channel == RR_ADC_USBIN_I)) &&
((!rradc_is_usb_present(chip)))) {
pr_debug("USB not present for %d\n", prop->channel);
rc = -ENODATA;
@@ -854,7 +859,7 @@ static int rradc_enable_batt_id_channel(struct rradc_chip *chip, bool enable)
static int rradc_do_batt_id_conversion(struct rradc_chip *chip,
struct rradc_chan_prop *prop, u16 *data, u8 *buf)
{
int rc = 0, ret = 0;
int rc = 0, ret = 0, batt_id_delay;
rc = rradc_enable_batt_id_channel(chip, true);
if (rc < 0) {
@@ -862,6 +867,14 @@ static int rradc_do_batt_id_conversion(struct rradc_chip *chip,
return rc;
}
if (chip->batt_id_delay != -EINVAL) {
batt_id_delay = chip->batt_id_delay << BATT_ID_SETTLE_SHIFT;
rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_CFG,
batt_id_delay, batt_id_delay);
if (rc < 0)
pr_err("BATT_ID settling time config failed:%d\n", rc);
}
rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_TRIGGER,
FG_ADC_RR_BATT_ID_TRIGGER_CTL,
FG_ADC_RR_BATT_ID_TRIGGER_CTL);
@@ -938,6 +951,30 @@ static int rradc_do_conversion(struct rradc_chip *chip,
goto fail;
}
break;
case RR_ADC_DIE_TEMP:
/* Force conversion every cycle */
rc = rradc_masked_write(chip, FG_ADC_RR_PMI_DIE_TEMP_TRIGGER,
FG_ADC_RR_USB_IN_V_EVERY_CYCLE_MASK,
FG_ADC_RR_USB_IN_V_EVERY_CYCLE);
if (rc < 0) {
pr_err("Force every cycle update failed:%d\n", rc);
goto fail;
}
rc = rradc_read_channel_with_continuous_mode(chip, prop, buf);
if (rc < 0) {
pr_err("Error reading in continuous mode:%d\n", rc);
goto fail;
}
/* Restore aux_therm trigger */
rc = rradc_masked_write(chip, FG_ADC_RR_PMI_DIE_TEMP_TRIGGER,
FG_ADC_RR_USB_IN_V_EVERY_CYCLE_MASK, 0);
if (rc < 0) {
pr_err("Restore every cycle update failed:%d\n", rc);
goto fail;
}
break;
case RR_ADC_CHG_HOT_TEMP:
case RR_ADC_CHG_TOO_HOT_TEMP:
case RR_ADC_SKIN_HOT_TEMP:
@@ -1106,6 +1143,21 @@ static int rradc_get_dt_data(struct rradc_chip *chip, struct device_node *node)
return rc;
}
chip->batt_id_delay = -EINVAL;
rc = of_property_read_u32(node, "qcom,batt-id-delay-ms",
&chip->batt_id_delay);
if (!rc) {
for (i = 0; i < RRADC_BATT_ID_DELAY_MAX; i++) {
if (chip->batt_id_delay == batt_id_delays[i])
break;
}
if (i == RRADC_BATT_ID_DELAY_MAX)
pr_err("Invalid batt_id_delay, rc=%d\n", rc);
else
chip->batt_id_delay = i;
}
chip->base = base;
chip->revid_dev_node = of_parse_phandle(node, "qcom,pmic-revid", 0);
if (chip->revid_dev_node) {

44
drivers/input/misc/qti-haptics.c
View File

@@ -250,6 +250,13 @@ static struct hap_addr_val twm_ext_cfg[] = {
{REG_HAP_EN_CTL1, 0x80}, /* Enable haptics driver */
};
static struct hap_addr_val twm_cfg[] = {
{REG_HAP_PLAY, 0x00}, /* Stop playing haptics waveform */
{REG_HAP_SEL, 0x00}, /* Configure for cmd mode */
{REG_HAP_EN_CTL1, 0x00}, /* Enable haptics driver */
{REG_HAP_PERPH_RESET_CTL3, 0x0D}, /* Disable SHUTDOWN1_RB reset */
};
static int wf_repeat[8] = {1, 2, 4, 8, 16, 32, 64, 128};
static int wf_s_repeat[4] = {1, 2, 4, 8};
@@ -1060,20 +1067,30 @@ static void qti_haptics_set_gain(struct input_dev *dev, u16 gain)
qti_haptics_config_vmax(chip, play->vmax_mv);
}
static int qti_haptics_twm_config(struct qti_hap_chip *chip)
static int qti_haptics_twm_config(struct qti_hap_chip *chip, bool ext_pin)
{
int rc, i;
int rc = 0, i;
for (i = 0; i < ARRAY_SIZE(twm_ext_cfg); i++) {
rc = qti_haptics_write(chip, twm_ext_cfg[i].addr,
&twm_ext_cfg[i].value, 1);
if (rc < 0) {
dev_err(chip->dev, "Haptics TWM config failed, rc=%d\n",
rc);
return rc;
if (ext_pin) {
for (i = 0; i < ARRAY_SIZE(twm_ext_cfg); i++) {
rc = qti_haptics_write(chip, twm_ext_cfg[i].addr,
&twm_ext_cfg[i].value, 1);
if (rc < 0)
break;
}
} else {
for (i = 0; i < ARRAY_SIZE(twm_cfg); i++) {
rc = qti_haptics_write(chip, twm_cfg[i].addr,
&twm_cfg[i].value, 1);
if (rc < 0)
break;
}
}
pr_debug("Enabled haptics for TWM mode\n");
if (rc < 0)
pr_err("Failed to write twm_config rc=%d\n", rc);
else
pr_debug("Enabled haptics for TWM mode\n");
return 0;
}
@@ -2032,7 +2049,6 @@ static void qti_haptics_shutdown(struct platform_device *pdev)
{
struct qti_hap_chip *chip = dev_get_drvdata(&pdev->dev);
int rc;
bool enable_haptics_twm;
dev_dbg(chip->dev, "Shutdown!\n");
@@ -2048,10 +2064,8 @@ static void qti_haptics_shutdown(struct platform_device *pdev)
chip->vdd_enabled = false;
}
enable_haptics_twm = chip->haptics_ext_pin_twm && twm_sys_enable;
if (chip->twm_state == PMIC_TWM_ENABLE && enable_haptics_twm) {
rc = qti_haptics_twm_config(chip);
if (chip->twm_state == PMIC_TWM_ENABLE && twm_sys_enable) {
rc = qti_haptics_twm_config(chip, chip->haptics_ext_pin_twm);
if (rc < 0)
pr_err("Haptics TWM config failed rc=%d\n", rc);
}

22
drivers/media/platform/msm/ais/ais_isp/ais_ife_dev.c
View File

@@ -498,7 +498,8 @@ static void ais_ife_dev_iommu_fault_handler(
p_ife_dev = (struct ais_ife_dev *)token;
CAM_ERR(CAM_ISP, "IFE%d Pagefault at %lu", p_ife_dev->hw_idx, iova);
CAM_ERR(CAM_ISP, "IFE%d Pagefault at iova 0x%x %s",
p_ife_dev->hw_idx, iova, domain->name);
}
static int ais_ife_dev_remove(struct platform_device *pdev)
@@ -549,7 +550,6 @@ static int ais_ife_dev_probe(struct platform_device *pdev)
}
mutex_init(&p_ife_dev->mutex);
spin_lock_init(&p_ife_dev->eventq_lock);
/*
* for now, we only support one iommu handle. later
@@ -571,13 +571,19 @@ static int ais_ife_dev_probe(struct platform_device *pdev)
goto attach_fail;
}
rc = cam_smmu_get_handle("cam-secure",
rc = cam_smmu_get_handle("ife-cp",
&p_ife_dev->iommu_hdl_secure);
if (rc) {
CAM_ERR(CAM_ISP, "Failed to get secure iommu handle %d", rc);
goto secure_fail;
}
rc = cam_smmu_ops(p_ife_dev->iommu_hdl_secure, CAM_SMMU_ATTACH);
if (rc && rc != -EALREADY) {
CAM_ERR(CAM_ISP, "Attach secure iommu handle failed %d", rc);
goto secure_fail;
}
CAM_DBG(CAM_ISP, "iommu_handles: non-secure[0x%x], secure[0x%x]",
p_ife_dev->iommu_hdl,
p_ife_dev->iommu_hdl_secure);
@@ -585,6 +591,9 @@ static int ais_ife_dev_probe(struct platform_device *pdev)
cam_smmu_set_client_page_fault_handler(p_ife_dev->iommu_hdl,
ais_ife_dev_iommu_fault_handler, p_ife_dev);
cam_smmu_set_client_page_fault_handler(p_ife_dev->iommu_hdl_secure,
ais_ife_dev_iommu_fault_handler, p_ife_dev);
hw_init.hw_idx = p_ife_dev->hw_idx;
hw_init.iommu_hdl = p_ife_dev->iommu_hdl;
hw_init.iommu_hdl_secure = p_ife_dev->iommu_hdl_secure;
@@ -594,14 +603,14 @@ static int ais_ife_dev_probe(struct platform_device *pdev)
rc = ais_ife_csid_hw_init(&p_ife_dev->p_csid_drv, &hw_init);
if (rc) {
CAM_ERR(CAM_ISP, "IFE%d no CSID dev", p_ife_dev->hw_idx, rc);
goto secure_fail;
goto secure_attach_fail;
}
rc = ais_vfe_hw_init(&p_ife_dev->p_vfe_drv, &hw_init,
p_ife_dev->p_csid_drv);
if (rc) {
CAM_ERR(CAM_ISP, "IFE%d no VFE dev", p_ife_dev->hw_idx, rc);
goto secure_fail;
goto secure_attach_fail;
}
CAM_INFO(CAM_ISP, "IFE%d probe complete", p_ife_dev->hw_idx);
@@ -610,6 +619,9 @@ static int ais_ife_dev_probe(struct platform_device *pdev)
return 0;
secure_attach_fail:
cam_smmu_ops(p_ife_dev->iommu_hdl_secure,
CAM_SMMU_DETACH);
secure_fail:
cam_smmu_ops(p_ife_dev->iommu_hdl,
CAM_SMMU_DETACH);

1
drivers/media/platform/msm/ais/ais_isp/ais_ife_dev.h
View File

@@ -40,7 +40,6 @@ struct ais_ife_dev {
int iommu_hdl;
int iommu_hdl_secure;
spinlock_t eventq_lock;
struct mutex mutex;
int32_t open_cnt;
};

38
drivers/media/platform/msm/ais/ais_isp/vfe_hw/ais_vfe_core.c
View File

@@ -438,6 +438,8 @@ int ais_vfe_reserve(void *hw_priv, void *reserve_args, uint32_t arg_size)
goto EXIT;
}
rdi_path->secure_mode = rdi_cfg->out_cfg.secure_mode;
cam_io_w(0xf, core_info->mem_base + client_regs->burst_limit);
/*disable pack as it is done in CSID*/
cam_io_w(0x0, core_info->mem_base + client_regs->packer_cfg);
@@ -766,8 +768,11 @@ static int ais_vfe_cmd_enq_buf(struct ais_vfe_hw_core_info *core_info,
vfe_buf->bufIdx = enq_buf->buffer.idx;
vfe_buf->mem_handle = enq_buf->buffer.mem_handle;
mmu_hdl = cam_mem_is_secure_buf(vfe_buf->mem_handle) ?
core_info->iommu_hdl_secure : core_info->iommu_hdl;
mmu_hdl = core_info->iommu_hdl;
if (cam_mem_is_secure_buf(vfe_buf->mem_handle) || rdi_path->secure_mode)
mmu_hdl = core_info->iommu_hdl_secure;
rc = cam_mem_get_io_buf(vfe_buf->mem_handle,
mmu_hdl, &vfe_buf->iova_addr, &src_buf_size);
if (rc < 0) {
@@ -985,7 +990,7 @@ static void ais_vfe_handle_sof_rdi(struct ais_vfe_hw_core_info *core_info,
//enq curr
sof.sof_ts = work_data->ts;
sof.cur_sof_hw_ts = prev_sof_hw_ts;
sof.cur_sof_hw_ts = cur_sof_hw_ts;
sof.frame_cnt = p_rdi->frame_cnt;
ais_vfe_q_sof(core_info, path, &sof);
@@ -1098,25 +1103,31 @@ static int ais_vfe_handle_error(
continue;
p_rdi = &core_info->rdi_out[path];
if (p_rdi->state != AIS_ISP_RESOURCE_STATE_STREAMING)
continue;
CAM_ERR(CAM_ISP, "IFE%d Turn off RDI %d",
core_info->vfe_idx, path);
p_rdi->state = AIS_ISP_RESOURCE_STATE_ERROR;
client_regs = &bus_hw_info->bus_client_reg[path];
/* Disable WM and reg-update */
cam_io_w_mb(0x0, core_info->mem_base + client_regs->cfg);
cam_io_w_mb(AIS_VFE_REGUP_RDI_ALL, core_info->mem_base +
top_hw_info->common_reg->reg_update_cmd);
cam_io_w_mb((1 << path), core_info->mem_base +
bus_hw_info->common_reg.sw_reset);
core_info->bus_wr_mask1 &= ~(1 << path);
cam_io_w_mb(core_info->bus_wr_mask1,
core_info->mem_base +
bus_hw_irq_regs[1].mask_reg_offset);
/* Disable WM and reg-update */
cam_io_w_mb(0x0, core_info->mem_base + client_regs->cfg);
cam_io_w_mb(AIS_VFE_REGUP_RDI_ALL, core_info->mem_base +
top_hw_info->common_reg->reg_update_cmd);
cam_io_w_mb((1 << path), core_info->mem_base +
bus_hw_info->common_reg.sw_reset);
core_info->event.type = AIS_IFE_MSG_OUTPUT_ERROR;
core_info->event.path = path;
@@ -1551,9 +1562,10 @@ irqreturn_t ais_vfe_irq(int irq_num, void *data)
AIS_VFE_STATUS1_RDI_OVERFLOW_IRQ_SHFT) &
AIS_VFE_STATUS1_RDI_OVERFLOW_IRQ_MSK;
CAM_ERR(CAM_ISP, "IFE%d Overflow 0x%x",
core_info->vfe_idx,
work_data.path);
CAM_ERR_RATE_LIMIT(CAM_ISP,
"IFE%d Overflow 0x%x",
core_info->vfe_idx,
work_data.path);
work_data.evt_type = AIS_VFE_HW_IRQ_EVENT_ERROR;
ais_vfe_dispatch_irq(vfe_hw, &work_data);
}

1
drivers/media/platform/msm/ais/ais_isp/vfe_hw/ais_vfe_core.h
View File

@@ -96,6 +96,7 @@ struct ais_vfe_rdi_output {
enum ais_isp_resource_state state;
uint32_t en_cfg;
uint32_t secure_mode;
spinlock_t buffer_lock;
struct ais_vfe_buffer_t buffers[AIS_VFE_MAX_BUF];

7
drivers/media/platform/msm/ais/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c
View File

@@ -6337,9 +6337,10 @@ int cam_ife_hw_mgr_init(struct cam_hw_mgr_intf *hw_mgr_intf, int *iommu_hdl)
return -EINVAL;
}
if (cam_smmu_ops(g_ife_hw_mgr.mgr_common.img_iommu_hdl,
CAM_SMMU_ATTACH)) {
CAM_ERR(CAM_ISP, "Attach iommu handle failed.");
rc = cam_smmu_ops(g_ife_hw_mgr.mgr_common.img_iommu_hdl,
CAM_SMMU_ATTACH);
if (rc && rc != -EALREADY) {
CAM_ERR(CAM_ISP, "Attach iommu handle failed %d", rc);
goto attach_fail;
}

16
drivers/media/platform/msm/ais/cam_req_mgr/cam_mem_mgr.c
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -217,6 +217,7 @@ int cam_mem_get_io_buf(int32_t buf_handle, int32_t mmu_handle,
tbl.bufq[idx].fd,
iova_ptr,
len_ptr);
if (rc) {
CAM_ERR(CAM_MEM,
"fail to map buf_hdl:0x%x, mmu_hdl: 0x%x for fd:%d",
@@ -511,6 +512,9 @@ static int cam_mem_util_ion_alloc(struct cam_mem_mgr_alloc_cmd *cmd,
} else if (cmd->flags & CAM_MEM_FLAG_PROTECTED_MODE) {
heap_id = ION_HEAP(ION_SECURE_DISPLAY_HEAP_ID);
ion_flag |= ION_FLAG_SECURE | ION_FLAG_CP_CAMERA;
} else if (cmd->flags & CAM_MEM_FLAG_CP_PIXEL) {
heap_id = ION_HEAP(ION_SECURE_HEAP_ID);
ion_flag |= ION_FLAG_SECURE | ION_FLAG_CP_PIXEL;
} else {
heap_id = ION_HEAP(ION_SYSTEM_HEAP_ID) |
ION_HEAP(ION_CAMERA_HEAP_ID);
@@ -540,8 +544,9 @@ static int cam_mem_util_check_alloc_flags(struct cam_mem_mgr_alloc_cmd *cmd)
return -EINVAL;
}
if (cmd->flags & CAM_MEM_FLAG_PROTECTED_MODE &&
cmd->flags & CAM_MEM_FLAG_KMD_ACCESS) {
if (((cmd->flags & CAM_MEM_FLAG_PROTECTED_MODE) ||
(cmd->flags & CAM_MEM_FLAG_CP_PIXEL)) &&
(cmd->flags & CAM_MEM_FLAG_KMD_ACCESS)) {
CAM_ERR(CAM_MEM, "Kernel mapping in secure mode not allowed");
return -EINVAL;
}
@@ -562,8 +567,9 @@ static int cam_mem_util_check_map_flags(struct cam_mem_mgr_map_cmd *cmd)
return -EINVAL;
}
if (cmd->flags & CAM_MEM_FLAG_PROTECTED_MODE &&
cmd->flags & CAM_MEM_FLAG_KMD_ACCESS) {
if (((cmd->flags & CAM_MEM_FLAG_PROTECTED_MODE) ||
(cmd->flags & CAM_MEM_FLAG_CP_PIXEL)) &&
(cmd->flags & CAM_MEM_FLAG_KMD_ACCESS)) {
CAM_ERR(CAM_MEM,
"Kernel mapping in secure mode not allowed, flags=0x%x",
cmd->flags);

23
drivers/media/platform/msm/ais/cam_smmu/cam_smmu_api.c
View File

@@ -36,7 +36,7 @@
#define COOKIE_SIZE (BYTE_SIZE*COOKIE_NUM_BYTE)
#define COOKIE_MASK ((1<<COOKIE_SIZE)-1)
#define HANDLE_INIT (-1)
#define CAM_SMMU_CB_MAX 5
#define CAM_SMMU_CB_MAX 8
#define GET_SMMU_HDL(x, y) (((x) << COOKIE_SIZE) | ((y) & COOKIE_MASK))
#define GET_SMMU_TABLE_IDX(x) (((x) >> COOKIE_SIZE) & COOKIE_MASK)
@@ -105,7 +105,10 @@ struct cam_context_bank_info {
dma_addr_t va_start;
size_t va_len;
const char *name;
/* stage 2 only */
bool is_secure;
/* stage 1 */
bool is_secure_pixel;
uint8_t scratch_buf_support;
uint8_t firmware_support;
uint8_t shared_support;
@@ -3269,6 +3272,20 @@ static int cam_smmu_setup_cb(struct cam_context_bank_info *cb,
goto end;
}
if (cb->is_secure_pixel) {
int secure_vmid = VMID_CP_PIXEL;
rc = iommu_domain_set_attr(cb->mapping->domain,
DOMAIN_ATTR_SECURE_VMID, &secure_vmid);
if (rc) {
CAM_ERR(CAM_SMMU,
"programming secure vmid failed: %s %d",
dev_name(dev), rc);
rc = -ENODEV;
goto end;
}
}
return rc;
end:
if (cb->shared_support) {
@@ -3345,6 +3362,10 @@ static int cam_smmu_get_memory_regions_info(struct device_node *of_node,
mem_map_node = of_get_child_by_name(of_node, "iova-mem-map");
cb->is_secure = of_property_read_bool(of_node, "qcom,secure-cb");
if (!cb->is_secure)
cb->is_secure_pixel = of_property_read_bool(of_node,
"qcom,secure-pixel-cb");
/*
* We always expect a memory map node, except when it is a secure
* context bank.

6
drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c
View File

@@ -228,7 +228,7 @@ static void __cam_isp_ctx_dump_state_monitor_array(
ctx_monitor = ctx_isp->cam_isp_ctx_state_monitor;
if (log_rate_limit)
CAM_INFO_RATE_LIMIT_CUSTOM(CAM_ISP, 5, 20,
CAM_DBG(CAM_ISP,
"Dumping state information for preceding requests");
else
CAM_INFO(CAM_ISP,
@@ -241,8 +241,8 @@ static void __cam_isp_ctx_dump_state_monitor_array(
CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES);
if (log_rate_limit) {
CAM_INFO_RATE_LIMIT_CUSTOM(CAM_ISP, 5, 20,
"time[%lld] last reported req_id[%llu] frame id[%lld] applied id[%lld] current state[%s] next state[%s] hw_event[%s]",
CAM_DBG(CAM_ISP,
"time[%lld] last reported req_id[%u] frame id[%lld] applied id[%lld] current state[%s] next state[%s] hw_event[%s]",
ctx_monitor[index].evt_time_stamp,
ctx_monitor[index].last_reported_id,
ctx_monitor[index].frame_id,

100
drivers/mtd/devices/msm_qpic_nand.c
View File

@@ -26,6 +26,8 @@
#define MAX_DESC 16
#define SMEM_AARM_PARTITION_TABLE 9
#define SMEM_APPS 0
#define ONE_CODEWORD_SIZE 516
static bool enable_euclean;
static bool enable_perfstats;
@@ -1183,10 +1185,16 @@ static int msm_nand_validate_mtd_params(struct mtd_info *mtd, bool read,
err = -EINVAL;
goto out;
}
args->page_count = ops->len / (mtd->writesize + mtd->oobsize);
if (ops->len <= ONE_CODEWORD_SIZE)
args->page_count = 1;
else
args->page_count = ops->len /
(mtd->writesize + mtd->oobsize);
} else if (ops->mode == MTD_OPS_AUTO_OOB) {
if (ops->datbuf && (ops->len % mtd->writesize) != 0) {
if (ops->datbuf && (ops->len %
((ops->len <= ONE_CODEWORD_SIZE) ?
ONE_CODEWORD_SIZE : mtd->writesize)) != 0) {
/* when ops->datbuf is NULL, ops->len can be ooblen */
pr_err("unsupported data len %d for AUTO mode\n",
ops->len);
@@ -1199,7 +1207,10 @@ static int msm_nand_validate_mtd_params(struct mtd_info *mtd, bool read,
if ((args->page_count == 0) && (ops->ooblen))
args->page_count = 1;
} else if (ops->datbuf) {
args->page_count = ops->len / mtd->writesize;
if (ops->len <= ONE_CODEWORD_SIZE)
args->page_count = 1;
else
args->page_count = ops->len / mtd->writesize;
}
}
@@ -1245,12 +1256,20 @@ static void msm_nand_update_rw_reg_data(struct msm_nand_chip *chip,
struct msm_nand_rw_params *args,
struct msm_nand_rw_reg_data *data)
{
/*
* While reading one codeword, CW_PER_PAGE bits of QPIC_NAND_DEV0_CFG0
* should be set to 0, which implies 1 codeword per page. 'n' below,
* is used to configure cfg0 for reading one full page or one single
* codeword.
*/
int n = (ops->len <= ONE_CODEWORD_SIZE) ? args->cwperpage : 1;
if (args->read) {
if (ops->mode != MTD_OPS_RAW) {
data->cmd = MSM_NAND_CMD_PAGE_READ_ECC;
data->cfg0 =
(chip->cfg0 & ~(7U << CW_PER_PAGE)) |
(((args->cwperpage-1) - args->start_sector)
(((args->cwperpage-n) - args->start_sector)
<< CW_PER_PAGE);
data->cfg1 = chip->cfg1;
data->ecc_bch_cfg = chip->ecc_bch_cfg;
@@ -1258,7 +1277,7 @@ static void msm_nand_update_rw_reg_data(struct msm_nand_chip *chip,
data->cmd = MSM_NAND_CMD_PAGE_READ_ALL;
data->cfg0 =
(chip->cfg0_raw & ~(7U << CW_PER_PAGE)) |
(((args->cwperpage-1) - args->start_sector)
(((args->cwperpage-n) - args->start_sector)
<< CW_PER_PAGE);
data->cfg1 = chip->cfg1_raw;
data->ecc_bch_cfg = chip->ecc_cfg_raw;
@@ -1302,6 +1321,11 @@ static void msm_nand_prep_rw_cmd_desc(struct mtd_oob_ops *ops,
uint32_t offset, size, last_read;
struct sps_command_element *curr_ce, *start_ce;
uint32_t *flags_ptr, *num_ce_ptr;
/*
* Variable to configure read_location register parameters
* while reading one codeword or one full page
*/
int n = (ops->len <= ONE_CODEWORD_SIZE) ? args->cwperpage : 1;
if (curr_cw == args->start_sector) {
curr_ce = start_ce = &cmd_list->setup_desc.ce[0];
@@ -1394,10 +1418,15 @@ static void msm_nand_prep_rw_cmd_desc(struct mtd_oob_ops *ops,
if (ops->mode == MTD_OPS_AUTO_OOB) {
if (ops->datbuf) {
offset = 0;
size = (curr_cw < (args->cwperpage - 1)) ? 516 :
(512 - ((args->cwperpage - 1) << 2));
last_read = (curr_cw < (args->cwperpage - 1)) ? 1 :
(ops->oobbuf ? 0 : 1);
if (ops->len <= ONE_CODEWORD_SIZE) {
size = ONE_CODEWORD_SIZE;
last_read = 1;
} else {
size = (curr_cw < (args->cwperpage - 1)) ? 516 :
(512 - ((args->cwperpage - 1) << 2));
last_read = (curr_cw < (args->cwperpage - 1)) ?
1 : (ops->oobbuf ? 0 : 1);
}
rdata = (offset << 0) | (size << 16) |
(last_read << 31);
@@ -1413,7 +1442,7 @@ static void msm_nand_prep_rw_cmd_desc(struct mtd_oob_ops *ops,
curr_ce++;
}
}
if (curr_cw == (args->cwperpage - 1) && ops->oobbuf) {
if (curr_cw == (args->cwperpage - n) && ops->oobbuf) {
offset = 512 - ((args->cwperpage - 1) << 2);
size = (args->cwperpage) << 2;
if (size > args->oob_len_cmd)
@@ -1471,6 +1500,11 @@ static int msm_nand_submit_rw_data_desc(struct mtd_oob_ops *ops,
uint32_t sectordatasize, sectoroobsize;
uint32_t sps_flags = 0;
int err = 0;
/*
* Variable to configure sectordatasize and sectoroobsize
* while reading one codeword or one full page.
*/
int n = (ops->len <= ONE_CODEWORD_SIZE) ? args->cwperpage : 1;
if (args->read)
data_pipe_handle = info->sps.data_prod.handle;
@@ -1479,7 +1513,7 @@ static int msm_nand_submit_rw_data_desc(struct mtd_oob_ops *ops,
if (ops->mode == MTD_OPS_RAW) {
if (ecc_parity_bytes && args->read) {
if (curr_cw == (args->cwperpage - 1))
if (curr_cw == (args->cwperpage - n))
sps_flags |= SPS_IOVEC_FLAG_INT;
/* read only ecc bytes */
@@ -1494,7 +1528,7 @@ static int msm_nand_submit_rw_data_desc(struct mtd_oob_ops *ops,
sectordatasize = chip->cw_size;
if (!args->read)
sps_flags = SPS_IOVEC_FLAG_EOT;
if (curr_cw == (args->cwperpage - 1))
if (curr_cw == (args->cwperpage - n))
sps_flags |= SPS_IOVEC_FLAG_INT;
err = sps_transfer_one(data_pipe_handle,
@@ -1507,8 +1541,13 @@ static int msm_nand_submit_rw_data_desc(struct mtd_oob_ops *ops,
}
} else if (ops->mode == MTD_OPS_AUTO_OOB) {
if (ops->datbuf) {
sectordatasize = (curr_cw < (args->cwperpage - 1))
? 516 : (512 - ((args->cwperpage - 1) << 2));
if (ops->len <= ONE_CODEWORD_SIZE)
sectordatasize = ONE_CODEWORD_SIZE;
else
sectordatasize =
(curr_cw < (args->cwperpage - 1))
? 516 :
(512 - ((args->cwperpage - 1) << 2));
if (!args->read) {
sps_flags = SPS_IOVEC_FLAG_EOT;
@@ -1516,7 +1555,7 @@ static int msm_nand_submit_rw_data_desc(struct mtd_oob_ops *ops,
ops->oobbuf)
sps_flags = 0;
}
if ((curr_cw == (args->cwperpage - 1)) && !ops->oobbuf)
if ((curr_cw == (args->cwperpage - n)) && !ops->oobbuf)
sps_flags |= SPS_IOVEC_FLAG_INT;
err = sps_transfer_one(data_pipe_handle,
@@ -1528,7 +1567,7 @@ static int msm_nand_submit_rw_data_desc(struct mtd_oob_ops *ops,
args->data_dma_addr_curr += sectordatasize;
}
if (ops->oobbuf && (curr_cw == (args->cwperpage - 1))) {
if (ops->oobbuf && (curr_cw == (args->cwperpage - n))) {
sectoroobsize = args->cwperpage << 2;
if (sectoroobsize > args->oob_len_data)
sectoroobsize = args->oob_len_data;
@@ -1984,7 +2023,7 @@ free_dma:
total_ecc_byte_cnt, DMA_FROM_DEVICE);
/* check for bit flips in ecc data */
ecc_temp = ecc;
for (n = rw_params->start_sector; n < cwperpage; n++) {
for (n = rw_params->start_sector; !err && n < cwperpage; n++) {
int last_pos = 0, next_pos = 0;
int ecc_bytes_percw_in_bits = (chip->ecc_parity_bytes * 8);
@@ -1995,7 +2034,7 @@ free_dma:
if (last_pos < ecc_bytes_percw_in_bits)
num_zero_bits++;
if (num_zero_bits > MAX_ECC_BIT_FLIPS) {
if (num_zero_bits > info->flash_dev.ecc_capability) {
*erased_page = false;
goto free_mem;
}
@@ -2007,7 +2046,8 @@ free_dma:
ecc_temp += chip->ecc_parity_bytes;
}
if ((n == cwperpage) && (num_zero_bits <= MAX_ECC_BIT_FLIPS))
if ((n == cwperpage) &&
(num_zero_bits <= info->flash_dev.ecc_capability))
*erased_page = true;
free_mem:
kfree(ecc);
@@ -2651,7 +2691,7 @@ free_dma:
total_ecc_byte_cnt, DMA_FROM_DEVICE);
/* check for bit flips in ecc data */
ecc_temp = ecc;
for (n = rw_params->start_sector; n < cwperpage; n++) {
for (n = rw_params->start_sector; !err && n < cwperpage; n++) {
int last_pos = 0, next_pos = 0;
int ecc_bytes_percw_in_bits = (chip->ecc_parity_bytes * 8);
@@ -2662,7 +2702,7 @@ free_dma:
if (last_pos < ecc_bytes_percw_in_bits)
num_zero_bits++;
if (num_zero_bits > MAX_ECC_BIT_FLIPS) {
if (num_zero_bits > info->flash_dev.ecc_capability) {
*erased_page = false;
goto free_mem;
}
@@ -2674,7 +2714,8 @@ free_dma:
ecc_temp += chip->ecc_parity_bytes;
}
if ((n == cwperpage) && (num_zero_bits <= MAX_ECC_BIT_FLIPS))
if ((n == cwperpage) &&
(num_zero_bits <= info->flash_dev.ecc_capability))
*erased_page = true;
free_mem:
kfree(ecc);
@@ -2755,6 +2796,9 @@ static int msm_nand_read_oob(struct mtd_info *mtd, loff_t from,
data.addr0 = (rw_params.page << 16) | rw_params.oob_col;
data.addr1 = (rw_params.page >> 16) & 0xff;
if (ops->len <= ONE_CODEWORD_SIZE)
cwperpage = 1;
for (n = rw_params.start_sector; n < cwperpage; n++) {
struct sps_command_element *curr_ce, *start_ce;
@@ -2832,7 +2876,7 @@ static int msm_nand_read_oob(struct mtd_info *mtd, loff_t from,
} else if (ops->mode == MTD_OPS_AUTO_OOB) {
if (ops->datbuf)
submitted_num_desc = cwperpage -
rw_params.start_sector;
rw_params.start_sector;
if (ops->oobbuf)
submitted_num_desc++;
}
@@ -3052,7 +3096,10 @@ free_dma:
}
validate_mtd_params_failed:
if (ops->mode != MTD_OPS_RAW)
ops->retlen = mtd->writesize * pages_read;
if (ops->len <= ONE_CODEWORD_SIZE)
ops->retlen = ONE_CODEWORD_SIZE;
else
ops->retlen = mtd->writesize * pages_read;
else
ops->retlen = (mtd->writesize + mtd->oobsize) * pages_read;
ops->oobretlen = ops->ooblen - rw_params.oob_len_data;
@@ -3125,8 +3172,11 @@ static int msm_nand_read_partial_page(struct mtd_info *mtd,
ops->datbuf = no_copy ? actual_buf : bounce_buf;
if (info->nand_chip.caps & MSM_NAND_CAP_PAGE_SCOPE_READ)
err = msm_nand_read_pagescope(mtd, aligned_from, ops);
else
else {
if ((len <= ONE_CODEWORD_SIZE) && (offset == 0))
ops->len = ONE_CODEWORD_SIZE;
err = msm_nand_read_oob(mtd, aligned_from, ops);
}
if (err == -EUCLEAN) {
is_euclean = 1;
err = 0;

624
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
View File

@@ -23,15 +23,28 @@
#include <linux/ip.h>
#include <linux/ipv6.h>
#include <linux/rtnetlink.h>
#include <linux/route.h>
#include <linux/if_arp.h>
#include <linux/inet.h>
#include <net/inet_common.h>
#include "stmmac.h"
#include "stmmac_platform.h"
#include "dwmac-qcom-ethqos.h"
#include "stmmac_ptp.h"
#include "dwmac-qcom-ipa-offload.h"
#define PHY_LOOPBACK_1000 0x4140
#define PHY_LOOPBACK_100 0x6100
#define PHY_LOOPBACK_10 0x4100
static void __iomem *tlmm_central_base_addr;
static void ethqos_rgmii_io_macro_loopback(struct qcom_ethqos *ethqos,
int mode);
static int phy_digital_loopback_config(
struct qcom_ethqos *ethqos, int speed, int config);
bool phy_intr_en;
static char buf[2000];
static struct ethqos_emac_por emac_por[] = {
{ .offset = RGMII_IO_MACRO_CONFIG, .value = 0x0 },
@@ -77,7 +90,7 @@ static void qcom_ethqos_read_iomacro_por_values(struct qcom_ethqos *ethqos)
ethqos->por[i].offset);
}
static inline unsigned int dwmac_qcom_get_eth_type(unsigned char *buf)
unsigned int dwmac_qcom_get_eth_type(unsigned char *buf)
{
return
((((u16)buf[QTAG_ETH_TYPE_OFFSET] << 8) |
@@ -926,6 +939,12 @@ static int ethqos_mdio_read(struct stmmac_priv *priv, int phyaddr, int phyreg)
u32 v;
int data;
u32 value = MII_BUSY;
struct qcom_ethqos *ethqos = priv->plat->bsp_priv;
if (ethqos->phy_state == PHY_IS_OFF) {
ETHQOSINFO("Phy is in off state reading is not possible\n");
return -EOPNOTSUPP;
}
value |= (phyaddr << priv->hw->mii.addr_shift)
& priv->hw->mii.addr_mask;
@@ -951,6 +970,44 @@ static int ethqos_mdio_read(struct stmmac_priv *priv, int phyaddr, int phyreg)
return data;
}
static int ethqos_mdio_write(struct stmmac_priv *priv, int phyaddr, int phyreg,
u16 phydata)
{
unsigned int mii_address = priv->hw->mii.addr;
unsigned int mii_data = priv->hw->mii.data;
u32 v;
u32 value = MII_BUSY;
struct qcom_ethqos *ethqos = priv->plat->bsp_priv;
if (ethqos->phy_state == PHY_IS_OFF) {
ETHQOSINFO("Phy is in off state writing is not possible\n");
return -EOPNOTSUPP;
}
value |= (phyaddr << priv->hw->mii.addr_shift)
& priv->hw->mii.addr_mask;
value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask;
value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift)
& priv->hw->mii.clk_csr_mask;
if (priv->plat->has_gmac4)
value |= MII_GMAC4_WRITE;
else
value |= MII_WRITE;
/* Wait until any existing MII operation is complete */
if (readl_poll_timeout(priv->ioaddr + mii_address, v, !(v & MII_BUSY),
100, 10000))
return -EBUSY;
/* Set the MII address register to write */
writel_relaxed(phydata, priv->ioaddr + mii_data);
writel_relaxed(value, priv->ioaddr + mii_address);
/* Wait until any existing MII operation is complete */
return readl_poll_timeout(priv->ioaddr + mii_address, v,
!(v & MII_BUSY), 100, 10000);
}
static int ethqos_phy_intr_config(struct qcom_ethqos *ethqos)
{
int ret = 0;
@@ -1107,6 +1164,10 @@ static ssize_t read_phy_reg_dump(struct file *file, char __user *user_buf,
ETHQOSERR("NULL Pointer\n");
return -EINVAL;
}
if (ethqos->phy_state == PHY_IS_OFF) {
ETHQOSINFO("Phy is in off state phy dump is not possible\n");
return -EOPNOTSUPP;
}
buf = kzalloc(buf_len, GFP_KERNEL);
if (!buf)
@@ -1203,6 +1264,458 @@ static ssize_t read_rgmii_reg_dump(struct file *file,
return ret_cnt;
}
static ssize_t read_phy_off(struct file *file,
char __user *user_buf,
size_t count, loff_t *ppos)
{
unsigned int len = 0, buf_len = 2000;
struct qcom_ethqos *ethqos = file->private_data;
if (ethqos->current_phy_mode == DISABLE_PHY_IMMEDIATELY)
len += scnprintf(buf + len, buf_len - len,
"Disable phy immediately enabled\n");
else if (ethqos->current_phy_mode == ENABLE_PHY_IMMEDIATELY)
len += scnprintf(buf + len, buf_len - len,
"Enable phy immediately enabled\n");
else if (ethqos->current_phy_mode == DISABLE_PHY_AT_SUSPEND_ONLY) {
len += scnprintf(buf + len, buf_len - len,
"Disable Phy at suspend\n");
len += scnprintf(buf + len, buf_len - len,
" & do not enable at resume enabled\n");
} else if (ethqos->current_phy_mode ==
DISABLE_PHY_SUSPEND_ENABLE_RESUME) {
len += scnprintf(buf + len, buf_len - len,
"Disable Phy at suspend\n");
len += scnprintf(buf + len, buf_len - len,
" & enable at resume enabled\n");
} else if (ethqos->current_phy_mode == DISABLE_PHY_ON_OFF)
len += scnprintf(buf + len, buf_len - len,
"Disable phy on/off disabled\n");
else
len += scnprintf(buf + len, buf_len - len,
"Invalid Phy State\n");
if (len > buf_len)
len = buf_len;
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
}
static ssize_t phy_off_config(
struct file *file, const char __user *user_buffer,
size_t count, loff_t *position)
{
char *in_buf;
int buf_len = 2000;
unsigned long ret;
int config = 0;
struct qcom_ethqos *ethqos = file->private_data;
in_buf = kzalloc(buf_len, GFP_KERNEL);
if (!in_buf)
return -ENOMEM;
ret = copy_from_user(in_buf, user_buffer, buf_len);
if (ret) {
ETHQOSERR("unable to copy from user\n");
return -EFAULT;
}
ret = sscanf(in_buf, "%d", &config);
if (ret != 1) {
ETHQOSERR("Error in reading option from user");
return -EINVAL;
}
if (config > DISABLE_PHY_ON_OFF || config < DISABLE_PHY_IMMEDIATELY) {
ETHQOSERR("Invalid option =%d", config);
return -EINVAL;
}
if (config == ethqos->current_phy_mode) {
ETHQOSERR("No effect as duplicate config");
return -EPERM;
}
if (config == DISABLE_PHY_IMMEDIATELY) {
ethqos->current_phy_mode = DISABLE_PHY_IMMEDIATELY;
//make phy off
if (ethqos->current_loopback == ENABLE_PHY_LOOPBACK) {
/* If Phy loopback is enabled
* Disabled It before phy off
*/
phy_digital_loopback_config(ethqos,
ethqos->loopback_speed, 0);
ETHQOSDBG("Disable phy Loopback");
ethqos->current_loopback = ENABLE_PHY_LOOPBACK;
}
ethqos_phy_power_off(ethqos);
} else if (config == ENABLE_PHY_IMMEDIATELY) {
ethqos->current_phy_mode = ENABLE_PHY_IMMEDIATELY;
//make phy on
ethqos_phy_power_on(ethqos);
ethqos_reset_phy_enable_interrupt(ethqos);
if (ethqos->current_loopback == ENABLE_PHY_LOOPBACK) {
/*If Phy loopback is enabled , enabled It again*/
phy_digital_loopback_config(ethqos,
ethqos->loopback_speed, 1);
ETHQOSDBG("Enabling Phy loopback again");
}
} else if (config == DISABLE_PHY_AT_SUSPEND_ONLY) {
ethqos->current_phy_mode = DISABLE_PHY_AT_SUSPEND_ONLY;
} else if (config == DISABLE_PHY_SUSPEND_ENABLE_RESUME) {
ethqos->current_phy_mode = DISABLE_PHY_SUSPEND_ENABLE_RESUME;
} else if (config == DISABLE_PHY_ON_OFF) {
ethqos->current_phy_mode = DISABLE_PHY_ON_OFF;
} else {
ETHQOSERR("Invalid option\n");
return -EINVAL;
}
kfree(in_buf);
return count;
}
static void ethqos_rgmii_io_macro_loopback(struct qcom_ethqos *ethqos, int mode)
{
/* Set loopback mode */
if (mode == 1) {
rgmii_updatel(ethqos, RGMII_CONFIG2_TX_TO_RX_LOOPBACK_EN,
RGMII_CONFIG2_TX_TO_RX_LOOPBACK_EN,
RGMII_IO_MACRO_CONFIG2);
rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,
0, RGMII_IO_MACRO_CONFIG2);
} else {
rgmii_updatel(ethqos, RGMII_CONFIG2_TX_TO_RX_LOOPBACK_EN,
0, RGMII_IO_MACRO_CONFIG2);
rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,
RGMII_CONFIG2_RX_PROG_SWAP,
RGMII_IO_MACRO_CONFIG2);
}
}
static void ethqos_mac_loopback(struct qcom_ethqos *ethqos, int mode)
{
u32 read_value = (u32)readl_relaxed(ethqos->ioaddr + MAC_CONFIGURATION);
/* Set loopback mode */
if (mode == 1)
read_value |= MAC_LM;
else
read_value &= ~MAC_LM;
writel_relaxed(read_value, ethqos->ioaddr + MAC_CONFIGURATION);
}
static int phy_digital_loopback_config(
struct qcom_ethqos *ethqos, int speed, int config)
{
struct platform_device *pdev = ethqos->pdev;
struct net_device *dev = platform_get_drvdata(pdev);
struct stmmac_priv *priv = netdev_priv(dev);
int phydata = 0;
if (config == 1) {
ETHQOSINFO("Request for phy digital loopback enable\n");
switch (speed) {
case SPEED_1000:
phydata = PHY_LOOPBACK_1000;
break;
case SPEED_100:
phydata = PHY_LOOPBACK_100;
break;
case SPEED_10:
phydata = PHY_LOOPBACK_10;
break;
default:
ETHQOSERR("Invalid link speed\n");
break;
}
} else if (config == 0) {
ETHQOSINFO("Request for phy digital loopback disable\n");
if (ethqos->bmcr_backup)
phydata = ethqos->bmcr_backup;
else
phydata = 0x1140;
} else {
ETHQOSERR("Invalid option\n");
return -EINVAL;
}
if (phydata != 0) {
ethqos_mdio_write(
priv, priv->plat->phy_addr, MII_BMCR, phydata);
ETHQOSINFO("write done for phy loopback\n");
}
return 0;
}
static void print_loopback_detail(enum loopback_mode loopback)
{
switch (loopback) {
case DISABLE_LOOPBACK:
ETHQOSINFO("Loopback is disabled\n");
break;
case ENABLE_IO_MACRO_LOOPBACK:
ETHQOSINFO("Loopback is Enabled as IO MACRO LOOPBACK\n");
break;
case ENABLE_MAC_LOOPBACK:
ETHQOSINFO("Loopback is Enabled as MAC LOOPBACK\n");
break;
case ENABLE_PHY_LOOPBACK:
ETHQOSINFO("Loopback is Enabled as PHY LOOPBACK\n");
break;
default:
ETHQOSINFO("Invalid Loopback=%d\n", loopback);
break;
}
}
static void setup_config_registers(struct qcom_ethqos *ethqos,
int speed, int duplex, int mode)
{
struct platform_device *pdev = ethqos->pdev;
struct net_device *dev = platform_get_drvdata(pdev);
struct stmmac_priv *priv = netdev_priv(dev);
u32 ctrl = 0;
ETHQOSDBG("Speed=%d,dupex=%d,mode=%d\n", speed, duplex, mode);
if (mode > DISABLE_LOOPBACK && !qcom_ethqos_is_phy_link_up(ethqos)) {
/*If Link is Down & need to enable Loopback*/
ETHQOSDBG("Enable Lower Up Flag & disable phy dev\n");
ETHQOSDBG("IRQ so that Rx/Tx can happen beforeee Link down\n");
netif_carrier_on(dev);
/*Disable phy interrupt by Link/Down by cable plug in/out*/
disable_irq(ethqos->phy_intr);
} else if (mode > DISABLE_LOOPBACK &&
qcom_ethqos_is_phy_link_up(ethqos)) {
ETHQOSDBG("Only disable phy irqqq Lin is UP\n");
/*Since link is up no need to set Lower UP flag*/
/*Disable phy interrupt by Link/Down by cable plug in/out*/
disable_irq(ethqos->phy_intr);
} else if (mode == DISABLE_LOOPBACK &&
!qcom_ethqos_is_phy_link_up(ethqos)) {
ETHQOSDBG("Disable Lower Up as Link is down\n");
netif_carrier_off(dev);
enable_irq(ethqos->phy_intr);
}
ETHQOSDBG("Old ctrl=%d dupex full\n", ctrl);
ctrl = readl_relaxed(priv->ioaddr + MAC_CTRL_REG);
ETHQOSDBG("Old ctrl=0x%x with mask with flow control\n", ctrl);
ctrl |= priv->hw->link.duplex;
priv->dev->phydev->duplex = duplex;
ctrl &= ~priv->hw->link.speed_mask;
switch (speed) {
case SPEED_1000:
ctrl |= priv->hw->link.speed1000;
break;
case SPEED_100:
ctrl |= priv->hw->link.speed100;
break;
case SPEED_10:
ctrl |= priv->hw->link.speed10;
break;
default:
speed = SPEED_UNKNOWN;
ETHQOSDBG("unkwon speed\n");
break;
}
writel_relaxed(ctrl, priv->ioaddr + MAC_CTRL_REG);
ETHQOSDBG("New ctrl=%x priv hw speeed =%d\n", ctrl,
priv->hw->link.speed1000);
priv->dev->phydev->speed = speed;
priv->speed = speed;
if (mode > DISABLE_LOOPBACK && !qcom_ethqos_is_phy_link_up(ethqos)) {
/*If Link is Down & need to enable Loopback*/
ETHQOSDBG("Link is down . manual ipa setting up\n");
if (priv->tx_queue[IPA_DMA_TX_CH].skip_sw)
ethqos_ipa_offload_event_handler(priv,
EV_PHY_LINK_UP);
} else if (mode == DISABLE_LOOPBACK &&
!qcom_ethqos_is_phy_link_up(ethqos)) {
ETHQOSDBG("Disable request since link was down disable ipa\n");
if (priv->tx_queue[IPA_DMA_TX_CH].skip_sw)
ethqos_ipa_offload_event_handler(priv,
EV_PHY_LINK_DOWN);
}
if (priv->dev->phydev->speed != SPEED_UNKNOWN)
ethqos_fix_mac_speed(ethqos, speed);
if (mode > DISABLE_LOOPBACK) {
if (mode == ENABLE_MAC_LOOPBACK ||
mode == ENABLE_IO_MACRO_LOOPBACK)
rgmii_updatel(ethqos, RGMII_CONFIG_LOOPBACK_EN,
RGMII_CONFIG_LOOPBACK_EN,
RGMII_IO_MACRO_CONFIG);
} else if (mode == DISABLE_LOOPBACK) {
if (ethqos->emac_ver == EMAC_HW_v2_3_2 ||
ethqos->emac_ver == EMAC_HW_v2_1_2)
rgmii_updatel(ethqos, RGMII_CONFIG_LOOPBACK_EN,
0, RGMII_IO_MACRO_CONFIG);
}
ETHQOSERR("End\n");
}
static ssize_t loopback_handling_config(
struct file *file, const char __user *user_buffer,
size_t count, loff_t *position)
{
char *in_buf;
int buf_len = 2000;
unsigned long ret;
int config = 0;
struct qcom_ethqos *ethqos = file->private_data;
struct platform_device *pdev = ethqos->pdev;
struct net_device *dev = platform_get_drvdata(pdev);
struct stmmac_priv *priv = netdev_priv(dev);
int speed = 0;
in_buf = kzalloc(buf_len, GFP_KERNEL);
if (!in_buf)
return -ENOMEM;
ret = copy_from_user(in_buf, user_buffer, buf_len);
if (ret) {
ETHQOSERR("unable to copy from user\n");
return -EFAULT;
}
ret = sscanf(in_buf, "%d %d", &config, &speed);
if (config > DISABLE_LOOPBACK && ret != 2) {
ETHQOSERR("Speed is also needed while enabling loopback\n");
return -EINVAL;
}
if (config < DISABLE_LOOPBACK || config > ENABLE_PHY_LOOPBACK) {
ETHQOSERR("Invalid config =%d\n", config);
return -EINVAL;
}
if ((config == ENABLE_PHY_LOOPBACK || ethqos->current_loopback ==
ENABLE_PHY_LOOPBACK) &&
ethqos->current_phy_mode == DISABLE_PHY_IMMEDIATELY) {
ETHQOSERR("Can't enabled/disable ");
ETHQOSERR("phy loopback when phy is off\n");
return -EPERM;
}
/*Argument validation*/
if (config == DISABLE_LOOPBACK || config == ENABLE_IO_MACRO_LOOPBACK ||
config == ENABLE_MAC_LOOPBACK || config == ENABLE_PHY_LOOPBACK) {
if (speed != SPEED_1000 && speed != SPEED_100 &&
speed != SPEED_10)
return -EINVAL;
} else {
return -EINVAL;
}
if (config == ethqos->current_loopback) {
switch (config) {
case DISABLE_LOOPBACK:
ETHQOSINFO("Loopback is already disabled\n");
break;
case ENABLE_IO_MACRO_LOOPBACK:
ETHQOSINFO("Loopback is already Enabled as ");
ETHQOSINFO("IO MACRO LOOPBACK\n");
break;
case ENABLE_MAC_LOOPBACK:
ETHQOSINFO("Loopback is already Enabled as ");
ETHQOSINFO("MAC LOOPBACK\n");
break;
case ENABLE_PHY_LOOPBACK:
ETHQOSINFO("Loopback is already Enabled as ");
ETHQOSINFO("PHY LOOPBACK\n");
break;
}
return -EINVAL;
}
/*If request to enable loopback & some other loopback already enabled*/
if (config != DISABLE_LOOPBACK &&
ethqos->current_loopback > DISABLE_LOOPBACK) {
ETHQOSINFO("Loopback is already enabled\n");
print_loopback_detail(ethqos->current_loopback);
return -EINVAL;
}
ETHQOSINFO("enable loopback = %d with link speed = %d backup now\n",
config, speed);
/*Backup speed & duplex before Enabling Loopback */
if (ethqos->current_loopback == DISABLE_LOOPBACK &&
config > DISABLE_LOOPBACK) {
/*Backup old speed & duplex*/
ethqos->backup_speed = priv->speed;
ethqos->backup_duplex = priv->dev->phydev->duplex;
}
/*Backup BMCR before Enabling Phy LoopbackLoopback */
if (ethqos->current_loopback == DISABLE_LOOPBACK &&
config == ENABLE_PHY_LOOPBACK)
ethqos->bmcr_backup = ethqos_mdio_read(priv,
priv->plat->phy_addr,
MII_BMCR);
if (config == DISABLE_LOOPBACK)
setup_config_registers(ethqos, ethqos->backup_speed,
ethqos->backup_duplex, 0);
else
setup_config_registers(ethqos, speed, DUPLEX_FULL, config);
switch (config) {
case DISABLE_LOOPBACK:
ETHQOSINFO("Request to Disable Loopback\n");
if (ethqos->current_loopback == ENABLE_IO_MACRO_LOOPBACK)
ethqos_rgmii_io_macro_loopback(ethqos, 0);
else if (ethqos->current_loopback == ENABLE_MAC_LOOPBACK)
ethqos_mac_loopback(ethqos, 0);
else if (ethqos->current_loopback == ENABLE_PHY_LOOPBACK)
phy_digital_loopback_config(ethqos,
ethqos->backup_speed, 0);
break;
case ENABLE_IO_MACRO_LOOPBACK:
ETHQOSINFO("Request to Enable IO MACRO LOOPBACK\n");
ethqos_rgmii_io_macro_loopback(ethqos, 1);
break;
case ENABLE_MAC_LOOPBACK:
ETHQOSINFO("Request to Enable MAC LOOPBACK\n");
ethqos_mac_loopback(ethqos, 1);
break;
case ENABLE_PHY_LOOPBACK:
ETHQOSINFO("Request to Enable PHY LOOPBACK\n");
ethqos->loopback_speed = speed;
phy_digital_loopback_config(ethqos, speed, 1);
break;
default:
ETHQOSINFO("Invalid Loopback=%d\n", config);
break;
}
ethqos->current_loopback = config;
kfree(in_buf);
return count;
}
static ssize_t read_loopback_config(struct file *file,
char __user *user_buf,
size_t count, loff_t *ppos)
{
unsigned int len = 0, buf_len = 2000;
struct qcom_ethqos *ethqos = file->private_data;
if (ethqos->current_loopback == DISABLE_LOOPBACK)
len += scnprintf(buf + len, buf_len - len,
"Loopback is Disabled\n");
else if (ethqos->current_loopback == ENABLE_IO_MACRO_LOOPBACK)
len += scnprintf(buf + len, buf_len - len,
"Current Loopback is IO MACRO LOOPBACK\n");
else if (ethqos->current_loopback == ENABLE_MAC_LOOPBACK)
len += scnprintf(buf + len, buf_len - len,
"Current Loopback is MAC LOOPBACK\n");
else if (ethqos->current_loopback == ENABLE_PHY_LOOPBACK)
len += scnprintf(buf + len, buf_len - len,
"Current Loopback is PHY LOOPBACK\n");
else
len += scnprintf(buf + len, buf_len - len,
"Invalid LOOPBACK Config\n");
if (len > buf_len)
len = buf_len;
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
}
static const struct file_operations fops_phy_reg_dump = {
.read = read_phy_reg_dump,
.open = simple_open,
@@ -1254,6 +1767,22 @@ static ssize_t write_ipc_stmmac_log_ctxt_low(struct file *file,
return count;
}
static const struct file_operations fops_phy_off = {
.read = read_phy_off,
.write = phy_off_config,
.open = simple_open,
.owner = THIS_MODULE,
.llseek = default_llseek,
};
static const struct file_operations fops_loopback_config = {
.read = read_loopback_config,
.write = loopback_handling_config,
.open = simple_open,
.owner = THIS_MODULE,
.llseek = default_llseek,
};
static const struct file_operations fops_ipc_stmmac_log_low = {
.write = write_ipc_stmmac_log_ctxt_low,
.open = simple_open,
@@ -1266,6 +1795,8 @@ static int ethqos_create_debugfs(struct qcom_ethqos *ethqos)
static struct dentry *phy_reg_dump;
static struct dentry *rgmii_reg_dump;
static struct dentry *ipc_stmmac_log_low;
static struct dentry *phy_off;
static struct dentry *loopback_enable_mode;
if (!ethqos) {
ETHQOSERR("Null Param %s\n", __func__);
@@ -1299,11 +1830,26 @@ static int ethqos_create_debugfs(struct qcom_ethqos *ethqos)
ethqos->debugfs_dir, ethqos,
&fops_ipc_stmmac_log_low);
if (!ipc_stmmac_log_low || IS_ERR(ipc_stmmac_log_low)) {
ETHQOSERR("Cannot create debugfs ipc_stmmac_log_low %d\n",
(int)ipc_stmmac_log_low);
ETHQOSERR("Cannot create debugfs ipc_stmmac_log_low %x\n",
ipc_stmmac_log_low);
goto fail;
}
phy_off = debugfs_create_file("phy_off", 0400,
ethqos->debugfs_dir, ethqos,
&fops_phy_off);
if (!phy_off || IS_ERR(phy_off)) {
ETHQOSERR("Can't create phy_off %x\n", phy_off);
goto fail;
}
loopback_enable_mode = debugfs_create_file("loopback_enable_mode", 0400,
ethqos->debugfs_dir, ethqos,
&fops_loopback_config);
if (!loopback_enable_mode || IS_ERR(loopback_enable_mode)) {
ETHQOSERR("Can't create loopback_enable_mode %d\n",
(int)loopback_enable_mode);
goto fail;
}
return 0;
fail:
@@ -1914,6 +2460,21 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
}
ETHQOSDBG(": emac_core_version = %d\n", ethqos->emac_ver);
if (of_property_read_bool(pdev->dev.of_node,
"emac-phy-off-suspend")) {
/* Read emac core version value from dtsi */
ret = of_property_read_u32(pdev->dev.of_node,
"emac-phy-off-suspend",
&ethqos->current_phy_mode);
if (ret) {
ETHQOSDBG(":resource emac-phy-off-suspend! ");
ETHQOSDBG("not in dtsi\n");
ethqos->current_phy_mode = 0;
}
}
ETHQOSINFO("emac-phy-off-suspend = %d\n",
ethqos->current_phy_mode);
ethqos->ioaddr = (&stmmac_res)->addr;
ethqos_update_rgmii_tx_drv_strength(ethqos);
@@ -2011,6 +2572,8 @@ static int qcom_ethqos_suspend(struct device *dev)
struct net_device *ndev = NULL;
int ret;
int allow_suspend = 0;
struct stmmac_priv *priv;
struct plat_stmmacenet_data *plat;
ETHQOSDBG("Suspend Enter\n");
if (of_device_is_compatible(dev->of_node, "qcom,emac-smmu-embedded")) {
@@ -2023,6 +2586,8 @@ static int qcom_ethqos_suspend(struct device *dev)
return -ENODEV;
ndev = dev_get_drvdata(dev);
priv = netdev_priv(ndev);
plat = priv->plat;
ethqos_ipa_offload_event_handler(&allow_suspend, EV_DPM_SUSPEND);
if (!allow_suspend) {
@@ -2032,9 +2597,25 @@ static int qcom_ethqos_suspend(struct device *dev)
}
if (!ndev || !netif_running(ndev))
return -EINVAL;
if (ethqos->current_phy_mode == DISABLE_PHY_AT_SUSPEND_ONLY ||
ethqos->current_phy_mode == DISABLE_PHY_SUSPEND_ENABLE_RESUME) {
/*Backup phy related data*/
if (priv->phydev->autoneg == AUTONEG_DISABLE) {
ethqos->backup_autoneg = priv->phydev->autoneg;
ethqos->backup_bmcr = ethqos_mdio_read(priv,
plat->phy_addr,
MII_BMCR);
} else {
ethqos->backup_autoneg = AUTONEG_ENABLE;
}
}
ret = stmmac_suspend(dev);
qcom_ethqos_phy_suspend_clks(ethqos);
if (ethqos->current_phy_mode == DISABLE_PHY_AT_SUSPEND_ONLY ||
ethqos->current_phy_mode == DISABLE_PHY_SUSPEND_ENABLE_RESUME) {
ETHQOSINFO("disable phy at suspend\n");
ethqos_phy_power_off(ethqos);
}
ETHQOSDBG(" ret = %d\n", ret);
return ret;
@@ -2045,6 +2626,7 @@ static int qcom_ethqos_resume(struct device *dev)
struct net_device *ndev = NULL;
struct qcom_ethqos *ethqos;
int ret;
struct stmmac_priv *priv;
ETHQOSDBG("Resume Enter\n");
if (of_device_is_compatible(dev->of_node, "qcom,emac-smmu-embedded"))
@@ -2056,6 +2638,7 @@ static int qcom_ethqos_resume(struct device *dev)
return -ENODEV;
ndev = dev_get_drvdata(dev);
priv = netdev_priv(ndev);
if (!ndev || !netif_running(ndev)) {
ETHQOSERR(" Resume not possible\n");
@@ -2068,10 +2651,39 @@ static int qcom_ethqos_resume(struct device *dev)
return 0;
}
if (ethqos->current_phy_mode == DISABLE_PHY_SUSPEND_ENABLE_RESUME) {
ETHQOSINFO("enable phy at resume\n");
ethqos_phy_power_on(ethqos);
}
qcom_ethqos_phy_resume_clks(ethqos);
ret = stmmac_resume(dev);
if (ethqos->current_phy_mode == DISABLE_PHY_SUSPEND_ENABLE_RESUME) {
ETHQOSINFO("reset phy after clock\n");
ethqos_reset_phy_enable_interrupt(ethqos);
if (ethqos->backup_autoneg == AUTONEG_DISABLE) {
priv->phydev->autoneg = ethqos->backup_autoneg;
ethqos_mdio_write(
priv, priv->plat->phy_addr,
MII_BMCR, ethqos->backup_bmcr);
}
}
if (ethqos->current_phy_mode == DISABLE_PHY_AT_SUSPEND_ONLY) {
/* Temp Enable LOOPBACK_EN.
* TX clock needed for reset As Phy is off
*/
rgmii_updatel(ethqos, RGMII_CONFIG_LOOPBACK_EN,
RGMII_CONFIG_LOOPBACK_EN,
RGMII_IO_MACRO_CONFIG);
ETHQOSINFO("Loopback EN Enabled\n");
}
ret = stmmac_resume(dev);
if (ethqos->current_phy_mode == DISABLE_PHY_AT_SUSPEND_ONLY) {
//Disable LOOPBACK_EN
rgmii_updatel(ethqos, RGMII_CONFIG_LOOPBACK_EN,
0, RGMII_IO_MACRO_CONFIG);
ETHQOSINFO("Loopback EN Disabled\n");
}
ethqos_ipa_offload_event_handler(NULL, EV_DPM_RESUME);
ETHQOSDBG("<--Resume Exit\n");

48
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.h
View File

@@ -235,6 +235,10 @@ do {\
#define VOTE_IDX_100MBPS 2
#define VOTE_IDX_1000MBPS 3
//Mac config
#define MAC_CONFIGURATION 0x0
#define MAC_LM BIT(12)
#define TLMM_BASE_ADDRESS (tlmm_central_base_addr)
#define TLMM_RGMII_HDRV_PULL_CTL1_ADDRESS_OFFSET\
@@ -329,9 +333,29 @@ static inline u32 PPSX_MASK(u32 x)
}
enum IO_MACRO_PHY_MODE {
RGMII_MODE,
RMII_MODE,
MII_MODE
RGMII_MODE,
RMII_MODE,
MII_MODE
};
enum loopback_mode {
DISABLE_LOOPBACK = 0,
ENABLE_IO_MACRO_LOOPBACK,
ENABLE_MAC_LOOPBACK,
ENABLE_PHY_LOOPBACK
};
enum phy_power_mode {
DISABLE_PHY_IMMEDIATELY = 1,
ENABLE_PHY_IMMEDIATELY,
DISABLE_PHY_AT_SUSPEND_ONLY,
DISABLE_PHY_SUSPEND_ENABLE_RESUME,
DISABLE_PHY_ON_OFF,
};
enum current_phy_state {
PHY_IS_ON = 0,
PHY_IS_OFF,
};
#define RGMII_IO_BASE_ADDRESS ethqos->rgmii_base
@@ -458,6 +482,19 @@ struct qcom_ethqos {
bool ipa_enabled;
/* Key Performance Indicators */
bool print_kpi;
unsigned int emac_phy_off_suspend;
int loopback_speed;
enum loopback_mode current_loopback;
enum phy_power_mode current_phy_mode;
enum current_phy_state phy_state;
/*Backup variable for phy loopback*/
int backup_duplex;
int backup_speed;
u32 bmcr_backup;
/*Backup variable for suspend resume*/
int backup_suspend_speed;
u32 backup_bmcr;
unsigned backup_autoneg:1;
};
struct pps_cfg {
@@ -513,6 +550,9 @@ bool qcom_ethqos_is_phy_link_up(struct qcom_ethqos *ethqos);
void *qcom_ethqos_get_priv(struct qcom_ethqos *ethqos);
int ppsout_config(struct stmmac_priv *priv, struct pps_cfg *eth_pps_cfg);
int ethqos_phy_power_on(struct qcom_ethqos *ethqos);
void ethqos_phy_power_off(struct qcom_ethqos *ethqos);
void ethqos_reset_phy_enable_interrupt(struct qcom_ethqos *ethqos);
u16 dwmac_qcom_select_queue(
struct net_device *dev,
@@ -574,4 +614,6 @@ int dwmac_qcom_program_avb_algorithm(
struct stmmac_priv *priv, struct ifr_data_struct *req);
unsigned int dwmac_qcom_get_plat_tx_coal_frames(
struct sk_buff *skb);
unsigned int dwmac_qcom_get_eth_type(unsigned char *buf);
#endif

57
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-gpio.c
View File

@@ -183,6 +183,63 @@ void ethqos_disable_regulators(struct qcom_ethqos *ethqos)
}
}
void ethqos_reset_phy_enable_interrupt(struct qcom_ethqos *ethqos)
{
struct stmmac_priv *priv = qcom_ethqos_get_priv(ethqos);
struct phy_device *phydev = priv->dev->phydev;
/* reset the phy so that it's ready */
if (priv->mii) {
ETHQOSERR("do mdio reset\n");
stmmac_mdio_reset(priv->mii);
}
/*Enable phy interrupt*/
if (phy_intr_en && phydev) {
ETHQOSDBG("PHY interrupt Mode enabled\n");
phydev->irq = PHY_IGNORE_INTERRUPT;
phydev->interrupts = PHY_INTERRUPT_ENABLED;
if (phydev->drv->config_intr &&
!phydev->drv->config_intr(phydev)) {
ETHQOSERR("config_phy_intr successful after phy on\n");
}
qcom_ethqos_request_phy_wol(priv->plat);
} else if (!phy_intr_en) {
phydev->irq = PHY_POLL;
ETHQOSDBG("PHY Polling Mode enabled\n");
} else {
ETHQOSERR("phydev is null , intr value=%d\n", phy_intr_en);
}
}
int ethqos_phy_power_on(struct qcom_ethqos *ethqos)
{
int ret = 0;
if (ethqos->reg_emac_phy) {
ret = regulator_enable(ethqos->reg_emac_phy);
if (ret) {
ETHQOSERR("Can not enable <%s>\n",
EMAC_VREG_EMAC_PHY_NAME);
return ret;
}
ethqos->phy_state = PHY_IS_ON;
} else {
ETHQOSERR("reg_emac_phy is NULL\n");
}
return ret;
}
void ethqos_phy_power_off(struct qcom_ethqos *ethqos)
{
if (ethqos->reg_emac_phy) {
regulator_disable(ethqos->reg_emac_phy);
ethqos->phy_state = PHY_IS_OFF;
} else {
ETHQOSERR("reg_emac_phy is NULL\n");
}
}
void ethqos_free_gpios(struct qcom_ethqos *ethqos)
{
if (gpio_is_valid(ethqos->gpio_phy_intr_redirect))

4
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.c
View File

@@ -1046,6 +1046,7 @@ static void ntn_ipa_notify_cb(void *priv, enum ipa_dp_evt_type evt,
int stat = NET_RX_SUCCESS;
struct platform_device *pdev;
struct net_device *dev;
struct stmmac_priv *pdata;
if (!ethqos || !skb) {
ETHQOSERR("Null Param pdata %p skb %pK\n", ethqos, skb);
@@ -1065,6 +1066,7 @@ static void ntn_ipa_notify_cb(void *priv, enum ipa_dp_evt_type evt,
pdev = ethqos->pdev;
dev = platform_get_drvdata(pdev);
pdata = netdev_priv(dev);
if (evt == IPA_RECEIVE) {
/*Exception packets to network stack*/
@@ -1075,6 +1077,8 @@ static void ntn_ipa_notify_cb(void *priv, enum ipa_dp_evt_type evt,
skb->protocol = htons(ETH_P_IP);
iph = (struct iphdr *)skb->data;
} else {
if (ethqos->current_loopback > DISABLE_LOOPBACK)
swap_ip_port(skb, ETH_P_IP);
skb->protocol = eth_type_trans(skb, skb->dev);
iph = (struct iphdr *)(skb_mac_header(skb) + ETH_HLEN);
}

11
drivers/net/ethernet/stmicro/stmmac/stmmac.h
View File

@@ -33,6 +33,10 @@
#include <soc/qcom/boot_stats.h>
#endif
#include "dwmac-qcom-ipa-offload.h"
#include <linux/udp.h>
#include <linux/if_ether.h>
#include <linux/if_arp.h>
#include <linux/icmp.h>
struct stmmac_resources {
void __iomem *addr;
@@ -149,6 +153,7 @@ struct stmmac_priv {
void __iomem *ptpaddr;
u32 mss;
bool boot_kpi;
int current_loopback;
#ifdef CONFIG_DEBUG_FS
struct dentry *dbgfs_dir;
struct dentry *dbgfs_rings_status;
@@ -175,6 +180,8 @@ extern struct stmmac_emb_smmu_cb_ctx stmmac_emb_smmu_ctx;
#define MICREL_PHY_ID 0x00221620
#define MMC_CONFIG 0x24
int ethqos_handle_prv_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
int ethqos_init_pps(struct stmmac_priv *priv);
@@ -198,5 +205,7 @@ int stmmac_dvr_probe(struct device *device,
void stmmac_disable_eee_mode(struct stmmac_priv *priv);
bool stmmac_eee_init(struct stmmac_priv *priv);
bool qcom_ethqos_ipa_enabled(void);
u16 icmp_fast_csum(u16 old_csum);
void swap_ip_port(struct sk_buff *skb, unsigned int eth_type);
unsigned int dwmac_qcom_get_eth_type(unsigned char *buf);
#endif /* __STMMAC_H__ */

7
drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
View File

@@ -544,6 +544,9 @@ static void stmmac_get_ethtool_stats(struct net_device *dev,
u32 tx_queues_count = priv->plat->tx_queues_to_use;
int i, j = 0;
/* enable reset on read for mmc counter */
writel_relaxed(MMC_CONFIG, priv->mmcaddr);
/* Update the DMA HW counters for dwmac10/100 */
if (priv->hw->dma->dma_diagnostic_fr)
priv->hw->dma->dma_diagnostic_fr(&dev->stats,
@@ -647,6 +650,10 @@ static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
u32 emac_wol_support = 0;
int ret;
if (ethqos->phy_state == PHY_IS_OFF) {
ETHQOSINFO("Phy is in off state Wol set not possible\n");
return -EOPNOTSUPP;
}
/* By default almost all GMAC devices support the WoL via
* magic frame but we can disable it if the HW capability
* register shows no support for pmt_magic_frame. */

50
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
View File

@@ -3519,6 +3519,47 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv, u32 queue)
rx_q->dirty_rx = entry;
}
static u16 csum(u16 old_csum)
{
u16 new_checksum = 0;
new_checksum = ~(~old_csum + (-8) + 0);
return new_checksum;
}
void swap_ip_port(struct sk_buff *skb, unsigned int eth_type)
{
__be32 temp_addr;
unsigned char *buf = skb->data;
struct icmphdr *icmp_hdr;
unsigned char eth_temp[ETH_ALEN] = {};
struct ethhdr *eth = (struct ethhdr *)(buf);
struct iphdr *ip_header;
if (eth_type == ETH_P_IP) {
ip_header = (struct iphdr *)(buf + sizeof(struct ethhdr));
if (ip_header->protocol == IPPROTO_UDP ||
ip_header->protocol == IPPROTO_ICMP) {
//swap mac address
memcpy(eth_temp, eth->h_dest, ETH_ALEN);
memcpy(eth->h_dest, eth->h_source, ETH_ALEN);
memcpy(eth->h_source, eth_temp, ETH_ALEN);
//swap ip address
temp_addr = ip_header->daddr;
ip_header->daddr = ip_header->saddr;
ip_header->saddr = temp_addr;
icmp_hdr = (struct icmphdr *)(buf
+ sizeof(struct ethhdr)
+ sizeof(struct iphdr));
if (icmp_hdr->type == ICMP_ECHO) {
icmp_hdr->type = ICMP_ECHOREPLY;
icmp_hdr->checksum = csum(icmp_hdr->checksum);
}
}
}
}
/**
* stmmac_rx - manage the receive process
* @priv: driver private structure
@@ -3533,6 +3574,9 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
int coe = priv->hw->rx_csum;
unsigned int next_entry = rx_q->cur_rx;
unsigned int count = 0;
#ifndef CONFIG_ETH_IPA_OFFLOAD
unsigned int eth_type;
#endif
if (netif_msg_rx_status(priv)) {
void *rx_head;
@@ -3707,7 +3751,13 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
stmmac_get_rx_hwtstamp(priv, p, np, skb);
stmmac_rx_vlan(priv->dev, skb);
#ifndef CONFIG_ETH_IPA_OFFLOAD
eth_type = dwmac_qcom_get_eth_type(skb->data);
if (priv->current_loopback > 0 &&
eth_type == ETH_P_IP)
swap_ip_port(skb, eth_type);
#endif
skb->protocol = eth_type_trans(skb, priv->dev);
if (unlikely(!coe))

28
drivers/net/wireless/ath/ath10k/mac.c
View File

@@ -8020,6 +8020,20 @@ static const struct ieee80211_iface_limit ath10k_tlv_if_limit_ibss[] = {
},
};
static const struct ieee80211_iface_limit ath10k_tlv_if_vap_limit[] = {
{
.max = 1,
.types = BIT(NL80211_IFTYPE_STATION),
},
{
.max = 3,
.types = BIT(NL80211_IFTYPE_AP)
#ifdef CONFIG_MAC80211_MESH
| BIT(NL80211_IFTYPE_MESH_POINT)
#endif
},
};
/* FIXME: This is not thouroughly tested. These combinations may over- or
* underestimate hw/fw capabilities.
*/
@@ -8036,6 +8050,14 @@ static struct ieee80211_iface_combination ath10k_tlv_if_comb[] = {
.max_interfaces = 2,
.n_limits = ARRAY_SIZE(ath10k_tlv_if_limit_ibss),
},
{
.limits = ath10k_tlv_if_vap_limit,
.num_different_channels = 1,
.max_interfaces = 4,
.beacon_int_infra_match = true,
.beacon_int_min_gcd = 1,
.n_limits = ARRAY_SIZE(ath10k_tlv_if_vap_limit),
},
};
static struct ieee80211_iface_combination ath10k_tlv_qcs_if_comb[] = {
@@ -8057,6 +8079,12 @@ static struct ieee80211_iface_combination ath10k_tlv_qcs_if_comb[] = {
.max_interfaces = 2,
.n_limits = ARRAY_SIZE(ath10k_tlv_if_limit_ibss),
},
{
.limits = ath10k_tlv_if_vap_limit,
.num_different_channels = 1,
.max_interfaces = 4,
.n_limits = ARRAY_SIZE(ath10k_tlv_if_vap_limit),
},
};
static const struct ieee80211_iface_limit ath10k_10_4_if_limits[] = {

4
drivers/net/wireless/ath/ath10k/wmi-tlv.c
View File

@@ -1,7 +1,7 @@
/*
* Copyright (c) 2005-2011 Atheros Communications Inc.
* Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -1579,7 +1579,7 @@ static struct sk_buff *ath10k_wmi_tlv_op_gen_init(struct ath10k *ar)
cfg->max_frag_entries = __cpu_to_le32(2);
cfg->num_tdls_vdevs = __cpu_to_le32(TARGET_TLV_NUM_TDLS_VDEVS);
cfg->num_tdls_conn_table_entries = __cpu_to_le32(0x20);
cfg->beacon_tx_offload_max_vdev = __cpu_to_le32(2);
cfg->beacon_tx_offload_max_vdev = __cpu_to_le32(3);
cfg->num_multicast_filter_entries = __cpu_to_le32(5);
cfg->num_wow_filters = __cpu_to_le32(ar->wow.max_num_patterns);
cfg->num_keep_alive_pattern = __cpu_to_le32(6);

2
drivers/net/wireless/cnss_utils/cnss_utils.c
View File

@@ -31,7 +31,7 @@
#define LPASS_PMU_INT_EN0 0xC060084
#define LPASS_PMU_INT_CLR 0xC060034
#endif
#define CNSS_MAX_CH_NUM 45
#define CNSS_MAX_CH_NUM 157
struct cnss_unsafe_channel_list {
u16 unsafe_ch_count;
u16 unsafe_ch_list[CNSS_MAX_CH_NUM];

3
drivers/platform/msm/ep_pcie/ep_pcie_com.h
View File

@@ -385,7 +385,6 @@ struct ep_pcie_dev_t {
bool config_mmio_init;
bool enumerated;
enum ep_pcie_link_status link_status;
bool perst_deast;
bool power_on;
bool suspending;
bool l23_ready;
@@ -393,6 +392,8 @@ struct ep_pcie_dev_t {
struct ep_pcie_msi_config msi_cfg;
bool no_notify;
bool client_ready;
atomic_t ep_pcie_dev_wake;
atomic_t perst_deast;
struct ep_pcie_register_event *event_reg;
struct work_struct handle_perst_work;

72
drivers/platform/msm/ep_pcie/ep_pcie_core.c
View File

@@ -1805,7 +1805,7 @@ int ep_pcie_core_enable_endpoint(enum ep_pcie_options opt)
ret = EP_PCIE_ERROR;
goto link_fail;
} else {
dev->perst_deast = true;
atomic_set(&dev->perst_deast, 1);
if (opt & EP_PCIE_OPT_AST_WAKE) {
/* deassert PCIe WAKE# */
EP_PCIE_DBG(dev,
@@ -1969,11 +1969,19 @@ out:
int ep_pcie_core_disable_endpoint(void)
{
int rc = 0;
u32 val = 0;
unsigned long irqsave_flags;
struct ep_pcie_dev_t *dev = &ep_pcie_dev;
EP_PCIE_DBG(dev, "PCIe V%d\n", dev->rev);
mutex_lock(&dev->setup_mtx);
if (atomic_read(&dev->perst_deast)) {
EP_PCIE_DBG(dev,
"PCIe V%d: PERST is de-asserted, exiting disable\n",
dev->rev);
goto out;
}
if (!dev->power_on) {
EP_PCIE_DBG(dev,
@@ -1990,9 +1998,25 @@ int ep_pcie_core_disable_endpoint(void)
dev->rev);
}
val = readl_relaxed(dev->elbi + PCIE20_ELBI_SYS_STTS);
EP_PCIE_DBG(dev, "PCIe V%d: LTSSM_STATE during disable:0x%x\n",
dev->rev, (val >> 0xC) & 0x3f);
ep_pcie_pipe_clk_deinit(dev);
ep_pcie_clk_deinit(dev);
ep_pcie_vreg_deinit(dev);
spin_lock_irqsave(&dev->isr_lock, irqsave_flags);
if (atomic_read(&dev->ep_pcie_dev_wake) &&
!atomic_read(&dev->perst_deast)) {
EP_PCIE_DBG(dev, "PCIe V%d: Released wakelock\n", dev->rev);
atomic_set(&dev->ep_pcie_dev_wake, 0);
pm_relax(&dev->pdev->dev);
} else {
EP_PCIE_DBG(dev, "PCIe V%d: Bail, Perst-assert:%d wake:%d\n",
dev->rev, atomic_read(&dev->perst_deast),
atomic_read(&dev->ep_pcie_dev_wake));
}
spin_unlock_irqrestore(&dev->isr_lock, irqsave_flags);
out:
mutex_unlock(&dev->setup_mtx);
return rc;
@@ -2249,12 +2273,25 @@ static void handle_d3cold_func(struct work_struct *work)
{
struct ep_pcie_dev_t *dev = container_of(work, struct ep_pcie_dev_t,
handle_d3cold_work);
unsigned long irqsave_flags;
EP_PCIE_DBG(dev,
"PCIe V%d: shutdown PCIe link due to PERST assertion before BME is set\n",
dev->rev);
ep_pcie_core_disable_endpoint();
dev->no_notify = false;
spin_lock_irqsave(&dev->isr_lock, irqsave_flags);
if (atomic_read(&dev->ep_pcie_dev_wake) &&
!atomic_read(&dev->perst_deast)) {
atomic_set(&dev->ep_pcie_dev_wake, 0);
pm_relax(&dev->pdev->dev);
EP_PCIE_DBG(dev, "PCIe V%d: Released wakelock\n", dev->rev);
} else {
EP_PCIE_DBG(dev, "PCIe V%d: Bail, Perst-assert:%d wake:%d\n",
dev->rev, atomic_read(&dev->perst_deast),
atomic_read(&dev->ep_pcie_dev_wake));
}
spin_unlock_irqrestore(&dev->isr_lock, irqsave_flags);
}
static void handle_bme_func(struct work_struct *work)
@@ -2292,14 +2329,24 @@ static irqreturn_t ep_pcie_handle_perst_irq(int irq, void *data)
}
if (perst) {
dev->perst_deast = true;
atomic_set(&dev->perst_deast, 1);
dev->perst_deast_counter++;
/*
* Hold a wakelock to avoid missing BME and other
* interrupts if apps goes into suspend before BME is set.
*/
if (!atomic_read(&dev->ep_pcie_dev_wake)) {
pm_stay_awake(&dev->pdev->dev);
atomic_set(&dev->ep_pcie_dev_wake, 1);
EP_PCIE_DBG(dev, "PCIe V%d: Acquired wakelock\n",
dev->rev);
}
EP_PCIE_DBG(dev,
"PCIe V%d: No. %ld PERST deassertion\n",
dev->rev, dev->perst_deast_counter);
ep_pcie_notify_event(dev, EP_PCIE_EVENT_PM_RST_DEAST);
} else {
dev->perst_deast = false;
atomic_set(&dev->perst_deast, 0);
dev->perst_ast_counter++;
EP_PCIE_DBG(dev,
"PCIe V%d: No. %ld PERST assertion\n",
@@ -2550,14 +2597,15 @@ perst_irq:
* based on the next expected level of the gpio
*/
if (gpio_get_value(dev->gpio[EP_PCIE_GPIO_PERST].num) == 1)
dev->perst_deast = true;
atomic_set(&dev->perst_deast, 1);
/* register handler for PERST interrupt */
perst_irq = gpio_to_irq(dev->gpio[EP_PCIE_GPIO_PERST].num);
ret = devm_request_irq(pdev, perst_irq,
ep_pcie_handle_perst_irq,
((dev->perst_deast ? IRQF_TRIGGER_LOW : IRQF_TRIGGER_HIGH)
| IRQF_EARLY_RESUME),
((atomic_read(&dev->perst_deast) ?
IRQF_TRIGGER_LOW : IRQF_TRIGGER_HIGH)
| IRQF_EARLY_RESUME),
"ep_pcie_perst", dev);
if (ret) {
EP_PCIE_ERR(dev,
@@ -2951,7 +2999,7 @@ static int ep_pcie_core_wakeup_host(enum ep_pcie_event event)
if (event == EP_PCIE_EVENT_PM_D3_HOT)
ep_pcie_core_issue_inband_pme();
if (dev->perst_deast && !dev->l23_ready) {
if (atomic_read(&dev->perst_deast) && !dev->l23_ready) {
EP_PCIE_ERR(dev,
"PCIe V%d: request to assert WAKE# when PERST is de-asserted and D3hot is not received\n",
dev->rev);
@@ -2962,7 +3010,7 @@ static int ep_pcie_core_wakeup_host(enum ep_pcie_event event)
EP_PCIE_DBG(dev,
"PCIe V%d: No. %ld to assert PCIe WAKE#; perst is %s de-asserted; D3hot is %s received\n",
dev->rev, dev->wake_counter,
dev->perst_deast ? "" : "not",
atomic_read(&dev->perst_deast) ? "" : "not",
dev->l23_ready ? "" : "not");
/*
* Assert WAKE# GPIO until link is back to L0.
@@ -3217,6 +3265,14 @@ static int ep_pcie_probe(struct platform_device *pdev)
goto irq_failure;
}
/*
* Wakelock is needed to avoid missing BME and other
* interrupts if apps goes into suspend before host
* sets them.
*/
device_init_wakeup(&ep_pcie_dev.pdev->dev, true);
atomic_set(&ep_pcie_dev.ep_pcie_dev_wake, 0);
if (ep_pcie_dev.perst_enum &&
!gpio_get_value(ep_pcie_dev.gpio[EP_PCIE_GPIO_PERST].num)) {
EP_PCIE_DBG2(&ep_pcie_dev,

24
drivers/platform/msm/ipa/ipa_clients/ipa_uc_offload.c
View File

@@ -540,20 +540,16 @@ int ipa_uc_ntn_conn_pipes(struct ipa_ntn_conn_in_params *inp,
goto fail;
}
if (ntn_ctx->conn.dl.smmu_enabled) {
result = ipa_uc_ntn_alloc_conn_smmu_info(&ntn_ctx->conn.dl,
&inp->dl);
if (result) {
IPA_UC_OFFLOAD_ERR("alloc failure on TX\n");
goto fail;
}
result = ipa_uc_ntn_alloc_conn_smmu_info(&ntn_ctx->conn.ul,
&inp->ul);
if (result) {
ipa_uc_ntn_free_conn_smmu_info(&ntn_ctx->conn.dl);
IPA_UC_OFFLOAD_ERR("alloc failure on RX\n");
goto fail;
}
result = ipa_uc_ntn_alloc_conn_smmu_info(&ntn_ctx->conn.dl, &inp->dl);
if (result) {
IPA_UC_OFFLOAD_ERR("alloc failure on TX\n");
goto fail;
}
result = ipa_uc_ntn_alloc_conn_smmu_info(&ntn_ctx->conn.ul, &inp->ul);
if (result) {
ipa_uc_ntn_free_conn_smmu_info(&ntn_ctx->conn.dl);
IPA_UC_OFFLOAD_ERR("alloc failure on RX\n");
goto fail;
}
fail:

7
drivers/platform/msm/ipa/ipa_v3/ethernet/ipa_eth.c
View File

@@ -571,9 +571,10 @@ static int ipa_eth_pm_notifier_event_suspend_prepare(
* and reverts the device suspension by aborting the system suspend.
*/
if (ipa_eth_net_check_active(eth_dev)) {
pr_info("%s: %s is active, preventing suspend for some time",
IPA_ETH_SUBSYS, eth_dev->net_dev->name);
ipa_eth_dev_wakeup_event(eth_dev);
pr_info("%s: %s is active, preventing suspend for %u ms",
IPA_ETH_SUBSYS, eth_dev->net_dev->name,
IPA_ETH_WAKE_TIME_MS);
pm_wakeup_dev_event(eth_dev->dev, IPA_ETH_WAKE_TIME_MS, false);
return NOTIFY_BAD;
}

30
drivers/platform/msm/ipa/ipa_v3/ethernet/ipa_eth_i.h
View File

@@ -35,8 +35,12 @@
#define IPA_ETH_IPC_LOGDBG_DEFAULT false
#endif
/* Time to remain awake after a suspend abort due to NIC activity */
#define IPA_ETH_WAKE_TIME_MS 500
/* Time for NIC HW to settle down (ex. receive link interrupt) after a resume */
#define IPA_ETH_RESUME_SETTLE_MS 2000
#define IPA_ETH_PFDEV (ipa3_ctx ? ipa3_ctx->pdev : NULL)
#define IPA_ETH_SUBSYS "ipa_eth"
@@ -161,9 +165,31 @@ extern bool ipa_eth_ipc_logdbg;
bool ipa_eth_is_ready(void);
bool ipa_eth_all_ready(void);
static inline void ipa_eth_dev_wakeup_event(struct ipa_eth_device *eth_dev)
static inline void ipa_eth_dev_assume_active_ms(
struct ipa_eth_device *eth_dev,
unsigned int msec)
{
pm_wakeup_dev_event(eth_dev->dev, IPA_ETH_WAKE_TIME_MS, false);
eth_dev_priv(eth_dev)->assume_active +=
DIV_ROUND_UP(msec, IPA_ETH_WAKE_TIME_MS);
pm_system_wakeup();
}
static inline void ipa_eth_dev_assume_active_inc(
struct ipa_eth_device *eth_dev,
unsigned int count)
{
eth_dev_priv(eth_dev)->assume_active += count;
pm_system_wakeup();
}
static inline void ipa_eth_dev_assume_active_dec(
struct ipa_eth_device *eth_dev,
unsigned int count)
{
if (eth_dev_priv(eth_dev)->assume_active > count)
eth_dev_priv(eth_dev)->assume_active -= count;
else
eth_dev_priv(eth_dev)->assume_active = 0;
}
struct ipa_eth_device *ipa_eth_alloc_device(

6
drivers/platform/msm/ipa/ipa_v3/ethernet/ipa_eth_pci.c
View File

@@ -374,7 +374,7 @@ static int ipa_eth_pci_suspend_late_handler(struct device *dev)
IPA_ETH_SUBSYS, eth_dev->net_dev->name);
/* Have PM_SUSPEND_PREPARE give us one wakeup time quanta */
eth_dev_priv(eth_dev)->assume_active++;
ipa_eth_dev_assume_active_inc(eth_dev, 1);
return -EAGAIN;
}
@@ -428,8 +428,8 @@ static int ipa_eth_pci_resume_handler(struct device *dev)
"Device resume delegated to net driver");
rc = eth_dev_pm_ops(eth_dev)->resume(dev);
/* Give some time after a resume for the device to settle */
eth_dev_priv(eth_dev)->assume_active++;
/* Give some time for device to settle after a resume */
ipa_eth_dev_assume_active_ms(eth_dev, IPA_ETH_RESUME_SETTLE_MS);
}
if (rc)

34
drivers/platform/msm/ipa/ipa_v3/ipa.c
View File

@@ -1003,6 +1003,7 @@ static long ipa3_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
struct ipa_ioc_get_vlan_mode vlan_mode;
struct ipa_ioc_wigig_fst_switch fst_switch;
struct ipa_nat_in_sram_info nat_in_sram_info;
union ipa_ioc_uc_activation_entry uc_act;
size_t sz;
int pre_entry;
int hdl;
@@ -3052,6 +3053,39 @@ static long ipa3_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
}
break;
case IPA_IOC_ADD_UC_ACT_ENTRY:
if (copy_from_user(&uc_act, (const void __user *)arg,
sizeof(union ipa_ioc_uc_activation_entry))) {
IPAERR_RL("copy_from_user fails\n");
retval = -EFAULT;
break;
}
/* first field in both structs is cmd id */
if (uc_act.socks.cmd_id == IPA_SOCKSV5_ADD_COM_ID) {
retval = ipa3_add_socksv5_conn_usr(&uc_act.socks);
} else {
retval = ipa3_add_ipv6_nat_uc_activation_entry(
&uc_act.ipv6_nat);
}
if (retval) {
retval = -EFAULT;
break;
}
if (copy_to_user((void __user *)arg, &uc_act,
sizeof(union ipa_ioc_uc_activation_entry))) {
IPAERR_RL("copy_to_user fails\n");
retval = -EFAULT;
break;
}
break;
case IPA_IOC_DEL_UC_ACT_ENTRY:
if (ipa3_del_uc_act_entry((uint16_t)arg)) {
retval = -EFAULT;
break;
}
break;
default:
IPA_ACTIVE_CLIENTS_DEC_SIMPLE();
return -ENOTTY;

131
drivers/platform/msm/ipa/ipa_v3/ipa_debugfs.c
View File

@@ -324,7 +324,7 @@ static ssize_t ipa3_read_ep_reg(struct file *file, char __user *ubuf,
*ppos = pos;
ret = simple_read_from_buffer(ubuf, count, ppos, dbg_buff,
nbytes);
nbytes);
if (ret < 0) {
IPA_ACTIVE_CLIENTS_DEC_SIMPLE();
return ret;
@@ -503,12 +503,12 @@ static int ipa3_attrib_dump(struct ipa_rule_attrib *attrib,
if (attrib->attrib_mask & IPA_FLT_SRC_PORT_RANGE) {
pr_err("src_port_range:%u %u ",
attrib->src_port_lo,
attrib->src_port_hi);
attrib->src_port_hi);
}
if (attrib->attrib_mask & IPA_FLT_DST_PORT_RANGE) {
pr_err("dst_port_range:%u %u ",
attrib->dst_port_lo,
attrib->dst_port_hi);
attrib->dst_port_hi);
}
if (attrib->attrib_mask & IPA_FLT_TYPE)
pr_err("type:%d ", attrib->type);
@@ -2646,6 +2646,125 @@ static ssize_t ipa3_enable_ipc_low(struct file *file,
return count;
}
static ssize_t ipa3_read_uc_act_tbl(struct file *file,
char __user *ubuf, size_t count, loff_t *ppos)
{
int nbytes;
int cnt = 0;
int i;
struct ipa_ipv6_nat_uc_tmpl *uc_entry_nat;
struct ipa_socksv5_uc_tmpl *uc_entry_socks;
struct iphdr_rsv *socks_iphdr;
struct ipv6hdr *socks_ipv6hdr;
/* IPA version check */
if (ipa3_ctx->ipa_hw_type < IPA_HW_v4_5) {
nbytes = scnprintf(dbg_buff, IPA_MAX_MSG_LEN,
"This feature only support on IPA4.5+\n");
cnt += nbytes;
goto done;
}
if (!ipa3_ctx->uc_act_tbl_valid) {
IPAERR("uC act tbl wasn't allocated\n");
return -ENOENT;
}
if (sizeof(dbg_buff) < count + 1)
return -EFAULT;
dbg_buff[count] = '\0';
mutex_lock(&ipa3_ctx->act_tbl_lock);
uc_entry_nat = (struct ipa_ipv6_nat_uc_tmpl *)
(ipa3_ctx->uc_act_tbl.base);
nbytes = scnprintf(dbg_buff, IPA_MAX_MSG_LEN,
"uc_act_tbl_total %d, uc_act_tbl_ipv6_nat_total %d uc_act_tbl_socksv5_total %d, uc_act_tbl_next_index %d\n"
"uC activation entries:"
, ipa3_ctx->uc_act_tbl_total,
ipa3_ctx->uc_act_tbl_ipv6_nat_total,
ipa3_ctx->uc_act_tbl_socksv5_total,
ipa3_ctx->uc_act_tbl_next_index);
cnt += nbytes;
for (i = 0; i < IPA_UC_ACT_TBL_SIZE; i++) {
if (uc_entry_nat[i].cmd_id == IPA_IPv6_NAT_COM_ID) {
nbytes = scnprintf(dbg_buff + cnt, IPA_MAX_MSG_LEN,
"\nentry %d:\n"
"cmd_id = IPV6_NAT\n"
"private_address_msb 0x%llX\n"
"private_address_lsb 0x%llX\n"
"private_port %u\n"
"public_address_msb 0x%llX\n"
"public_address_lsb 0x%llX\n"
"public_port %u\n",
i,
uc_entry_nat[i].private_address_msb,
uc_entry_nat[i].private_address_lsb,
uc_entry_nat[i].private_port,
uc_entry_nat[i].public_address_msb,
uc_entry_nat[i].public_address_lsb,
uc_entry_nat[i].public_port);
cnt += nbytes;
} else if (uc_entry_nat[i].cmd_id == IPA_SOCKSV5_ADD_COM_ID) {
uc_entry_socks = (struct ipa_socksv5_uc_tmpl *)
(uc_entry_nat);
nbytes = scnprintf(dbg_buff + cnt, IPA_MAX_MSG_LEN,
"\nentry %d:\n"
"cmd_id = SOCKSv5\n"
"cmd_param: %u\n"
"source_port: %u\n"
"dest_port: %u\n"
"ipa_socksv5_mask: %x\n",
i,
uc_entry_socks[i].cmd_param,
uc_entry_socks[i].src_port,
uc_entry_socks[i].dst_port,
uc_entry_socks[i].ipa_sockv5_mask);
cnt += nbytes;
if (uc_entry_socks[i].cmd_param ==
IPA_SOCKsv5_ADD_V6_V4_COM_PM) {
socks_iphdr =
&uc_entry_socks[i].ip_hdr.ipv4_rsv;
nbytes = scnprintf(dbg_buff + cnt,
IPA_MAX_MSG_LEN,
"ipv4_src_addr: 0x%X\n"
"ipv4_dst_addr: 0x%X\n",
socks_iphdr->ipv4_temp.saddr,
socks_iphdr->ipv4_temp.daddr);
cnt += nbytes;
} else {
socks_ipv6hdr =
&uc_entry_socks[i].ip_hdr.ipv6_temp;
nbytes = scnprintf(dbg_buff + cnt,
IPA_MAX_MSG_LEN,
"ipv6_src_addr[0]: 0x%X\n"
"ipv6_src_addr[1]: 0x%X\n"
"ipv6_src_addr[2]: 0x%X\n"
"ipv6_src_addr[3]: 0x%X\n"
"ipv6_dts_addr[0]: 0x%X\n"
"ipv6_dts_addr[1]: 0x%X\n"
"ipv6_dts_addr[2]: 0x%X\n"
"ipv6_dts_addr[3]: 0x%X\n",
socks_ipv6hdr->saddr.s6_addr32[0],
socks_ipv6hdr->saddr.s6_addr32[1],
socks_ipv6hdr->saddr.s6_addr32[2],
socks_ipv6hdr->saddr.s6_addr32[3],
socks_ipv6hdr->daddr.s6_addr32[0],
socks_ipv6hdr->daddr.s6_addr32[1],
socks_ipv6hdr->daddr.s6_addr32[2],
socks_ipv6hdr->daddr.s6_addr32[3]);
cnt += nbytes;
}
}
}
mutex_unlock(&ipa3_ctx->act_tbl_lock);
done:
return simple_read_from_buffer(ubuf, count, ppos, dbg_buff, cnt);
}
static const struct ipa3_debugfs_file debugfs_files[] = {
{
"gen_reg", IPA_READ_ONLY_MODE, NULL, {
@@ -2811,7 +2930,11 @@ static const struct ipa3_debugfs_file debugfs_files[] = {
"app_clk_vote_cnt", IPA_READ_ONLY_MODE, NULL, {
.read = ipa3_read_app_clk_vote,
}
},
}, {
"uc_act_table", IPA_READ_ONLY_MODE, NULL, {
.read = ipa3_read_uc_act_tbl,
}
}
};
void ipa3_debugfs_pre_init(void)

11
drivers/platform/msm/ipa/ipa_v3/ipa_i.h
View File

@@ -2022,6 +2022,8 @@ struct ipa3_context {
bool uc_act_tbl_valid;
struct mutex act_tbl_lock;
int uc_act_tbl_total;
int uc_act_tbl_socksv5_total;
int uc_act_tbl_ipv6_nat_total;
int uc_act_tbl_next_index;
bool manual_fw_load;
};
@@ -2419,6 +2421,15 @@ int ipa3_add_socksv5_conn(struct ipa_socksv5_info *info);
int ipa3_del_socksv5_conn(uint32_t handle);
int ipa3_add_socksv5_conn_usr(struct ipa_kernel_tests_socksv5_uc_tmpl *tmpl);
int ipa3_add_ipv6_nat_uc_activation_entry(
struct ipa_ioc_ipv6_nat_uc_act_entry *entry);
int ipa3_del_ipv6_nat_uc_activation_entry(uint16_t index);
int ipa3_del_uc_act_entry(uint16_t index);
/*
* Header removal / addition
*/

4
drivers/platform/msm/ipa/ipa_v3/ipa_odl.c
View File

@@ -627,7 +627,9 @@ static long ipa_adpl_ioctl(struct file *filp,
switch (cmd) {
case IPA_IOC_ODL_GET_AGG_BYTE_LIMIT:
odl_pipe_info.agg_byte_limit =
ipa3_odl_ctx->odl_sys_param.ipa_ep_cfg.aggr.aggr_byte_limit;
/*Modem expecting value in bytes. so passing 15 = 15*1024*/
(ipa3_odl_ctx->odl_sys_param.ipa_ep_cfg.aggr.aggr_byte_limit *
1024);
if (copy_to_user((void __user *)arg, &odl_pipe_info,
sizeof(odl_pipe_info))) {
retval = -EFAULT;

2
drivers/platform/msm/ipa/ipa_v3/ipa_odl.h
View File

@@ -13,7 +13,7 @@
#ifndef _IPA3_ODL_H_
#define _IPA3_ODL_H_
#define IPA_ODL_AGGR_BYTE_LIMIT (15 * 1024)
#define IPA_ODL_AGGR_BYTE_LIMIT 15
#define IPA_ODL_RX_RING_SIZE 192
#define MAX_QUEUE_TO_ODL 1024
#define CONFIG_SUCCESS 1

48
drivers/platform/msm/ipa/ipa_v3/ipa_rt.c
View File

@@ -86,14 +86,16 @@ static int ipa_generate_rt_hw_rule(enum ipa_ip_type ip,
if (entry->hdr) {
hdr_entry = ipa3_id_find(entry->rule.hdr_hdl);
if (!hdr_entry || hdr_entry->cookie != IPA_HDR_COOKIE) {
if (!hdr_entry || (hdr_entry->cookie != IPA_HDR_COOKIE) ||
ipa3_check_idr_if_freed(entry->hdr)) {
IPAERR_RL("Header entry already deleted\n");
return -EPERM;
}
} else if (entry->proc_ctx) {
hdr_proc_entry = ipa3_id_find(entry->rule.hdr_proc_ctx_hdl);
if (!hdr_proc_entry ||
hdr_proc_entry->cookie != IPA_PROC_HDR_COOKIE) {
(hdr_proc_entry->cookie != IPA_PROC_HDR_COOKIE) ||
ipa3_check_idr_if_freed(entry->proc_ctx)) {
IPAERR_RL("Proc header entry already deleted\n");
return -EPERM;
}
@@ -1767,18 +1769,19 @@ int __ipa3_del_rt_rule(u32 rule_hdl)
hdr_entry = ipa3_id_find(entry->rule.hdr_hdl);
if (!hdr_entry || hdr_entry->cookie != IPA_HDR_COOKIE) {
IPAERR_RL("Header entry already deleted\n");
return -EINVAL;
entry->hdr = NULL;
}
} else if (entry->proc_ctx) {
hdr_proc_entry = ipa3_id_find(entry->rule.hdr_proc_ctx_hdl);
if (!hdr_proc_entry ||
hdr_proc_entry->cookie != IPA_PROC_HDR_COOKIE) {
IPAERR_RL("Proc header entry already deleted\n");
return -EINVAL;
entry->proc_ctx = NULL;
}
}
if (entry->hdr)
if (entry->hdr &&
(!ipa3_check_idr_if_freed(entry->hdr)))
__ipa3_release_hdr(entry->hdr->id);
else if (entry->proc_ctx &&
(!ipa3_check_idr_if_freed(entry->proc_ctx)))
@@ -1955,7 +1958,6 @@ int ipa3_reset_rt(enum ipa_ip_type ip, bool user_only)
if (!user_only ||
rule->ipacm_installed) {
list_del(&rule->link);
if (rule->hdr) {
hdr_entry = ipa3_id_find(
rule->rule.hdr_hdl);
@@ -1963,8 +1965,7 @@ int ipa3_reset_rt(enum ipa_ip_type ip, bool user_only)
hdr_entry->cookie != IPA_HDR_COOKIE) {
IPAERR_RL(
"Header already deleted\n");
mutex_unlock(&ipa3_ctx->lock);
return -EINVAL;
rule->hdr = NULL;
}
} else if (rule->proc_ctx) {
hdr_proc_entry =
@@ -1975,12 +1976,13 @@ int ipa3_reset_rt(enum ipa_ip_type ip, bool user_only)
IPA_PROC_HDR_COOKIE) {
IPAERR_RL(
"Proc entry already deleted\n");
mutex_unlock(&ipa3_ctx->lock);
return -EINVAL;
rule->proc_ctx = NULL;
}
}
tbl->rule_cnt--;
if (rule->hdr)
list_del(&rule->link);
if (rule->hdr &&
(!ipa3_check_idr_if_freed(rule->hdr)))
__ipa3_release_hdr(rule->hdr->id);
else if (rule->proc_ctx &&
(!ipa3_check_idr_if_freed(
@@ -2157,20 +2159,8 @@ static int __ipa_mdfy_rt_rule(struct ipa_rt_rule_mdfy_i *rtrule)
struct ipa3_hdr_entry *hdr_entry;
struct ipa3_hdr_proc_ctx_entry *hdr_proc_entry;
if (rtrule->rule.hdr_hdl) {
hdr = ipa3_id_find(rtrule->rule.hdr_hdl);
if ((hdr == NULL) || (hdr->cookie != IPA_HDR_COOKIE)) {
IPAERR_RL("rt rule does not point to valid hdr\n");
goto error;
}
} else if (rtrule->rule.hdr_proc_ctx_hdl) {
proc_ctx = ipa3_id_find(rtrule->rule.hdr_proc_ctx_hdl);
if ((proc_ctx == NULL) ||
(proc_ctx->cookie != IPA_PROC_HDR_COOKIE)) {
IPAERR_RL("rt rule does not point to valid proc ctx\n");
goto error;
}
}
if (__ipa_rt_validate_hndls(&rtrule->rule, &hdr, &proc_ctx))
goto error;
entry = ipa3_id_find(rtrule->rt_rule_hdl);
if (entry == NULL) {
@@ -2193,14 +2183,16 @@ static int __ipa_mdfy_rt_rule(struct ipa_rt_rule_mdfy_i *rtrule)
if (entry->hdr) {
hdr_entry = ipa3_id_find(entry->rule.hdr_hdl);
if (!hdr_entry || hdr_entry->cookie != IPA_HDR_COOKIE) {
if (!hdr_entry || (hdr_entry->cookie != IPA_HDR_COOKIE) ||
ipa3_check_idr_if_freed(entry->hdr)) {
IPAERR_RL("Header entry already deleted\n");
return -EPERM;
}
} else if (entry->proc_ctx) {
hdr_proc_entry = ipa3_id_find(entry->rule.hdr_proc_ctx_hdl);
if (!hdr_proc_entry ||
hdr_proc_entry->cookie != IPA_PROC_HDR_COOKIE) {
(hdr_proc_entry->cookie != IPA_PROC_HDR_COOKIE) ||
ipa3_check_idr_if_freed(entry->proc_ctx)) {
IPAERR_RL("Proc header entry already deleted\n");
return -EPERM;
}
@@ -2208,7 +2200,7 @@ static int __ipa_mdfy_rt_rule(struct ipa_rt_rule_mdfy_i *rtrule)
if (entry->hdr)
entry->hdr->ref_cnt--;
if (entry->proc_ctx)
else if (entry->proc_ctx)
entry->proc_ctx->ref_cnt--;
entry->rule = rtrule->rule;

464
drivers/platform/msm/ipa/ipa_v3/ipa_utils.c
View File

@@ -9150,6 +9150,213 @@ int ipa3_setup_uc_act_tbl(void)
return res;
}
static inline bool is_free_socksv5(struct ipa_socksv5_uc_tmpl *socksv5_entry)
{
if ((!socksv5_entry->cmd_id) ||
(socksv5_entry->cmd_id == IPA_SOCKsv5_ADD_COM_ID &&
!(socksv5_entry->ipa_sockv5_mask & IPA_SOCKSv5_ENTRY_VALID)))
return true;
return false;
}
static int ipa3_get_free_uc_act_entry(void)
{
struct ipa_socksv5_uc_tmpl *entry;
int orig_index = ipa3_ctx->uc_act_tbl_next_index;
int free_index = -1;
IPADBG("\n");
/* find a free spot*/
do {
entry = ipa3_ctx->uc_act_tbl.base +
ipa3_ctx->uc_act_tbl_next_index
* sizeof(struct ipa_socksv5_uc_tmpl);
/* check if entry is free */
if (is_free_socksv5(entry)) {
free_index = ipa3_ctx->uc_act_tbl_next_index;
IPADBG("found free index at %d\n", free_index);
break;
}
ipa3_ctx->uc_act_tbl_next_index++;
ipa3_ctx->uc_act_tbl_next_index %=
IPA_UC_ACT_TBL_SIZE;
} while (orig_index != ipa3_ctx->uc_act_tbl_next_index);
IPADBG("exit free_index %d\n", free_index);
return free_index;
}
int ipa3_add_ipv6_nat_uc_activation_entry(
struct ipa_ioc_ipv6_nat_uc_act_entry *entry)
{
int res = 0;
int index;
struct ipa_ipv6_nat_uc_tmpl *uc_entry;
/* IPA version check */
if (ipa3_ctx->ipa_hw_type < IPA_HW_v4_5) {
IPAERR("Not support !\n");
return -EPERM;
}
if (!ipa3_ctx->uc_act_tbl_valid) {
IPAERR("uC act tbl wasn't allocated\n");
return -ENOENT;
}
if (!entry) {
IPAERR("Null entry\n");
return -EIO;
}
if (!entry->private_address_lsb || !entry->private_address_msb
|| !entry->public_address_lsb || !entry->public_address_msb
|| !entry->private_port || !entry->public_port) {
IPAERR("0 param 0x%llX 0x%llX 0x%llX 0x%llX %d %d\n",
entry->private_address_lsb, entry->private_address_msb,
entry->public_address_lsb, entry->public_address_msb,
entry->private_port, entry->public_port);
return -EFAULT;
}
mutex_lock(&ipa3_ctx->act_tbl_lock);
/* check the left # of entries */
if (ipa3_ctx->uc_act_tbl_total
>= IPA_UC_ACT_TBL_SIZE) {
IPAERR("uc act tbl is full!\n");
res = -EFAULT;
goto error;
}
index = ipa3_get_free_uc_act_entry();
uc_entry = (struct ipa_ipv6_nat_uc_tmpl *)(ipa3_ctx->uc_act_tbl.base +
index * sizeof(struct ipa_ipv6_nat_uc_tmpl));
uc_entry->private_address_lsb = entry->private_address_lsb;
uc_entry->private_address_msb = entry->private_address_msb;
uc_entry->public_address_lsb = entry->public_address_lsb;
uc_entry->public_address_msb = entry->public_address_msb;
uc_entry->private_port = entry->private_port;
uc_entry->public_port = entry->public_port;
uc_entry->cmd_id = IPA_IPv6_NAT_COM_ID;
/* set output index */
entry->index = (uint16_t)index;
ipa3_ctx->uc_act_tbl_total++;
ipa3_ctx->uc_act_tbl_ipv6_nat_total++;
if (ipa3_ctx->uc_act_tbl_total < IPA_UC_ACT_TBL_SIZE) {
/*
* find next free spot, this function shall update
* uc_act_tbl_next_index
*/
index = ipa3_get_free_uc_act_entry();
if (index < 0) {
/* set to max tbl size to debug */
IPAERR("can't find available spot!\n");
ipa3_ctx->uc_act_tbl_total = IPA_UC_ACT_TBL_SIZE;
res = -EFAULT;
}
}
error:
mutex_unlock(&ipa3_ctx->act_tbl_lock);
return res;
}
int ipa3_del_uc_act_entry(uint16_t index)
{
struct ipa_ipv6_nat_uc_tmpl *uc_entry;
uint16_t cmd_id;
/* IPA version check */
if (ipa3_ctx->ipa_hw_type < IPA_HW_v4_5) {
IPAERR_RL("Not support !\n");
return -EPERM;
}
if (!ipa3_ctx->uc_act_tbl_valid) {
IPAERR_RL("uC act tbl haven't allocated\n");
return -ENOENT;
}
if (index > IPA_UC_ACT_TBL_SIZE || index < 0) {
IPAERR_RL("invalid index!\n");
return -EINVAL;
}
if (!ipa3_ctx->uc_act_tbl_total) {
IPAERR_RL(
"invalid handle, no uc activation entries in table (total %d)\n"
, ipa3_ctx->uc_act_tbl_total);
return -EINVAL;
}
uc_entry = (struct ipa_ipv6_nat_uc_tmpl *)(ipa3_ctx->uc_act_tbl.base +
index * sizeof(struct ipa_ipv6_nat_uc_tmpl));
mutex_lock(&ipa3_ctx->act_tbl_lock);
cmd_id = uc_entry->cmd_id;
mutex_unlock(&ipa3_ctx->act_tbl_lock);
if (cmd_id == IPA_IPv6_NAT_COM_ID)
return ipa3_del_ipv6_nat_uc_activation_entry(index);
else
return ipa3_del_socksv5_conn(index);
}
int ipa3_del_ipv6_nat_uc_activation_entry(uint16_t index)
{
struct ipa_ipv6_nat_uc_tmpl *uc_entry;
int res = 0;
/* IPA version check */
if (ipa3_ctx->ipa_hw_type < IPA_HW_v4_5) {
IPAERR_RL("Not support !\n");
return -EPERM;
}
if (!ipa3_ctx->uc_act_tbl_valid) {
IPAERR_RL("uC act tbl haven't allocated\n");
return -ENOENT;
}
if (index > IPA_UC_ACT_TBL_SIZE || index < 0) {
IPAERR_RL("invalid index!\n");
return -EINVAL;
}
if (!ipa3_ctx->uc_act_tbl_ipv6_nat_total) {
IPAERR_RL(
"invalid handle, no IPv6 NAT entries in table (total %d)\n"
, ipa3_ctx->uc_act_tbl_total);
return -EINVAL;
}
uc_entry = (struct ipa_ipv6_nat_uc_tmpl *)(ipa3_ctx->uc_act_tbl.base +
index * sizeof(struct ipa_ipv6_nat_uc_tmpl));
mutex_lock(&ipa3_ctx->act_tbl_lock);
if (uc_entry->cmd_id != IPA_IPv6_NAT_COM_ID) {
IPAERR_RL("entry %d wrong cmd id %d\n", uc_entry->cmd_id);
res = -EFAULT;
goto error;
}
uc_entry->cmd_id = 0;
ipa3_ctx->uc_act_tbl_total--;
ipa3_ctx->uc_act_tbl_ipv6_nat_total--;
IPADBG("free entry %d, nat total %d, left total %d\n",
index,
ipa3_ctx->uc_act_tbl_ipv6_nat_total,
ipa3_ctx->uc_act_tbl_total);
error:
mutex_unlock(&ipa3_ctx->act_tbl_lock);
return res;
}
static void ipa3_socksv5_msg_free_cb(void *buff, u32 len, u32 type)
{
if (!buff) {
@@ -9167,6 +9374,39 @@ static void ipa3_socksv5_msg_free_cb(void *buff, u32 len, u32 type)
kfree(buff);
}
static int ipa3_get_free_socksv5_entry(void)
{
struct ipa_socksv5_uc_tmpl *first;
struct ipa_socksv5_uc_tmpl *next;
int orig_index = ipa3_ctx->uc_act_tbl_next_index;
int free_index = -1;
IPADBG("\n");
/* find a free spot with two contiguous entries*/
do {
first = ipa3_ctx->uc_act_tbl.base +
ipa3_ctx->uc_act_tbl_next_index
* sizeof(struct ipa_socksv5_uc_tmpl);
next = ipa3_ctx->uc_act_tbl.base +
(ipa3_ctx->uc_act_tbl_next_index + 1)
* sizeof(struct ipa_socksv5_uc_tmpl);
/* check if first entry and next entry are free */
if (is_free_socksv5(first) && is_free_socksv5(next)) {
free_index = ipa3_ctx->uc_act_tbl_next_index;
IPADBG("found free index at %d\n", free_index);
break;
}
ipa3_ctx->uc_act_tbl_next_index += 2;
ipa3_ctx->uc_act_tbl_next_index %=
IPA_UC_ACT_TBL_SIZE;
} while (orig_index != ipa3_ctx->uc_act_tbl_next_index);
IPADBG("exit free_index %d\n", free_index);
return free_index;
}
/**
* ipa3_add_socksv5_conn() - IPA add socksv5_conn
*
@@ -9176,8 +9416,8 @@ static void ipa3_socksv5_msg_free_cb(void *buff, u32 len, u32 type)
*/
int ipa3_add_socksv5_conn(struct ipa_socksv5_info *info)
{
int res = 0;
void *rp_va, *wp_va;
int res = 0, index;
void *wp_va;
struct ipa_socksv5_msg *socksv5_msg;
struct ipa_msg_meta msg_meta;
@@ -9198,18 +9438,24 @@ int ipa3_add_socksv5_conn(struct ipa_socksv5_info *info)
}
mutex_lock(&ipa3_ctx->act_tbl_lock);
/* check the left # of entries */
/* check the left # of entries (need at least 2)*/
if (ipa3_ctx->uc_act_tbl_total
>= IPA_UC_ACT_TBL_SIZE) {
>= IPA_UC_ACT_TBL_SIZE - 1) {
IPAERR("uc act tbl is full!\n");
res = -EFAULT;
goto error;
}
index = ipa3_get_free_socksv5_entry();
if (index < 0) {
IPAERR("couldn't find free socksv5 entry\n");
res = -EFAULT;
goto error;
}
/* Copied the act-info to tbl */
wp_va = ipa3_ctx->uc_act_tbl.base +
ipa3_ctx->uc_act_tbl_next_index
* sizeof(struct ipa_socksv5_uc_tmpl);
index * sizeof(struct ipa_socksv5_uc_tmpl);
/* check entry valid */
if ((info->ul_out.cmd_id != IPA_SOCKsv5_ADD_COM_ID)
@@ -9246,9 +9492,10 @@ int ipa3_add_socksv5_conn(struct ipa_socksv5_info *info)
&(info->dl_out), sizeof(info->dl_out));
/* set output handle */
info->handle = (uint16_t) ipa3_ctx->uc_act_tbl_next_index;
info->handle = (uint16_t) index;
ipa3_ctx->uc_act_tbl_total += 2;
ipa3_ctx->uc_act_tbl_socksv5_total += 2;
/* send msg to ipacm */
socksv5_msg = kzalloc(sizeof(*socksv5_msg), GFP_KERNEL);
@@ -9261,9 +9508,9 @@ int ipa3_add_socksv5_conn(struct ipa_socksv5_info *info)
memcpy(&(socksv5_msg->dl_in), &(info->dl_in), sizeof(info->dl_in));
socksv5_msg->handle = info->handle;
socksv5_msg->ul_in.index =
(uint16_t) ipa3_ctx->uc_act_tbl_next_index;
(uint16_t) index;
socksv5_msg->dl_in.index =
(uint16_t) ipa3_ctx->uc_act_tbl_next_index + 1;
(uint16_t) index + 1;
memset(&msg_meta, 0, sizeof(struct ipa_msg_meta));
msg_meta.msg_type = IPA_SOCKV5_ADD;
@@ -9276,27 +9523,14 @@ int ipa3_add_socksv5_conn(struct ipa_socksv5_info *info)
goto error;
}
if (ipa3_ctx->uc_act_tbl_total < IPA_UC_ACT_TBL_SIZE) {
/* find next free spot */
do {
ipa3_ctx->uc_act_tbl_next_index += 2;
ipa3_ctx->uc_act_tbl_next_index %=
IPA_UC_ACT_TBL_SIZE;
if (ipa3_ctx->uc_act_tbl_total < IPA_UC_ACT_TBL_SIZE - 1) {
/*
* find next free spot, this function shall update
* uc_act_tbl_next_index
*/
index = ipa3_get_free_socksv5_entry();
rp_va = ipa3_ctx->uc_act_tbl.base +
ipa3_ctx->uc_act_tbl_next_index
* sizeof(struct ipa_socksv5_uc_tmpl);
if (!((((struct ipa_socksv5_uc_tmpl *) rp_va)->
ipa_sockv5_mask) & IPA_SOCKSv5_ENTRY_VALID)) {
IPADBG("next available entry %d, total %d\n",
ipa3_ctx->uc_act_tbl_next_index,
ipa3_ctx->uc_act_tbl_total);
break;
}
} while (rp_va != wp_va);
if (rp_va == wp_va) {
if (index < 0) {
/* set to max tbl size to debug */
IPAERR("can't find available spot!\n");
ipa3_ctx->uc_act_tbl_total = IPA_UC_ACT_TBL_SIZE;
@@ -9308,6 +9542,127 @@ error:
mutex_unlock(&ipa3_ctx->act_tbl_lock);
return res;
}
/*
* ipa3_add_socksv5_conn_usr() - IPA copy and add socksv5 conn
*
* Returns: 0 on success, negative on failure
*
* Note : Should not be called from atomic context
*/
int ipa3_add_socksv5_conn_usr(struct ipa_kernel_tests_socksv5_uc_tmpl *tmpl)
{
struct ipa_socksv5_info info;
int retval = 0;
memset(&info, 0, sizeof(struct ipa_socksv5_info));
if (tmpl->direction == 0) { /* DL */
info.dl_out.cmd_id = tmpl->cmd_id;
info.dl_out.cmd_param = tmpl->cmd_param;
info.dl_out.ip_hdr.ipv6_temp.version = 6;
info.dl_out.ip_hdr.ipv6_temp.nexthdr = 6;
info.dl_out.ip_hdr.ipv6_temp.saddr.s6_addr32[0] =
tmpl->ipv6_src_addr[0];
info.dl_out.ip_hdr.ipv6_temp.saddr.s6_addr32[1] =
tmpl->ipv6_src_addr[1];
info.dl_out.ip_hdr.ipv6_temp.saddr.s6_addr32[2] =
tmpl->ipv6_src_addr[2];
info.dl_out.ip_hdr.ipv6_temp.saddr.s6_addr32[3] =
tmpl->ipv6_src_addr[3];
info.dl_out.ip_hdr.ipv6_temp.daddr.s6_addr32[0] =
tmpl->ipv6_dst_addr[0];
info.dl_out.ip_hdr.ipv6_temp.daddr.s6_addr32[1] =
tmpl->ipv6_dst_addr[1];
info.dl_out.ip_hdr.ipv6_temp.daddr.s6_addr32[2] =
tmpl->ipv6_dst_addr[2];
info.dl_out.ip_hdr.ipv6_temp.daddr.s6_addr32[3] =
tmpl->ipv6_dst_addr[3];
info.dl_out.src_port = tmpl->src_port;
info.dl_out.dst_port = tmpl->dst_port;
info.dl_out.ipa_sockv5_mask = tmpl->ipa_sockv5_mask;
info.dl_out.out_irs = tmpl->out_irs;
info.dl_out.out_iss = tmpl->out_iss;
info.dl_out.in_irs = tmpl->in_irs;
info.dl_out.in_iss = tmpl->in_iss;
info.dl_out.out_ircv_tsval = tmpl->out_ircv_tsval;
info.dl_out.in_ircv_tsecr = tmpl->in_ircv_tsecr;
info.dl_out.out_ircv_tsecr = tmpl->out_ircv_tsecr;
info.dl_out.in_ircv_tsval = tmpl->in_ircv_tsval;
info.dl_out.in_isnd_wscale = tmpl->in_isnd_wscale;
info.dl_out.out_isnd_wscale = tmpl->out_isnd_wscale;
info.dl_out.in_ircv_wscale = tmpl->in_ircv_wscale;
info.dl_out.out_ircv_wscale = tmpl->out_ircv_wscale;
/* for UL set default values to pass pair validity check */
info.ul_out.cmd_id = IPA_SOCKsv5_ADD_COM_ID;
info.ul_out.cmd_param = IPA_SOCKsv5_ADD_V6_V4_COM_PM;
} else if (tmpl->direction == 1) { /* UL */
info.ul_out.cmd_id = tmpl->cmd_id;
info.ul_out.cmd_param = tmpl->cmd_param;
if (info.ul_out.cmd_param == IPA_SOCKsv5_ADD_V6_V4_COM_PM) {
info.ul_out.ip_hdr.ipv4_rsv.ipv4_temp.version = 4;
info.ul_out.ip_hdr.ipv4_rsv.ipv4_temp.ihl = 5;
info.ul_out.ip_hdr.ipv4_rsv.ipv4_temp.saddr =
tmpl->ip_src_addr;
info.ul_out.ip_hdr.ipv4_rsv.ipv4_temp.daddr =
tmpl->ip_dst_addr;
info.ul_out.ip_hdr.ipv4_rsv.ipv4_temp.protocol = 6;
}
if (info.ul_out.cmd_param == IPA_SOCKsv5_ADD_V6_V6_COM_PM) {
info.ul_out.ip_hdr.ipv6_temp.version = 6;
info.ul_out.ip_hdr.ipv6_temp.nexthdr = 6;
info.ul_out.ip_hdr.ipv6_temp.saddr.s6_addr32[0] =
tmpl->ipv6_src_addr[0];
info.ul_out.ip_hdr.ipv6_temp.saddr.s6_addr32[1] =
tmpl->ipv6_src_addr[1];
info.ul_out.ip_hdr.ipv6_temp.saddr.s6_addr32[2] =
tmpl->ipv6_src_addr[2];
info.ul_out.ip_hdr.ipv6_temp.saddr.s6_addr32[3] =
tmpl->ipv6_src_addr[3];
info.ul_out.ip_hdr.ipv6_temp.daddr.s6_addr32[0] =
tmpl->ipv6_dst_addr[0];
info.ul_out.ip_hdr.ipv6_temp.daddr.s6_addr32[1] =
tmpl->ipv6_dst_addr[1];
info.ul_out.ip_hdr.ipv6_temp.daddr.s6_addr32[2] =
tmpl->ipv6_dst_addr[2];
info.ul_out.ip_hdr.ipv6_temp.daddr.s6_addr32[3] =
tmpl->ipv6_dst_addr[3];
}
info.ul_out.src_port = tmpl->src_port;
info.ul_out.dst_port = tmpl->dst_port;
info.ul_out.ipa_sockv5_mask = tmpl->ipa_sockv5_mask;
info.ul_out.out_irs = tmpl->out_irs;
info.ul_out.out_iss = tmpl->out_iss;
info.ul_out.in_irs = tmpl->in_irs;
info.ul_out.in_iss = tmpl->in_iss;
info.ul_out.out_ircv_tsval = tmpl->out_ircv_tsval;
info.ul_out.in_ircv_tsecr = tmpl->in_ircv_tsecr;
info.ul_out.out_ircv_tsecr = tmpl->out_ircv_tsecr;
info.ul_out.in_ircv_tsval = tmpl->in_ircv_tsval;
info.ul_out.in_isnd_wscale = tmpl->in_isnd_wscale;
info.ul_out.out_isnd_wscale = tmpl->out_isnd_wscale;
info.ul_out.in_ircv_wscale = tmpl->in_ircv_wscale;
info.ul_out.out_ircv_wscale = tmpl->out_ircv_wscale;
/* for DL set default values to pass pair validity check */
info.dl_out.cmd_param = IPA_SOCKsv5_ADD_V4_V6_COM_PM;
info.dl_out.cmd_id = IPA_SOCKsv5_ADD_COM_ID;
} else {
IPAERR("invalid socksv5 direction: %d\n", tmpl->direction);
return -EINVAL;
}
retval = ipa3_add_socksv5_conn(&info);
if (retval) {
IPAERR("ipa3_add_socksv5_conn failed retval: %d\n", retval);
return retval;
}
/* save uc handle */
tmpl->handle = info.handle;
return retval;
}
/**
* ipa3_del_socksv5_conn() - IPA add socksv5_conn
@@ -9319,9 +9674,9 @@ error:
int ipa3_del_socksv5_conn(uint32_t handle)
{
int res = 0;
void *rp_va;
uint32_t *socksv5_handle;
struct ipa_msg_meta msg_meta;
struct ipa_socksv5_uc_tmpl *entry, *next;
/* IPA version check */
if (ipa3_ctx->ipa_hw_type < IPA_HW_v4_5) {
@@ -9339,43 +9694,44 @@ int ipa3_del_socksv5_conn(uint32_t handle)
return -EINVAL;
}
if ((handle % 2) != 0) {
IPAERR("invalid handle!\n");
if (ipa3_ctx->uc_act_tbl_socksv5_total < 2) {
IPAERR("invalid handle, tbl doesn't have socksv5 entries!\n");
return -EINVAL;
}
if (ipa3_ctx->uc_act_tbl_total < 2) {
IPAERR("invalid handle, all tbl is empty!\n");
return -EINVAL;
}
rp_va = ipa3_ctx->uc_act_tbl.base +
handle * sizeof(struct ipa_socksv5_uc_tmpl);
entry = (struct ipa_socksv5_uc_tmpl *)(ipa3_ctx->uc_act_tbl.base +
handle * sizeof(struct ipa_socksv5_uc_tmpl));
next = (struct ipa_socksv5_uc_tmpl *)(ipa3_ctx->uc_act_tbl.base +
(handle + 1) * sizeof(struct ipa_socksv5_uc_tmpl));
/* check entry is valid or not */
mutex_lock(&ipa3_ctx->act_tbl_lock);
if (!((((struct ipa_socksv5_uc_tmpl *) rp_va)->
ipa_sockv5_mask) & IPA_SOCKSv5_ENTRY_VALID)) {
IPADBG(" entry %d already free\n", handle);
if (entry->cmd_id != IPA_SOCKsv5_ADD_COM_ID) {
IPAERR(" entry %d not socksv5\n", handle);
res = -EINVAL;
goto error;
}
if (!((((struct ipa_socksv5_uc_tmpl *) (rp_va +
sizeof(struct ipa_socksv5_uc_tmpl)))->
ipa_sockv5_mask) & IPA_SOCKSv5_ENTRY_VALID)) {
IPADBG(" entry %d already free\n", handle);
if (next->cmd_id != IPA_SOCKsv5_ADD_COM_ID) {
IPAERR(" entry %d not socksv5\n", handle + 1);
res = -EINVAL;
goto error;
}
if (!(entry->ipa_sockv5_mask & IPA_SOCKSv5_ENTRY_VALID))
IPADBG(" entry %d already free\n", handle);
((struct ipa_socksv5_uc_tmpl *) rp_va)->ipa_sockv5_mask
&= ~IPA_SOCKSv5_ENTRY_VALID;
((struct ipa_socksv5_uc_tmpl *) (rp_va +
sizeof(struct ipa_socksv5_uc_tmpl)))->ipa_sockv5_mask
&= ~IPA_SOCKSv5_ENTRY_VALID;
if (!(next->ipa_sockv5_mask & IPA_SOCKSv5_ENTRY_VALID))
IPADBG(" entry %d already free\n", handle);
entry->ipa_sockv5_mask &= ~IPA_SOCKSv5_ENTRY_VALID;
next->ipa_sockv5_mask &= ~IPA_SOCKSv5_ENTRY_VALID;
ipa3_ctx->uc_act_tbl_total -= 2;
ipa3_ctx->uc_act_tbl_socksv5_total -= 2;
IPADBG("free entry %d and %d, left total %d\n",
IPADBG("free entry %d and %d, left total %d, socksv5 total %d\n",
handle,
handle + 1,
ipa3_ctx->uc_act_tbl_total);
ipa3_ctx->uc_act_tbl_total,
ipa3_ctx->uc_act_tbl_socksv5_total);
/* send msg to ipacm */
socksv5_handle = kzalloc(sizeof(*socksv5_handle), GFP_KERNEL);

13
drivers/platform/msm/qcom-geni-se.c
View File

@@ -505,9 +505,12 @@ static int geni_se_select_dma_mode(void __iomem *base)
geni_write_reg(0xFFFFFFFF, base, SE_IRQ_EN);
common_geni_m_irq_en = geni_read_reg(base, SE_GENI_M_IRQ_EN);
if (proto != UART)
if (proto != UART) {
common_geni_m_irq_en &=
~(M_TX_FIFO_WATERMARK_EN | M_RX_FIFO_WATERMARK_EN);
if (proto != I3C)
common_geni_m_irq_en &= ~M_CMD_DONE_EN;
}
geni_write_reg(common_geni_m_irq_en, base, SE_GENI_M_IRQ_EN);
geni_dma_mode = geni_read_reg(base, SE_GENI_DMA_MODE_EN);
@@ -626,6 +629,14 @@ EXPORT_SYMBOL(geni_setup_s_cmd);
*/
void geni_cancel_m_cmd(void __iomem *base)
{
unsigned int common_geni_m_irq_en;
int proto = get_se_proto(base);
if (proto != UART && proto != I3C) {
common_geni_m_irq_en = geni_read_reg(base, SE_GENI_M_IRQ_EN);
common_geni_m_irq_en &= ~M_CMD_DONE_EN;
geni_write_reg(common_geni_m_irq_en, base, SE_GENI_M_IRQ_EN);
}
geni_write_reg(M_GENI_CMD_CANCEL, base, SE_GENI_M_CMD_CTRL_REG);
}
EXPORT_SYMBOL(geni_cancel_m_cmd);

4
drivers/power/supply/qcom/smb-lib.c
View File

@@ -725,6 +725,7 @@ static void smblib_uusb_removal(struct smb_charger *chg)
vote(chg->pl_enable_votable_indirect, USBIN_V_VOTER, false, 0);
vote(chg->usb_icl_votable, SW_QC3_VOTER, false, 0);
vote(chg->hvdcp_hw_inov_dis_votable, OV_VOTER, false, 0);
vote(chg->usb_icl_votable, USBIN_USBIN_BOOST_VOTER, false, 0);
cancel_delayed_work_sync(&chg->hvdcp_detect_work);
@@ -1718,6 +1719,8 @@ int smblib_vbus_regulator_enable(struct regulator_dev *rdev)
rc = _smblib_vbus_regulator_enable(rdev);
if (rc >= 0)
chg->otg_en = true;
else
vote(chg->usb_icl_votable, USBIN_USBIN_BOOST_VOTER, false, 0);
unlock:
mutex_unlock(&chg->otg_oc_lock);
@@ -4390,6 +4393,7 @@ static void smblib_handle_typec_removal(struct smb_charger *chg)
vote(chg->pl_enable_votable_indirect, USBIN_V_VOTER, false, 0);
vote(chg->awake_votable, PL_DELAY_VOTER, false, 0);
vote(chg->usb_icl_votable, USBIN_USBIN_BOOST_VOTER, false, 0);
chg->vconn_attempts = 0;
chg->otg_attempts = 0;
chg->pulse_cnt = 0;

2
drivers/power/supply/qcom/smb1398-charger.c
View File

@@ -1755,7 +1755,7 @@ static void smb1398_taper_work(struct work_struct *work)
struct smb1398_chip *chip = container_of(work,
struct smb1398_chip, taper_work);
union power_supply_propval pval = {0};
int rc, fcc_ua, fv_uv, stepper_ua, main_fcc_ua, min_ilim_ua;
int rc, fcc_ua, fv_uv, stepper_ua, main_fcc_ua = 0, min_ilim_ua;
bool slave_en;
if (!is_psy_voter_available(chip))

20
drivers/rpmsg/rpm-smd.c
View File

@@ -707,6 +707,24 @@ static struct msm_rpm_driver_data msm_rpm_data = {
.smd_open = COMPLETION_INITIALIZER(msm_rpm_data.smd_open),
};
static int trysend_count = 20;
module_param(trysend_count, int, 0664);
static int msm_rpm_trysend_smd_buffer(char *buf, uint32_t size)
{
int ret;
int count = 0;
do {
ret = rpmsg_trysend(rpm->rpm_channel, buf, size);
if (!ret)
break;
udelay(10);
count++;
} while (count < trysend_count);
return ret;
}
static int msm_rpm_flush_requests(bool print)
{
struct rb_node *t;
@@ -724,7 +742,7 @@ static int msm_rpm_flush_requests(bool print)
set_msg_id(s->buf, msm_rpm_get_next_msg_id());
ret = rpmsg_send(rpm->rpm_channel, s->buf, get_buf_len(s->buf));
ret = msm_rpm_trysend_smd_buffer(s->buf, get_buf_len(s->buf));
WARN_ON(ret != 0);
trace_rpm_smd_send_sleep_set(get_msg_id(s->buf), type, id);

4
drivers/soc/qcom/hgsl/hgsl.c
View File

@@ -31,7 +31,9 @@
#define HGSL_DEVICE_NAME "hgsl"
#define HGSL_DEV_NUM 1
#define MAX_DB_QUEUE 4
/* Support upto 3 GVMs: 3 DBQs(Low/Medium/High priority) per GVM */
#define MAX_DB_QUEUE 9
#define IORESOURCE_HWINF "hgsl_reg_hwinf"
#define IORESOURCE_GMUCX "hgsl_reg_gmucx"

6
drivers/staging/android/ion/ion_system_heap.c
View File

@@ -2,7 +2,7 @@
* drivers/staging/android/ion/ion_system_heap.c
*
* Copyright (C) 2011 Google, Inc.
* Copyright (c) 2011-2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2011-2020, The Linux Foundation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -423,11 +423,13 @@ err_free_sg2:
buffer->private_flags |= ION_PRIV_FLAG_SHRINKER_FREE;
if (vmid > 0)
ion_hyp_unassign_sg(table, &vmid, 1, true, false);
if (ion_hyp_unassign_sg(table, &vmid, 1, true, false))
goto err_free_table_sync;
for_each_sg(table->sgl, sg, table->nents, i)
free_buffer_page(sys_heap, buffer, sg_page(sg),
get_order(sg->length));
err_free_table_sync:
if (nents_sync)
sg_free_table(&table_sync);
err_free_sg:

35
drivers/staging/fw-api/fw/htt.h
View File

@@ -205,9 +205,10 @@
* 3.81 Add ppdu_start_tsf field in HTT_TX_WBM_COMPLETION_V2.
* 3.82 Add WIN_SIZE field to HTT_T2H_MSG_TYPE_RX_DELBA msg.
* 3.83 Shrink seq_idx field in HTT PPDU ID from 3 bits to 2.
* 3.84 Add fisa_control_bits_v2 def.
*/
#define HTT_CURRENT_VERSION_MAJOR 3
#define HTT_CURRENT_VERSION_MINOR 83
#define HTT_CURRENT_VERSION_MINOR 84
#define HTT_NUM_TX_FRAG_DESC 1024
@@ -6054,6 +6055,10 @@ PREPACK struct htt_h2t_msg_type_fisa_config_t {
* [17:0]
*/
union {
/*
* fisa_control_bits structure is deprecated.
* Please use fisa_control_bits_v2 going forward.
*/
struct {
A_UINT32 fisa_enable: 1,
ipsec_skip_search: 1,
@@ -6072,6 +6077,11 @@ PREPACK struct htt_h2t_msg_type_fisa_config_t {
fisa_aggr_limit: 4,
reserved: 14;
} fisa_control_bits;
struct {
A_UINT32 fisa_enable: 1,
fisa_aggr_limit: 4,
reserved: 27;
} fisa_control_bits_v2;
A_UINT32 fisa_control_value;
} u_fisa_control;
@@ -6277,6 +6287,29 @@ PREPACK struct htt_h2t_msg_type_fisa_config_t {
((_var) |= ((_val) << HTT_RX_FISA_CONFIG_FISA_AGGR_LIMIT_S)); \
} while (0)
/* Dword 1: fisa_control_value fisa config */
#define HTT_RX_FISA_CONFIG_FISA_V2_ENABLE_M 0x00000001
#define HTT_RX_FISA_CONFIG_FISA_V2_ENABLE_S 0
#define HTT_RX_FISA_CONFIG_FISA_V2_ENABLE_GET(_var) \
(((_var) & HTT_RX_FISA_CONFIG_FISA_V2_ENABLE_M) >> \
HTT_RX_FISA_CONFIG_FISA_V2_ENABLE_S)
#define HTT_RX_FISA_CONFIG_FISA_V2_ENABLE_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_RX_FISA_CONFIG_FISA_V2_ENABLE, _val); \
((_var) |= ((_val) << HTT_RX_FISA_CONFIG_FISA_V2_ENABLE_S)); \
} while (0)
/* Dword 1: fisa_control_value fisa_aggr_limit */
#define HTT_RX_FISA_CONFIG_FISA_V2_AGGR_LIMIT_M 0x0000001e
#define HTT_RX_FISA_CONFIG_FISA_V2_AGGR_LIMIT_S 1
#define HTT_RX_FISA_CONFIG_FISA_V2_AGGR_LIMIT_GET(_var) \
(((_var) & HTT_RX_FISA_CONFIG_FISA_V2_AGGR_LIMIT_M) >> \
HTT_RX_FISA_CONFIG_FISA_V2_AGGR_LIMIT_S)
#define HTT_RX_FISA_CONFIG_FISA_V2_AGGR_LIMIT_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_RX_FISA_CONFIG_FISA_V2_AGGR_LIMIT, _val); \
((_var) |= ((_val) << HTT_RX_FISA_CONFIG_FISA_V2_AGGR_LIMIT_S)); \
} while (0)
PREPACK struct htt_h2t_msg_rx_fse_setup_t {
A_UINT32 msg_type:8, /* HTT_H2T_MSG_TYPE_RX_FSE_SETUP_CFG */

78
drivers/staging/fw-api/fw/wmi_unified.h
View File

@@ -8052,8 +8052,14 @@ typedef struct {
A_UINT32 center_freq1;
/** msecs the radio is awake (32 bits number accruing over time) */
A_UINT32 radio_awake_time;
/** msecs the CCA register is busy (32 bits number accruing over time) */
/** msecs the CCA register is busy (32 bits number accruing over time)
* Includes rx_time but not tx_time.
*/
A_UINT32 cca_busy_time;
/** msecs the radio is transmitting (32 bits number accruing over time) */
A_UINT32 tx_time;
/** msecs the radio is in active receive (32 bits number accruing over time) */
A_UINT32 rx_time;
} wmi_channel_stats;
/*
@@ -9638,6 +9644,12 @@ typedef struct {
* of assoc request/response
*/
#define WMI_UNIFIED_VDEV_START_LDPC_RX_ENABLED (1<<3)
/** Indicates HW encryption is disabled, and SW encryption is enabled.
* If This flag is set, indicates that HW encryption will be disabled
* and SW encryption will be enabled.
* If SW encryption is enabled, key plumbing will not happen in FW.
*/
#define WMI_UNIFIED_VDEV_START_HW_ENCRYPTION_DISABLED (1<<4)
/* BSS color 0-6 */
#define WMI_HEOPS_COLOR_GET_D2(he_ops) WMI_GET_BITS(he_ops, 0, 6)
@@ -14529,6 +14541,30 @@ typedef struct {
A_UINT32 btk[ROAM_OFFLOAD_BTK_BYTES>>2]; /* BTK offload. As this 4 byte aligned, we don't declare it as tlv array */
} wmi_roam_ese_offload_tlv_param;
typedef enum {
WMI_BL_REASON_NUD_FAILURE = 1,
WMI_BL_REASON_STA_KICKOUT,
WMI_BL_REASON_ROAM_HO_FAILURE,
/* Assoc resp with status code 71 - POOR RSSI CONDITIONS */
WMI_BL_REASON_ASSOC_REJECT_POOR_RSSI,
/* Assoc resp with status code 34 - DENIED_POOR_CHANNEL_CONDITIONS */
WMI_BL_REASON_ASSOC_REJECT_OCE,
WMI_BL_REASON_USERSPACE_BL,
WMI_BL_REASON_USERSPACE_AVOID_LIST,
WMI_BL_REASON_BTM_DIASSOC_IMMINENT,
WMI_BL_REASON_BTM_BSS_TERMINATION,
WMI_BL_REASON_BTM_MBO_RETRY,
/* Reassoc resp with status code 34 - DENIED_POOR_CHANNEL_CONDITIONS */
WMI_BL_REASON_REASSOC_RSSI_REJECT,
/* Reassoc resp with status code 17 - DENIED_NO_MORE_STAS */
WMI_BL_REASON_REASSOC_NO_MORE_STAS,
} WMI_BLACKLIST_REASON_ID;
typedef enum {
WMI_BL_SOURCE_HOST = 1,
WMI_BL_SOURCE_FW,
} WMI_BLACKLIST_SOURCE_ID;
typedef struct {
/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_blacklist_with_timeout_tlv_param */
A_UINT32 tlv_header;
@@ -14538,6 +14574,18 @@ typedef struct {
A_UINT32 timeout;
/** rssi (dBm units) when put in blacklist */
A_INT32 rssi;
/* Blacklist reason from WMI_BLACKLIST_REASON_ID */
A_UINT32 reason;
/* Source of adding AP to BL from WMI_BLACKLIST_SOURCE_ID */
A_UINT32 source;
/*
* timestamp is the absolute time w.r.t host timer which is synchronized
* between the host and target.
* This timestamp indicates the time when AP added to blacklist.
*/
A_UINT32 timestamp;
/* Original timeout value in milli seconds when AP added to BL */
A_UINT32 original_timeout;
} wmi_roam_blacklist_with_timeout_tlv_param;
/** WMI_ROAM_BLACKLIST_EVENT: generated whenever STA needs to move AP to blacklist for a particluar time
@@ -28156,6 +28204,18 @@ typedef struct {
A_UINT32 remaining_disallow_duration;
/** AP will be allowed for candidate, when AP RSSI better than expected RSSI units in dBm */
A_INT32 expected_rssi;
/* Blacklist reason from WMI_BLACKLIST_REASON_ID */
A_UINT32 reason;
/* Source of adding AP to BL from WMI_BLACKLIST_SOURCE_ID */
A_UINT32 source;
/*
* timestamp is the absolute time w.r.t host timer which is synchronized
* between the host and target.
* This timestamp indicates the time when AP added to blacklist.
*/
A_UINT32 timestamp;
/* Original timeout value in milli seconds when AP added to BL */
A_UINT32 original_timeout;
} wmi_pdev_bssid_disallow_list_config_param;
typedef enum {
@@ -28390,6 +28450,10 @@ typedef struct {
A_UINT32 vendor_specific1[7];
};
};
/* BTM BSS termination timeout value in milli seconds */
A_UINT32 btm_bss_termination_timeout;
/* BTM MBO assoc retry timeout value in milli seconds */
A_UINT32 btm_mbo_assoc_retry_timeout;
} wmi_roam_trigger_reason;
typedef struct {
@@ -28436,6 +28500,18 @@ typedef struct {
A_UINT32 cu_score; /* AP current cu score */
A_UINT32 total_score; /* AP total score */
A_UINT32 etp; /* AP Estimated Throughput (ETP) value in mbps */
/* Blacklist reason from WMI_BLACKLIST_REASON_ID */
A_UINT32 bl_reason;
/* Source of adding AP to BL from WMI_BLACKLIST_SOURCE_ID */
A_UINT32 bl_source;
/*
* timestamp is the absolute time w.r.t host timer which is synchronized
* between the host and target.
* This timestamp indicates the time when AP added to blacklist.
*/
A_UINT32 bl_timestamp;
/* Original timeout value in milli seconds when AP added to BL */
A_UINT32 bl_original_timeout;
} wmi_roam_ap_info;
typedef enum {

2
drivers/staging/fw-api/fw/wmi_version.h
View File

@@ -36,7 +36,7 @@
#define __WMI_VER_MINOR_ 0
/** WMI revision number has to be incremented when there is a
* change that may or may not break compatibility. */
#define __WMI_REVISION_ 869
#define __WMI_REVISION_ 872
/** The Version Namespace should not be normally changed. Only
* host and firmware of the same WMI namespace will work

5
drivers/staging/qca-wifi-host-cmn/umac/regulatory/core/src/reg_services.c
View File

@@ -1911,6 +1911,11 @@ static uint16_t reg_compute_chan_to_freq(struct wlan_objmgr_pdev *pdev,
return 0;
}
if (min_chan_range < MIN_CHANNEL || max_chan_range > MAX_CHANNEL) {
reg_err("Channel range is invalid");
return 0;
}
chan_list = pdev_priv_obj->mas_chan_list;
for (count = min_chan_range; count <= max_chan_range; count++) {

6
drivers/staging/qca-wifi-host-cmn/umac/regulatory/dispatcher/inc/reg_services_public_struct.h
View File

@@ -167,6 +167,9 @@ enum channel_enum {
NUM_CHANNELS,
MIN_CHANNEL = CHAN_ENUM_1,
MAX_CHANNEL = (NUM_CHANNELS - 1),
MIN_24GHZ_CHANNEL = CHAN_ENUM_1,
MAX_24GHZ_CHANNEL = CHAN_ENUM_14,
NUM_24GHZ_CHANNELS = (MAX_24GHZ_CHANNEL - MIN_24GHZ_CHANNEL + 1),
@@ -235,6 +238,9 @@ enum channel_enum {
NUM_CHANNELS,
MIN_CHANNEL = CHAN_ENUM_1,
MAX_CHANNEL = (NUM_CHANNELS - 1),
MIN_24GHZ_CHANNEL = CHAN_ENUM_1,
MAX_24GHZ_CHANNEL = CHAN_ENUM_14,
NUM_24GHZ_CHANNELS = (MAX_24GHZ_CHANNEL - MIN_24GHZ_CHANNEL + 1),

16
drivers/staging/qca-wifi-host-cmn/umac/tdls/core/src/wlan_tdls_cmds_process.c
View File

@@ -1718,12 +1718,23 @@ static QDF_STATUS tdls_config_force_peer(
}
feature = soc_obj->tdls_configs.tdls_feature_flags;
if (!TDLS_IS_EXTERNAL_CONTROL_ENABLED(feature) ||
if (!(TDLS_IS_EXTERNAL_CONTROL_ENABLED(feature) ||
TDLS_IS_LIBERAL_EXTERNAL_CONTROL_ENABLED(feature)) ||
!TDLS_IS_IMPLICIT_TRIG_ENABLED(feature)) {
tdls_err("TDLS ext ctrl or Imp Trig not enabled, %x", feature);
return QDF_STATUS_E_NOSUPPORT;
}
/*
* In case of liberal external mode, supplicant will provide peer mac
* address but driver has to behave similar to implict mode ie.
* establish tdls link with any peer that supports tdls and meets stats.
*/
if (TDLS_IS_LIBERAL_EXTERNAL_CONTROL_ENABLED(feature)) {
tdls_debug("liberal mode set");
return QDF_STATUS_SUCCESS;
}
peer_update_param = qdf_mem_malloc(sizeof(*peer_update_param));
if (!peer_update_param) {
tdls_err("memory allocation failed");
@@ -1860,7 +1871,8 @@ QDF_STATUS tdls_process_remove_force_peer(struct tdls_oper_request *req)
}
feature = soc_obj->tdls_configs.tdls_feature_flags;
if (!TDLS_IS_EXTERNAL_CONTROL_ENABLED(feature) ||
if (!(TDLS_IS_EXTERNAL_CONTROL_ENABLED(feature) ||
TDLS_IS_LIBERAL_EXTERNAL_CONTROL_ENABLED(feature)) ||
!TDLS_IS_IMPLICIT_TRIG_ENABLED(feature)) {
tdls_err("TDLS ext ctrl or Imp Trig not enabled, %x", feature);
status = QDF_STATUS_E_NOSUPPORT;

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