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disp: msm: sde: properly reset LTM merge_mode bit and portrait_en bit

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Reset the LTM merge_mode bit and portrait_en bit if LTM histogram and
VLUT are both disabled.

Change-Id: Ica9f681e458afe8c7cd1dfe8ba718cf46eadac3b
Signed-off-by: Ping Li <pingli@codeaurora.org>
This commit is contained in:
Ping Li
2020-09-08 11:07:52 -07:00
parent 155b0639d1
commit b2fc08f8c2
2 changed files with 22 additions and 50 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
msm/sde/sde_hw_color_proc_v4.c
View File

@@ -335,7 +335,11 @@ void sde_setup_dspp_ltm_hist_ctrlv1(struct sde_hw_dspp *ctx, void *cfg,
op_mode = SDE_REG_READ(&ctx->hw, offset);
if (!enable) {
op_mode &= ~BIT(0);
if (op_mode & BIT(1))
op_mode &= ~BIT(0);
else
op_mode = 0;
SDE_REG_WRITE(&ctx->hw, ctx->cap->sblk->ltm.base + 0x4,
(op_mode & 0x1FFFFFF));
return;

66
msm/sde/sde_hw_reg_dma_v1_color_proc.c
View File

@@ -3743,16 +3743,10 @@ void reg_dmav1_setup_ltm_roiv1(struct sde_hw_dspp *ctx, void *cfg)
}
}
static void ltm_vlutv1_disable(struct sde_hw_dspp *ctx, void *cfg,
u32 num_mixers, enum sde_ltm *dspp_idx)
static void ltm_vlutv1_disable(struct sde_hw_dspp *ctx)
{
struct sde_hw_cp_cfg *hw_cfg = cfg;
struct sde_hw_reg_dma_ops *dma_ops;
struct sde_reg_dma_setup_ops_cfg dma_write_cfg;
struct sde_reg_dma_kickoff_cfg kick_off;
int rc, i = 0;
enum sde_ltm idx = 0;
u32 opmode = 0;
u32 opmode = 0, offset = 0;
idx = (enum sde_ltm)ctx->idx;
if (idx >= LTM_MAX) {
@@ -3760,41 +3754,15 @@ static void ltm_vlutv1_disable(struct sde_hw_dspp *ctx, void *cfg,
return;
}
dma_ops = sde_reg_dma_get_ops();
dma_ops->reset_reg_dma_buf(ltm_buf[LTM_VLUT][idx]);
REG_DMA_INIT_OPS(dma_write_cfg, ltm_mapping[idx], LTM_VLUT,
ltm_buf[LTM_VLUT][idx]);
for (i = 0; i < num_mixers; i++) {
dma_write_cfg.blk = ltm_mapping[dspp_idx[i]];
REG_DMA_SETUP_OPS(dma_write_cfg, 0, NULL, 0, HW_BLK_SELECT, 0,
0, 0);
rc = dma_ops->setup_payload(&dma_write_cfg);
if (rc) {
DRM_ERROR("write decode select failed ret %d\n", rc);
return;
}
ltm_vlut_ops_mask[dspp_idx[i]] &= ~ltm_vlut;
offset = ctx->cap->sblk->ltm.base + 0x4;
ltm_vlut_ops_mask[ctx->idx] &= ~ltm_vlut;
opmode = SDE_REG_READ(&ctx->hw, offset);
if (opmode & BIT(0))
/* disable VLUT/INIT/ROI */
REG_DMA_SETUP_OPS(dma_write_cfg, 0x04, &opmode, sizeof(opmode),
REG_SINGLE_MODIFY, 0, 0,
REG_DMA_LTM_VLUT_DISABLE_OP_MASK);
rc = dma_ops->setup_payload(&dma_write_cfg);
if (rc) {
DRM_ERROR("opmode write failed ret %d\n", rc);
return;
}
}
REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl, ltm_buf[LTM_VLUT][idx],
REG_DMA_WRITE, DMA_CTL_QUEUE0, WRITE_IMMEDIATE,
LTM_VLUT);
rc = dma_ops->kick_off(&kick_off);
if (rc) {
DRM_ERROR("failed to kick off ret %d\n", rc);
return;
}
opmode &= REG_DMA_LTM_VLUT_DISABLE_OP_MASK;
else
opmode = 0;
SDE_REG_WRITE(&ctx->hw, offset, opmode);
}
void reg_dmav1_setup_ltm_vlutv1(struct sde_hw_dspp *ctx, void *cfg)
@@ -3814,6 +3782,13 @@ void reg_dmav1_setup_ltm_vlutv1(struct sde_hw_dspp *ctx, void *cfg)
if (rc)
return;
/* disable case */
if (!hw_cfg->payload) {
DRM_DEBUG_DRIVER("Disable LTM vlut feature\n");
ltm_vlutv1_disable(ctx);
return;
}
idx = (enum sde_ltm)ctx->idx;
num_mixers = hw_cfg->num_of_mixers;
rc = reg_dmav1_get_ltm_blk(hw_cfg, idx, &dspp_idx[0], &blk);
@@ -3823,13 +3798,6 @@ void reg_dmav1_setup_ltm_vlutv1(struct sde_hw_dspp *ctx, void *cfg)
return;
}
/* disable case */
if (!hw_cfg->payload) {
DRM_DEBUG_DRIVER("Disable LTM vlut feature\n");
ltm_vlutv1_disable(ctx, cfg, num_mixers, dspp_idx);
return;
}
if (hw_cfg->len != sizeof(struct drm_msm_ltm_data)) {
DRM_ERROR("invalid size of payload len %d exp %zd\n",
hw_cfg->len, sizeof(struct drm_msm_ltm_data));