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Merge a94f99c621 on remote branch

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Change-Id: I279410afa2699f1944289045d4f78c7cfd728122
This commit is contained in:
Linux Build Service Account
2023-07-21 06:21:09 -07:00
parent 155e704e54 a94f99c621
commit b5bb16a5f3
5 changed files with 34 additions and 21 deletions
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11
msm/dsi/dsi_display.c
View File

@@ -7100,6 +7100,17 @@ int dsi_display_get_modes_helper(struct dsi_display *display,
return rc;
}
/*
* Update the host_config.dst_format for compressed RGB101010 pixel format.
*/
if (display->panel->host_config.dst_format == DSI_PIXEL_FORMAT_RGB101010 &&
display_mode.timing.dsc_enabled) {
display->panel->host_config.dst_format = DSI_PIXEL_FORMAT_RGB888;
DSI_DEBUG("updated dst_format from %d to %d\n",
DSI_PIXEL_FORMAT_RGB101010,
display->panel->host_config.dst_format);
}
if (display->cmdline_timing == display_mode.mode_idx) {
topology_override = display->cmdline_topology;
is_preferred = true;

9
msm/dsi/dsi_panel.c
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@@ -964,6 +964,15 @@ static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
fmt = DSI_PIXEL_FORMAT_RGB666;
break;
case 30:
/*
* The destination pixel format (host->dst_format) depends
* upon the compression, and should be RGB888 if the DSC is
* enable.
* The DSC status information is inside the timing modes, that
* is parsed during first dsi_display_get_modes() call.
* The dst_format will be updated there depending upon the
* DSC status.
*/
fmt = DSI_PIXEL_FORMAT_RGB101010;
break;
case 24:

12
msm/msm_drv.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
* Copyright (C) 2013 Red Hat
* Author: Rob Clark <robdclark@gmail.com>
@@ -977,11 +977,6 @@ static int msm_drm_component_init(struct device *dev)
drm_mode_config_reset(ddev);
ret = drm_dev_register(ddev, 0);
if (ret)
goto fail;
priv->registered = true;
if (kms && kms->funcs && kms->funcs->cont_splash_config) {
ret = kms->funcs->cont_splash_config(kms, NULL);
if (ret) {
@@ -990,6 +985,11 @@ static int msm_drm_component_init(struct device *dev)
}
}
ret = drm_dev_register(ddev, 0);
if (ret)
goto fail;
priv->registered = true;
#if IS_ENABLED(CONFIG_DRM_FBDEV_EMULATION)
if (fbdev)
priv->fbdev = msm_fbdev_init(ddev);

5
msm/sde/sde_encoder.c
View File

@@ -5851,7 +5851,6 @@ enum sde_intf_mode sde_encoder_get_intf_mode(struct drm_encoder *encoder)
u32 sde_encoder_get_frame_count(struct drm_encoder *encoder)
{
struct sde_encoder_virt *sde_enc = NULL;
struct sde_encoder_phys *phys;
if (!encoder) {
SDE_ERROR("invalid encoder\n");
@@ -5859,9 +5858,7 @@ u32 sde_encoder_get_frame_count(struct drm_encoder *encoder)
}
sde_enc = to_sde_encoder_virt(encoder);
phys = sde_enc->cur_master;
return phys ? atomic_read(&sde_enc->vsync_cnt) : 0;
return atomic_read(&sde_enc->vsync_cnt);
}
bool sde_encoder_get_vblank_timestamp(struct drm_encoder *encoder,

18
msm/sde/sde_wb.c
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
*/
@@ -471,9 +471,6 @@ int sde_wb_get_mode_info(struct drm_connector *connector,
const u32 single_intf = 1;
const u32 no_enc = 0;
struct msm_display_topology *topology;
struct sde_wb_device *wb_dev = display;
u16 hdisplay;
int i;
if (!drm_mode || !mode_info || !avail_res ||
!avail_res->max_mixer_width || !display) {
@@ -481,18 +478,17 @@ int sde_wb_get_mode_info(struct drm_connector *connector,
return -EINVAL;
}
hdisplay = drm_mode->hdisplay;
/* find maximum display width to support */
for (i = 0; i < wb_dev->count_modes; i++)
hdisplay = max(hdisplay, wb_dev->modes[i].hdisplay);
topology = &mode_info->topology;
topology->num_lm = (avail_res->max_mixer_width <= hdisplay) ?
topology->num_lm = (avail_res->max_mixer_width <= drm_mode->hdisplay) ?
dual_lm : single_lm;
topology->num_enc = no_enc;
topology->num_intf = single_intf;
if (topology->num_lm == dual_lm && (drm_mode->hdisplay % 4)) {
SDE_ERROR("invalid mode settings for 3d-merge, hdisplay:%d\n", drm_mode->hdisplay);
return -EINVAL;
}
mode_info->comp_info.comp_type = MSM_DISPLAY_COMPRESSION_NONE;
mode_info->wide_bus_en = false;
mode_info->comp_info.comp_ratio = MSM_DISPLAY_COMPRESSION_RATIO_NONE;