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disp: msm: update RSC bandwidth during solver mode transition

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Currently when disconnecting a secondary monitor, RSC will
transition to solver mode. If the bandwidth remains the same
for primary display, SW will not update BW indication register
causing stale TCS wait values.

This change forces a register update when RSC mode is
changed to solver mode.

Change-Id: I99d2332621bad75a7b6abdb64d6aedd35c30ca63
Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
Signed-off-by: V S Ganga VaraPrasad (VARA) Adabala <quic_vadabala@quicinc.com>
This commit is contained in:
Amine Najahi
2022-08-31 16:14:25 -04:00
committed by Gerrit - the friendly Code Review server
parent 43dbaf14b4
commit d3516bd83f
1 changed files with 5 additions and 0 deletions
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5
msm/sde_rsc_hw_v3.c
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@@ -429,6 +429,11 @@ static int sde_rsc_state_update_v3(struct sde_rsc_priv *rsc,
reg, rsc->debug_mode); reg, rsc->debug_mode);
wmb(); /* make sure that solver is enabled */ wmb(); /* make sure that solver is enabled */
if (rsc->hw_ops.bwi_status) {
rsc->bwi_update = BW_NO_CHANGE;
rsc->hw_ops.bwi_status(rsc);
}
break; break;
case SDE_RSC_VID_STATE: case SDE_RSC_VID_STATE: