Commit Graph

1530 Commits

Author SHA1 Message Date
qctecmdr
eeb99bc637 Merge "disp: msm: sde: update min_prefill lines for lito and lagoon" 2020-09-10 18:45:36 -07:00
qctecmdr
d478974b21 Merge "disp: msm: sde: skip unnecessary cache register programming" 2020-09-10 10:30:19 -07:00
qctecmdr
11483a9d3d Merge "disp: msm: dp: return early if all streams are disabled" 2020-09-10 10:30:19 -07:00
Nilaan Gunabalachandran
2a3fe5e4c5 disp: msm: sde: skip unnecessary cache register programming
Plane update will call system cache update, and by default,
will clear any cache programming. This clear is only necessary
after returning from a cached state. This change will reduce
unnecessary programming and event logs if the sys cache
was previously disabled and remains disabled.

Change-Id: I7f560ff24990a8c7ad785e560873193b7bf3a491
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-09-10 08:33:23 -04:00
qctecmdr
6d59f959d3 Merge "disp: rotator: modify the args for sid switch call" 2020-09-10 03:35:50 -07:00
qctecmdr
20db960f01 Merge "disp: msm: dsi: do not enable PWM when setting bl to 0" 2020-09-09 18:55:26 -07:00
qctecmdr
987b50fe8f Merge "disp: msm: sde: delay encoder disable for clone mode" 2020-09-09 13:17:51 -07:00
qctecmdr
89d84e6da6 Merge "disp: msm: sde: update syscache properties only if supported" 2020-09-09 09:11:53 -07:00
qctecmdr
32c625dba0 Merge "disp: rotator: add ubwc plane atomic check in rotator" 2020-09-09 02:29:19 -07:00
qctecmdr
1ea1264b80 Merge "disp: msm: sde: update irq enable check during irq affinity notify" 2020-09-09 02:29:19 -07:00
qctecmdr
e236e8e3ec Merge "disp: msm: sde: add null pointer check for encoder current master" 2020-09-09 02:29:19 -07:00
qctecmdr
26112d7b3b Merge "disp: msm: dsi: Update pll delay calculation as per latest DSI HPG" 2020-09-09 02:29:19 -07:00
qctecmdr
d6eccf2b10 Merge "disp: msm: dsi: Add support to keep display reset pin high" 2020-09-09 02:29:19 -07:00
qctecmdr
3ee7b6f685 Merge "disp: msm: dsi: Skip soft reset during display disable" 2020-09-09 02:29:19 -07:00
qctecmdr
a56d1440d0 Merge "disp: msm: dp: add support for diff values of pre-emp and swing levels" 2020-09-09 02:29:19 -07:00
qctecmdr
9f952e6831 Merge "disp: msm: sde: avoid double mmu destroy during mmu init failure" 2020-09-09 02:29:19 -07:00
qctecmdr
c97cf39485 Merge "disp: msm: dp: remove link probe from dp display driver" 2020-09-09 02:29:19 -07:00
Yashwanth
98839886d3 disp: msm: sde: update syscache properties only if supported
This change avoids msm property install and cache state
transitions if sys cache is not supported in the target.

Change-Id: I00b0a95772b1a3dab67c7e684529cda093d6dac6
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-09-09 12:17:07 +05:30
Rajat Gupta
1afa803170 disp: msm: dp: return early if all streams are disabled
Return early if the active streams are not present. Clean function
doesn't take into account the count of active stream which is being
changed during disable and link clk is turned off before that.
Adding active stream check in pre_off will ensures atleast one
stream is on and link clk is not turned off.

Change-Id: I6abf4b14ae4f99161eed3d5300b1961a1983977d
Signed-off-by: Rajat Gupta <rajatgu@codeaurora.org>
2020-09-09 12:12:50 +05:30
qctecmdr
eabc896956 Merge "disp: msm: dsi: initialize display before request_firmware" 2020-09-08 23:07:45 -07:00
qctecmdr
370f3ad937 Merge "disp: msm: dsi: Mask overflow error for Broadcast command" 2020-09-08 23:07:45 -07:00
qctecmdr
fdf3ac7ade Merge "disp: msm: dsi: dual dsi constant fps porch calculation" 2020-09-08 23:07:45 -07:00
Zhao, Yuan
8050179062 disp: msm: dsi: do not enable PWM when setting bl to 0
Check backlight value, if it's 0, do not enable PWM.

Change-Id: I6fccb42555731bf3faa88a93cbf1a36a417ff49d
Signed-off-by: Zhao, Yuan <yzhao@codeaurora.org>
2020-09-08 19:02:14 -07:00
Jayaprakash
12bfeccd42 disp: msm: sde: update min_prefill lines for lito and lagoon
Add changes to update min_prefill_lines to 40 for
inline rotation use-cases on lito and lagoon targets.

Change-Id: I1d6ba877972e31a8f950d98ebab8944e1b93cef0
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-09-08 18:45:39 -04:00
Mahadevan
6987497452 disp: rotator: set ib, ab bandwidth votes in KBps for interconnect
icc_set_bw api requires ib, ab votes to be in KBps.
The votes received from the userspace will be in the order
of Bps. This change makes the conversion from Bytes to
KiloBytes before applying vote on interconnect path.

Change-Id: I1c02e91be91bda7dcbfe058f3681034a12aedbc5
Signed-off-by: Mahadevan <mahap@codeaurora.org>
2020-09-08 16:01:45 +05:30
Yashwanth
f4ce8b66ce disp: rotator: add ubwc plane atomic check in rotator
In some targets with offline rotator, ubwc might not be
supported. For those cases, this change adds ubwc
verification for plane during atomic check to prevent
crash.

Change-Id: Ie24a7ba823773204062993996746aa08171fe90f
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-09-08 13:56:55 +05:30
Yashwanth
638de5f7dd disp: msm: sde: update irq enable check during irq affinity notify
MDSS irq will be enabled/disabled only during post-enable
and pre-disable power events. During idle usecase in video
mode, interrupts will be disabled but not mdss hw irq.
This change uses irq vote count check while adding pm
qos irq vote.

Change-Id: Iae0ea19fbe688d0ee762b5e75f37548ba5671def
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-09-08 10:21:48 +05:30
Yashwanth
35b948550d disp: msm: sde: add null pointer check for encoder current master
During virt enable call, sde_enc master will be removed and
re-assigned. If an underrun is observed during this
scenario, it results in crash due to uninitialized access.
This change handles the above scenario.

Change-Id: Iec9e4a0bc4b763e44933334dacf82f1439eacc17
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-09-08 10:00:31 +05:30
Yashwanth
d71039da0a disp: rotator: modify the args for sid switch call
Modify the size of SID's passed as an argument during
scm call as per client requirement.

Change-Id: I84bbd1e034ba6dcd8ded1ddf3913a735a2139663
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-09-07 22:54:31 +05:30
qctecmdr
8510269a39 Merge "disp: msm: sde: fix race condition in scheduler idle function" 2020-09-05 15:20:24 -07:00
qctecmdr
40bbd26775 Merge "disp: msm: sde: modify dsc blocks reservation check in RM" 2020-09-05 11:48:07 -07:00
qctecmdr
5a5f61466b Merge "disp: msm: sde: add vote for trusted vm splash handoff" 2020-09-04 08:52:18 -07:00
qctecmdr
cdd14239fd Merge "disp: msm: sde: disable idle notification" 2020-09-03 21:41:46 -07:00
qctecmdr
09d24eeb43 Merge "disp: msm: assert nrt vbif halt req as part of rscc mode2 sequence" 2020-09-03 17:54:37 -07:00
Amine Najahi
ec1b93751c disp: msm: sde: fix race condition in scheduler idle function
Currently driver reads CTL status register before checking
pending kickoff counter. This can lead to a register access
violation when there is a race condition between the ESD and
commit thread.

This change checks pending kickoff counter before reading
CTL status register.

Change-Id: I5828b580c16d075df19eb349ee88d8b7da47941e
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-09-03 20:45:47 -04:00
Abhijit Kulkarni
4f2c4ac27e disp: msm: sde: disable idle notification
This change disables sending idle notification if system
cache is already enabled. If system cache is enabled it
establishes that driver has already send prior
notification and no configuration change was requested.

Change-Id: I1aee002ab3c8c3d4193a8e7a4890d8e4f24da804
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-09-03 15:11:19 -07:00
Abhijit Kulkarni
3db847b7bf disp: msm: sde: fix vblank wait after cache read mode update
This change fixes the vblank wait after system cache read mode
update. Without this change the wait does not happen since there is
no pending kickoff. This change uses encoder api to flush the
configuration and explicitly waits for vblank.

Change-Id: I8942f9b638e784c8fd9b5df33a9ccc7087a5eaef
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-09-03 13:33:27 -07:00
qctecmdr
87f48f06fa Merge "disp: msm: sde: add event to event_list after register is successful" 2020-09-03 02:15:47 -07:00
Dhaval Patel
28826f09cf disp: msm: sde: delay encoder disable for clone mode
Clone WB encoder disable before posted start commit
trigger adds wb_wait delay in current frame trigger
sequence. This adds 1 frame jank if CWB enable/disable
path exercised periodically like 100ms or 200ms. This
change delays CWB encoder disable after frame trigger
and vsync/wr_ptr wait to avoid jank issue.

Change-Id: Ifa10042473397b37396d217d2410e7cf5a1e32a1
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-09-02 13:24:16 -07:00
qctecmdr
352ce36959 Merge "disp: msm: sde: do DRM encoder NULL check before waking up display" 2020-09-02 10:29:20 -07:00
qctecmdr
153926f999 Merge "drm: msm: add dspp caps blob to crtc" 2020-09-01 14:10:14 -07:00
Lei Chen
ad0b79b8d7 disp: msm: sde: do DRM encoder NULL check before waking up display
DRM encoder can be NULL during modeset concurrency, so add this
change to check drm encoder and only wake up display when drm encoder
is available.

Change-Id: I50dd85eb39567aba4895dc19801020d7ead841b8
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2020-09-01 00:58:45 -07:00
Ping Li
9450155b4f disp: msm: sde: add event to event_list after register is successful
Add event to event_list after msm_register_event is successful to avoid
use-after-free vulnerability.

Change-Id: I144ae82c657c1e2cf16608c0e8768b12a7d27974
Signed-off-by: Ping Li <pingli@codeaurora.org>
2020-08-31 16:23:27 -07:00
Gopikrishnaiah Anandan
10e00393d8 drm: msm: add dspp caps blob to crtc
All sde crtc's are virtual when they are created. Resources for the crtc
is allocated when crtc is enabled. All crtc's will not have same
capabilities because some of the dspp blocks have additional hardware
blocks. Change exposes additional dspp capabilities dynamically when
crtc is allocated the dspp hardware block.

Change-Id: I93e76a1335574e4ca30d9419ef6cc6e8149e2c3c
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
2020-08-31 14:37:30 -07:00
Yashwanth
45d0998b96 disp: msm: sde: update misr check to configure misr in secure UI
This change updates misr checks so that misr can be
configured during secure display session. In the current
code, misr_reconfigure flag is set only when accessing
through debugfs node.

Change-Id: Ic3a8316a4881551da3f0f340f6ef5ae3fbe4913f
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-08-31 19:38:51 +05:30
qctecmdr
6f85b051af Merge "disp: msm: dp: enhance trace and logging for mst" 2020-08-28 14:11:38 -07:00
qctecmdr
e2f4c767b9 Merge "disp: msm: dp: avoid use of mst_lock in hpd callbacks" 2020-08-28 11:49:24 -07:00
Rajkumar Subbiah
6ffa470809 disp: msm: dp: enhance trace and logging for mst
Enhance logging in dp mst functions by adding connector ids to
better identify operations for different streams and add more
trace logs.

Change-Id: Iaf5c67105c7af82fc5118674ddde5aef2319a611
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
2020-08-27 17:50:28 -04:00
qctecmdr
e499ddf040 Merge "disp: msm: sde: Allow for overriding CP features flush mechanism" 2020-08-27 10:09:42 -07:00
qctecmdr
18aab79fa2 Merge "disp: msm: sde: fix check for uneven split with dest-scaler" 2020-08-27 10:09:42 -07:00