In case of DATABUS_WIDEN, follow the HPG to calculate bitclk, byteclk and pclk. Configure the DST_FORMAT and the clock dividers in DSI PHY and DISP_CC w.r.t. the bpp before compression. Change-Id: I526eab5bc88b8d667b8b1a0d257b2f147998286a Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com> Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com> Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com>
44 KiB
44 KiB