1080691 Commits

Author SHA1 Message Date
Maulik Shah
d051a7c61f soc: qcom: rpmh: Do not use spin_trylock()
rpmh_flush() is called for APPS RSC only from last CPU entering power
down. spin_trylock() was used to abort flushing as it would mean another
CPU is already up.

However rpmh_flush() may get invoked by other RSCes too and may fail if
another CPU is holding lock. Fix by removing spin_trylock().

Change-Id: Ic94f6bcb9a762e02ccfb98c79f6181f20ee67915
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
2023-12-19 20:34:28 -08:00
Maulik Shah
75619d91a6 soc: qcom: rpmh-rsc: Add delay during waiting for TCS complete
The RSC channel switch in certain cases may take more time
to complete at RPMH end.

Add delay of maximum 100usec.

Change-Id: I65862ad80fbb698e6b66e2038a7692c4b78c2ce9
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
2023-12-19 20:33:48 -08:00
Ansa Ahmed
0d30a26909 msm: adsprpc: Allocate designated context bank session
Currently SMMU context banks are chosen dynamically based on
available context bank. Few use cases requires context banks to
be fixed to retain SMMU mappings even after process exits and resumes
again. Few other use cases requires to use multiple context banks of
similar remote subsystem process types. Allocate designated context
bank session with process type  matching with remote subsystem
process type.

Change-Id: Ie8ccad2fde4e2e21aaf8c6ede0ab31645cdf350c
Acked-by: Santosh Sakore <quic_ssakore@quicinc.com>
Signed-off-by: Ansa Ahmed <quic_ansa@quicinc.com>
2023-12-19 19:38:52 -08:00
qctecmdr
a048a8f930 Merge "drivers: arm-smmu: Power-on SMMU during freeze" 2023-12-19 18:06:03 -08:00
Xiaoqi Zhuang
ab126178dc coresight: ETR: Disable BAM SMMU when mapping config is set as bypass
BAM SMMU should be disabled when mapping config is set as bypass.

Change-Id: If92cd1ed23ada0473fc7e8dea0adf35a88980ce0
Signed-off-by: Xiaoqi Zhuang <quic_xiaozhua@quicinc.com>
2023-12-20 10:04:10 +08:00
qctecmdr
b00b7812f7 Merge "defconfig: Enable CONFIG_EDAC_KRYO_ARM64 support for qcs605" 2023-12-19 14:36:24 -08:00
qctecmdr
049d8d34d4 Merge "drivers: remoteproc: Modify callbacks for Rproc during Deepsleep" 2023-12-19 14:36:24 -08:00
qctecmdr
392720a1e8 Merge "msm: adsprpc: Share initial debug config to DSP" 2023-12-19 14:36:23 -08:00
jianshu
52e69646a2 ice_driver: Fix the ice keyslot conflict
FDE only use one ice keyslot on gen3, the remains used by FBE. For
the ufs crypto layer, it needs to support FBE and FDE request concurrently.

Test cases:
1. LV host FDE OTA and basic test validated pass
2. LA container FBE OTA and basic test validated pass.

Change-Id: Ic0c6e0f9d39d351c1095f531f1fa8bd2a8e614b7
Signed-off-by: jianshu <quic_jianshu@quicinc.com>
2023-12-19 19:11:18 +08:00
Ansa Ahmed
e85fdc7854 msm: adsprpc: Share initial debug config to DSP
This change enables sharing of a new page to DSP.
New page will contain initial debug parameters which we
need to pass to the DSP during process initiation.

Change-Id: Idb5793f2dc9fe3c0892c68da103abef9e3f3ea18
Acked-by: quic_anane <quic_anane@quicinc.com>
Signed-off-by: Ansa Ahmed <quic_ansa@quicinc.com>
2023-12-18 23:06:52 -08:00
qctecmdr
1c9d1a39f7 Merge "drivers: soc: qcom: Fixing overflow issue in LPLH" 2023-12-18 21:14:59 -08:00
qctecmdr
0fa5785e2a Merge "net: stmmac: enable/disable irq LPM" 2023-12-18 21:14:59 -08:00
qctecmdr
d779084aba Merge "msm: ipa3: add new ETH PDU LL QMI" 2023-12-18 21:14:58 -08:00
qctecmdr
00677cb4d0 Merge "i2c: i2c-msm-geni: check for gi2c->cur null pointer" 2023-12-18 21:14:58 -08:00
qctecmdr
01be5fdd36 Merge "build.config: modules.list.msm.qcs605: Add interconnect and clock" 2023-12-18 21:14:57 -08:00
qctecmdr
bcd16566f1 Merge "Arm: config: Enable necessary config for kalama lu" 2023-12-18 21:14:57 -08:00
qctecmdr
f4481cad20 Merge "stmmac: fix crash in LPM" 2023-12-18 21:14:56 -08:00
Shreyas K K
1221637cb7 drivers: remoteproc: Modify callbacks for Rproc during Deepsleep
Handle deviations in Deepsleep requirements by introducing new
callbacks that would be invoked during deepsleep suspend.

Change-Id: I988a72fa3b175de4338b4e5fa2a90191a438aa4b
Signed-off-by: Shreyas K K <quic_shrekk@quicinc.com>
2023-12-18 22:29:20 +05:30
Srinath Pandey
dceb8b6fb7 net: stmmac: enable/disable irq LPM
Free_irq on suspend and request_irq on resume.

Change-Id: I5340b16b21eeb11aa3d950d22d64c7681efc2293
Signed-off-by: Srinath Pandey <quic_srinpand@quicinc.com>
Signed-off-by: Vivek Yadav <quic_viveyada@quicinc.com>
2023-12-18 18:01:52 +05:30
Shreyas K K
18af9e38ea drivers: arm-smmu: Power-on SMMU during freeze
There can be a possibility that runtime power management
has powered-down SMMU. Now, if there is a freeze request
on top of that, we will see SMMU register access errors,
as the SMMU is already powered-down.

Power-on SMMU during the freeze for accessing the SMMU
registers as part of qcom_free_io_pgtable_ops().

Change-Id: I6fff3ca0a70c071947e34bc4e574e3e565ee875d
Signed-off-by: Shreyas K K <quic_shrekk@quicinc.com>
Signed-off-by: Yadu MG <quic_ymg@quicinc.com>
2023-12-18 14:58:29 +05:30
simran jaiswal
b27fb9fa6d drivers: soc: qcom: Fixing overflow issue in LPLH
Fixing issue of overflow while parsing init ipc freq
table parameters for LPLH.

Change-Id: I15cca3b722a1ffbb9c596119eb3a819295143f30
Signed-off-by: simran jaiswal <quic_simranja@quicinc.com>
2023-12-18 13:50:35 +05:30
qctecmdr
af8a87a771 Merge "msm: ep_pcie: Avoid dumping registers for linkdown after PERST assert" 2023-12-17 08:09:18 -08:00
qctecmdr
af2cc8f5a7 Merge "config: enable CONFIG_USB_NET_AX88179_178A for kalama LE target" 2023-12-17 08:09:17 -08:00
qctecmdr
9467c20dc9 Merge "soc: qcom: Add check if part is more than firmware supported range" 2023-12-17 08:09:17 -08:00
qctecmdr
b0ae4de377 Merge "Revert "qcom_spss: Assign spss PIL memory to SPSS and HLOS ownership"" 2023-12-17 02:47:25 -08:00
Sivakanth Vaka
3ea4f00d65 msm: ipa3: add new ETH PDU LL QMI
Add new QMI messages and struct to support ETH PDU TSN FR.

Change-Id: I4197893741673db72177447dc281349992cb0c10
Signed-off-by: Sivakanth Vaka <quic_svaka@quicinc.com>
2023-12-16 05:44:38 -08:00
Maulik Shah
382930125e soc: qcom: rpmh-rsc: Use stack memory for rpmh transfers
During low memory situations caused by some scenarios such as OTA
upgrade rpmh transfers may fail.

Use stack memory for rpmh transfers to avoid such failures.

Change-Id: I904f788dd865d083191bc5113a27e6ee232ebfc8
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
2023-12-15 07:06:09 -08:00
Chetan C R
447103dd44 build.config: modules.list.msm.qcs605: Add interconnect and clock
Add Interconnect, qos, qnoc, clock support for QCS605.

Change-Id: Iead8fb2a4cb306213bd187576150ca2f51211fc4
Signed-off-by: Chetan C R <quic_cchinnad@quicinc.com>
2023-12-15 12:10:38 +05:30
Srinivasarao Pathipati
1efc952c90 Revert "qcom_spss: Assign spss PIL memory to SPSS and HLOS ownership"
This reverts commit 7da358c0ed.

Reason for revert: HLOS is accessing outside PIL region causing crash,
so reverting the change that is accessing outside SPSS PIL region.

Change-Id: I1cbc4c9a0885a316509ab829fcd3559a1aeb0bb8
Signed-off-by: Srinivasarao Pathipati <quic_c_spathi@quicinc.com>
2023-12-14 22:38:25 -08:00
qctecmdr
476fcfe5bc Merge "iommu: use linux/spinlock.h instead of linux/rwlock.h" 2023-12-14 20:42:19 -08:00
qctecmdr
bfb9992d4e Merge "ARM: dts: msm: Include interval tree defconfig" 2023-12-14 20:42:16 -08:00
zhezhe song
e2bd6c9735 config: enable CONFIG_USB_NET_AX88179_178A for kalama LE target
Enable CONFIG_USB_NET_AX88179_178A for kalama LE target.

Change-Id: I7a3a40ed2b58d44bc091f1b469a359fd619bd719
Signed-off-by: zhezhe song <quic_zhezsong@quicinc.com>
2023-12-14 19:37:52 -08:00
Mukesh Ojha
1c3a4c1a76 soc: qcom: minidump: Do not copy content from address around X* registers
There was a debug feature on minidump to collect content around
pointers present in panicked cpu registers from X0-X30. PC, LR,
SP. and it was having check present before copy the contents about
address need to be kernel mapped and not hyp assigned. We should
be able to do most of the checking present as well but tracking
the buffers which are assigned to other VMID through
qcom_scm_assign_mem() and since it is upstream API and adding magic
value to each PFN and restore it if there is failure is kind of
overhead for such a debug feature, ideally it should have done on
client side but doing at the client is very difficult task to do
as there are many users of this API.

For now, we are cleaning this up, unless we know the user of this
information and it is worth doable.

Change-Id: I638877063a4c8c6dabb7d16bcc4eeb63f5108fba
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Signed-off-by: Srinivasarao Pathipati <quic_c_spathi@quicinc.com>
2023-12-14 16:22:57 +05:30
Sayantan Majumder
6e511bab89 ARM: dts: msm: Include interval tree defconfig
Inclusion of interval tree support for Graphics compilation.

Change-Id: If3018a03ae83a256e5b3c48cf327a2d953b3e5a5
Signed-off-by: Sayantan Majumder <quic_smajumde@quicinc.com>
2023-12-14 01:03:29 -08:00
Mehul Raninga
0ae958c774 i2c: i2c-msm-geni: Correct ipc logging for ret value
One of the ipc logging statement was missing argument
of ret. Corrected by adding last argument in ipc log.

Change-Id: Icaf6cba021abb1df8d12ab6b821a9a12c04e4f17
Signed-off-by: Mehul Raninga <quic_mraninga@quicinc.com>
2023-12-14 14:32:20 +05:30
Kassey Li
702dd5db37 iommu: use linux/spinlock.h instead of linux/rwlock.h
Directly including linux/rwlock.h breaks RT build failure.
Fix this by including linux/spinlock.h which includes the
correct rwlock header based on the selected PREEMPT configuration.

Change-Id: I6e90d570be302cfc8ee05e78dc47073ae97ffee4
Signed-off-by: Kassey Li <quic_yingangl@quicinc.com>
2023-12-13 23:01:49 -08:00
qctecmdr
8cdc6f926f Merge "soc: qcom: hab: use high tasklet for message recv routine" 2023-12-13 22:50:35 -08:00
qctecmdr
c7738932dd Merge "soc: qcom: hgsl: support for cmd batch indirect submission" 2023-12-13 22:50:34 -08:00
Prerna Singh
7e751b9858 clk: qcom: Add measure support for CPU clk on Trinket
Add measure support for CPU clks in DEBUGCC in Trinket
so that one can get the frequency at which they are
running at.

Change-Id: Ic199787dc6ef32415c41f721011d0e3e93e496ad
Signed-off-by: Prerna Singh <quic_prersing@quicinc.com>
2023-12-14 10:28:19 +05:30
Canfeng Zhuang
a62a7972e8 Arm: config: Enable necessary config for kalama lu
Enable necessary config for kalama lu:
| commit e215ca459e ("config: Add defconfigs to enable compile
 for TDK sensor").
| commit 9bfe7aa7fe ("config: Enable CAN functionality for
RB5 gen2 device").
| commit 6da0f8f54b ("ARM: config: msm: Enable config for
pcie to usb hub").
| commit 234c78d779 ("driver: can: spi: add mcp25xxfd driver").

Change-Id: I2ca35d987bf382a1f0eee9ffe9f6a4621c5f5a97
Signed-off-by: Canfeng Zhuang <quic_czhuang@quicinc.com>
2023-12-13 17:59:13 -08:00
qctecmdr
f0a5f91c2a Merge "clk: qcom: debugcc: Add debug clock controller for SDM845" 2023-12-13 06:22:49 -08:00
Somesh Dey
e6298624c2 i2c: i2c-msm-geni: check for gi2c->cur null pointer
In geni_i2c_irq_handle_watermark, due to spurious
interrupt gi2c->cur is becoming null resulting in crash.

Hence added a check to prevent this scenario due to
spurious interrupts.

Change-Id: I522b2dbdacb48208ecddd81115c7a9a7c40da021
Signed-off-by: Visweswara Tanuku <quic_vtanuku@quicinc.com>
Signed-off-by: Somesh Dey <quic_somedey@quicinc.com>
Signed-off-by: Madhu Ananthula <quic_mananthu@quicinc.com>
2023-12-13 16:33:31 +05:30
qctecmdr
e97a24ee02 Merge "bindings: clk: gpucc: Add support for LIMITER reset for CROW" 2023-12-13 00:47:35 -08:00
qctecmdr
1bd6564047 Merge "defconfig: qcs605: Add clock and interconnect config" 2023-12-13 00:47:35 -08:00
qctecmdr
d5a97dffd0 Merge "clk: qcom: rpmh: Add support of IPA RPMH clocks for SDM670" 2023-12-13 00:47:34 -08:00
lixiang
c3bbbc9b11 soc: qcom: hab: use high tasklet for message recv routine
To get better performance, the priority of tasklet for receiving
message in Virtio HAB should be increased from normal to high.

Change-Id: I03151641d2af992ff0fcaaa38912f42b1f097d70
Signed-off-by: lixiang <quic_lixian@quicinc.com>
2023-12-12 23:24:05 -08:00
Jeyaprabu J
c77845f3c8 soc: qcom: hgsl: support for cmd batch indirect submission
cases where IBs exceed DBQ command region, make use of extended
DBQ region to submit indirect IBs.

Change-Id: Ic7673e9a0f79b844fd0acb382d662a96a86e13bc
Signed-off-by: Jeyaprabu J <quic_jeyaprab@quicinc.com>
2023-12-13 15:12:54 +08:00
qctecmdr
aefedd2a0c Merge "drivers: thermal: Add deepsleep support and avoid wakeup tsens trips" 2023-12-12 19:41:13 -08:00
Ashok Kadavul
ee520eb0e2 stmmac: fix crash in LPM
Disable fpesel capability which is not needed
and causing crash during LPM.

Change-Id: I9698cb54edfe09dfc16c4c6b1b241f4dc05e655d
Signed-off-by: Ashok Kadavul <quic_asholnu@quicinc.com>
2023-12-12 19:27:54 -08:00
qctecmdr
9c832e2108 Merge "msm-5.15: Pass the storage type to crypto driver" 2023-12-12 10:03:11 -08:00