1080691 Commits

Author SHA1 Message Date
a24c65a6ea msm5.15: Import ayn changes from ayn_8550.xz (01/18/2026)
Signed-off-by: AnierinB <anierin@evolution-x.org>
2026-01-19 09:53:56 +00:00
Linux Build Service Account
09f888c92a Merge 84851d12f3 on remote branch
Change-Id: Ia6060b48ba72e1f2604cfca4a2d8ca1dead6e6d1
2024-01-16 04:11:32 -08:00
qctecmdr
84851d12f3 Merge "soc: qcom: Add CROW_LTE SoC information to socinfo" 2024-01-04 23:32:41 -08:00
qctecmdr
30b2fde5e6 Merge "clk: qcom: videocc-kalama: Keep video_cc_sleep_clk always ON" 2024-01-04 18:01:01 -08:00
qctecmdr
782a0f3106 Merge "iommu/arm-smmu: Checks added for NULL pointer" 2024-01-04 00:08:44 -08:00
Saranya R
16935d4078 soc: qcom: Add CROW_LTE SoC information to socinfo
Add CROW_LTE SoC information to socinfo.

Change-Id: I8bcd5246c23f2772785e67dea7966852d7a89e88
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
2024-01-03 22:34:40 -08:00
Jagadeesh Kona
5f191aac3d clk: qcom: videocc-kalama: Keep video_cc_sleep_clk always ON
Remove video_cc_sleep_clk modelling and keep it always ON from
clock driver.

Change-Id: I4148e9223ba28a2ad3d2533ead368a76f5095efa
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
2024-01-03 20:08:56 -08:00
qctecmdr
4611894bd2 Merge "arm64: defconfig: align defconfig with kalama le" 2024-01-03 16:34:00 -08:00
qctecmdr
3bf263df39 Merge "Revert "drivers: arm-smmu: Power-on SMMU during freeze"" 2024-01-03 12:14:15 -08:00
Shudan Liu
531d6f5b6b arm64: defconfig: align defconfig with kalama le
kalama lu share the same configurations as kalama le,
it use the same HW platform, so sync defconfig.

Change-Id: I904f84e061a7bafa10328f0b6f27431dd039fb3a
Signed-off-by: Shudan Liu <quic_shudan@quicinc.com>
2024-01-02 23:06:35 -08:00
Sushanth Vadapally
2c7a8e4126 iommu/arm-smmu: Checks added for NULL pointer
Added NULL checks to avoid NULL pointer dereference.

Change-Id: Id418925d708fa6bcafb37991d770d4ac7e2a69d9
Signed-off-by: Sushanth Vadapally <quic_vadapall@quicinc.com>
Signed-off-by: Madhu Ananthula <quic_mananthu@quicinc.com>
2024-01-03 10:47:02 +05:30
Sushanth Vadapally
1b00e8fe32 iommu/arm-smmu: Adding NULL checks
Added NULL checks to avoid NULL pointer dereference.

Change-Id: Ifa92792c116d752b80fbcc94daf53fd9d0cdab04
Signed-off-by: Sushanth Vadapally <quic_vadapall@quicinc.com>
Signed-off-by: Madhu Ananthula <quic_mananthu@quicinc.com>
2024-01-02 14:42:42 +05:30
qctecmdr
dabd5f1d90 Merge "soc: qcom: hab: Refine sanity check in hab_msg_recv" 2024-01-01 19:40:05 -08:00
Manish Nagar
f43c02487a usb: dwc3: Reduce Cyclomatic complexity in dwc3_msm_suspend
Reduce Cyclomatic complexity in dwc3_msm_suspend function
and created the dwc3_msm_suspend_phy for the phy.

Change-Id: Ibcb58185224b9c2429cf543f92533d511374e754
Signed-off-by: Manish Nagar <quic_mnagar@quicinc.com>
2023-12-29 00:06:24 -08:00
qctecmdr
a9da4dc76e Merge "drivers: remoteproc: Ignore SCM call return value for Deep Sleep" 2023-12-27 21:32:20 -08:00
qctecmdr
0327da898a Merge "soc: qcom: hgsl: Fix dereference NULL pointer in hgsl" 2023-12-27 09:39:19 -08:00
qctecmdr
a738c912ef Merge "power_state: bring the QMP channel check to early stage" 2023-12-27 09:39:19 -08:00
Yadu MG
4b5d7627f5 drivers: remoteproc: Ignore SCM call return value for Deep Sleep
ADSP teardown is not possible in LPM. Ignore the return value from
SCM call for the ADSP teardown.

Change-Id: Id41e09222893137e95b327909304973c26b8214b
Signed-off-by: Yadu MG <quic_ymg@quicinc.com>
2023-12-27 17:15:04 +05:30
lixiang
f153490646 soc: qcom: hab: Refine sanity check in hab_msg_recv
Refined the sanity check branch to decrease the complexity.

Change-Id: Ifb99709c62261e75231469f165765d6602f38a82
Signed-off-by: lixiang <quic_lixian@quicinc.com>
2023-12-26 18:15:39 -08:00
qctecmdr
e70e6b4731 Merge "soc: qcom: minidump: Do not copy content from address around X* registers" 2023-12-26 16:24:05 -08:00
qctecmdr
f65410dc2b Merge "pci: msm: Correct link width setting to PCIE20_CAP and GEN2_CTRL_OFF" 2023-12-26 12:46:16 -08:00
Raghavendra Kakarla
06763fa531 power_state: bring the QMP channel check to early stage
Bring the QMP channel availability check to early stage of
probe so that if channel not available we can return EPROBE_DEFER
early instead do register SSR notification and unregister if QMP
get_channel fails.

This patch also duplicates the subsystem name into the subsystem's
data structure instead assigning the name pointer.

Change-Id: I03a37e8c002b8357052542b8594d64b6fb280a03
Signed-off-by: Raghavendra Kakarla <quic_rkakarla@quicinc.com>
2023-12-26 08:27:30 -08:00
qctecmdr
e3a0e2f01a Merge "clk: qcom: sdm845: Update the support for clock controllers" 2023-12-26 04:29:03 -08:00
Qiang Yu
6c873fcda8 pci: msm: Correct link width setting to PCIE20_CAP and GEN2_CTRL_OFF
As per databook, when there are unused lanes in a system, you must
reprogram the following registers through the DBI. For this example, where
a 4-lane controller is connected to a 1-lane PHY:

1. Reprogram LINK_CAPABLE field of the PORT_LINK_CTRL_OFF register to 6h1
from 6h7. This is used by the LTSSM in Detect.

2. Reprogram NUM_OF_LANES[8:0] field of the GEN2_CTRL_OFF register to 9h1
from 9h4. This indicates to the LTSSM, the number of lanes to check for
exiting from L2.Idle or Polling.Active.

3. Reprogram PCIE_CAP_MAX_LINK_WIDTH field of the LINK_CAPABILITIES_REG
register to 6h1 from 6h4. This enables the RP to determine the Maximum
Link Width for this port.

We should not set link_width to PCIE20_CAP and GEN2_CTRL_OFF, but should
set the target_link_width. NUM_OF_LANES[8:0] field is recommended to set
as LINK_WIDTH_X1 even if there are more one lane.

Change-Id: I7b32160d6582b6ddc65d860b5e58f6ec77baf48d
Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
2023-12-26 14:05:39 +08:00
qctecmdr
897561d96a Merge "arm64: configs: vendor: Enable EP and MHI module loading" 2023-12-25 20:14:07 -08:00
Keming Zhang
af05db4d20 soc: qcom: hgsl: Fix dereference NULL pointer in hgsl
page could be NULL when out of memory, only dereference it when allocate
successfully.

Change-Id: Ib3af2dabe9fdb69211b63196086736a5e6c82768
Signed-off-by: Keming Zhang <quic_kemingz@quicinc.com>
2023-12-25 01:43:00 -08:00
qctecmdr
59d966a50d Merge "Revert "Revert "defconfig: sa8225p: enable fbe UFS modules""" 2023-12-22 20:29:26 -08:00
qctecmdr
1853583b3e Merge "msm: adsprpc: Removal of duplicate session check with fastrpc_session_exists" 2023-12-22 20:29:25 -08:00
qctecmdr
41c3adea18 Merge "i2c: i2c-msm-geni: Correct ipc logging for ret value" 2023-12-22 20:29:25 -08:00
Seshu Madhavi Puppala
9a3386af0d Revert "Revert "defconfig: sa8225p: enable fbe UFS modules""
This reverts commit 07c9ebd0b3.

Reason for revert: HWKM clock voting bug fixed in TZ.

Change-Id: Ia0c74c1b4d6acd63ac9463022898b61ed906932d
Signed-off-by: Seshu Madhavi Puppala <quic_spuppala@quicinc.com>
2023-12-22 17:17:04 +05:30
Ansa Ahmed
c5aeaa454d msm: adsprpc: Removal of duplicate session check with fastrpc_session_exists
Removal of duplicate session check with fastrpc_session_exists API as
it is no longer needed. Duplicate session creation is restricted using
set_session_info flag already.

Change-Id: I6b85d96f85e8d1e5af005a6939d8b9a25ca06fcf
Signed-off-by: Ansa Ahmed <quic_ansa@quicinc.com>
2023-12-21 22:36:50 -08:00
Chetan C R
77709cd1bf clk: qcom: sdm845: Update the support for clock controllers
Update GCC, GPUCC, VIDEOCC, DISPCC and CAMCC clock
controllers with vdd_data struct to support voltage
voting for SDM845.

Change-Id: Icc75301ed289d72ee3bf9fdb541b690ac6a7ba53
Signed-off-by: Chetan C R <quic_cchinnad@quicinc.com>
2023-12-22 11:50:05 +05:30
qctecmdr
a4354aef7e Merge "remoteproc: Add check for tzapp coredump cmd response status" 2023-12-21 19:35:09 -08:00
qctecmdr
8045170334 Merge "msm: adsprpc: Support multiple sessions per process" 2023-12-21 19:35:09 -08:00
qctecmdr
8259bbf363 Merge "soc: qcom: handle AON spi device when driver is not ready" 2023-12-21 19:35:08 -08:00
qctecmdr
e51a5956ae Merge "soc: qcom: sanity check for aon_com_dev node" 2023-12-21 19:35:07 -08:00
qctecmdr
ad29ab3f01 Merge "defconfig: Enable CONFIG_QCOM_DMABUF_HEAPS_SYSTEM_UNCACHED for qcs605" 2023-12-21 19:35:07 -08:00
qctecmdr
18753a38a5 Merge "coresight: ETR: Disable BAM SMMU when mapping config is set as bypass" 2023-12-21 19:35:06 -08:00
Linux Build Service Account
534413f6bb Merge 476fcfe5bc on remote branch
Change-Id: I666cbe7a15f4bc6b8c4c60b615ab18f314e08323
2023-12-21 07:57:30 -08:00
qctecmdr
7ef0dba18a Merge "msm: adsprpc: Allocate designated context bank session" 2023-12-21 02:34:23 -08:00
qctecmdr
7679a1c525 Merge "clk: qcom: Add measure support for CPU clk on Trinket" 2023-12-21 02:34:23 -08:00
Saranya R
3d9eb05d27 defconfig: Enable CONFIG_QCOM_DMABUF_HEAPS_SYSTEM_UNCACHED for qcs605
Enable CONFIG_QCOM_DMABUF_HEAPS_SYSTEM_UNCACHED for qcs605.

Change-Id: I51ab216ec785f9f5fedba515b7020d19d6417c6e
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
2023-12-21 12:27:35 +05:30
Yadu MG
2fc5564dea Revert "drivers: arm-smmu: Power-on SMMU during freeze"
This reverts commit 18af9e38ea.

 Reason for revert: Mismatch in power count which prevents sleep.

Change-Id: I8412404f269fd7054b55136cc7cba7734964023f
Signed-off-by: Yadu MG <quic_ymg@quicinc.com>
2023-12-21 12:11:00 +05:30
qctecmdr
39307ce93d Merge "soc: qcom: rpmh: Do not use spin_trylock()" 2023-12-20 22:31:46 -08:00
Praveen koya
65b80d06da soc: qcom: handle AON spi device when driver is not ready
Handle accessing the AON spi device when driver is not ready
& when device enter to shutdown path.

Change-Id: Ibebb2f526b289ee31517d7e52e48ca46ce705d1c
Signed-off-by: Praveen koya <quic_pkoya@quicinc.com>
2023-12-21 11:06:31 +05:30
Ansa Ahmed
b40e47367d msm: adsprpc: Support multiple sessions per process
Currently a process is limited to create only 2 sessions, by toggling
the 30th bit of tgid of the process, to create different process IDs on
DSP remote sybsystem. This approach is not scalable to create unique
process IDs to DSP, by using bits within the tgid of the process. Add
support to allow a process to create multiple sessions by choosing and
sending unique dsp process IDs on DSP remote sub system, instead of tgid
of HLOS process.

Change-Id: I33f52c68453301bdbb83dfb9a10df16143098a49
Acked-by: Santosh Sakore <quic_ssakore@quicinc.com>
Signed-off-by: Ansa Ahmed <quic_ansa@quicinc.com>
2023-12-20 20:19:07 -08:00
Praveen koya
9576c8ce3f soc: qcom: sanity check for aon_com_dev node
Add sanity check to handle write operation on
aon_com_dev node from userspace when driver
is not initialized.

Change-Id: I1bd1fb94ee5b59ff113f8e359c303a2dd1f47430
Signed-off-by: Praveen koya <quic_pkoya@quicinc.com>
2023-12-21 09:06:22 +05:30
Pradnya Dahiwale
54541d5e95 remoteproc: Add check for tzapp coredump cmd response status
Add check for tzapp coredump cmd response status in AoN subsystem.
This check is to confirm whether dumps are written successfully.

Change-Id: Idc452fc1d1e24d25cf4b95d642b68af8a8dd059d
Signed-off-by: Pradnya Dahiwale <quic_pdahiwal@quicinc.com>
2023-12-19 22:45:39 -08:00
qctecmdr
fc9a5a5370 Merge "ice_driver: Fix the ice keyslot conflict" 2023-12-19 21:41:32 -08:00
qctecmdr
2de269c86c Merge "clk: qcom: gpucc: Add support for FREQUENCY LIMITER reset for CROW" 2023-12-19 21:41:32 -08:00