Merge remote-tracking branch 'origin/auto-kernel' into auto-kernel-oss

* origin/auto-kernel:
  printk: filter out some spam
  dsp: q6afe: silence port id related logging
  drm: msm: silence FOD related logging
  compat: drop support for SUSE 15.1
  version: bump
  compat: backport ip_tunnel_parse_protocol and ip_tunnel_header_ops
  queueing: make use of ip_tunnel_parse_protocol
  device: implement header_ops->parse_protocol for AF_PACKET
  compat: SUSE 15.1 is the final SUSE we need to support
  compat: rhel 8.3 backported skb_reset_redirect
  receive: account for napi_gro_receive never returning GRO_DROP
  Fix compilation as part of upmerge from mainline
  version: bump
  ARM: dts: msm: Add support to enable/disable fastmap for each CB
  msm: ipa3: Add support to fastmap/geometry for each CB
  netns: workaround bad 5.2.y backport
  device: avoid circular netns references
  msm: camera: Do CSID reset during CSID release
  msm: vidc: Update VP9 minimum buffer count
  noise: do not assign initiation time in if condition
  ARM: dts: msm: Add rmtfs_sharedmem support for SDM429W
  ARM: dts: msm: enable pmic alarm thermal zone mitigation for Gen3 platform
  ARM: dts: msm: update gpu thermal zone threshold for auto Gen 3 platforms
  ARM: dts: msm: Remove low temperature monitor thermal zones for SA8195P
  soc: qcom: Remove WQ_MEM_RECLAIM from rmnet_ps_wq
  msm: camera: Remove frame id and timestamp checks for spurious SOF
  firmware: qcom: Reinitialize the ring buffer log pointer
  msm: sps: SPS driver changes for dummy BAM connect
  defconfig: trinket: Enable dm-snapshot
  usb: dwc3: Add boundary check while traversing the TRB ring buffer
  Kbuild: remove -fvisibility=hidden from cflags
  soc: qcom: hgsl: Update hfi command data structure
  ARM: dts: msm: add xo_clk for DP display on sm8150
  ARM: dts: msm: add link clk rcg entry on sm8150
  msm: camera: isp: Fix race condition b/w add and apply req
  Documentation: Add documentation for audio drivers
  char: virtio_fastrpc: Add profile mode support
  mhi: core: add mhi_device_get_sync_atomic() to wait until M0
  coresight-tmc: Add NULL check before using pointer 'etr_buf->ops'
  coresight: perf: Add NULL check before using pointer sink
  ARM: dts: msm: Enable Perst Based PCIe Enumeration for SA515M
  ARM: dts: msm: Add PCIe reset support for QCS405
  taskstats: extended taskstats2 with acct fields
  drm/msm/dsi-staging: disallow backlight update during panel mode switch
  ARM: dts: msm: Add STMMAC node for qcs405
  ipa3: Wait for IPA post init for 1000 msec before return
  ARM: dts: msm: Add restart driver to sdm429
  usb: pd: Use break instead of return after soft reset is done
  mtd: msm_qpic_nand: check for page_erased bit along with op_err
  ARM: dts: msm: Update display ram dump memory size
  clk: Add prepare lock in clk_populate_clock_opp_table
  msm: ep_pcie: Vote for pipe clk for early init case
  dma-buf: fill dmabuf->name in dma_buf_export
  disp: msm: dsi: Update mode population logic for POMS feature
  disp: msm: dsi: Fix the total number of modes calculation
  disp: msm: dsi: Add support to skip constant fps for command mode
  ARM: dts: msm: add override nodes for SA515M CDP board
  msm: ep_pcie: Update bit to read if the PHY is ready
  defconfig: sa2150p: Enable STMMAC driver
  net: stmmac: Fix type casting for tlmm addr
  compat: drop centos 8.1 support as 8.2 is now out
  net: stmmac: read descriptor count for IPA rx/tx from dt entry
  ARM: dts: msm: Add a flag to enable TSENS re-init
  ARM: dts: msm: Correct the spi pinctrl active node name
  ARM: dts: msm: update to memory map v1 for QCS610 and QCS410
  drm/msm/dsi-staging: Set transfer time to zero as per mode of timing node
  sched: Fix out of bounds issue in for_each_cluster macro
  wcnss: Include header file for show_stack()
  Revert "ARM: dts: msm: Move pil region of ipa fws for SA8155 VM "
  input: qpnp-power-on: Add a property to force hard-reset offset
  clk: qcom: mdss: Improve logging for 10nm dsi pll
  version: bump
  ARM: dts: msm: Enable STM coresight node for sdmshrike
  ARM: dts: msm: Enable ddr coresight nodes for sdmshrike
  ARM: dts: msm: Enable hwevents coresight nodes for sdmshrike
  ARM: dts: msm: Add coresight nodes for sdmshrike
  drm: msm: dsi-staging: Fix dsi-te-using-wd during POMS
  coresight: etx4x: sysfs: fix spinlock unlock issue
  ARM: dts: msm: Add smp2p based shutdown-ack
  ARM: dts: msm: update board-id for different linux variants
  drm/msm/shd: fix null pointer dereferenced
  drm/msm/sde: fix potential array index out of bounds
  block, bfq: fix use-after-free in bfq_idle_slice_timer_body
  net: stmmac: Fix reading IOMACRO por values
  mtd: msm_qpic_nand: Add a check to read an ONFI parameter page
  arm: dts: msm: set descriptor count to 512 for IPA channel
  ARM: dts: msm: Retain the copyright year
  usb: gadget: notify suspend clear to usb phy in udc
  defconfig: Increase command line size to 2048 for SDM429 BG
  arm: Make COMMAND_LINE_SIZE a kernel config option
  ARM: dts: msm: Remove low temperature monitor thermal zones for SA8155
  mhi: cntrl: qcom: Add EDL image to the firmware table
  drm: Check for lessee in DROP_MASTER ioctl
  compat: remove stale suse support
  ARM: dts: msm: Fix register offset to read PHY status
  ARM: dts: msm: Correct pinctrl console UART setting
  usb: f_cdev: USB remote wake up feature implementation for DUN
  compat: bionic-hwe-5.0/disco kernel backported skb_reset_redirect and ipv6 flow
  qemu: mark per_cpu_load_addr as static for gcc-10
  qemu: work around broken centos8 kernel
  compat: ubuntu appears to have backported ipv6_dst_lookup_flow
  qemu: patch in UTS_UBUNTU_RELEASE_ABI for Ubuntu detection
  qemu: support fetching kernels for arbitrary URLs
  ARM: dts: msm: Allow PM suspend irrespective of host RT state on SA8195
  msm: ais: Fix power up sequence of cci
  ARM: dts: msm: update UBWC highest bank bit for sdmshrike display
  ARM: dts: msm: update macro tile mode for sdmshrike display
  drivers: gnss: Suspend, resume handling for GNSS driver
  gnss: sirf: KPI marker for GNSS driver
  Revert "ARM: dts: qcom: Added metadata partition for UDC"
  arm64: dts: qcom: Drive strength reduction for GNSS UART GPIOs
  msm: ipa: fix ipa_disable_apps_wan_cons_deaggr declaration
  ARM: dts: msm: Added sdmshrike-pm
  defconfig: sa8155: Enable Android Low memory killer
  defconfig: sdmshrike: Enable Android Lowmemory killer
  iommu: arm-smmu: Make restore of smmu-context runtime detectable
  ARM: dts: msm: Add qfprom node for SA8195p
  defconfig: sdmshrike: Enable QFPROM driver for sdmshrike
  defconfig: Enable debug clock controller for sdmshrike
  ARM: dts: msm: Add the clock_debugcc node on sdmshrike
  clk: qcom: Add debug clock controller for sdmshrike
  ARM: dts: msm: fix missing header in display dtsi
  Add sdmshrike for supported platform
  Revert "msm: defconfig: Disable IPA for sm6150 auto"
  Revert "clk: qcom: update pll configs for all clock controllers"
  usb: config: Fix incorrect use of keywords

Signed-off-by: UtsavBalar1231 <utsavbalar1231@gmail.com>

Documentation/devicetree/bindings/input/qpnp-power-on.txt

@@ -116,6 +116,9 @@ Optional properties:
 				configured to support TWM modes.
 - qcom,pbs-client:		Phandle of the PBS client node. Should be
 				defined if 'qcom,support-twm-config' is present.
+- qcom,use-legacy-hard-reset-offset	Boolean property to support legacy
+				hard-reset offset of the PON_RB_SPARE register for
+				some (PON gen2) platforms.
 
 Optional Sub-nodes:
 - qcom,pon_1 ... qcom,pon_n:	These PON child nodes correspond to features

Documentation/devicetree/bindings/pci/msm_ep_pcie.txt

@@ -48,6 +48,8 @@ Optional Properties:
   - qcom,phy-init: The initialization sequence to bring up the PCIe PHY.
     Should be specified in groups (offset, value, delay, direction).
   - qcom,phy-status-reg: Register offset for PHY status.
+  - qcom,phy-status-reg2: For sdxprairie and above use only
+    qcom,phy-status-reg2 as register offset for PHY status.
   - qcom,dbi-base-reg: Register offset for DBI base address.
   - qcom,slv-space-reg: Register offset for slave address space size.
   - qcom,pcie-vendor-id: Vendor id to be written to the Vendor ID register.

Documentation/devicetree/bindings/sound/qcom-audio-dev.txt

@@ -349,6 +349,49 @@ Optional properties:
 		This child device is added after lpass is up to invoke
 		deferred probe devices.
 
+* gpr
+
+Required properties:
+
+ - compatible : "qcom,gpr"
+		This device is added to represent GPR module.
+
+ - qcom,glink-channels: Indicates glink channel to be used.
+ - qcom,intents: Indicates the number of intents to be allocated.
+ - reg: This value provides the subsytem ID to be communicated with.
+
+* gecko-core-platform
+
+Required properties:
+
+ - compatible : "qcom,gecko-core-platform"
+		This device is added to represent Gecko platform driver module.
+
+* gecko_core
+
+Required properties:
+
+ - compatible : "qcom,gecko_core"
+		This device is added to represent Gecko core driver module.
+ - reg: Represents the service to be communicated with.
+
+* audio-pkt
+
+Required properties:
+
+ - compatible : "qcom,audio-pkt"
+		This device is added to represent Audio packet driver module.
+ - qcom,audiopkt-ch-name: Glink channel name to be used.
+ - reg: Represents the service to be communicated with.
+
+* q6prm
+
+Required properties:
+
+ - compatible : "qcom,q6prm"
+		This device is added to represent Q6 PRM driver module.
+ - reg: Represents the service to be communicated with.
+
 * msm-ocmem-audio
 
 Required properties:
@@ -1880,6 +1923,124 @@ Example:
 		qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>;
 	};
 
+* SA8155 Gecko ASoC Machine driver
+
+Required properties:
+- compatible : "qcom,sa8155-gecko-asoc-snd-adp-star" for auto machine driver.
+- qcom,model : The user-visible name of this sound card.
+- asoc-platform: This is phandle list containing the references to platform device
+		 nodes that are used as part of the sound card dai-links.
+- asoc-platform-names: This property contains list of platform names. The order of
+		       the platform names should match to that of the phandle order
+		       given in "asoc-platform".
+- asoc-cpu: This is phandle list containing the references to cpu dai device nodes
+	    that are used as part of the sound card dai-links.
+- asoc-cpu-names: This property contains list of cpu dai names. The order of the
+		  cpu dai names should match to that of the phandle order given
+		  in "asoc-cpu". The cpu names are in the form of "%s.%d" form,
+		  where the id (%d) field represents the back-end AFE port id that
+		  this CPU dai is associated with.
+- asoc-codec: This is phandle list containing the references to codec dai device
+	      nodes that are used as part of the sound card dai-links.
+- asoc-codec-names: This property contains list of codec dai names. The order of the
+		    codec dai names should match to that of the phandle order given
+		    in "asoc-codec".
+Optional properties:
+- qcom,mi2s-audio-intf : Property to specify if MI2S interface is used for the target
+- qcom,auxpcm-audio-intf : Property to specify if AUX PCM interface is used for the target
+- qcom,msm-mi2s-master : List of master/slave configuration for MI2S interfaces
+- qcom,msm_audio_ssr_devs: List the snd event framework clients
+
+Example:
+
+	sound-adp-star {
+		compatible = "qcom,sa8155-gecko-asoc-snd-adp-star";
+		qcom,model = "sa8155-gecko-adp-star-snd-card";
+		qcom,mi2s-audio-intf;
+		qcom,auxpcm-audio-intf;
+		qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>;
+
+		asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
+				<&loopback>, <&compress>, <&hostless>,
+				<&afe>, <&lsm>, <&routing>, <&compr>,
+				<&pcm_noirq>, <&loopback1>, <&pcm_dtmf>;
+		asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
+				"msm-pcm-dsp.2", "msm-voip-dsp",
+				"msm-pcm-voice", "msm-pcm-loopback",
+				"msm-compress-dsp", "msm-pcm-hostless",
+				"msm-pcm-afe", "msm-lsm-client",
+				"msm-pcm-routing", "msm-compr-dsp",
+				"msm-pcm-dsp-noirq", "msm-pcm-loopback.1",
+				"msm-pcm-dtmf";
+		asoc-cpu = <&dai_hdmi>, <&dai_dp>,
+				<&dai_mi2s0>, <&dai_mi2s1>,
+				<&dai_mi2s2>, <&dai_mi2s3>,
+				<&dai_mi2s4>, <&dai_pri_auxpcm>,
+				<&dai_sec_auxpcm>, <&dai_tert_auxpcm>,
+				<&dai_quat_auxpcm>, <&dai_quin_auxpcm>,
+				<&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>,
+				<&afe_proxy_tx>, <&incall_record_rx>,
+				<&incall_record_tx>, <&incall_music_rx>,
+				<&incall_music_2_rx>,
+				<&usb_audio_rx>, <&usb_audio_tx>,
+				<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_rx_1>,
+				<&dai_pri_tdm_rx_2>, <&dai_pri_tdm_rx_3>,
+				<&dai_pri_tdm_tx_0>, <&dai_pri_tdm_tx_1>,
+				<&dai_pri_tdm_tx_2>, <&dai_pri_tdm_tx_3>,
+				<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_rx_1>,
+				<&dai_sec_tdm_rx_2>, <&dai_sec_tdm_rx_3>,
+				<&dai_sec_tdm_tx_0>, <&dai_sec_tdm_tx_1>,
+				<&dai_sec_tdm_tx_2>, <&dai_sec_tdm_tx_3>,
+				<&dai_tert_tdm_rx_0>, <&dai_tert_tdm_rx_1>,
+				<&dai_tert_tdm_rx_2>, <&dai_tert_tdm_rx_3>,
+				<&dai_tert_tdm_rx_4>, <&dai_tert_tdm_tx_0>,
+				<&dai_tert_tdm_tx_1>, <&dai_tert_tdm_tx_2>,
+				<&dai_tert_tdm_tx_3>, <&dai_quat_tdm_rx_0>,
+				<&dai_quat_tdm_rx_1>, <&dai_quat_tdm_rx_2>,
+				<&dai_quat_tdm_rx_3>, <&dai_quat_tdm_tx_0>,
+				<&dai_quat_tdm_tx_1>, <&dai_quat_tdm_tx_2>,
+				<&dai_quat_tdm_tx_3>, <&dai_quin_tdm_rx_0>,
+				<&dai_quin_tdm_rx_1>, <&dai_quin_tdm_rx_2>,
+				<&dai_quin_tdm_rx_3>, <&dai_quin_tdm_tx_0>,
+				<&dai_quin_tdm_tx_1>, <&dai_quin_tdm_tx_2>,
+				<&dai_quin_tdm_tx_3>;
+		asoc-cpu-names = "msm-dai-q6-hdmi.8",  "msm-dai-q6-dp.24608",
+				"msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1",
+				"msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
+				"msm-dai-q6-mi2s.4", "msm-dai-q6-auxpcm.1",
+				"msm-dai-q6-auxpcm.2", "msm-dai-q6-auxpcm.3",
+				"msm-dai-q6-auxpcm.4", "msm-dai-q6-auxpcm.5",
+				"msm-dai-q6-dev.224", "msm-dai-q6-dev.225",
+				"msm-dai-q6-dev.241", "msm-dai-q6-dev.240",
+				"msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772",
+				"msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770",
+				"msm-dai-q6-dev.28672", "msm-dai-q6-dev.28673",
+				"msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36866",
+				"msm-dai-q6-tdm.36868", "msm-dai-q6-tdm.36870",
+				"msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36867",
+				"msm-dai-q6-tdm.36869", "msm-dai-q6-tdm.36871",
+				"msm-dai-q6-tdm.36880", "msm-dai-q6-tdm.36882",
+				"msm-dai-q6-tdm.36884", "msm-dai-q6-tdm.36886",
+				"msm-dai-q6-tdm.36881", "msm-dai-q6-tdm.36883",
+				"msm-dai-q6-tdm.36885", "msm-dai-q6-tdm.36887",
+				"msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36898",
+				"msm-dai-q6-tdm.36900", "msm-dai-q6-tdm.36902",
+				"msm-dai-q6-tdm.36904", "msm-dai-q6-tdm.36897",
+				"msm-dai-q6-tdm.36899", "msm-dai-q6-tdm.36901",
+				"msm-dai-q6-tdm.36903", "msm-dai-q6-tdm.36912",
+				"msm-dai-q6-tdm.36914", "msm-dai-q6-tdm.36916",
+				"msm-dai-q6-tdm.36918", "msm-dai-q6-tdm.36913",
+				"msm-dai-q6-tdm.36915", "msm-dai-q6-tdm.36917",
+				"msm-dai-q6-tdm.36919", "msm-dai-q6-tdm.36928",
+				"msm-dai-q6-tdm.36930", "msm-dai-q6-tdm.36932",
+				"msm-dai-q6-tdm.36934", "msm-dai-q6-tdm.36929",
+				"msm-dai-q6-tdm.36931", "msm-dai-q6-tdm.36933",
+				"msm-dai-q6-tdm.36935";
+		asoc-codec = <&stub_codec>;
+		asoc-codec-names = "msm-stub-codec.1";
+		qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>;
+	};
+
 * SDX ASoC Machine driver
 
 Required properties:

arch/arm/Kconfig

@@ -1467,6 +1467,12 @@ config PAGE_OFFSET
 	default 0xB0000000 if VMSPLIT_3G_OPT
 	default 0xC0000000
 
+config COMMAND_LINE_SIZE
+	int "Maximum size of the command line."
+	default "1024"
+	help
+	This is the per architecture maximum command line size.
+
 config NR_CPUS
 	int "Maximum number of CPUs (2-32)"
 	range 2 32

arch/arm/configs/vendor/sdm429-bg-perf_defconfig

@@ -59,6 +59,7 @@ CONFIG_ARCH_SDM429W=y
 CONFIG_PCI_MSM=y
 CONFIG_SMP=y
 CONFIG_SCHED_MC=y
+CONFIG_COMMAND_LINE_SIZE=2048
 CONFIG_NR_CPUS=8
 CONFIG_ARM_PSCI=y
 CONFIG_PREEMPT=y

arch/arm/configs/vendor/sdm429-bg_defconfig

@@ -59,6 +59,7 @@ CONFIG_ARCH_SDM429W=y
 # CONFIG_VDSO is not set
 CONFIG_SMP=y
 CONFIG_SCHED_MC=y
+CONFIG_COMMAND_LINE_SIZE=2048
 CONFIG_NR_CPUS=8
 CONFIG_ARM_PSCI=y
 CONFIG_PREEMPT=y

arch/arm/include/uapi/asm/setup.h

@@ -17,7 +17,9 @@
 
 #include <linux/types.h>
 
-#define COMMAND_LINE_SIZE 1024
+#ifdef CONFIG_COMMAND_LINE_SIZE
+#define COMMAND_LINE_SIZE CONFIG_COMMAND_LINE_SIZE
+#endif
 
 /* The list ends with an ATAG_NONE node. */
 #define ATAG_NONE	0x00000000

arch/arm64/boot/dts/qcom/pm6155.dtsi

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2018, 2020, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -173,3 +173,33 @@
 		#size-cells = <1>;
 	};
 };
+
+&thermal_zones {
+	pm6155-1-tz {
+		polling-delay-passive = <100>;
+		polling-delay = <0>;
+		thermal-governor = "step_wise";
+		thermal-sensors = <&pm6155_1_tz>;
+		wake-capable-sensor;
+
+		trips {
+			pm6155_trip0: trip0 {
+				temperature = <95000>;
+				hysteresis = <0>;
+				type = "passive";
+			};
+
+			pm6155_trip1: trip1 {
+				temperature = <115000>;
+				hysteresis = <0>;
+				type = "passive";
+			};
+
+			trip2 {
+				temperature = <145000>;
+				hysteresis = <0>;
+				type = "passive";
+			};
+		};
+	};
+};

arch/arm64/boot/dts/qcom/qcs405-pcie.dtsi

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -116,8 +116,14 @@
 						<0>, <0>, <0>, <0>;
 
 		clock-output-names = "pcie_0_pipe_clk";
-		resets = <&clock_gcc GCC_PCIEPHY_0_PHY_BCR>;
-		reset-names = "pcie_0_phy_reset";
+
+		resets = <&clock_gcc GCC_PCIEPHY_0_PHY_BCR>,
+			<&clock_gcc GCC_PCIE_0_BCR>,
+			<&clock_gcc GCC_PCIE_0_PHY_BCR>;
+
+		reset-names = "pcie_0_phy_reset",
+				"pcie_0_core_reset",
+				"pcie_phy_reset";
 
 		pcie_rc0: pcie_rc0 {
 			#address-cells = <5>;

arch/arm64/boot/dts/qcom/qcs405.dtsi

@@ -1548,6 +1548,152 @@
 			< 1401600 MHZ_TO_MBPS( 710, 8) >;
 	};
 
+	mtl_rx_setup: rx-queues-config {
+		snps,rx-queues-to-use = <4>;
+		snps,rx-sched-sp;
+
+		queue0 {
+			snps,dcb-algorithm;
+			snps,map-to-dma-channel = <0x0>;
+			snps,route-up;
+			snps,priority = <0x1>;
+		};
+
+		queue1 {
+			snps,dcb-algorithm;
+			snps,map-to-dma-channel = <0x1>;
+			snps,route-ptp;
+		};
+
+		queue2 {
+			snps,avb-algorithm;
+			snps,map-to-dma-channel = <0x2>;
+			snps,route-avcp;
+		};
+
+		queue3 {
+			snps,avb-algorithm;
+			snps,map-to-dma-channel = <0x3>;
+			snps,priority = <0xC>;
+		};
+	};
+
+	mtl_tx_setup: tx-queues-config {
+		snps,tx-queues-to-use = <5>;
+		snps,tx-sched-sp;
+		queue0 {
+			snps,dcb-algorithm;
+		};
+
+		queue1 {
+			snps,dcb-algorithm;
+		};
+
+		queue2 {
+			snps,avb-algorithm;
+			snps,send_slope = <0x1000>;
+			snps,idle_slope = <0x1000>;
+			snps,high_credit = <0x3E800>;
+			snps,low_credit = <0xFFC18000>;
+		};
+
+		queue3 {
+			snps,avb-algorithm;
+			snps,send_slope = <0x1000>;
+			snps,idle_slope = <0x1000>;
+			snps,high_credit = <0x3E800>;
+			snps,low_credit = <0xFFC18000>;
+		};
+	};
+
+	ethqos_hw: qcom,ethernet@00020000 {
+		compatible = "qcom,stmmac-ethqos";
+		reg = <0x07A80000 0x10000>,
+			  <0x7A96000 0x100>;
+		qcom,arm-smmu;
+		reg-names = "stmmaceth", "rgmii";
+		dma-bit-mask = <32>;
+		emac-core-version = <0x20030000>;
+		interrupts-extended = <&wakegic 0 56 4>, <&wakegic 0 55 4>,
+			<&tlmm 61 2>, <&wakegic 0 300 4>,
+			<&wakegic 0 301 4>, <&wakegic 0 302 4>,
+			<&wakegic 0 303 4>, <&wakegic 0 304 4>,
+			<&wakegic 0 305 4>, <&wakegic 0 306 4>,
+			<&wakegic 0 307 4>, <&wakegic 0 308 4>;
+		interrupt-names = "macirq", "eth_lpi",
+			"phy-intr", "tx-ch0-intr",
+			"tx-ch1-intr", "tx-ch2-intr",
+			"tx-ch3-intr", "tx-ch4-intr",
+			"rx-ch0-intr", "rx-ch1-intr",
+			"rx-ch2-intr", "rx-ch3-intr";
+		qcom,msm-bus,name = "emac";
+		qcom,msm-bus,num-cases = <4>;
+		qcom,msm-bus,num-paths = <2>;
+		qcom,msm-bus,vectors-KBps =
+			<98 512 0 0>, <1 781 0 0>,  /* No vote */
+			<98 512 2500 0>, <1 781 0 40000>,  /* 10Mbps vote */
+			<98 512 25000 0>, <1 781 0 40000>,  /* 100Mbps vote */
+			<98 512 250000 0>, <1 781 0 40000>; /* 1000Mbps vote */
+		qcom,bus-vector-names = "0", "10", "100", "1000";
+		snps,tso;
+		snps,pbl = <32>;
+		mac-address = [00 55 7B B5 7D f7];
+		clocks = <&clock_gcc GCC_ETH_AXI_CLK>,
+			<&clock_gcc GCC_ETH_SLAVE_AHB_CLK>,
+			<&clock_gcc GCC_ETH_PTP_CLK>,
+			<&clock_gcc GCC_ETH_RGMII_CLK>;
+		clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
+		snps,ptp-ref-clk-rate = <230400000>;
+		snps,ptp-req-clk-rate = <57600000>;
+		snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_HIGH>;
+		qcom,phy-intr-redirect = <&tlmm 61 GPIO_ACTIVE_LOW>;
+		/*gdsc_emac-supply = <&emac_gdsc>;*/
+		rx-fifo-depth = <16384>;
+		tx-fifo-depth = <20480>;
+		snps,mtl-rx-config = <&mtl_rx_setup>;
+		snps,mtl-tx-config = <&mtl_tx_setup>;
+
+		pinctrl-names = "dev-emac-mdc", "dev-emac-mdio",
+		"dev-emac-rgmii_txd0_state", "dev-emac-rgmii_txd1_state",
+		"dev-emac-rgmii_txd2_state", "dev-emac-rgmii_txd3_state",
+		"dev-emac-rgmii_txc_state",  "dev-emac-rgmii_tx_ctl_state",
+		"dev-emac-rgmii_rxd0_state", "dev-emac-rgmii_rxd1_state",
+		"dev-emac-rgmii_rxd2_state", "dev-emac-rgmii_rxd3_state",
+		"dev-emac-rgmii_rxc_state", "dev-emac-rgmii_rx_ctl_state",
+		"dev-emac-phy_intr";
+
+		pinctrl-0 = <&emac_mdc>;
+		pinctrl-1 = <&emac_mdio>;
+		pinctrl-2 = <&emac_rgmii_txd0>;
+		pinctrl-3 = <&emac_rgmii_txd1>;
+		pinctrl-4 = <&emac_rgmii_txd2>;
+		pinctrl-5 = <&emac_rgmii_txd3>;
+		pinctrl-6 = <&emac_rgmii_txc>;
+		pinctrl-7 = <&emac_rgmii_tx_ctl>;
+		pinctrl-8 = <&emac_rgmii_rxd0>;
+		pinctrl-9 = <&emac_rgmii_rxd1>;
+		pinctrl-10 = <&emac_rgmii_rxd2>;
+		pinctrl-11 = <&emac_rgmii_rxd3>;
+		pinctrl-12 = <&emac_rgmii_rxc>;
+		pinctrl-13 = <&emac_rgmii_rx_ctl>;
+		pinctrl-14 = <&emac_phy_intr>;
+
+		snps,reset-active-low;
+		snps,reset-delays-us = <0 10000 100000>;
+		phy-mode = "rgmii";
+
+		io-macro-info {
+			io-macro-bypass-mode = <0>;
+			io-interface = "rgmii";
+		};
+
+		ethqos_emb_smmu: ethqos_emb_smmu {
+			compatible = "qcom,emac-smmu-embedded";
+			iommus = <&apps_smmu 0x1400 0x0>;
+			qcom,iova-mapping = <0x80000000 0x40000000>;
+		};
+	};
+
 	emac_hw: qcom,emac@07A80000 {
 		compatible = "qcom,emac-dwc-eqos";
 		reg = <0x07A80000 0x10000>,

arch/arm64/boot/dts/qcom/qcs410-iot.dtsi

@@ -1,4 +1,4 @@
-/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -186,6 +186,34 @@
 	reg = <0 0x8fd00000 0 0x3100000>;
 };
 
+&pil_video_mem {
+	reg = <0 0x92e00000 0 0x500000>;
+};
+
+&wlan_msa_mem {
+	reg = <0 0x93300000 0 0x200000>;
+};
+
+&pil_cdsp_mem {
+	reg = <0 0x93500000 0 0x1e00000>;
+};
+
+&pil_adsp_mem {
+	reg = <0 0x95300000 0 0x1e00000>;
+};
+
+&pil_ipa_fw_mem {
+	reg = <0 0x97100000 0 0x10000>;
+};
+
+&pil_ipa_gsi_mem {
+	reg = <0 0x97110000 0 0x5000>;
+};
+
+&pil_gpu_mem {
+	reg = <0 0x97115000 0 0x2000>;
+};
+
 &L16A {
 	regulator-max-microvolt = <3304000>;
 };

arch/arm64/boot/dts/qcom/qcs610-iot.dtsi

@@ -296,6 +296,34 @@
 	reg = <0 0x8fd00000 0 0x3100000>;
 };
 
+&pil_video_mem {
+	reg = <0 0x92e00000 0 0x500000>;
+};
+
+&wlan_msa_mem {
+	reg = <0 0x93300000 0 0x200000>;
+};
+
+&pil_cdsp_mem {
+	reg = <0 0x93500000 0 0x1e00000>;
+};
+
+&pil_adsp_mem {
+	reg = <0 0x95300000 0 0x1e00000>;
+};
+
+&pil_ipa_fw_mem {
+	reg = <0 0x97100000 0 0x10000>;
+};
+
+&pil_ipa_gsi_mem {
+	reg = <0 0x97110000 0 0x5000>;
+};
+
+&pil_gpu_mem {
+	reg = <0 0x97115000 0 0x2000>;
+};
+
 &sdhc_1 {
 	vdd-supply = <&pm6150l_l11>;
 	qcom,vdd-voltage-level = <2950000 2950000>;

arch/arm64/boot/dts/qcom/sa2150p-ccard.dtsi

@@ -192,6 +192,23 @@
 	extcon = <&usb2_extcon>;
 };
 
+&ethqos_hw {
+	status = "okay";
+	vreg_emac_phy-supply = <&vreg_emac_phy>;
+	vreg_rgmii_io_pads-supply = <&vreg_rgmii_io_pads>;
+	rxc-skew-ps = <0>;
+
+	pinctrl-names = "dev-emac-mdc", "dev-emac-mdio",
+		"dev-emac-rgmii_txd0_state", "dev-emac-rgmii_txd1_state",
+		"dev-emac-rgmii_txd2_state", "dev-emac-rgmii_txd3_state",
+		"dev-emac-rgmii_txc_state",  "dev-emac-rgmii_tx_ctl_state",
+		"dev-emac-rgmii_rxd0_state", "dev-emac-rgmii_rxd1_state",
+		"dev-emac-rgmii_rxd2_state", "dev-emac-rgmii_rxd3_state",
+		"dev-emac-rgmii_rxc_state", "dev-emac-rgmii_rx_ctl_state",
+		"dev-emac-phy_intr", "dev-emac-phy_reset_state";
+	pinctrl-15 = <&emac_phy_reset_state>;
+};
+
 &emac_hw {
 	status = "okay";
 	vreg_emac_phy-supply = <&vreg_emac_phy>;

arch/arm64/boot/dts/qcom/sa515m-ccard.dtsi

@@ -247,6 +247,8 @@
 	pinctrl-1 = <&emac_pin_pps_0>;
 	pinctrl-2 = <&emac_pin_pps_1>;
 	qcom,phy-reset-delay-msecs = <10>;
+	ipa-dma-rx-desc-cnt = <512>;
+	ipa-dma-tx-desc-cnt = <512>;
 };
 
 &vreg_rgmii_io_pads {

arch/arm64/boot/dts/qcom/sa515m-v2-ccard-pcie-ep.dts

@@ -54,6 +54,7 @@
 
 &pcie_ep {
 	status = "ok";
+	qcom,pcie-perst-enum;
 };
 
 &mhi_device {

arch/arm64/boot/dts/qcom/sa515m-v2-ttp.dtsi

@@ -59,6 +59,11 @@
 	status = "disabled";
 };
 
+&ethqos_hw {
+	ipa-dma-rx-desc-cnt = <512>;
+	ipa-dma-tx-desc-cnt = <512>;
+};
+
 &soc {
 	bluetooth: bt_qca6390 {
 		compatible = "qca,qca6390";

arch/arm64/boot/dts/qcom/sa6155-pmic.dtsi

@@ -335,4 +335,64 @@
 			};
 		};
 	};
+
+	pm6155-1-tz {
+		cooling-maps {
+			trip1_cpu0 {
+				trip = <&pm6155_trip1>;
+				cooling-device =
+					<&CPU0 (THERMAL_MAX_LIMIT-1)
+						(THERMAL_MAX_LIMIT-1)>;
+			};
+
+			trip1_cpu1 {
+				trip = <&pm6155_trip1>;
+				cooling-device =
+					<&CPU1 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu2 {
+				trip = <&pm6155_trip1>;
+				cooling-device =
+					<&CPU2 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu3 {
+				trip = <&pm6155_trip1>;
+				cooling-device =
+					<&CPU3 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu4 {
+				trip = <&pm6155_trip1>;
+				cooling-device =
+					<&CPU4 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu5 {
+				trip = <&pm6155_trip1>;
+				cooling-device =
+					<&CPU5 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu6 {
+				trip = <&pm6155_trip1>;
+				cooling-device =
+					<&CPU6 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu7 {
+				trip = <&pm6155_trip1>;
+				cooling-device =
+					<&CPU7 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+		};
+	};
 };

arch/arm64/boot/dts/qcom/sa6155p-vm-la.dts

@@ -19,5 +19,5 @@
 	model = "Qualcomm Technologies, Inc. SA6155P Virtual Machine";
 	compatible = "qcom,sa6155p";
 	qcom,pmic-name = "PM6150";
-	qcom,board-id = <0 0>;
+	qcom,board-id = <0x1000001 0>;
 };

arch/arm64/boot/dts/qcom/sa8155-pmic-overlay.dtsi

@@ -164,6 +164,8 @@ pm8150_1_gpios: &pm8150_gpios {
 	};
 };
 
+#include <dt-bindings/thermal/thermal.h>
+
 &thermal_zones {
 	pm8150_2_temp_alarm: pm8150_2_tz {
 		polling-delay-passive = <100>;
@@ -189,5 +191,123 @@ pm8150_1_gpios: &pm8150_gpios {
 				type = "passive";
 			};
 		};
+
+		cooling-maps {
+			trip1_cpu0 {
+				trip = <&pm8150_2_trip1>;
+				cooling-device =
+					<&CPU0 (THERMAL_MAX_LIMIT-1)
+						(THERMAL_MAX_LIMIT-1)>;
+			};
+
+			trip1_cpu1 {
+				trip = <&pm8150_2_trip1>;
+				cooling-device =
+					<&CPU1 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu2 {
+				trip = <&pm8150_2_trip1>;
+				cooling-device =
+					<&CPU2 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu3 {
+				trip = <&pm8150_2_trip1>;
+				cooling-device =
+					<&CPU3 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu4 {
+				trip = <&pm8150_2_trip1>;
+				cooling-device =
+					<&CPU4 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu5 {
+				trip = <&pm8150_2_trip1>;
+				cooling-device =
+					<&CPU5 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu6 {
+				trip = <&pm8150_2_trip1>;
+				cooling-device =
+					<&CPU6 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu7 {
+				trip = <&pm8150_2_trip1>;
+				cooling-device =
+					<&CPU7 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+		};
+	};
+
+	pm8150_tz {
+		cooling-maps {
+			trip1_cpu0 {
+				trip = <&pm8150_trip1>;
+				cooling-device =
+					<&CPU0 (THERMAL_MAX_LIMIT-1)
+						(THERMAL_MAX_LIMIT-1)>;
+			};
+
+			trip1_cpu1 {
+				trip = <&pm8150_trip1>;
+				cooling-device =
+					<&CPU1 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu2 {
+				trip = <&pm8150_trip1>;
+				cooling-device =
+					<&CPU2 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu3 {
+				trip = <&pm8150_trip1>;
+				cooling-device =
+					<&CPU3 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu4 {
+				trip = <&pm8150_trip1>;
+				cooling-device =
+					<&CPU4 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu5 {
+				trip = <&pm8150_trip1>;
+				cooling-device =
+					<&CPU5 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu6 {
+				trip = <&pm8150_trip1>;
+				cooling-device =
+					<&CPU6 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu7 {
+				trip = <&pm8150_trip1>;
+				cooling-device =
+					<&CPU7 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+		};
 	};
 };

arch/arm64/boot/dts/qcom/sa8155-regulator.dtsi

@@ -1,4 +1,4 @@
-/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -459,13 +459,6 @@
 				= <RPMH_REGULATOR_LEVEL_RETENTION>;
 			qcom,min-dropout-voltage-level = <(-1)>;
 		};
-
-		cx_cdev: regulator-cdev {
-			compatible = "qcom,rpmh-reg-cdev";
-			mboxes = <&qmp_aop 0>;
-			qcom,reg-resource-name = "cx";
-			#cooling-cells = <2>;
-		};
 	};
 
 	/* PM8150_2 S10 = VDD_MX supply */
@@ -497,14 +490,6 @@
 			qcom,init-voltage-level
 				= <RPMH_REGULATOR_LEVEL_RETENTION>;
 		};
-
-		mx_cdev: mx-cdev-lvl {
-			compatible = "qcom,regulator-cooling-device";
-			regulator-cdev-supply = <&VDD_MX_LEVEL>;
-			regulator-levels = <RPMH_REGULATOR_LEVEL_NOM
-					RPMH_REGULATOR_LEVEL_OFF>;
-			#cooling-cells = <2>;
-		};
 	};
 
 	rpmh-regulator-ldoc1 {
@@ -617,13 +602,6 @@
 			qcom,init-voltage-level
 				= <RPMH_REGULATOR_LEVEL_RETENTION>;
 		};
-
-		ebi_cdev: regulator-cdev {
-			compatible = "qcom,rpmh-reg-cdev";
-			mboxes = <&qmp_aop 0>;
-			qcom,reg-resource-name = "ebi";
-			#cooling-cells = <2>;
-		};
 	};
 
 	rpmh-regulator-ldoc12 {

arch/arm64/boot/dts/qcom/sa8155-vm-la-mt.dts

@@ -19,5 +19,5 @@
 	model = "Qualcomm Technologies, Inc. SA8155 Multi LA Virtual Machine";
 	compatible = "qcom,sa8155";
 	qcom,pmic-name = "PM8150";
-	qcom,board-id = <0 0>;
+	qcom,board-id = <0x2000001 0>;
 };

arch/arm64/boot/dts/qcom/sa8155-vm-la.dts

@@ -20,5 +20,5 @@
 	model = "Qualcomm Technologies, Inc. SA8155 Single LA Virtual Machine";
 	compatible = "qcom,sa8155";
 	qcom,pmic-name = "PM8150";
-	qcom,board-id = <0 0>;
+	qcom,board-id = <0x1000001 0>;
 };

arch/arm64/boot/dts/qcom/sa8155-vm-la.dtsi

@@ -30,7 +30,7 @@
 		pil_ipa_fw_mem: pil_ipa_fw_region {
 			compatible = "removed-dma-pool";
 			no-map;
-			reg = <0x0 0x99700000 0x0 0x10000>;
+			reg = <0x0 0x98700000 0x0 0x10000>;
 		};
 
 		pil_ipa_gsi_mem: pil_ipa_gsi_region {

arch/arm64/boot/dts/qcom/sa8155-vm-lv-mt.dts

@@ -19,5 +19,5 @@
 	model = "Qualcomm Technologies, Inc. SA8155 Multi LV Virtual Machine";
 	compatible = "qcom,sa8155";
 	qcom,pmic-name = "PM8150";
-	qcom,board-id = <0 0>;
+	qcom,board-id = <0x2000002 0>;
 };

arch/arm64/boot/dts/qcom/sa8155-vm-lv.dts

@@ -19,6 +19,6 @@
 	model = "Qualcomm Technologies, Inc. SA8155 Single LV Virtual Machine";
 	compatible = "qcom,sa8155";
 	qcom,pmic-name = "PM8150";
-	qcom,board-id = <0 0>;
+	qcom,board-id = <0x1000002 0>;
 };
 

arch/arm64/boot/dts/qcom/sa8155.dtsi

@@ -221,26 +221,10 @@
 };
 
 &thermal_zones {
-	cpu-1-7-lowf {
-		cooling-maps {
-			/delete-node/ mmcx_vdd_cdev;
-		};
-	};
-	gpuss-0-lowf {
-		cooling-maps {
-			/delete-node/ mmcx_vdd_cdev;
-		};
-	};
-	camera-lowf {
-		cooling-maps {
-			/delete-node/ mmcx_vdd_cdev;
-		};
-	};
-	mdm-scl-lowf {
-		cooling-maps {
-			/delete-node/ mmcx_vdd_cdev;
-		};
-	};
+	 /delete-node/ cpu-1-7-lowf;
+	 /delete-node/ gpuss-0-lowf;
+	 /delete-node/ camera-lowf;
+	 /delete-node/ mdm-scl-lowf;
 
 	lmh-dcvs-01 {
 		trips {
@@ -263,7 +247,7 @@
 	gpuss-max-step {
 		trips {
 			gpu-trip0 {
-				temperature = <100000>;
+				temperature = <105000>;
 			};
 		};
 	};

arch/arm64/boot/dts/qcom/sa8195-pmic.dtsi

@@ -120,6 +120,64 @@
 				type = "passive";
 			};
 		};
+
+		cooling-maps {
+			trip1_cpu0 {
+				trip = <&pm8195_1_trip1>;
+				cooling-device =
+					<&CPU0 (THERMAL_MAX_LIMIT-1)
+						(THERMAL_MAX_LIMIT-1)>;
+			};
+
+			trip1_cpu1 {
+				trip = <&pm8195_1_trip1>;
+				cooling-device =
+					<&CPU1 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu2 {
+				trip = <&pm8195_1_trip1>;
+				cooling-device =
+					<&CPU2 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu3 {
+				trip = <&pm8195_1_trip1>;
+				cooling-device =
+					<&CPU3 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu4 {
+				trip = <&pm8195_1_trip1>;
+				cooling-device =
+					<&CPU4 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu5 {
+				trip = <&pm8195_1_trip1>;
+				cooling-device =
+					<&CPU5 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu6 {
+				trip = <&pm8195_1_trip1>;
+				cooling-device =
+					<&CPU6 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu7 {
+				trip = <&pm8195_1_trip1>;
+				cooling-device =
+					<&CPU7 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+		};
 	};
 
 	pm8195_2_temp_alarm: pm8195_2_tz {
@@ -146,6 +204,64 @@
 				type = "passive";
 			};
 		};
+
+		cooling-maps {
+			trip1_cpu0 {
+				trip = <&pm8195_2_trip1>;
+				cooling-device =
+					<&CPU0 (THERMAL_MAX_LIMIT-1)
+						(THERMAL_MAX_LIMIT-1)>;
+			};
+
+			trip1_cpu1 {
+				trip = <&pm8195_2_trip1>;
+				cooling-device =
+					<&CPU1 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu2 {
+				trip = <&pm8195_2_trip1>;
+				cooling-device =
+					<&CPU2 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu3 {
+				trip = <&pm8195_2_trip1>;
+				cooling-device =
+					<&CPU3 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu4 {
+				trip = <&pm8195_2_trip1>;
+				cooling-device =
+					<&CPU4 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu5 {
+				trip = <&pm8195_2_trip1>;
+				cooling-device =
+					<&CPU5 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu6 {
+				trip = <&pm8195_2_trip1>;
+				cooling-device =
+					<&CPU6 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu7 {
+				trip = <&pm8195_2_trip1>;
+				cooling-device =
+					<&CPU7 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+		};
 	};
 
 	pm8195_3_temp_alarm: pm8195_3_tz {
@@ -172,5 +288,63 @@
 				type = "passive";
 			};
 		};
+
+		cooling-maps {
+			trip1_cpu0 {
+				trip = <&pm8195_3_trip1>;
+				cooling-device =
+					<&CPU0 (THERMAL_MAX_LIMIT-1)
+						(THERMAL_MAX_LIMIT-1)>;
+			};
+
+			trip1_cpu1 {
+				trip = <&pm8195_3_trip1>;
+				cooling-device =
+					<&CPU1 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu2 {
+				trip = <&pm8195_3_trip1>;
+				cooling-device =
+					<&CPU2 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu3 {
+				trip = <&pm8195_3_trip1>;
+				cooling-device =
+					<&CPU3 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu4 {
+				trip = <&pm8195_3_trip1>;
+				cooling-device =
+					<&CPU4 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu5 {
+				trip = <&pm8195_3_trip1>;
+				cooling-device =
+					<&CPU5 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu6 {
+				trip = <&pm8195_3_trip1>;
+				cooling-device =
+					<&CPU6 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+
+			trip1_cpu7 {
+				trip = <&pm8195_3_trip1>;
+				cooling-device =
+					<&CPU7 THERMAL_MAX_LIMIT
+						THERMAL_MAX_LIMIT>;
+			};
+		};
 	};
 };

arch/arm64/boot/dts/qcom/sa8195-vm-la-mt.dts

@@ -19,5 +19,5 @@
 	model = "Qualcomm Technologies, Inc. SA8195 Multi LA Virtual Machine";
 	compatible = "qcom,sa8195p";
 	qcom,pmic-name = "PM8195";
-	qcom,board-id = <0 0>;
+	qcom,board-id = <0x2000001 0>;
 };

arch/arm64/boot/dts/qcom/sa8195-vm-la.dts

@@ -19,5 +19,5 @@
 	model = "Qualcomm Technologies, Inc. SA8195 Single LA Virtual Machine";
 	compatible = "qcom,sa8195p";
 	qcom,pmic-name = "PM8195";
-	qcom,board-id = <0 0>;
+	qcom,board-id = <0x1000001 0>;
 };

arch/arm64/boot/dts/qcom/sa8195-vm-lv-mt.dts

@@ -19,5 +19,5 @@
 	model = "Qualcomm Technologies, Inc. SA8195 Multi LV Virtual Machine";
 	compatible = "qcom,sa8195p";
 	qcom,pmic-name = "PM8195";
-	qcom,board-id = <0 0>;
+	qcom,board-id = <0x2000002 0>;
 };

arch/arm64/boot/dts/qcom/sa8195-vm-lv.dts

@@ -19,5 +19,5 @@
 	model = "Qualcomm Technologies, Inc. SA8195 Single LV Virtual Machine";
 	compatible = "qcom,sa8195p";
 	qcom,pmic-name = "PM8195";
-	qcom,board-id = <0 0>;
+	qcom,board-id = <0x1000002 0>;
 };

arch/arm64/boot/dts/qcom/sa8195p-regulator.dtsi

@@ -41,13 +41,6 @@
 			qcom,init-voltage-level
 				= <RPMH_REGULATOR_LEVEL_RETENTION>;
 		};
-
-		ebi_cdev: regulator-cdev {
-			compatible = "qcom,rpmh-reg-cdev";
-			mboxes = <&qmp_aop 0>;
-			qcom,reg-resource-name = "ebi";
-			#cooling-cells = <2>;
-		};
 	};
 
 	/* PM8195_1 S2 = VDDCX_MM supply */
@@ -79,14 +72,6 @@
 			qcom,init-voltage-level
 				= <RPMH_REGULATOR_LEVEL_LOW_SVS>;
 		};
-
-		mm_cx_cdev: mm-cx-cdev-lvl {
-			compatible = "qcom,regulator-cooling-device";
-			regulator-cdev-supply = <&VDD_MMCX_LEVEL_AO>;
-			regulator-levels = <RPMH_REGULATOR_LEVEL_NOM
-					RPMH_REGULATOR_LEVEL_OFF>;
-			#cooling-cells = <2>;
-		};
 	};
 
 	rpmh-regulator-smpa3 {
@@ -188,14 +173,6 @@
 			qcom,init-voltage-level
 				= <RPMH_REGULATOR_LEVEL_RETENTION>;
 		};
-
-		mx_cdev: mx-cdev-lvl {
-			compatible = "qcom,regulator-cooling-device";
-			regulator-cdev-supply = <&VDD_MX_LEVEL>;
-			regulator-levels = <RPMH_REGULATOR_LEVEL_NOM
-					RPMH_REGULATOR_LEVEL_OFF>;
-			#cooling-cells = <2>;
-			};
 	};
 
 	rpmh-regulator-ldoa2 {
@@ -647,12 +624,6 @@
 				= <RPMH_REGULATOR_LEVEL_RETENTION>;
 			qcom,min-dropout-voltage-level = <(-1)>;
 		};
-		cx_cdev: regulator-cdev {
-			compatible = "qcom,rpmh-reg-cdev";
-			mboxes = <&qmp_aop 0>;
-			qcom,reg-resource-name = "cx";
-			#cooling-cells = <2>;
-		};
 	};
 
 	rpmh-regulator-smpe4 {

arch/arm64/boot/dts/qcom/sa8195p.dtsi

@@ -425,26 +425,11 @@
 };
 
 &thermal_zones {
-	cpu-1-7-lowf {
-		cooling-maps {
-			/delete-node/ mmcx_vdd_cdev;
-		};
-	};
-	gpuss-0-lowf {
-		cooling-maps {
-			/delete-node/ mmcx_vdd_cdev;
-		};
-	};
-	camera-lowf {
-		cooling-maps {
-			/delete-node/ mmcx_vdd_cdev;
-		};
-	};
-	mdm-scl-lowf {
-		cooling-maps {
-			/delete-node/ mmcx_vdd_cdev;
-		};
-	};
+	/delete-node/ cpu-1-7-lowf;
+	/delete-node/ gpuss-0-lowf;
+	/delete-node/ camera-lowf;
+	/delete-node/ mdm-scl-lowf;
+	/delete-node/ pcie-lowf;
 
 	lmh-dcvs-01 {
 		trips {
@@ -467,7 +452,7 @@
 	quad-gpuss-max-step {
 		trips {
 			gpu-trip0 {
-				temperature = <100000>;
+				temperature = <105000>;
 			};
 		};
 	};

arch/arm64/boot/dts/qcom/sdm429-blsp.dtsi

@@ -152,7 +152,7 @@
 		qcom,bam-producer-pipe-index = <5>;
 		qcom,master-id = <86>;
 		qcom,use-pinctrl;
-		pinctrl-names = "spi_active", "spi_sleep";
+		pinctrl-names = "spi_default", "spi_sleep";
 		pinctrl-0 = <&spi_1_active>;
 		pinctrl-1 = <&spi_1_sleep>;
 		clock-names = "iface_clk", "core_clk";
@@ -178,7 +178,7 @@
 		qcom,bam-producer-pipe-index = <7>;
 		qcom,master-id = <86>;
 		qcom,use-pinctrl;
-		pinctrl-names = "spi_active", "spi_sleep";
+		pinctrl-names = "spi_default", "spi_sleep";
 		pinctrl-0 = <&spi_2_active>;
 		pinctrl-1 = <&spi_2_sleep>;
 		clock-names = "iface_clk", "core_clk";
@@ -204,7 +204,7 @@
 		qcom,bam-producer-pipe-index = <9>;
 		qcom,master-id = <86>;
 		qcom,use-pinctrl;
-		pinctrl-names = "spi_active", "spi_sleep";
+		pinctrl-names = "spi_default", "spi_sleep";
 		pinctrl-0 = <&spi_3_active>;
 		pinctrl-1 = <&spi_3_sleep>;
 		clock-names = "iface_clk", "core_clk";
@@ -230,7 +230,7 @@
 		qcom,bam-producer-pipe-index = <11>;
 		qcom,master-id = <86>;
 		qcom,use-pinctrl;
-		pinctrl-names = "spi_active", "spi_sleep";
+		pinctrl-names = "spi_default", "spi_sleep";
 		pinctrl-0 = <&spi_4_active>;
 		pinctrl-1 = <&spi_4_sleep>;
 		clock-names = "iface_clk", "core_clk";
@@ -393,7 +393,7 @@
 		qcom,bam-producer-pipe-index = <5>;
 		qcom,master-id = <84>;
 		qcom,use-pinctrl;
-		pinctrl-names = "spi_active", "spi_sleep";
+		pinctrl-names = "spi_default", "spi_sleep";
 		pinctrl-0 = <&spi_5_active>;
 		pinctrl-1 = <&spi_5_sleep>;
 		clock-names = "iface_clk", "core_clk";
@@ -419,7 +419,7 @@
 		qcom,bam-producer-pipe-index = <7>;
 		qcom,master-id = <84>;
 		qcom,use-pinctrl;
-		pinctrl-names = "spi_active", "spi_sleep";
+		pinctrl-names = "spi_default", "spi_sleep";
 		pinctrl-0 = <&spi_6_active>;
 		pinctrl-1 = <&spi_6_sleep>;
 		clock-names = "iface_clk", "core_clk";
@@ -445,7 +445,7 @@
 		qcom,bam-producer-pipe-index = <9>;
 		qcom,master-id = <84>;
 		qcom,use-pinctrl;
-		pinctrl-names = "spi_active", "spi_sleep";
+		pinctrl-names = "spi_default", "spi_sleep";
 		pinctrl-0 = <&spi_7_active>;
 		pinctrl-1 = <&spi_7_sleep>;
 		clock-names = "iface_clk", "core_clk";
@@ -471,7 +471,7 @@
 		qcom,bam-producer-pipe-index = <11>;
 		qcom,master-id = <84>;
 		qcom,use-pinctrl;
-		pinctrl-names = "spi_active", "spi_sleep";
+		pinctrl-names = "spi_default", "spi_sleep";
 		pinctrl-0 = <&spi_8_active>;
 		pinctrl-1 = <&spi_8_sleep>;
 		clock-names = "iface_clk", "core_clk";

arch/arm64/boot/dts/qcom/sdm429.dtsi

@@ -259,6 +259,14 @@
 		};
 	};
 
+
+	restart@4ab000 {
+		compatible = "qcom,pshold";
+		reg = <0x4ab000 0x4>,
+			<0x193d100 0x4>;
+		reg-names = "pshold-base", "tcsr-boot-misc-detect";
+	};
+
 	clocks {
 		xo_board {
 			compatible = "fixed-clock";
@@ -335,7 +343,6 @@
 		qcom,ipi-ping;
 		qcom,wakeup-enable;
 		qcom,scandump-size = <0x40000>;
-		status = "disabled";
 	};
 
 	rpm_bus: qcom,rpm-smd {
@@ -359,6 +366,13 @@
 		status = "disabled";
 	};
 
+	qcom,rmtfs_sharedmem@00000000 {
+		compatible = "qcom,sharedmem-uio";
+		reg = <0x00000000 0x00180000>;
+		reg-names = "rmtfs";
+		qcom,client-id = <0x00000001>;
+	};
+
 	sdhc_1: sdhci@7824900 {
 		compatible = "qcom,sdhci-msm";
 		reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>;

arch/arm64/boot/dts/qcom/sdmmagpie.dtsi

@@ -1470,6 +1470,7 @@
 			    "tsens_tm_physical";
 		interrupts = <0 506 0>, <0 508 0>;
 		interrupt-names = "tsens-upper-lower", "tsens-critical";
+		tsens-reinit-wa;
 		#thermal-sensor-cells = <1>;
 	};
 
@@ -1481,6 +1482,7 @@
 			    "tsens_tm_physical";
 		interrupts = <0 507 0>, <0 509 0>;
 		interrupt-names = "tsens-upper-lower", "tsens-critical";
+		tsens-reinit-wa;
 		#thermal-sensor-cells = <1>;
 	};
 

arch/arm64/boot/dts/qcom/sdmshrike-pinctrl.dtsi

@@ -5001,7 +5001,7 @@
 				config {
 					pins = "gpio85", "gpio86";
 					drive-strength = <2>;
-					bias-disable;
+					bias-pull-down;
 				};
 			};
 		};

arch/arm64/boot/dts/qcom/sdmshrike.dtsi

@@ -2841,6 +2841,7 @@
 #include "sdmshrike-regulators.dtsi"
 #include "sdmshrike-ion.dtsi"
 #include "sdmshrike-bus.dtsi"
+#include "sdmshrike-coresight.dtsi"
 #include "msm-arm-smmu-sdmshrike.dtsi"
 #include "sdmshrike-usb.dtsi"
 #include "sdmshrike-qupv3.dtsi"

arch/arm64/boot/dts/qcom/sdxprairie-v2-dsda-cdp.dts

@@ -16,9 +16,50 @@
 #include "sdxprairie-cdp.dtsi"
 
 / {
-	model = "Qualcomm Technologies, Inc. SDXPRAIRIE v2 CDP
-				TELEMATICS AU DSDA";
+	model = "Qualcomm Technologies, Inc. SDXPRAIRIE v2 CDP TEL AU DSDA";
 	compatible = "qcom,sdxprairie-cdp",
 		"qcom,sdxprairie", "qcom,cdp";
 	qcom,board-id = <0x6010001 0x0>;
 };
+
+/* delete pm8150b nodes */
+&thermal_zones {
+	/delete-node/ pm8150b-wp-therm;
+	/delete-node/ pm8150b_tz;
+	/delete-node/ pm8150b-ibat-lvl0;
+	/delete-node/ pm8150b-ibat-lvl1;
+	/delete-node/ pm8150b-vbat-lvl0;
+	/delete-node/ pm8150b-vbat-lvl1;
+	/delete-node/ pm8150b-vbat-lvl2;
+	/delete-node/ pm8150b-bcl-lvl0;
+	/delete-node/ pm8150b-bcl-lvl1;
+	/delete-node/ pm8150b-bcl-lvl2;
+	/delete-node/ soc;
+};
+
+&usb {
+	extcon = <&vbus_detect>;
+};
+
+&spmi_bus {
+	/delete-node/ qpnp,fg;
+	/delete-node/ bcl@1d00;
+	/delete-node/ qcom,usb-pdphy@1700;
+	/delete-node/ qcom,qpnp-smb5;
+	/delete-node/ adc_tm@3500;
+	/delete-node/ vadc@3100;
+	/delete-node/ qcom,pm8150b@2;
+	/delete-node/ qcom,pm8150b@3;
+};
+
+&qnand_1 {
+	status = "ok";
+};
+
+&blsp1_uart2b_hs {
+	status = "okay";
+};
+
+&vbus_detect {
+	status = "okay";
+};

arch/arm64/boot/dts/qcom/sdxprairie.dtsi

@@ -547,7 +547,6 @@
 		qcom,use-ipa-pm;
 		qcom,use-xbl-boot;
 		qcom,arm-smmu;
-		qcom,smmu-fast-map;
 		qcom,wlan-ce-db-over-pcie;
 		qcom,bandwidth-vote-for-ipa;
 		qcom,msm-bus,name = "ipa";
@@ -608,6 +607,8 @@
 				/* modem tables in IMEM */
 				<0x14688000 0x14688000 0x3000>;
 			qcom,ipa-q6-smem-size = <26624>;
+			qcom,smmu-fast-map;
+			qcom,geometry-mapping = <0x0 0xF0000000>;
 		};
 
 		ipa_smmu_wlan: ipa_smmu_wlan {
@@ -1236,7 +1237,7 @@
 		qcom,pcie-active-config;
 		qcom,pcie-aggregated-irq;
 		qcom,pcie-mhi-a7-irq;
-		qcom,phy-status-reg = <0x814>;
+		qcom,phy-status-reg2 = <0x1214>;
 		qcom,mhi-soc-reset-offset = <0xb01b8>;
 
 		qcom,phy-init = <0x1240 0x001 0x0 0x1

arch/arm64/boot/dts/qcom/sm6150.dtsi

@@ -634,7 +634,7 @@
 		};
 
 		disp_rdump_memory: disp_rdump_region@9c000000 {
-			reg = <0x0 0x9c000000 0x0 0x01000000>;
+			reg = <0x0 0x9c000000 0x0 0x0f00000>;
 			label = "disp_rdump_region";
 		};
 

arch/arm64/configs/vendor/sa2150p-perf_defconfig

@@ -249,6 +249,9 @@ CONFIG_DM_VERITY_FEC=y
 CONFIG_NETDEVICES=y
 CONFIG_DUMMY=y
 CONFIG_TUN=y
+CONFIG_STMMAC_ETH=y
+# CONFIG_DWMAC_GENERIC is not set
+# CONFIG_DWMAC_IPQ806X is not set
 CONFIG_AT803X_PHY=y
 CONFIG_MICREL_PHY=y
 CONFIG_PPP=y
@@ -290,7 +293,6 @@ CONFIG_SPI_QUP=y
 CONFIG_SPMI=y
 CONFIG_SLIMBUS_MSM_NGD=y
 CONFIG_PPS_CLIENT_GPIO=y
-CONFIG_PTP_1588_CLOCK=y
 CONFIG_PINCTRL_QCS405=y
 CONFIG_FRAGMENTED_GPIO_ADDRESS_SPACE=y
 CONFIG_PINCTRL_QCOM_SPMI_PMIC=y

arch/arm64/configs/vendor/sa2150p_defconfig

@@ -255,6 +255,9 @@ CONFIG_DM_VERITY_FEC=y
 CONFIG_NETDEVICES=y
 CONFIG_DUMMY=y
 CONFIG_TUN=y
+CONFIG_STMMAC_ETH=y
+# CONFIG_DWMAC_GENERIC is not set
+# CONFIG_DWMAC_IPQ806X is not set
 CONFIG_AT803X_PHY=y
 CONFIG_MICREL_PHY=y
 CONFIG_PPP=y
@@ -300,7 +303,6 @@ CONFIG_SPMI=y
 CONFIG_SPMI_MSM_PMIC_ARB_DEBUG=y
 CONFIG_SLIMBUS_MSM_NGD=y
 CONFIG_PPS_CLIENT_GPIO=y
-CONFIG_PTP_1588_CLOCK=y
 CONFIG_PINCTRL_QCS405=y
 CONFIG_FRAGMENTED_GPIO_ADDRESS_SPACE=y
 CONFIG_PINCTRL_QCOM_SPMI_PMIC=y

arch/arm64/configs/vendor/sdmsteppe-auto-perf_defconfig

@@ -520,7 +520,11 @@ CONFIG_QPNP_REVID=y
 CONFIG_SPS=y
 CONFIG_SPS_SUPPORT_NDP_BAM=y
 CONFIG_USB_BAM=y
-CONFIG_GSI=y
+CONFIG_IPA3=y
+CONFIG_IPA_WDI_UNIFIED_API=y
+CONFIG_RMNET_IPA3=y
+CONFIG_RNDIS_IPA=y
+CONFIG_IPA_UT=y
 CONFIG_MSM_11AD=m
 CONFIG_SPMI_PMIC_CLKDIV=y
 CONFIG_MSM_CLK_AOP_QMP=y

arch/arm64/configs/vendor/sdmsteppe-auto_defconfig

@@ -547,7 +547,12 @@ CONFIG_QPNP_REVID=y
 CONFIG_SPS=y
 CONFIG_SPS_SUPPORT_NDP_BAM=y
 CONFIG_USB_BAM=y
-CONFIG_GSI=y
+CONFIG_IPA3=y
+CONFIG_IPA_DEBUG=y
+CONFIG_IPA_WDI_UNIFIED_API=y
+CONFIG_RMNET_IPA3=y
+CONFIG_RNDIS_IPA=y
+CONFIG_IPA_UT=y
 CONFIG_MSM_11AD=m
 CONFIG_SPMI_PMIC_CLKDIV=y
 CONFIG_MSM_CLK_AOP_QMP=y

arch/arm64/configs/vendor/trinket-perf_defconfig

@@ -283,6 +283,7 @@ CONFIG_MD=y
 CONFIG_BLK_DEV_DM=y
 CONFIG_DM_CRYPT=y
 CONFIG_DM_DEFAULT_KEY=y
+CONFIG_DM_SNAPSHOT=y
 CONFIG_DM_UEVENT=y
 CONFIG_DM_VERITY=y
 CONFIG_DM_VERITY_FEC=y

arch/arm64/configs/vendor/trinket_defconfig

@@ -294,6 +294,7 @@ CONFIG_MD=y
 CONFIG_BLK_DEV_DM=y
 CONFIG_DM_CRYPT=y
 CONFIG_DM_DEFAULT_KEY=y
+CONFIG_DM_SNAPSHOT=y
 CONFIG_DM_UEVENT=y
 CONFIG_DM_VERITY=y
 CONFIG_DM_VERITY_FEC=y

drivers/bus/mhi/controllers/mhi_qcom.c

@@ -33,13 +33,16 @@ struct firmware_info {
 };
 
 static const struct firmware_info firmware_table[] = {
-	{.dev_id = 0x308, .fw_image = "sdx65m/sbl1.mbn"},
-	{.dev_id = 0x307, .fw_image = "sdx60m/sbl1.mbn"},
-	{.dev_id = 0x306, .fw_image = "sdx55m/sbl1.mbn"},
+	{.dev_id = 0x308, .fw_image = "sdx65m/sbl1.mbn",
+	 .edl_image = "sdx65m/edl.mbn"},
+	{.dev_id = 0x307, .fw_image = "sdx60m/sbl1.mbn",
+	 .edl_image = "sdx60m/edl.mbn"},
+	{.dev_id = 0x306, .fw_image = "sdx55m/sbl1.mbn",
+	 .edl_image = "sdx55m/edl.mbn"},
 	{.dev_id = 0x305, .fw_image = "sdx50m/sbl1.mbn"},
 	{.dev_id = 0x304, .fw_image = "sbl.mbn", .edl_image = "edl.mbn"},
 	/* default, set to debug.mbn */
-	{.fw_image = "debug.mbn"},
+	{.fw_image = "debug.mbn", .edl_image = "debug.mbn"},
 };
 
 static int debug_mode;

drivers/bus/mhi/core/mhi_internal.h

@@ -752,6 +752,8 @@ struct mhi_bus {
 
 /* default MHI timeout */
 #define MHI_TIMEOUT_MS (1000)
+#define MHI_FORCE_WAKE_DELAY_US (100)
+
 extern struct mhi_bus mhi_bus;
 
 struct mhi_controller *find_mhi_controller_by_name(const char *name);

drivers/bus/mhi/core/mhi_pm.c

@@ -404,35 +404,42 @@ void mhi_pm_m1_transition(struct mhi_controller *mhi_cntrl)
 	enum MHI_PM_STATE state;
 
 	write_lock_irq(&mhi_cntrl->pm_lock);
+	/* Just check if we are racing with device_wake assertion */
+	if (atomic_read(&mhi_cntrl->dev_wake))
+		MHI_VERB("M2 transition request post dev_wake:%d\n",
+			 atomic_read(&mhi_cntrl->dev_wake));
+
 	/* if it fails, means we transition to M3 */
 	state = mhi_tryset_pm_state(mhi_cntrl, MHI_PM_M2);
-	if (state == MHI_PM_M2) {
-		MHI_VERB("Entered M2 State\n");
-		mhi_set_mhi_state(mhi_cntrl, MHI_STATE_M2);
-		mhi_cntrl->dev_state = MHI_STATE_M2;
-		mhi_cntrl->M2++;
-
-		write_unlock_irq(&mhi_cntrl->pm_lock);
-		wake_up_all(&mhi_cntrl->state_event);
-
-		/* transfer pending, exit M2 immediately */
-		if (unlikely(atomic_read(&mhi_cntrl->pending_pkts) ||
-			     atomic_read(&mhi_cntrl->dev_wake))) {
-			MHI_VERB(
-				 "Exiting M2 Immediately, pending_pkts:%d dev_wake:%d\n",
-				 atomic_read(&mhi_cntrl->pending_pkts),
-				 atomic_read(&mhi_cntrl->dev_wake));
-			read_lock_bh(&mhi_cntrl->pm_lock);
-			mhi_cntrl->wake_get(mhi_cntrl, true);
-			mhi_cntrl->wake_put(mhi_cntrl, true);
-			read_unlock_bh(&mhi_cntrl->pm_lock);
-		} else {
-			mhi_cntrl->status_cb(mhi_cntrl, mhi_cntrl->priv_data,
-					     MHI_CB_IDLE);
-		}
-	} else {
+	if (state != MHI_PM_M2) {
+		/* Nothing to be done, handle M3 transition later */
 		write_unlock_irq(&mhi_cntrl->pm_lock);
+		return;
 	}
+
+	MHI_VERB("Entered M2 State\n");
+	mhi_set_mhi_state(mhi_cntrl, MHI_STATE_M2);
+	mhi_cntrl->dev_state = MHI_STATE_M2;
+	mhi_cntrl->M2++;
+
+	write_unlock_irq(&mhi_cntrl->pm_lock);
+	wake_up_all(&mhi_cntrl->state_event);
+
+	/* transfer pending, exit M2 immediately */
+	if (unlikely(atomic_read(&mhi_cntrl->pending_pkts) ||
+		     atomic_read(&mhi_cntrl->dev_wake))) {
+		MHI_VERB(
+			 "Exiting M2 Immediately, pending_pkts:%d dev_wake:%d\n",
+			 atomic_read(&mhi_cntrl->pending_pkts),
+			 atomic_read(&mhi_cntrl->dev_wake));
+		read_lock_bh(&mhi_cntrl->pm_lock);
+		mhi_cntrl->wake_get(mhi_cntrl, true);
+		mhi_cntrl->wake_put(mhi_cntrl, true);
+		read_unlock_bh(&mhi_cntrl->pm_lock);
+		return;
+	}
+
+	mhi_cntrl->status_cb(mhi_cntrl, mhi_cntrl->priv_data, MHI_CB_IDLE);
 }
 
 int mhi_pm_m3_transition(struct mhi_controller *mhi_cntrl)
@@ -1580,6 +1587,57 @@ int mhi_device_get_sync(struct mhi_device *mhi_dev, int vote)
 }
 EXPORT_SYMBOL(mhi_device_get_sync);
 
+int mhi_device_get_sync_atomic(struct mhi_device *mhi_dev, int timeout_us)
+{
+	struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl;
+
+	read_lock_bh(&mhi_cntrl->pm_lock);
+	if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) {
+		read_unlock_bh(&mhi_cntrl->pm_lock);
+		return -EIO;
+	}
+
+	mhi_cntrl->wake_get(mhi_cntrl, true);
+	read_unlock_bh(&mhi_cntrl->pm_lock);
+
+	atomic_inc(&mhi_dev->dev_vote);
+	pm_wakeup_hard_event(&mhi_cntrl->mhi_dev->dev);
+	mhi_cntrl->runtime_get(mhi_cntrl, mhi_cntrl->priv_data);
+
+	/* Return if client doesn't want us to wait */
+	if (!timeout_us) {
+		if (mhi_cntrl->pm_state != MHI_PM_M0)
+			MHI_ERR("Return without waiting for M0\n");
+
+		mhi_cntrl->runtime_put(mhi_cntrl, mhi_cntrl->priv_data);
+		return 0;
+	}
+
+	while (mhi_cntrl->pm_state != MHI_PM_M0 &&
+			!MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state) &&
+			timeout_us > 0) {
+		udelay(MHI_FORCE_WAKE_DELAY_US);
+		timeout_us -= MHI_FORCE_WAKE_DELAY_US;
+	}
+
+	if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state) || timeout_us <= 0) {
+		MHI_ERR("Did not enter M0 state, cur_state:%s pm_state:%s\n",
+			TO_MHI_STATE_STR(mhi_cntrl->dev_state),
+			to_mhi_pm_state_str(mhi_cntrl->pm_state));
+		read_lock_bh(&mhi_cntrl->pm_lock);
+		mhi_cntrl->wake_put(mhi_cntrl, false);
+		read_unlock_bh(&mhi_cntrl->pm_lock);
+		atomic_dec(&mhi_dev->dev_vote);
+		mhi_cntrl->runtime_put(mhi_cntrl, mhi_cntrl->priv_data);
+		return -ETIMEDOUT;
+	}
+
+	mhi_cntrl->runtime_put(mhi_cntrl, mhi_cntrl->priv_data);
+
+	return 0;
+}
+EXPORT_SYMBOL(mhi_device_get_sync_atomic);
+
 void mhi_device_put(struct mhi_device *mhi_dev, int vote)
 {
 	struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl;

drivers/char/virtio_fastrpc.c

@@ -61,7 +61,6 @@
 #define DEBUGFS_SIZE			3072
 #define PID_SIZE			10
 #define UL_SIZE				25
-#define FASTRPC_STATIC_HANDLE_KERNEL	1
 
 #define VIRTIO_FASTRPC_CMD_OPEN		1
 #define VIRTIO_FASTRPC_CMD_CLOSE	2
@@ -98,6 +97,33 @@
 			memmove((dst), (src), (size));\
 	} while (0)
 
+#define PERF_KEYS \
+	"count:flush:map:copy:rpmsg:getargs:putargs:invalidate:invoke:tid:ptr"
+#define FASTRPC_STATIC_HANDLE_KERNEL	1
+#define FASTRPC_STATIC_HANDLE_LISTENER	3
+#define FASTRPC_STATIC_HANDLE_MAX	20
+
+#define PERF_END (void)0
+
+#define PERF(enb, cnt, ff) \
+	{\
+		struct timespec startT = {0};\
+		int64_t *counter = cnt;\
+		if (enb && counter) {\
+			getnstimeofday(&startT);\
+		} \
+		ff ;\
+		if (enb && counter) {\
+			*counter += getnstimediff(&startT);\
+		} \
+	}
+
+#define GET_COUNTER(perf_ptr, offset)  \
+	(perf_ptr != NULL ?\
+		(((offset >= 0) && (offset < PERF_KEY_MAX)) ?\
+			(int64_t *)(perf_ptr + offset)\
+				: (int64_t *)NULL) : (int64_t *)NULL)
+
 struct virt_msg_hdr {
 	u32 pid;	/* GVM pid */
 	u32 tid;	/* GVM tid */
@@ -181,9 +207,37 @@ struct fastrpc_apps {
 	struct virt_fastrpc_msg *msgtable[FASTRPC_MSG_MAX];
 };
 
+enum fastrpc_perfkeys {
+	PERF_COUNT = 0,
+	PERF_FLUSH = 1,
+	PERF_MAP = 2,
+	PERF_COPY = 3,
+	PERF_LINK = 4,
+	PERF_GETARGS = 5,
+	PERF_PUTARGS = 6,
+	PERF_INVARGS = 7,
+	PERF_INVOKE = 8,
+	PERF_KEY_MAX = 9,
+};
+
+struct fastrpc_perf {
+	int64_t count;
+	int64_t flush;
+	int64_t map;
+	int64_t copy;
+	int64_t link;
+	int64_t getargs;
+	int64_t putargs;
+	int64_t invargs;
+	int64_t invoke;
+	int64_t tid;
+	struct hlist_node hn;
+};
+
 struct fastrpc_file {
 	spinlock_t hlock;
 	struct hlist_head maps;
+	struct hlist_head perf;
 	struct hlist_head remote_bufs;
 	uint32_t mode;
 	uint32_t profile;
@@ -195,6 +249,7 @@ struct fastrpc_file {
 	int dsp_proc_init;
 	struct fastrpc_apps *apps;
 	struct dentry *debugfs_file;
+	struct mutex perf_mutex;
 	struct mutex map_mutex;
 	/* Identifies the device (MINOR_NUM_DEV / MINOR_NUM_SECURE_DEV) */
 	int dev_minor;
@@ -242,6 +297,45 @@ static inline int64_t getnstimediff(struct timespec *start)
 	return ns;
 }
 
+static inline int64_t *getperfcounter(struct fastrpc_file *fl, int key)
+{
+	int err = 0;
+	int64_t *val = NULL;
+	struct fastrpc_perf *perf = NULL, *fperf = NULL;
+	struct hlist_node *n = NULL;
+
+	VERIFY(err, !IS_ERR_OR_NULL(fl));
+	if (err)
+		goto bail;
+
+	mutex_lock(&fl->perf_mutex);
+	hlist_for_each_entry_safe(perf, n, &fl->perf, hn) {
+		if (perf->tid == current->pid) {
+			fperf = perf;
+			break;
+		}
+	}
+
+	if (IS_ERR_OR_NULL(fperf)) {
+		fperf = kzalloc(sizeof(*fperf), GFP_KERNEL);
+
+		VERIFY(err, !IS_ERR_OR_NULL(fperf));
+		if (err) {
+			mutex_unlock(&fl->perf_mutex);
+			kfree(fperf);
+			goto bail;
+		}
+
+		fperf->tid = current->pid;
+		hlist_add_head(&fperf->hn, &fl->perf);
+	}
+
+	val = ((int64_t *)fperf) + key;
+	mutex_unlock(&fl->perf_mutex);
+bail:
+	return val;
+}
+
 static void *get_a_tx_buf(void)
 {
 	struct fastrpc_apps *me = &gfa;
@@ -486,6 +580,11 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel,
 	struct fastrpc_mmap **maps;
 	size_t copylen = 0, size = 0;
 	char *payload;
+	struct timespec invoket = {0};
+	int64_t *perf_counter = getperfcounter(fl, PERF_COUNT);
+
+	if (fl->profile)
+		getnstimeofday(&invoket);
 
 	bufs = REMOTE_SCALARS_LENGTH(invoke->sc);
 	size = bufs * sizeof(*lpra) + bufs * sizeof(*fds)
@@ -508,6 +607,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel,
 		fds = NULL;
 	}
 
+	PERF(fl->profile, GET_COUNTER(perf_counter, PERF_MAP),
 	/* calculate len required for copying */
 	for (i = 0; i < inbufs + outbufs; i++) {
 		size_t len = lpra[i].buf.len;
@@ -530,6 +630,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel,
 		if (i < inbufs)
 			outbufs_offset += len;
 	}
+	PERF_END);
 	size = bufs * sizeof(*rpra) + copylen + sizeof(*vmsg);
 	msg = virt_alloc_msg(size);
 	if (!msg)
@@ -551,6 +652,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel,
 	rpra = (struct virt_fastrpc_buf *)vmsg->pra;
 	payload = (char *)&rpra[bufs];
 
+	PERF(fl->profile, GET_COUNTER(perf_counter, PERF_COPY),
 	for (i = 0; i < inbufs + outbufs; i++) {
 		size_t len = lpra[i].buf.len;
 		struct sg_table *table;
@@ -582,7 +684,16 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel,
 			payload += len;
 		}
 	}
+	PERF_END);
 
+	if (fl->profile) {
+		int64_t *count = GET_COUNTER(perf_counter, PERF_GETARGS);
+
+		if (count)
+			*count += getnstimediff(&invoket);
+	}
+
+	PERF(fl->profile, GET_COUNTER(perf_counter, PERF_LINK),
 	sg_init_one(sg, vmsg, size);
 
 	mutex_lock(&me->lock);
@@ -594,6 +705,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel,
 
 	virtqueue_kick(me->svq);
 	mutex_unlock(&me->lock);
+	PERF_END);
 
 	wait_for_completion(&msg->work);
 
@@ -605,6 +717,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel,
 	rpra = (struct virt_fastrpc_buf *)rsp->pra;
 	payload = (char *)&rpra[bufs] + outbufs_offset;
 
+	PERF(fl->profile, GET_COUNTER(perf_counter, PERF_PUTARGS),
 	for (i = inbufs; i < inbufs + outbufs; i++) {
 		if (!maps[i]) {
 			K_COPY_TO_USER(err, kernel, lpra[i].buf.pv,
@@ -619,6 +732,7 @@ static int virt_fastrpc_invoke(struct fastrpc_file *fl, uint32_t kernel,
 		}
 		payload += rpra[i].len;
 	}
+	PERF_END);
 bail:
 	if (rsp) {
 		sg_init_one(sg, rsp, me->buf_size);
@@ -651,8 +765,11 @@ static int fastrpc_internal_invoke(struct fastrpc_file *fl,
 	int domain = fl->domain;
 	int handles, err = 0;
 	struct timespec invoket = {0};
+	int64_t *perf_counter = getperfcounter(fl, PERF_COUNT);
+
+	if (fl->profile)
+		getnstimeofday(&invoket);
 
-	getnstimeofday(&invoket);
 	if (!kernel) {
 		VERIFY(err, invoke->handle != FASTRPC_STATIC_HANDLE_KERNEL);
 		if (err) {
@@ -679,6 +796,20 @@ static int fastrpc_internal_invoke(struct fastrpc_file *fl,
 	}
 
 	err = virt_fastrpc_invoke(fl, kernel, inv);
+	if (fl->profile) {
+		if (invoke->handle != FASTRPC_STATIC_HANDLE_LISTENER) {
+			int64_t *count = GET_COUNTER(perf_counter, PERF_INVOKE);
+
+			if (count)
+				*count += getnstimediff(&invoket);
+		}
+		if (invoke->handle > FASTRPC_STATIC_HANDLE_MAX) {
+			int64_t *count = GET_COUNTER(perf_counter, PERF_COUNT);
+
+			if (count)
+				*count = *count + 1;
+		}
+	}
 bail:
 	return err;
 }
@@ -703,6 +834,8 @@ static ssize_t fastrpc_debugfs_read(struct file *filp, char __user *buffer,
 	if (fl) {
 		len += scnprintf(fileinfo + len, DEBUGFS_SIZE - len,
 				"\n%s %d\n", " CHANNEL =", fl->domain);
+		len += scnprintf(fileinfo + len, DEBUGFS_SIZE - len,
+				"%s %9s %d\n", "profile", ":", fl->profile);
 	}
 
 	if (len > DEBUGFS_SIZE)
@@ -931,6 +1064,7 @@ static int fastrpc_open(struct inode *inode, struct file *filp)
 
 	spin_lock_init(&fl->hlock);
 	INIT_HLIST_HEAD(&fl->maps);
+	INIT_HLIST_HEAD(&fl->perf);
 	INIT_HLIST_HEAD(&fl->remote_bufs);
 	fl->tgid = current->tgid;
 	fl->apps = me;
@@ -943,12 +1077,14 @@ static int fastrpc_open(struct inode *inode, struct file *filp)
 	fl->dsp_proc_init = 0;
 	filp->private_data = fl;
 	mutex_init(&fl->map_mutex);
+	mutex_init(&fl->perf_mutex);
 	return 0;
 }
 
 static int fastrpc_file_free(struct fastrpc_file *fl)
 {
 	struct fastrpc_mmap *map = NULL, *lmap = NULL;
+	struct fastrpc_perf *perf = NULL, *fperf = NULL;
 
 	if (!fl)
 		return 0;
@@ -975,6 +1111,21 @@ static int fastrpc_file_free(struct fastrpc_file *fl)
 	} while (lmap);
 	mutex_unlock(&fl->map_mutex);
 
+	mutex_lock(&fl->perf_mutex);
+	do {
+		struct hlist_node *pn = NULL;
+
+		fperf = NULL;
+		hlist_for_each_entry_safe(perf, pn, &fl->perf, hn) {
+			hlist_del_init(&perf->hn);
+			fperf = perf;
+			break;
+		}
+		kfree(fperf);
+	} while (fperf);
+	mutex_unlock(&fl->perf_mutex);
+	mutex_destroy(&fl->perf_mutex);
+
 	fastrpc_remote_buf_list_free(fl);
 	mutex_destroy(&fl->map_mutex);
 	kfree(fl);
@@ -1736,8 +1887,7 @@ static long fastrpc_ioctl(struct file *file, unsigned int ioctl_num,
 			fl->mode = (uint32_t)ioctl_param;
 			break;
 		case FASTRPC_MODE_PROFILE:
-			err = -ENOTTY;
-			dev_err(me->dev, "profile mode is not supported\n");
+			fl->profile = (uint32_t)ioctl_param;
 			break;
 		case FASTRPC_MODE_SESSION:
 			err = -ENOTTY;
@@ -1749,8 +1899,43 @@ static long fastrpc_ioctl(struct file *file, unsigned int ioctl_num,
 		}
 		break;
 	case FASTRPC_IOCTL_GETPERF:
-		err = -ENOTTY;
-		dev_err(me->dev, "get perf is not supported\n");
+		K_COPY_FROM_USER(err, 0, &p.perf,
+					param, sizeof(p.perf));
+		if (err)
+			goto bail;
+		p.perf.numkeys = sizeof(struct fastrpc_perf)/sizeof(int64_t);
+		if (p.perf.keys) {
+			char *keys = PERF_KEYS;
+
+			K_COPY_TO_USER(err, 0, (void *)p.perf.keys,
+						keys, strlen(keys)+1);
+			if (err)
+				goto bail;
+		}
+		if (p.perf.data) {
+			struct fastrpc_perf *perf = NULL, *fperf = NULL;
+			struct hlist_node *n = NULL;
+
+			mutex_lock(&fl->perf_mutex);
+			hlist_for_each_entry_safe(perf, n, &fl->perf, hn) {
+				if (perf->tid == current->pid) {
+					fperf = perf;
+					break;
+				}
+			}
+
+			mutex_unlock(&fl->perf_mutex);
+
+			if (fperf) {
+				K_COPY_TO_USER(err, 0,
+					(void *)p.perf.data, fperf,
+					sizeof(*fperf) -
+					sizeof(struct hlist_node));
+			}
+		}
+		K_COPY_TO_USER(err, 0, param, &p.perf, sizeof(p.perf));
+		if (err)
+			goto bail;
 		break;
 	case FASTRPC_IOCTL_CONTROL:
 		K_COPY_FROM_USER(err, 0, &p.cp, param,

drivers/clk/clk.c

@@ -4115,6 +4115,7 @@ static int clk_add_and_print_opp(struct clk_hw *hw,
 				unsigned long rate, int uv, int n)
 {
 	struct clk_core *core = hw->core;
+	unsigned long rrate;
 	int j, ret = 0;
 
 	for (j = 0; j < count; j++) {
@@ -4125,8 +4126,11 @@ static int clk_add_and_print_opp(struct clk_hw *hw,
 			return ret;
 		}
 
-		if (n == 0 || n == core->num_rate_max - 1 ||
-					rate == clk_hw_round_rate(hw, INT_MAX))
+		clk_prepare_lock();
+		rrate = clk_hw_round_rate(hw, INT_MAX);
+		clk_prepare_unlock();
+
+		if (n == 0 || n == core->num_rate_max - 1 || rate == rrate)
 			pr_info("%s: set OPP pair(%lu Hz: %u uV) on %s\n",
 						core->name, rate, uv,
 						dev_name(device_list[j]));
@@ -4181,7 +4185,9 @@ static void clk_populate_clock_opp_table(struct device_node *np,
 	}
 
 	for (n = 0; ; n++) {
+		clk_prepare_lock();
 		rrate = clk_hw_round_rate(hw, rate + 1);
+		clk_prepare_unlock();
 		if (!rrate) {
 			pr_err("clk_round_rate failed for %s\n",
 							core->name);

drivers/clk/qcom/camcc-sm6150.c

@@ -159,7 +159,7 @@ static struct pll_vco cam_cc_pll_vco[] = {
 };
 
 /* 600MHz configuration */
-static struct alpha_pll_config cam_cc_pll0_config = {
+static const struct alpha_pll_config cam_cc_pll0_config = {
 	.l = 0x1F,
 	.alpha_u = 0x40,
 	.alpha_en_mask = BIT(24),
@@ -175,7 +175,6 @@ static struct clk_alpha_pll cam_cc_pll0_out_aux = {
 	.offset = 0x0,
 	.vco_table = cam_cc_pll_vco,
 	.num_vco = ARRAY_SIZE(cam_cc_pll_vco),
-	.config = &cam_cc_pll0_config,
 	.clkr = {
 		.hw.init = &(struct clk_init_data){
 			.name = "cam_cc_pll0_out_aux",
@@ -192,7 +191,7 @@ static struct clk_alpha_pll cam_cc_pll0_out_aux = {
 };
 
 /* 808MHz configuration */
-static struct alpha_pll_config cam_cc_pll1_config = {
+static const struct alpha_pll_config cam_cc_pll1_config = {
 	.l = 0x2A,
 	.alpha_u = 0x15,
 	.alpha = 0x55555555,
@@ -209,7 +208,6 @@ static struct clk_alpha_pll cam_cc_pll1_out_aux = {
 	.offset = 0x1000,
 	.vco_table = cam_cc_pll_vco,
 	.num_vco = ARRAY_SIZE(cam_cc_pll_vco),
-	.config = &cam_cc_pll1_config,
 	.clkr = {
 		.hw.init = &(struct clk_init_data){
 			.name = "cam_cc_pll1_out_aux",
@@ -226,7 +224,7 @@ static struct clk_alpha_pll cam_cc_pll1_out_aux = {
 };
 
 /* 960MHz configuration */
-static struct alpha_pll_config cam_cc_pll2_config = {
+static const struct alpha_pll_config cam_cc_pll2_config = {
 	.l = 0x32,
 	.vco_val = 0x0 << 20,
 	.vco_mask = 0x3 << 20,
@@ -243,7 +241,6 @@ static struct clk_alpha_pll cam_cc_pll2_out_early = {
 	.offset = 0x2000,
 	.vco_table = cam_cc_pll2_vco,
 	.num_vco = ARRAY_SIZE(cam_cc_pll2_vco),
-	.config = &cam_cc_pll2_config,
 	.clkr = {
 		.hw.init = &(struct clk_init_data){
 			.name = "cam_cc_pll2_out_early",
@@ -270,7 +267,7 @@ static struct clk_alpha_pll_postdiv cam_cc_pll2_out_aux2 = {
 };
 
 /* 1080MHz configuration */
-static struct alpha_pll_config cam_cc_pll3_config = {
+static const struct alpha_pll_config cam_cc_pll3_config = {
 	.l = 0x38,
 	.alpha_u = 0x40,
 	.alpha_en_mask = BIT(24),
@@ -286,7 +283,6 @@ static struct clk_alpha_pll cam_cc_pll3_out_main = {
 	.offset = 0x3000,
 	.vco_table = cam_cc_pll_vco,
 	.num_vco = ARRAY_SIZE(cam_cc_pll_vco),
-	.config = &cam_cc_pll3_config,
 	.clkr = {
 		.hw.init = &(struct clk_init_data){
 			.name = "cam_cc_pll3_out_main",
@@ -349,7 +345,6 @@ static struct clk_rcg2 cam_cc_cci_clk_src = {
 	.hid_width = 5,
 	.parent_map = cam_cc_parent_map_5,
 	.freq_tbl = ftbl_cam_cc_cci_clk_src,
-	.enable_safe_config = true,
 	.clkr.hw.init = &(struct clk_init_data){
 		.name = "cam_cc_cci_clk_src",
 		.parent_names = cam_cc_parent_names_5,
@@ -379,7 +374,6 @@ static struct clk_rcg2 cam_cc_cphy_rx_clk_src = {
 	.hid_width = 5,
 	.parent_map = cam_cc_parent_map_2,
 	.freq_tbl = ftbl_cam_cc_cphy_rx_clk_src,
-	.enable_safe_config = true,
 	.clkr.hw.init = &(struct clk_init_data){
 		.name = "cam_cc_cphy_rx_clk_src",
 		.parent_names = cam_cc_parent_names_2,
@@ -409,7 +403,6 @@ static struct clk_rcg2 cam_cc_csi0phytimer_clk_src = {
 	.hid_width = 5,
 	.parent_map = cam_cc_parent_map_0,
 	.freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src,
-	.enable_safe_config = true,
 	.clkr.hw.init = &(struct clk_init_data){
 		.name = "cam_cc_csi0phytimer_clk_src",
 		.parent_names = cam_cc_parent_names_0,
@@ -430,7 +423,6 @@ static struct clk_rcg2 cam_cc_csi1phytimer_clk_src = {
 	.hid_width = 5,
 	.parent_map = cam_cc_parent_map_0,
 	.freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src,
-	.enable_safe_config = true,
 	.clkr.hw.init = &(struct clk_init_data){
 		.name = "cam_cc_csi1phytimer_clk_src",
 		.parent_names = cam_cc_parent_names_0,
@@ -451,7 +443,6 @@ static struct clk_rcg2 cam_cc_csi2phytimer_clk_src = {
 	.hid_width = 5,
 	.parent_map = cam_cc_parent_map_0,
 	.freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src,
-	.enable_safe_config = true,
 	.clkr.hw.init = &(struct clk_init_data){
 		.name = "cam_cc_csi2phytimer_clk_src",
 		.parent_names = cam_cc_parent_names_0,
@@ -480,7 +471,6 @@ static struct clk_rcg2 cam_cc_fast_ahb_clk_src = {
 	.hid_width = 5,
 	.parent_map = cam_cc_parent_map_0,
 	.freq_tbl = ftbl_cam_cc_fast_ahb_clk_src,
-	.enable_safe_config = true,
 	.clkr.hw.init = &(struct clk_init_data){
 		.name = "cam_cc_fast_ahb_clk_src",
 		.parent_names = cam_cc_parent_names_0,
@@ -791,7 +781,6 @@ static struct clk_rcg2 cam_cc_mclk0_clk_src = {
 	.hid_width = 5,
 	.parent_map = cam_cc_parent_map_3,
 	.freq_tbl = ftbl_cam_cc_mclk0_clk_src,
-	.enable_safe_config = true,
 	.clkr.hw.init = &(struct clk_init_data){
 		.name = "cam_cc_mclk0_clk_src",
 		.parent_names = cam_cc_parent_names_3,
@@ -811,7 +800,6 @@ static struct clk_rcg2 cam_cc_mclk1_clk_src = {
 	.hid_width = 5,
 	.parent_map = cam_cc_parent_map_3,
 	.freq_tbl = ftbl_cam_cc_mclk0_clk_src,
-	.enable_safe_config = true,
 	.clkr.hw.init = &(struct clk_init_data){
 		.name = "cam_cc_mclk1_clk_src",
 		.parent_names = cam_cc_parent_names_3,
@@ -831,7 +819,6 @@ static struct clk_rcg2 cam_cc_mclk2_clk_src = {
 	.hid_width = 5,
 	.parent_map = cam_cc_parent_map_3,
 	.freq_tbl = ftbl_cam_cc_mclk0_clk_src,
-	.enable_safe_config = true,
 	.clkr.hw.init = &(struct clk_init_data){
 		.name = "cam_cc_mclk2_clk_src",
 		.parent_names = cam_cc_parent_names_3,
@@ -851,7 +838,6 @@ static struct clk_rcg2 cam_cc_mclk3_clk_src = {
 	.hid_width = 5,
 	.parent_map = cam_cc_parent_map_3,
 	.freq_tbl = ftbl_cam_cc_mclk0_clk_src,
-	.enable_safe_config = true,
 	.clkr.hw.init = &(struct clk_init_data){
 		.name = "cam_cc_mclk3_clk_src",
 		.parent_names = cam_cc_parent_names_3,
@@ -1775,13 +1761,13 @@ static int cam_cc_sm6150_probe(struct platform_device *pdev)
 	}
 
 	clk_alpha_pll_configure(&cam_cc_pll0_out_aux, regmap,
-				cam_cc_pll0_out_aux.config);
+				&cam_cc_pll0_config);
 	clk_alpha_pll_configure(&cam_cc_pll1_out_aux, regmap,
-				cam_cc_pll1_out_aux.config);
+				&cam_cc_pll1_config);
 	clk_alpha_pll_configure(&cam_cc_pll2_out_early, regmap,
-				cam_cc_pll2_out_early.config);
+				&cam_cc_pll2_config);
 	clk_alpha_pll_configure(&cam_cc_pll3_out_main, regmap,
-				cam_cc_pll3_out_main.config);
+				&cam_cc_pll3_config);
 
 	ret = qcom_cc_really_probe(pdev, &cam_cc_sm6150_desc, regmap);
 	if (ret) {

drivers/clk/qcom/dispcc-sm6150.c

@@ -129,7 +129,7 @@ static struct pll_vco disp_cc_pll_vco[] = {
 };
 
 /* 576MHz configuration */
-static struct alpha_pll_config disp_cc_pll0_config = {
+static const struct alpha_pll_config disp_cc_pll0_config = {
 	.l = 0x1E,
 	.vco_val = 0x2 << 20,
 	.vco_mask = 0x3 << 20,
@@ -156,7 +156,6 @@ static struct clk_alpha_pll disp_cc_pll0_out_main = {
 	.vco_table = disp_cc_pll_vco,
 	.num_vco = ARRAY_SIZE(disp_cc_pll_vco),
 	.flags = SUPPORTS_DYNAMIC_UPDATE,
-	.config = &disp_cc_pll0_config,
 	.clkr = {
 		.hw.init = &(struct clk_init_data){
 			.name = "disp_cc_pll0_out_main",
@@ -282,7 +281,6 @@ static struct clk_rcg2 disp_cc_mdss_dp_link_clk_src = {
 	.hid_width = 5,
 	.parent_map = disp_cc_parent_map_0,
 	.freq_tbl = ftbl_disp_cc_mdss_dp_link_clk_src,
-	.enable_safe_config = true,
 	.clkr.hw.init = &(struct clk_init_data){
 		.name = "disp_cc_mdss_dp_link_clk_src",
 		.parent_names = disp_cc_parent_names_0,
@@ -865,7 +863,7 @@ static int disp_cc_sm6150_probe(struct platform_device *pdev)
 	}
 
 	clk_alpha_pll_configure(&disp_cc_pll0_out_main, regmap,
-				disp_cc_pll0_out_main.config);
+				&disp_cc_pll0_config);
 
 	ret = qcom_cc_really_probe(pdev, &disp_cc_sm6150_desc, regmap);
 	if (ret) {

drivers/clk/qcom/gpucc-sm6150.c

@@ -110,7 +110,7 @@ static struct pll_vco gpu_cc_pll1_vco[] = {
 };
 
 /* 1020MHz configuration */
-static struct alpha_pll_config gpu_pll0_config = {
+static const struct alpha_pll_config gpu_pll0_config = {
 	.l = 0x35,
 	.config_ctl_val = 0x4001055b,
 	.test_ctl_hi_val = 0x1,
@@ -124,7 +124,7 @@ static struct alpha_pll_config gpu_pll0_config = {
 };
 
 /* 930MHz configuration */
-static struct alpha_pll_config gpu_pll1_config = {
+static const struct alpha_pll_config gpu_pll1_config = {
 	.l = 0x30,
 	.config_ctl_val = 0x4001055b,
 	.test_ctl_hi_val = 0x1,
@@ -154,7 +154,6 @@ static struct clk_alpha_pll gpu_cc_pll0_out_aux2 = {
 	.vco_table = gpu_cc_pll_vco,
 	.num_vco = ARRAY_SIZE(gpu_cc_pll_vco),
 	.flags = SUPPORTS_DYNAMIC_UPDATE,
-	.config = &gpu_pll0_config,
 	.clkr = {
 		.hw.init = &(struct clk_init_data){
 		.name = "gpu_cc_pll0_out_aux2",
@@ -187,7 +186,6 @@ static struct clk_alpha_pll gpu_cc_pll1_out_aux2 = {
 	.vco_table = gpu_cc_pll_vco,
 	.num_vco = ARRAY_SIZE(gpu_cc_pll_vco),
 	.flags = SUPPORTS_DYNAMIC_UPDATE,
-	.config = &gpu_pll1_config,
 	.clkr = {
 		.hw.init = &(struct clk_init_data){
 		.name = "gpu_cc_pll1_out_aux2",
@@ -643,9 +641,9 @@ static int gpu_cc_sm6150_probe(struct platform_device *pdev)
 	}
 
 	clk_alpha_pll_configure(&gpu_cc_pll0_out_aux2, regmap,
-					gpu_cc_pll0_out_aux2.config);
+					&gpu_pll0_config);
 	clk_alpha_pll_configure(&gpu_cc_pll1_out_aux2, regmap,
-					gpu_cc_pll1_out_aux2.config);
+					&gpu_pll1_config);
 
 	ret = qcom_cc_really_probe(pdev, &gpu_cc_sm6150_desc, regmap);
 	if (ret) {

drivers/clk/qcom/mdss/mdss-dsi-pll-10nm.c

@@ -470,7 +470,7 @@ static void dsi_pll_config_slave(struct mdss_pll_resources *rsc)
 	rsc->slave = NULL;
 
 	if (!orsc) {
-		pr_warn("slave PLL unavilable, assuming standalone config\n");
+		pr_debug("slave PLL unavilable, assuming standalone config\n");
 		return;
 	}
 

drivers/clk/qcom/scc-sm6150.c

@@ -37,8 +37,8 @@
 static DEFINE_VDD_REGULATORS(vdd_scc_cx, VDD_NUM, 1, vdd_corner);
 
 enum {
-	P_AOSS_CC_RO_CLK,
 	P_AON_SLEEP_CLK,
+	P_AOSS_CC_RO_CLK,
 	P_CORE_PI_CXO_CLK,
 	P_QDSP6SS_PLL_OUT_AUX,
 	P_SCC_PLL_OUT_AUX,
@@ -69,6 +69,51 @@ static const char * const scc_parent_names_0[] = {
 	"ssc_bi_pll_test_se",
 };
 
+static struct pll_vco scc_pll_vco[] = {
+	{ 500000000, 1000000000, 2 },
+};
+
+/* 600MHz configuration */
+static const struct alpha_pll_config scc_pll_config = {
+	.l = 0x1F,
+	.alpha_u = 0x40,
+	.alpha_en_mask = BIT(24),
+	.vco_val = 0x2 << 20,
+	.vco_mask = 0x3 << 20,
+	.post_div_val = 0x3 << 15,
+	.post_div_mask = 0x7 << 15,
+	.aux_output_mask = BIT(1),
+	.aux2_output_mask = BIT(2),
+	.config_ctl_val = 0x4001055b,
+	.test_ctl_hi_val = 0x1,
+	.test_ctl_hi_mask = 0x1,
+};
+
+static struct clk_alpha_pll scc_pll_out_aux2 = {
+	.offset = 0x0,
+	.vco_table = scc_pll_vco,
+	.num_vco = ARRAY_SIZE(scc_pll_vco),
+	.clkr.hw.init = &(struct clk_init_data){
+		.name = "scc_pll_out_aux2",
+		.parent_names = (const char *[]){ "bi_tcxo" },
+		.num_parents = 1,
+		.ops = &clk_alpha_pll_ops,
+		.vdd_class = &vdd_scc_cx,
+		.num_rate_max = VDD_NUM,
+		.rate_max = (unsigned long[VDD_NUM]) {
+			[VDD_MIN] = 1000000000,
+			[VDD_NOMINAL] = 2000000000},
+	},
+};
+
+static const struct clk_div_table post_div_table[] = {
+	{ 0x0, 1 },
+	{ 0x3, 3 },
+	{ 0x5, 5 },
+	{ 0x7, 7 },
+	{ }
+};
+
 static const struct freq_tbl ftbl_scc_main_rcg_clk_src[] = {
 	F(100000000, P_SCC_PLL_OUT_AUX, 2, 0, 0),
 	F(200000000, P_SCC_PLL_OUT_AUX, 1, 0, 0),
@@ -510,6 +555,8 @@ static int scc_sm6150_probe(struct platform_device *pdev)
 		return PTR_ERR(regmap);
 	}
 
+	clk_alpha_pll_configure(&scc_pll_out_aux2, regmap, &scc_pll_config);
+
 	ret = qcom_cc_really_probe(pdev, &scc_sm6150_desc, regmap);
 	if (ret) {
 		dev_err(&pdev->dev, "Failed to register SCC clocks\n");

drivers/clk/qcom/videocc-sm6150.c

@@ -85,7 +85,7 @@ static struct pll_vco video_cc_pll_vco[] = {
 };
 
 /* 600MHz configuration */
-static struct alpha_pll_config video_pll0_config = {
+static const struct alpha_pll_config video_pll0_config = {
 	.l = 0x1F,
 	.alpha_u = 0x40,
 	.alpha = 0x00,
@@ -115,7 +115,6 @@ static struct clk_alpha_pll video_pll0_out_main = {
 	.vco_table = video_cc_pll_vco,
 	.num_vco = ARRAY_SIZE(video_cc_pll_vco),
 	.flags = SUPPORTS_DYNAMIC_UPDATE,
-	.config = &video_pll0_config,
 	.clkr = {
 		.hw.init = &(struct clk_init_data){
 			.name = "video_pll0_out_main",
@@ -399,7 +398,7 @@ static int video_cc_sm6150_probe(struct platform_device *pdev)
 	}
 
 	clk_alpha_pll_configure(&video_pll0_out_main, regmap,
-					video_pll0_out_main.config);
+						&video_pll0_config);
 
 	ret = qcom_cc_really_probe(pdev, &video_cc_sm6150_desc, regmap);
 	if (ret) {

drivers/dma-buf/dma-buf.c

@@ -635,6 +635,7 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info)
 	dmabuf->cb_excl.poll = dmabuf->cb_shared.poll = &dmabuf->poll;
 	dmabuf->cb_excl.active = dmabuf->cb_shared.active = 0;
 	dmabuf->buf_name = bufname;
+	dmabuf->name = bufname;
 	dmabuf->ktime = ktime_get();
 
 	if (!resv) {

drivers/firmware/qcom/tz_log.c

@@ -327,6 +327,7 @@ static struct tzdbg tzdbg = {
 static struct tzdbg_log_t *g_qsee_log;
 static dma_addr_t coh_pmem;
 static uint32_t debug_rw_buf_size;
+static bool restore_from_hibernation;
 
 /*
  * Debugfs data structure and functions
@@ -717,6 +718,15 @@ static int _disp_tz_log_stats(size_t count)
 {
 	static struct tzdbg_log_pos_t log_start = {0};
 	struct tzdbg_log_t *log_ptr;
+	/* wrap and offset are initialized to zero since tz is coldboot
+	 * during restoration from hibernation.the reason to initialise
+	 * the wrap and offset to zero since it contains previous boot
+	 * values and which are invalid now.
+	 */
+	if (restore_from_hibernation) {
+		log_start.wrap = log_start.offset = 0;
+		return 0;
+	}
 
 	log_ptr = (struct tzdbg_log_t *)((unsigned char *)tzdbg.diag_buf +
 				tzdbg.diag_buf->ring_off -
@@ -742,6 +752,16 @@ static int _disp_qsee_log_stats(size_t count)
 {
 	static struct tzdbg_log_pos_t log_start = {0};
 
+	/* wrap and offset are initialized to zero since tz is coldboot
+	 * during restoration from hibernation. The reason to initialise
+	 * the wrap and offset to zero since it contains previous values
+	 * and which are invalid now.
+	 */
+	if (restore_from_hibernation) {
+		log_start.wrap = log_start.offset = 0;
+		return 0;
+	}
+
 	return _disp_log_stats(g_qsee_log, &log_start,
 			QSEE_LOG_BUF_SIZE - sizeof(struct tzdbg_log_pos_t),
 			count, TZDBG_QSEE_LOG);
@@ -1140,6 +1160,52 @@ static int tz_log_remove(struct platform_device *pdev)
 	return 0;
 }
 
+#ifdef CONFIG_PM
+static int tz_log_freeze(struct device *dev)
+{
+	/* This Boolean variable is maintained to initialise the ring buffer
+	 * log pointer to zero during restoration from hibernation
+	 */
+	restore_from_hibernation = 1;
+	if (g_qsee_log)
+		dma_free_coherent(dev, QSEE_LOG_BUF_SIZE, (void *)g_qsee_log,
+					coh_pmem);
+	return 0;
+}
+
+static int tz_log_restore(struct device *dev)
+{
+	/* ring buffer log pointer needs to be re initialized
+	 * during restoration from hibernation.
+	 */
+	if (restore_from_hibernation) {
+		_disp_tz_log_stats(0);
+		_disp_qsee_log_stats(0);
+	}
+	/* Register the log bugger at TZ during hibernation resume.
+	 * After hibernation the log buffer is with HLOS as TZ encountered
+	 * a coldboot sequence.
+	 */
+	tzdbg_register_qsee_log_buf(to_platform_device(dev));
+	/* This is set back to zero after successful restoration
+	 * from hibernation.
+	 */
+	restore_from_hibernation = 0;
+	return 0;
+}
+
+static const struct dev_pm_ops tz_log_pmops = {
+	.freeze = tz_log_freeze,
+	.restore = tz_log_restore,
+	.thaw = tz_log_restore,
+};
+
+#define TZ_LOG_PMOPS (&tz_log_pmops)
+
+#else
+#define TZ_LOG_PMOPS NULL
+#endif
+
 static const struct of_device_id tzlog_match[] = {
 	{	.compatible = "qcom,tz-log",
 	},

drivers/gpu/drm/drm_auth.c

@@ -232,6 +232,12 @@ int drm_dropmaster_ioctl(struct drm_device *dev, void *data,
 	if (!dev->master)
 		goto out_unlock;
 
+	if (file_priv->master->lessor != NULL) {
+		DRM_DEBUG_LEASE("Attempt to drop lessee %d as master\n", file_priv->master->lessee_id);
+		ret = -EINVAL;
+		goto out_unlock;
+	}
+
 	ret = 0;
 	drm_drop_master(dev, file_priv);
 out_unlock:

drivers/hwtracing/coresight/coresight-etm-perf.c

@@ -145,6 +145,9 @@ static void free_sink_buffer(struct etm_event_data *event_data)
 
 	cpu = cpumask_first(mask);
 	sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu));
+	if (!sink)
+		return;
+
 	sink_ops(sink)->free_buffer(event_data->snk_config);
 }
 

drivers/hwtracing/coresight/coresight-etm4x-sysfs.c

@@ -964,8 +964,11 @@ static ssize_t addr_range_show(struct device *dev,
 	spin_lock(&drvdata->spinlock);
 	idx = config->addr_idx;
 
-	if (idx >= ETM_MAX_SINGLE_ADDR_CMP)
+	if (idx >= ETM_MAX_SINGLE_ADDR_CMP) {
+		spin_unlock(&drvdata->spinlock);
 		return -EINVAL;
+	}
+
 	if (idx % 2 != 0) {
 		spin_unlock(&drvdata->spinlock);
 		return -EPERM;
@@ -1002,8 +1005,11 @@ static ssize_t addr_range_store(struct device *dev,
 	spin_lock(&drvdata->spinlock);
 	idx = config->addr_idx;
 
-	if (idx >= ETM_MAX_SINGLE_ADDR_CMP)
+	if (idx >= ETM_MAX_SINGLE_ADDR_CMP) {
+		spin_unlock(&drvdata->spinlock);
 		return -EINVAL;
+	}
+
 	if (idx % 2 != 0) {
 		spin_unlock(&drvdata->spinlock);
 		return -EPERM;

drivers/hwtracing/coresight/coresight-tmc-etr.c

@@ -883,7 +883,9 @@ static struct etr_buf *tmc_alloc_etr_buf(struct tmc_drvdata *drvdata,
 
 static void tmc_free_etr_buf(struct etr_buf *etr_buf)
 {
-	WARN_ON(!etr_buf->ops || !etr_buf->ops->free);
+	if (WARN_ON(!etr_buf->ops || !etr_buf->ops->free))
+		return;
+
 	etr_buf->ops->free(etr_buf);
 	kfree(etr_buf);
 }
@@ -947,7 +949,8 @@ static void tmc_sync_etr_buf(struct tmc_drvdata *drvdata)
 
 	etr_buf->full = status & TMC_STS_FULL;
 
-	WARN_ON(!etr_buf->ops || !etr_buf->ops->sync);
+	if (WARN_ON(!etr_buf->ops || !etr_buf->ops->sync))
+		return;
 
 	etr_buf->ops->sync(etr_buf, rrp, rwp);
 }

drivers/input/misc/qpnp-power-on.c

@@ -242,6 +242,7 @@ struct qpnp_pon {
 	bool			resin_pon_reset;
 	ktime_t			kpdpwr_last_release_time;
 	struct notifier_block	pon_nb;
+	bool			legacy_hard_reset_offset;
 };
 
 static int pon_ship_mode_en;
@@ -423,7 +424,7 @@ int qpnp_pon_set_restart_reason(enum pon_restart_reason reason)
 	if (!pon->store_hard_reset_reason)
 		return 0;
 
-	if (is_pon_gen2(pon))
+	if (is_pon_gen2(pon) && !pon->legacy_hard_reset_offset)
 		rc = qpnp_pon_masked_write(pon, QPNP_PON_SOFT_RB_SPARE(pon),
 					   GENMASK(7, 1), (reason << 1));
 	else
@@ -2416,6 +2417,9 @@ static int qpnp_pon_probe(struct platform_device *pdev)
 	pon->store_hard_reset_reason = of_property_read_bool(dev->of_node,
 					"qcom,store-hard-reset-reason");
 
+	pon->legacy_hard_reset_offset = of_property_read_bool(pdev->dev.of_node,
+					"qcom,use-legacy-hard-reset-offset");
+
 	if (of_property_read_bool(dev->of_node, "qcom,secondary-pon-reset")) {
 		if (sys_reset) {
 			dev_err(dev, "qcom,system-reset property shouldn't be used along with qcom,secondary-pon-reset property\n");

drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c

@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2019, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2020, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -854,6 +854,14 @@ static int msm_csid_release(struct csid_device *csid_dev)
 
 	msm_camera_enable_irq(csid_dev->irq, false);
 
+	if (msm_camera_tz_is_secured(
+		MSM_CAMERA_TZ_IO_REGION_CSIDCORE0 + csid_dev->pdev->id) == 0) {
+		msm_camera_vio_w(csid_dev->ctrl_reg->csid_reg.csid_rst_stb_all,
+			csid_dev->base,
+			csid_dev->ctrl_reg->csid_reg.csid_rst_cmd_addr,
+			csid_dev->pdev->id);
+	}
+
 	msm_camera_clk_enable(&csid_dev->pdev->dev,
 		csid_dev->csid_clk_info,
 		csid_dev->csid_clk,

drivers/media/platform/msm/vidc/msm_vdec.c

@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -542,7 +542,7 @@ struct msm_vidc_format vdec_formats[] = {
 		.type = OUTPUT_PORT,
 		.defer_outputs = true,
 		.input_min_count = 4,
-		.output_min_count = 11,
+		.output_min_count = 9,
 	},
 };
 

drivers/mtd/devices/msm_qpic_nand.c

@@ -881,10 +881,12 @@ static int msm_nand_flash_onfi_probe(struct msm_nand_info *info)
 	struct version nandc_version = {0};
 
 	ret = msm_nand_version_check(info, &nandc_version);
-	if (!ret && !(nandc_version.nand_major == 1 &&
+	if (!ret && !((nandc_version.nand_major == 1 &&
 			nandc_version.nand_minor >= 5 &&
 			nandc_version.qpic_major == 1 &&
-			nandc_version.qpic_minor >= 5)) {
+			nandc_version.qpic_minor >= 5) ||
+			(nandc_version.nand_major >= 2 &&
+			nandc_version.qpic_major >= 2))) {
 		ret = -EPERM;
 		goto out;
 	}
@@ -1993,7 +1995,7 @@ free_dma:
 			if (last_pos < ecc_bytes_percw_in_bits)
 				num_zero_bits++;
 
-			if (num_zero_bits > 4) {
+			if (num_zero_bits > MAX_ECC_BIT_FLIPS) {
 				*erased_page = false;
 				goto free_mem;
 			}
@@ -2005,7 +2007,7 @@ free_dma:
 		ecc_temp += chip->ecc_parity_bytes;
 	}
 
-	if ((n == cwperpage) && (num_zero_bits <= 4))
+	if ((n == cwperpage) && (num_zero_bits <= MAX_ECC_BIT_FLIPS))
 		*erased_page = true;
 free_mem:
 	kfree(ecc);
@@ -2228,6 +2230,33 @@ static int msm_nand_read_pagescope(struct mtd_info *mtd, loff_t from,
 			goto free_dma;
 		/* Check for flash status errors */
 		pageerr = rawerr = 0;
+
+		/*
+		 * PAGE_ERASED bit will set only if all
+		 * CODEWORD_ERASED bit of all codewords
+		 * of the page is set.
+		 *
+		 * PAGE_ERASED bit is a 'logical and' of all
+		 * CODEWORD_ERASED bit of all codewords i.e.
+		 * even if one codeword is detected as not
+		 * an erased codeword, PAGE_ERASED bit will unset.
+		 */
+		for (n = rw_params.start_sector; n < cwperpage; n++) {
+			if ((dma_buffer->result[n].erased_cw_status &
+					(1 << PAGE_ERASED)) &&
+					(dma_buffer->result[n].buffer_status &
+					 NUM_ERRORS)) {
+				err = msm_nand_is_erased_page_ps(mtd,
+						from, ops,
+						&rw_params,
+						&erased_page);
+				if (err)
+					goto free_dma;
+				if (erased_page)
+					rawerr = -EIO;
+				break;
+			}
+		}
 		for (n = rw_params.start_sector; n < cwperpage; n++) {
 			if (dma_buffer->result[n].flash_status & (FS_OP_ERR |
 					FS_MPU_ERR)) {
@@ -2633,7 +2662,7 @@ free_dma:
 			if (last_pos < ecc_bytes_percw_in_bits)
 				num_zero_bits++;
 
-			if (num_zero_bits > 4) {
+			if (num_zero_bits > MAX_ECC_BIT_FLIPS) {
 				*erased_page = false;
 				goto free_mem;
 			}
@@ -2645,7 +2674,7 @@ free_dma:
 		ecc_temp += chip->ecc_parity_bytes;
 	}
 
-	if ((n == cwperpage) && (num_zero_bits <= 4))
+	if ((n == cwperpage) && (num_zero_bits <= MAX_ECC_BIT_FLIPS))
 		*erased_page = true;
 free_mem:
 	kfree(ecc);
@@ -2840,6 +2869,33 @@ static int msm_nand_read_oob(struct mtd_info *mtd, loff_t from,
 			goto free_dma;
 		/* Check for flash status errors */
 		pageerr = rawerr = 0;
+
+		/*
+		 * PAGE_ERASED bit will set only if all
+		 * CODEWORD_ERASED bit of all codewords
+		 * of the page is set.
+		 *
+		 * PAGE_ERASED bit is a 'logical and' of all
+		 * CODEWORD_ERASED bit of all codewords i.e.
+		 * even if one codeword is detected as not
+		 * an erased codeword, PAGE_ERASED bit will unset.
+		 */
+		for (n = rw_params.start_sector; n < cwperpage; n++) {
+			if ((dma_buffer->result[n].erased_cw_status &
+					(1 << PAGE_ERASED)) &&
+					(dma_buffer->result[n].buffer_status &
+					 NUM_ERRORS)) {
+				err = msm_nand_is_erased_page(mtd,
+						from, ops,
+						&rw_params,
+						&erased_page);
+				if (err)
+					goto free_dma;
+				if (erased_page)
+					rawerr = -EIO;
+				break;
+			}
+		}
 		for (n = rw_params.start_sector; n < cwperpage; n++) {
 			if (dma_buffer->result[n].flash_status & (FS_OP_ERR |
 					FS_MPU_ERR)) {

drivers/mtd/devices/msm_qpic_nand.h

@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2012-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2020 The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -165,7 +165,10 @@
 #define RESET_ERASED_DET	(1 << AUTO_DETECT_RES)
 #define ACTIVE_ERASED_DET	(0 << AUTO_DETECT_RES)
 #define CLR_ERASED_PAGE_DET	(RESET_ERASED_DET | MASK_ECC)
-#define SET_ERASED_PAGE_DET	(ACTIVE_ERASED_DET | MASK_ECC)
+#define SET_ERASED_PAGE_DET	(ACTIVE_ERASED_DET | MASK_ECC | SET_N_MAX_ZEROS)
+#define N_MAX_ZEROS		2
+#define MAX_ECC_BIT_FLIPS       4
+#define SET_N_MAX_ZEROS		(MAX_ECC_BIT_FLIPS << N_MAX_ZEROS)
 
 #define MSM_NAND_ERASED_CW_DETECT_STATUS(info)  MSM_NAND_REG(info, 0x300EC)
 #define PAGE_ALL_ERASED		7
@@ -174,6 +177,7 @@
 #define CODEWORD_ERASED		4
 #define ERASED_PAGE	((1 << PAGE_ALL_ERASED) | (1 << PAGE_ERASED))
 #define ERASED_CW	((1 << CODEWORD_ALL_ERASED) | (1 << CODEWORD_ERASED))
+#define NUM_ERRORS		0x1f
 
 #define MSM_NAND_CTRL(info)		    MSM_NAND_REG(info, 0x30F00)
 #define BAM_MODE_EN	0

drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c

@@ -30,9 +30,23 @@
 #include "stmmac_ptp.h"
 #include "dwmac-qcom-ipa-offload.h"
 
-static unsigned long tlmm_central_base_addr;
+static void __iomem *tlmm_central_base_addr;
 bool phy_intr_en;
 
+static struct ethqos_emac_por emac_por[] = {
+	{ .offset = RGMII_IO_MACRO_CONFIG,	.value = 0x0 },
+	{ .offset = SDCC_HC_REG_DLL_CONFIG,	.value = 0x0 },
+	{ .offset = SDCC_HC_REG_DDR_CONFIG,	.value = 0x0 },
+	{ .offset = SDCC_HC_REG_DLL_CONFIG2,	.value = 0x0 },
+	{ .offset = SDCC_USR_CTL,		.value = 0x0 },
+	{ .offset = RGMII_IO_MACRO_CONFIG2,	.value = 0x0},
+};
+
+static struct ethqos_emac_driver_data emac_por_data = {
+	.por = emac_por,
+	.num_por = ARRAY_SIZE(emac_por),
+};
+
 struct qcom_ethqos *pethqos;
 
 struct stmmac_emb_smmu_cb_ctx stmmac_emb_smmu_ctx = {0};
@@ -48,6 +62,21 @@ static struct qmp_pkt pkt;
 static char qmp_buf[MAX_QMP_MSG_SIZE + 1] = {0};
 static struct ip_params pparams = {"", "", "", ""};
 
+static void qcom_ethqos_read_iomacro_por_values(struct qcom_ethqos *ethqos)
+{
+	int i;
+
+	ethqos->por = emac_por_data.por;
+	ethqos->num_por = emac_por_data.num_por;
+
+	/* Read to POR values and enable clk */
+	for (i = 0; i < ethqos->num_por; i++)
+		ethqos->por[i].value =
+			readl_relaxed(
+				ethqos->rgmii_base +
+				ethqos->por[i].offset);
+}
+
 static inline unsigned int dwmac_qcom_get_eth_type(unsigned char *buf)
 {
 	return
@@ -1045,7 +1074,7 @@ static void ethqos_pps_irq_config(struct qcom_ethqos *ethqos)
 }
 
 static const struct of_device_id qcom_ethqos_match[] = {
-	{ .compatible = "qcom,sdxprairie-ethqos", .data = &emac_v2_3_2_por},
+	{ .compatible = "qcom,sdxprairie-ethqos",},
 	{ .compatible = "qcom,emac-smmu-embedded", },
 	{ .compatible = "qcom,stmmac-ethqos", },
 	{}
@@ -1417,9 +1446,9 @@ static int ethqos_update_rgmii_tx_drv_strength(struct qcom_ethqos *ethqos)
 	ETHQOSDBG("tlmm_central_base = 0x%x, size = 0x%x\n",
 		  tlmm_central_base, tlmm_central_size);
 
-	tlmm_central_base_addr = (unsigned long)ioremap(
+	tlmm_central_base_addr = ioremap(
 	   tlmm_central_base, tlmm_central_size);
-	if ((void __iomem *)!tlmm_central_base_addr) {
+	if (!tlmm_central_base_addr) {
 		ETHQOSERR("cannot map dwc_tlmm_central reg memory, aborting\n");
 		ret = -EIO;
 		goto err_out;
@@ -1459,7 +1488,7 @@ static int ethqos_update_rgmii_tx_drv_strength(struct qcom_ethqos *ethqos)
 
 err_out:
 	if (tlmm_central_base_addr)
-		iounmap((void __iomem *)tlmm_central_base_addr);
+		iounmap(tlmm_central_base_addr);
 
 	return ret;
 }
@@ -1771,8 +1800,6 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
 		goto err_mem;
 	}
 
-	ethqos->por = of_device_get_match_data(&pdev->dev);
-
 	ethqos->rgmii_clk = devm_clk_get(&pdev->dev, "rgmii");
 	if (!ethqos->rgmii_clk) {
 		ret = -ENOMEM;
@@ -1880,6 +1907,8 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
 	pethqos = ethqos;
 	ethqos_create_debugfs(ethqos);
 
+	qcom_ethqos_read_iomacro_por_values(ethqos);
+
 	ndev = dev_get_drvdata(&ethqos->pdev->dev);
 	priv = netdev_priv(ndev);
 

drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.h

@@ -380,22 +380,9 @@ struct ethqos_emac_por {
 	unsigned int value;
 };
 
-static const struct ethqos_emac_por emac_v2_3_0_por[] = {
-	{ .offset = RGMII_IO_MACRO_CONFIG,	.value = 0x00C01343 },
-	{ .offset = SDCC_HC_REG_DLL_CONFIG,	.value = 0x2004642C },
-	{ .offset = SDCC_HC_REG_DDR_CONFIG,	.value = 0x00000000 },
-	{ .offset = SDCC_HC_REG_DLL_CONFIG2,	.value = 0x00200000 },
-	{ .offset = SDCC_USR_CTL,		.value = 0x00010800 },
-	{ .offset = RGMII_IO_MACRO_CONFIG2,	.value = 0x00002060 },
-};
-
-static const struct ethqos_emac_por emac_v2_3_2_por[] = {
-	{ .offset = RGMII_IO_MACRO_CONFIG,	.value = 0x00C01343 },
-	{ .offset = SDCC_HC_REG_DLL_CONFIG,	.value = 0x2004642C },
-	{ .offset = SDCC_HC_REG_DDR_CONFIG,	.value = 0x80040800 },
-	{ .offset = SDCC_HC_REG_DLL_CONFIG2,	.value = 0x00200000 },
-	{ .offset = SDCC_USR_CTL,		.value = 0x00010800 },
-	{ .offset = RGMII_IO_MACRO_CONFIG2,	.value = 0x00002060 },
+struct ethqos_emac_driver_data {
+	struct ethqos_emac_por *por;
+	unsigned int num_por;
 };
 
 struct qcom_ethqos {
@@ -415,7 +402,7 @@ struct qcom_ethqos {
 	/* Work struct for handling phy interrupt */
 	struct work_struct emac_phy_work;
 
-	const struct ethqos_emac_por *por;
+	struct ethqos_emac_por *por;
 	unsigned int num_por;
 	unsigned int emac_ver;
 

drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.c

@@ -95,7 +95,7 @@ static int ethqos_alloc_ipa_tx_queue_struct(struct qcom_ethqos *ethqos)
 		goto err_out_tx_q_alloc_failed;
 	}
 
-	eth_ipa_ctx.tx_queue->desc_cnt = IPA_TX_DESC_CNT;
+	eth_ipa_ctx.tx_queue->desc_cnt = eth_ipa_ctx.ipa_dma_tx_desc_cnt;
 
 	/* Allocate tx_desc_ptrs */
 	eth_ipa_ctx.tx_queue->tx_desc_ptrs =
@@ -224,7 +224,7 @@ static int ethqos_alloc_ipa_rx_queue_struct(struct qcom_ethqos *ethqos)
 		goto err_out_rx_q_alloc_failed;
 	}
 
-	eth_ipa_ctx.rx_queue->desc_cnt = IPA_RX_DESC_CNT;
+	eth_ipa_ctx.rx_queue->desc_cnt = eth_ipa_ctx.ipa_dma_rx_desc_cnt;
 
 	/* Allocate rx_desc_ptrs */
 	eth_ipa_ctx.rx_queue->rx_desc_ptrs =
@@ -1664,8 +1664,8 @@ static int ethqos_ipa_create_debugfs(struct qcom_ethqos *ethqos)
 		debugfs_create_file("dma_stats", 0600,
 				    ethqos->debugfs_dir, ethqos,
 				    &fops_ntn_dma_stats);
-	if (!eth_ipa->debugfs_suspend_ipa_offload ||
-	    IS_ERR(eth_ipa->debugfs_suspend_ipa_offload)) {
+	if (!eth_ipa->debugfs_dma_stats ||
+	    IS_ERR(eth_ipa->debugfs_dma_stats)) {
 		ETHQOSERR("Cannot create debugfs_dma_stats %d\n",
 			  (int)eth_ipa->debugfs_dma_stats);
 		goto fail;
@@ -2193,11 +2193,29 @@ static int ethqos_ipa_uc_ready(struct qcom_ethqos *pdata)
 void ethqos_ipa_offload_event_handler(void *data,
 				      int ev)
 {
+	int ret;
 	ETHQOSDBG("Enter: event=%d\n", ev);
 
 	if (ev == EV_PROBE_INIT) {
 		eth_ipa_ctx.ethqos = data;
 		mutex_init(&eth_ipa_ctx.ipa_lock);
+		ret =
+		of_property_read_u32(eth_ipa_ctx.ethqos->pdev->dev.of_node,
+				     "ipa-dma-rx-desc-cnt",
+				     &eth_ipa_ctx.ipa_dma_rx_desc_cnt);
+		if (ret) {
+			ETHQOSDBG(":resource ipa-dma-rx-desc-cnt not in dt\n");
+			eth_ipa_ctx.ipa_dma_rx_desc_cnt = IPA_RX_DESC_CNT;
+		}
+
+		ret =
+		of_property_read_u32(eth_ipa_ctx.ethqos->pdev->dev.of_node,
+				     "ipa-dma-tx-desc-cnt",
+				     &eth_ipa_ctx.ipa_dma_tx_desc_cnt);
+		if (ret) {
+			ETHQOSDBG(":resource ipa-dma-tx-desc-cnt not in dt\n");
+			eth_ipa_ctx.ipa_dma_tx_desc_cnt = IPA_TX_DESC_CNT;
+		}
 		return;
 	}
 

drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ipa.h

@@ -76,8 +76,8 @@ static char * const IPA_OFFLOAD_EVENT_string[] = {
 
 #define ETHQOS_ETH_FRAME_LEN_IPA ((1 << 11)) /*IPA can support 2KB max length*/
 
-#define IPA_TX_DESC_CNT	128 /*Increase TX desc count to 128 for IPA offload*/
-#define IPA_RX_DESC_CNT	128 /*Increase RX desc count to 128 for IPA offload*/
+#define IPA_TX_DESC_CNT 128 /*Default TX desc count to 128 for IPA offload*/
+#define IPA_RX_DESC_CNT 128 /*Default RX desc count to 128 for IPA offload*/
 
 #define  BASE_ADDRESS (ethqos->ioaddr)
 
@@ -644,6 +644,9 @@ struct ethqos_prv_ipa_data {
 	phys_addr_t uc_db_tx_addr;
 	u32 ipa_client_hndl;
 
+	u32 ipa_dma_tx_desc_cnt;
+	u32 ipa_dma_rx_desc_cnt;
+
 	/* IPA state variables */
 	/* State of EMAC HW initialization */
 	bool emac_dev_ready;

drivers/platform/msm/ep_pcie/ep_pcie_com.h

@@ -351,6 +351,7 @@ struct ep_pcie_dev_t {
 	u32                          dbi_base_reg;
 	u32                          slv_space_reg;
 	u32                          phy_status_reg;
+	u32			phy_status_bit_mask_bit;
 	u32                          phy_init_len;
 	u32			     mhi_soc_reset_offset;
 	struct ep_pcie_phy_info_t    *phy_init;

drivers/platform/msm/ep_pcie/ep_pcie_core.c

@@ -1712,6 +1712,15 @@ int ep_pcie_core_enable_endpoint(enum ep_pcie_options opt)
 				ep_pcie_core_init(dev, true);
 				dev->link_status = EP_PCIE_LINK_UP;
 				dev->l23_ready = false;
+
+				/* enable pipe clock for early link init case*/
+				ret = ep_pcie_pipe_clk_init(dev);
+				if (ret) {
+					EP_PCIE_ERR(dev,
+					"PCIe V%d: failed to enable pipe clock\n",
+					dev->rev);
+					goto pipe_clk_fail;
+				}
 				goto checkbme;
 			} else {
 				ltssm_en = readl_relaxed(dev->parf
@@ -3074,6 +3083,21 @@ static int ep_pcie_probe(struct platform_device *pdev)
 		EP_PCIE_DBG(&ep_pcie_dev, "PCIe V%d: phy-status-reg:0x%x\n",
 			ep_pcie_dev.rev, ep_pcie_dev.phy_status_reg);
 
+	ep_pcie_dev.phy_status_bit_mask_bit = BIT(6);
+
+	ret = of_property_read_u32((&pdev->dev)->of_node,
+				"qcom,phy-status-reg2",
+				&ep_pcie_dev.phy_status_reg);
+	if (ret) {
+		EP_PCIE_DBG(&ep_pcie_dev,
+			"PCIe V%d: phy-status-reg2 does not exist\n",
+			ep_pcie_dev.rev);
+	} else {
+		EP_PCIE_DBG(&ep_pcie_dev, "PCIe V%d: phy-status-reg2:0x%x\n",
+			ep_pcie_dev.rev, ep_pcie_dev.phy_status_reg);
+		ep_pcie_dev.phy_status_bit_mask_bit = BIT(7);
+	}
+
 	ep_pcie_dev.phy_rev = 1;
 	ret = of_property_read_u32((&pdev->dev)->of_node,
 				"qcom,pcie-phy-ver",

drivers/platform/msm/ep_pcie/ep_pcie_phy.c

@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2018, 2019-2020, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -158,7 +158,7 @@ bool ep_pcie_phy_is_ready(struct ep_pcie_dev_t *dev)
 	else
 		offset = PCIE_PHY_PCS_STATUS;
 
-	if (readl_relaxed(dev->phy + offset) & BIT(6))
+	if (readl_relaxed(dev->phy + offset) & dev->phy_status_bit_mask_bit)
 		return false;
 	else
 		return true;

drivers/soc/qcom/hgsl/hgsl.c

@@ -226,7 +226,9 @@ struct hgsl_db_cmds {
 	uint32_t ctx_id;
 	uint32_t cmd_flags;
 	uint32_t timestamp;
+	uint64_t user_profile_gpuaddr;
 	uint32_t num_ibs;
+	uint32_t ib_desc_gmuaddr;
 	struct hgsl_fw_ib_desc ib_descs[];
 } __packed;
 

drivers/soc/qcom/qmi_rmnet.c

@@ -1162,7 +1162,7 @@ void qmi_rmnet_work_init(void *port)
 		return;
 
 	rmnet_ps_wq = alloc_workqueue("rmnet_powersave_work",
-					WQ_MEM_RECLAIM | WQ_CPU_INTENSIVE, 1);
+				      WQ_CPU_INTENSIVE, 1);
 
 	if (!rmnet_ps_wq)
 		return;

drivers/soc/qcom/wcnss/wcnss_wlan.c

@@ -39,6 +39,7 @@
 #include <linux/bitops.h>
 #include <linux/cdev.h>
 #include <linux/ipc_logging.h>
+#include <linux/sched/debug.h>
 #include <soc/qcom/socinfo.h>
 #include <linux/adc-tm-clients.h>
 #include <linux/iio/consumer.h>

include/linux/mhi.h

@@ -610,6 +610,30 @@ void mhi_device_get(struct mhi_device *mhi_dev, int vote);
  */
 int mhi_device_get_sync(struct mhi_device *mhi_dev, int vote);
 
+/**
+ * mhi_device_get_sync_atomic - Asserts device_wait and moves device to M0
+ * @mhi_dev: Device associated with the channels
+ * @timeout_us: timeout, in micro-seconds
+ *
+ * The device_wake is asserted to keep device in M0 or bring it to M0.
+ * If device is not in M0 state, then this function will wait for device to
+ * move to M0, until @timeout_us elapses.
+ * However, if device's M1 state-change event races with this function
+ * then there is a possiblity of device moving from M0 to M2 and back
+ * to M0. That can't be avoided as host must transition device from M1 to M2
+ * as per the spec.
+ * Clients can ignore that transition after this function returns as the device
+ * is expected to immediately  move from M2 to M0 as wake is asserted and
+ * wouldn't enter low power state.
+ *
+ * Returns:
+ * 0 if operation was successful (however, M0 -> M2 -> M0 is possible later) as
+ * mentioned above.
+ * -ETIMEDOUT is device faled to move to M0 before @timeout_us elapsed
+ * -EIO if the MHI state is one of the ERROR states.
+ */
+int mhi_device_get_sync_atomic(struct mhi_device *mhi_dev, int timeout_us);
+
 /**
  * mhi_device_put - re-enable low power modes
  * @mhi_dev: Device associated with the channels

kernel/printk/printk.c

@@ -824,6 +824,9 @@ static ssize_t devkmsg_write(struct kiocb *iocb, struct iov_iter *from)
 			/* QG-D */
 			if (strstr(line, "healthd")||
 				strstr(line, "cacert") ||
+				strstr(line, "ueventd") ||
+				strstr(line, "logd") ||
+				strstr(line, "CSPL") ||
 				!strcmp(line, "CP: Couldn't"))
 				goto free;
 		}

net/wireguard/src/Kbuild

@@ -2,7 +2,7 @@
 #
 # Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
 
-ccflags-y := -O3 -fvisibility=hidden
+ccflags-y := -O3
 ccflags-$(CONFIG_WIREGUARD_DEBUG) += -DDEBUG -g
 ccflags-y += -D'pr_fmt(fmt)=KBUILD_MODNAME ": " fmt'
 ccflags-y += -Wframe-larger-than=2048

net/wireguard/src/compat/compat.h

@@ -16,7 +16,7 @@
 #define ISRHEL7
 #elif RHEL_MAJOR == 8
 #define ISRHEL8
-#if RHEL_MINOR == 1
+#if RHEL_MINOR == 2
 #define ISCENTOS8
 #endif
 #endif
@@ -28,21 +28,12 @@
 #define ISUBUNTU1604
 #elif LINUX_VERSION_CODE < KERNEL_VERSION(4, 16, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
 #define ISUBUNTU1804
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(5, 1, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0)
+#define ISUBUNTU1904
 #elif LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)
 #define ISUBUNTU1910
 #endif
 #endif
-#ifdef CONFIG_SUSE_KERNEL
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0)
-#define ISOPENSUSE42
-#endif
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0)
-#define ISOPENSUSE15
-#endif
-#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)
-#define ISOPENSUSE152
-#endif
-#endif
 
 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0)
 #error "WireGuard requires Linux >= 3.10"
@@ -100,7 +91,7 @@
 
 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 17, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 83)
 #define ipv6_dst_lookup_flow(a, b, c, d) ipv6_dst_lookup_flow(b, c, d)
-#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 5) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 3, 18) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0)) || ((!defined(ISRHEL8) || defined(ISCENTOS8)) && !defined(ISDEBIAN) && !defined(ISUBUNTU1804) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 119) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 181) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 9, 224) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 224) && !defined(ISUBUNTU1604))
+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 5) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 3, 18) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0) && !defined(ISUBUNTU1904)) || (!defined(ISRHEL8) && !defined(ISDEBIAN) && !defined(ISUBUNTU1804) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 119) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 181) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 9, 224) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 224) && !defined(ISUBUNTU1604))
 #define ipv6_dst_lookup_flow(a, b, c, d) ipv6_dst_lookup(a, b, &dst, c) + (void *)0 ?: dst
 #endif
 
@@ -117,7 +108,7 @@ static const struct ipv6_stub_type ipv6_stub_impl = {
 static const struct ipv6_stub_type *ipv6_stub = &ipv6_stub_impl;
 #endif
 
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 8, 0) && IS_ENABLED(CONFIG_IPV6) && !defined(ISOPENSUSE42) && !defined(ISRHEL7)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 8, 0) && IS_ENABLED(CONFIG_IPV6) && !defined(ISRHEL7)
 #include <net/addrconf.h>
 static inline bool ipv6_mod_enabled(void)
 {
@@ -290,7 +281,7 @@ static const struct in6_addr __compat_in6addr_any = IN6ADDR_ANY_INIT;
 #define in6addr_any __compat_in6addr_any
 #endif
 
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0) && !defined(ISOPENSUSE15)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0)
 #include <linux/completion.h>
 #include <linux/random.h>
 #include <linux/errno.h>
@@ -386,7 +377,7 @@ static inline bool rng_is_initialized(void)
 }
 #endif
 
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISOPENSUSE15)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0)
 static inline int get_random_bytes_wait(void *buf, int nbytes)
 {
 	int ret = wait_for_random_bytes();
@@ -529,7 +520,7 @@ static inline void __compat_kvfree(const void *addr)
 #define priv_destructor destructor
 #endif
 
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISOPENSUSE15)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0)
 #define wg_newlink(a,b,c,d,e) wg_newlink(a,b,c,d)
 #endif
 
@@ -668,12 +659,12 @@ struct __compat_dummy_container { char dev; };
 #define COMPAT_CANNOT_USE_AVX512
 #endif
 
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) && !defined(ISOPENSUSE15)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0)
 #include <net/genetlink.h>
 #define genl_dump_check_consistent(a, b) genl_dump_check_consistent(a, b, &genl_family)
 #endif
 
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISRHEL7) && !defined(ISOPENSUSE15)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0) && !defined(ISRHEL7)
 static inline void *skb_put_data(struct sk_buff *skb, const void *data, unsigned int len)
 {
 	void *tmp = skb_put(skb, len);
@@ -730,7 +721,7 @@ static inline void cpu_to_le32_array(u32 *buf, unsigned int words)
 }
 #endif
 
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 0) && !defined(ISOPENSUSE15)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 0)
 #include <crypto/algapi.h>
 static inline void crypto_xor_cpy(u8 *dst, const u8 *src1, const u8 *src2,
 				  unsigned int size)
@@ -791,7 +782,7 @@ struct __kernel_timespec {
 #endif
 #endif
 
-#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 1, 0) && (!defined(ISRHEL8) || defined(ISCENTOS8))
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 1, 0) && !defined(ISRHEL8)
 #include <linux/skbuff.h>
 #define skb_probe_transport_header(a) skb_probe_transport_header(a, 0)
 #endif
@@ -800,7 +791,7 @@ struct __kernel_timespec {
 #define ignore_df local_df
 #endif
 
-#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 1, 0) && (!defined(ISRHEL8) || defined(ISCENTOS8))
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 1, 0) && !defined(ISRHEL8)
 /* Note that all intentional uses of the non-_bh variety need to explicitly
  * undef these, conditionalized on COMPAT_CANNOT_DEPRECIATE_BH_RCU.
  */
@@ -832,7 +823,7 @@ static __always_inline void old_rcu_barrier(void)
 #define COMPAT_CANNOT_DEPRECIATE_BH_RCU
 #endif
 
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 10) && !defined(ISRHEL8) && !defined(ISOPENSUSE15)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 10) && !defined(ISRHEL8)
 static inline void skb_mark_not_on_list(struct sk_buff *skb)
 {
 	skb->next = NULL;
@@ -842,7 +833,7 @@ static inline void skb_mark_not_on_list(struct sk_buff *skb)
 #if LINUX_VERSION_CODE < KERNEL_VERSION(4, 20, 0) && !defined(ISRHEL8)
 #define NLA_EXACT_LEN NLA_UNSPEC
 #endif
-#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 2, 0) && (!defined(ISRHEL8) || defined(ISCENTOS8))
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 2, 0) && !defined(ISRHEL8)
 #define NLA_MIN_LEN NLA_UNSPEC
 #define COMPAT_CANNOT_INDIVIDUAL_NETLINK_OPS_POLICY
 #endif
@@ -858,7 +849,7 @@ static inline void skb_mark_not_on_list(struct sk_buff *skb)
 #endif
 #endif
 
-#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 0) && !defined(ISOPENSUSE152)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 0)
 #define genl_dumpit_info(cb) ({ \
 	struct { struct nlattr **attrs; } *a = (void *)((u8 *)cb->args + offsetofend(struct dump_ctx, next_allowedip)); \
 	BUILD_BUG_ON(sizeof(cb->args) < offsetofend(struct dump_ctx, next_allowedip) + sizeof(*a)); \
@@ -1021,7 +1012,7 @@ out:
 #define COMPAT_CANNOT_USE_MAX_MTU
 #endif
 
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 14) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 29) && !defined(ISUBUNTU1910))
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 14) && LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0)) || (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 29) && !defined(ISUBUNTU1910) && !defined(ISUBUNTU1904) && (!defined(ISRHEL8) || defined(ISCENTOS8)))
 #include <linux/skbuff.h>
 #include <net/sch_generic.h>
 static inline void skb_reset_redirect(struct sk_buff *skb)
@@ -1045,6 +1036,32 @@ static inline void skb_reset_redirect(struct sk_buff *skb)
 #define sw_hash ignore_df = 0; skb->nf_trace = skb->ooo_okay
 #endif
 
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 3, 0)
+#define pre_exit exit
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 8, 0)
+#include <linux/skbuff.h>
+static inline __be16 ip_tunnel_parse_protocol(const struct sk_buff *skb)
+{
+	if (skb_network_header(skb) >= skb->head &&
+	    (skb_network_header(skb) + sizeof(struct iphdr)) <= skb_tail_pointer(skb) &&
+	    ip_hdr(skb)->version == 4)
+		return htons(ETH_P_IP);
+	if (skb_network_header(skb) >= skb->head &&
+	    (skb_network_header(skb) + sizeof(struct ipv6hdr)) <= skb_tail_pointer(skb) &&
+	    ipv6_hdr(skb)->version == 6)
+		return htons(ETH_P_IPV6);
+	return 0;
+}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 1, 0) || defined(ISRHEL8)
+static const struct header_ops ip_tunnel_header_ops = { .parse_protocol = ip_tunnel_parse_protocol };
+#else
+#define header_ops hard_header_len
+#define ip_tunnel_header_ops *(char *)0 - (char *)0
+#endif
+#endif
+
 #if defined(ISUBUNTU1604) || defined(ISRHEL7)
 #include <linux/siphash.h>
 #ifndef _WG_LINUX_SIPHASH_H

net/wireguard/src/device.c

@@ -53,17 +53,18 @@ static int wg_open(struct net_device *dev)
 #endif
 #endif
 
+	mutex_lock(&wg->device_update_lock);
 	ret = wg_socket_init(wg, wg->incoming_port);
 	if (ret < 0)
-		return ret;
-	mutex_lock(&wg->device_update_lock);
+		goto out;
 	list_for_each_entry(peer, &wg->peer_list, peer_list) {
 		wg_packet_send_staged_packets(peer);
 		if (peer->persistent_keepalive_interval)
 			wg_packet_send_keepalive(peer);
 	}
+out:
 	mutex_unlock(&wg->device_update_lock);
-	return 0;
+	return ret;
 }
 
 #ifdef CONFIG_PM_SLEEP
@@ -233,6 +234,7 @@ static void wg_destruct(struct net_device *dev)
 	list_del(&wg->device_list);
 	rtnl_unlock();
 	mutex_lock(&wg->device_update_lock);
+	rcu_assign_pointer(wg->creating_net, NULL);
 	wg->incoming_port = 0;
 	wg_socket_reinit(wg, NULL, NULL);
 	/* The final references are cleared in the below calls to destroy_workqueue. */
@@ -248,13 +250,11 @@ static void wg_destruct(struct net_device *dev)
 	skb_queue_purge(&wg->incoming_handshakes);
 	free_percpu(dev->tstats);
 	free_percpu(wg->incoming_handshakes_worker);
-	if (wg->have_creating_net_ref)
-		put_net(wg->creating_net);
 	kvfree(wg->index_hashtable);
 	kvfree(wg->peer_hashtable);
 	mutex_unlock(&wg->device_update_lock);
 
-	pr_debug("%s: Interface deleted\n", dev->name);
+	pr_debug("%s: Interface destroyed\n", dev->name);
 	free_netdev(dev);
 }
 
@@ -270,6 +270,7 @@ static void wg_setup(struct net_device *dev)
 			     max(sizeof(struct ipv6hdr), sizeof(struct iphdr));
 
 	dev->netdev_ops = &netdev_ops;
+	dev->header_ops = &ip_tunnel_header_ops;
 	dev->hard_header_len = 0;
 	dev->addr_len = 0;
 	dev->needed_headroom = DATA_PACKET_HEAD_ROOM;
@@ -306,7 +307,7 @@ static int wg_newlink(struct net *src_net, struct net_device *dev,
 	struct wg_device *wg = netdev_priv(dev);
 	int ret = -ENOMEM;
 
-	wg->creating_net = src_net;
+	rcu_assign_pointer(wg->creating_net, src_net);
 	init_rwsem(&wg->static_identity.lock);
 	mutex_init(&wg->socket_update_lock);
 	mutex_init(&wg->device_update_lock);
@@ -407,30 +408,26 @@ static struct rtnl_link_ops link_ops __read_mostly = {
 	.newlink		= wg_newlink,
 };
 
-static int wg_netdevice_notification(struct notifier_block *nb,
-				     unsigned long action, void *data)
+static void wg_netns_pre_exit(struct net *net)
 {
-	struct net_device *dev = ((struct netdev_notifier_info *)data)->dev;
-	struct wg_device *wg = netdev_priv(dev);
+	struct wg_device *wg;
 
-	ASSERT_RTNL();
-
-	if (action != NETDEV_REGISTER || dev->netdev_ops != &netdev_ops)
-		return 0;
-
-	if (dev_net(dev) == wg->creating_net && wg->have_creating_net_ref) {
-		put_net(wg->creating_net);
-		wg->have_creating_net_ref = false;
-	} else if (dev_net(dev) != wg->creating_net &&
-		   !wg->have_creating_net_ref) {
-		wg->have_creating_net_ref = true;
-		get_net(wg->creating_net);
+	rtnl_lock();
+	list_for_each_entry(wg, &device_list, device_list) {
+		if (rcu_access_pointer(wg->creating_net) == net) {
+			pr_debug("%s: Creating namespace exiting\n", wg->dev->name);
+			netif_carrier_off(wg->dev);
+			mutex_lock(&wg->device_update_lock);
+			rcu_assign_pointer(wg->creating_net, NULL);
+			wg_socket_reinit(wg, NULL, NULL);
+			mutex_unlock(&wg->device_update_lock);
+		}
 	}
-	return 0;
+	rtnl_unlock();
 }
 
-static struct notifier_block netdevice_notifier = {
-	.notifier_call = wg_netdevice_notification
+static struct pernet_operations pernet_ops = {
+	.pre_exit = wg_netns_pre_exit
 };
 
 int __init wg_device_init(void)
@@ -443,18 +440,18 @@ int __init wg_device_init(void)
 		return ret;
 #endif
 
-	ret = register_netdevice_notifier(&netdevice_notifier);
+	ret = register_pernet_device(&pernet_ops);
 	if (ret)
 		goto error_pm;
 
 	ret = rtnl_link_register(&link_ops);
 	if (ret)
-		goto error_netdevice;
+		goto error_pernet;
 
 	return 0;
 
-error_netdevice:
-	unregister_netdevice_notifier(&netdevice_notifier);
+error_pernet:
+	unregister_pernet_device(&pernet_ops);
 error_pm:
 #ifdef CONFIG_PM_SLEEP
 	unregister_pm_notifier(&pm_notifier);
@@ -465,7 +462,7 @@ error_pm:
 void wg_device_uninit(void)
 {
 	rtnl_link_unregister(&link_ops);
-	unregister_netdevice_notifier(&netdevice_notifier);
+	unregister_pernet_device(&pernet_ops);
 #ifdef CONFIG_PM_SLEEP
 	unregister_pm_notifier(&pm_notifier);
 #endif

net/wireguard/src/device.h

@@ -40,7 +40,7 @@ struct wg_device {
 	struct net_device *dev;
 	struct crypt_queue encrypt_queue, decrypt_queue;
 	struct sock __rcu *sock4, *sock6;
-	struct net *creating_net;
+	struct net __rcu *creating_net;
 	struct noise_static_identity static_identity;
 	struct workqueue_struct *handshake_receive_wq, *handshake_send_wq;
 	struct workqueue_struct *packet_crypt_wq;
@@ -56,7 +56,6 @@ struct wg_device {
 	unsigned int num_peers, device_update_gen;
 	u32 fwmark;
 	u16 incoming_port;
-	bool have_creating_net_ref;
 };
 
 int wg_device_init(void);

net/wireguard/src/dkms.conf

@@ -1,5 +1,5 @@
 PACKAGE_NAME="wireguard"
-PACKAGE_VERSION="1.0.20200520"
+PACKAGE_VERSION="1.0.20200712"
 AUTOINSTALL=yes
 
 BUILT_MODULE_NAME="wireguard"

net/wireguard/src/netlink.c

@@ -509,11 +509,15 @@ static int wg_set_device(struct sk_buff *skb, struct genl_info *info)
 	if (flags & ~__WGDEVICE_F_ALL)
 		goto out;
 
-	ret = -EPERM;
-	if ((info->attrs[WGDEVICE_A_LISTEN_PORT] ||
-	     info->attrs[WGDEVICE_A_FWMARK]) &&
-	    !ns_capable(wg->creating_net->user_ns, CAP_NET_ADMIN))
-		goto out;
+	if (info->attrs[WGDEVICE_A_LISTEN_PORT] || info->attrs[WGDEVICE_A_FWMARK]) {
+		struct net *net;
+		rcu_read_lock();
+		net = rcu_dereference(wg->creating_net);
+		ret = !net || !ns_capable(net->user_ns, CAP_NET_ADMIN) ? -EPERM : 0;
+		rcu_read_unlock();
+		if (ret)
+			goto out;
+	}
 
 	++wg->device_update_gen;
 

net/wireguard/src/noise.c

@@ -619,8 +619,8 @@ wg_noise_handshake_consume_initiation(struct message_handshake_initiation *src,
 	memcpy(handshake->hash, hash, NOISE_HASH_LEN);
 	memcpy(handshake->chaining_key, chaining_key, NOISE_HASH_LEN);
 	handshake->remote_index = src->sender_index;
-	if ((s64)(handshake->last_initiation_consumption -
-	    (initiation_consumption = ktime_get_coarse_boottime_ns())) < 0)
+	initiation_consumption = ktime_get_coarse_boottime_ns();
+	if ((s64)(handshake->last_initiation_consumption - initiation_consumption) < 0)
 		handshake->last_initiation_consumption = initiation_consumption;
 	handshake->state = HANDSHAKE_CONSUMED_INITIATION;
 	up_write(&handshake->lock);

net/wireguard/src/queueing.h

@@ -11,6 +11,7 @@
 #include <linux/skbuff.h>
 #include <linux/ip.h>
 #include <linux/ipv6.h>
+#include <net/ip_tunnels.h>
 
 struct wg_device;
 struct wg_peer;
@@ -65,25 +66,9 @@ struct packet_cb {
 #define PACKET_CB(skb) ((struct packet_cb *)((skb)->cb))
 #define PACKET_PEER(skb) (PACKET_CB(skb)->keypair->entry.peer)
 
-/* Returns either the correct skb->protocol value, or 0 if invalid. */
-static inline __be16 wg_examine_packet_protocol(struct sk_buff *skb)
-{
-	if (skb_network_header(skb) >= skb->head &&
-	    (skb_network_header(skb) + sizeof(struct iphdr)) <=
-		    skb_tail_pointer(skb) &&
-	    ip_hdr(skb)->version == 4)
-		return htons(ETH_P_IP);
-	if (skb_network_header(skb) >= skb->head &&
-	    (skb_network_header(skb) + sizeof(struct ipv6hdr)) <=
-		    skb_tail_pointer(skb) &&
-	    ipv6_hdr(skb)->version == 6)
-		return htons(ETH_P_IPV6);
-	return 0;
-}
-
 static inline bool wg_check_packet_protocol(struct sk_buff *skb)
 {
-	__be16 real_protocol = wg_examine_packet_protocol(skb);
+	__be16 real_protocol = ip_tunnel_parse_protocol(skb);
 	return real_protocol && skb->protocol == real_protocol;
 }
 

net/wireguard/src/receive.c

@@ -392,7 +392,7 @@ static void wg_packet_consume_data_done(struct wg_peer *peer,
 #ifndef COMPAT_CANNOT_USE_CSUM_LEVEL
 	skb->csum_level = ~0; /* All levels */
 #endif
-	skb->protocol = wg_examine_packet_protocol(skb);
+	skb->protocol = ip_tunnel_parse_protocol(skb);
 	if (skb->protocol == htons(ETH_P_IP)) {
 		len = ntohs(ip_hdr(skb)->tot_len);
 		if (unlikely(len < sizeof(struct iphdr)))
@@ -419,14 +419,8 @@ static void wg_packet_consume_data_done(struct wg_peer *peer,
 	if (unlikely(routed_peer != peer))
 		goto dishonest_packet_peer;
 
-	if (unlikely(napi_gro_receive(&peer->napi, skb) == GRO_DROP)) {
-		++dev->stats.rx_dropped;
-		net_dbg_ratelimited("%s: Failed to give packet to userspace from peer %llu (%pISpfsc)\n",
-				    dev->name, peer->internal_id,
-				    &peer->endpoint.addr);
-	} else {
-		update_rx_stats(peer, message_data_len(len_before_trim));
-	}
+	napi_gro_receive(&peer->napi, skb);
+	update_rx_stats(peer, message_data_len(len_before_trim));
 	return;
 
 dishonest_packet_peer:

net/wireguard/src/socket.c

@@ -347,6 +347,7 @@ static void set_sock_opts(struct socket *sock)
 
 int wg_socket_init(struct wg_device *wg, u16 port)
 {
+	struct net *net;
 	int ret;
 	struct udp_tunnel_sock_cfg cfg = {
 		.sk_user_data = wg,
@@ -371,37 +372,47 @@ int wg_socket_init(struct wg_device *wg, u16 port)
 	};
 #endif
 
+	rcu_read_lock();
+	net = rcu_dereference(wg->creating_net);
+	net = net ? maybe_get_net(net) : NULL;
+	rcu_read_unlock();
+	if (unlikely(!net))
+		return -ENONET;
+
 #if IS_ENABLED(CONFIG_IPV6)
 retry:
 #endif
 
-	ret = udp_sock_create(wg->creating_net, &port4, &new4);
+	ret = udp_sock_create(net, &port4, &new4);
 	if (ret < 0) {
 		pr_err("%s: Could not create IPv4 socket\n", wg->dev->name);
-		return ret;
+		goto out;
 	}
 	set_sock_opts(new4);
-	setup_udp_tunnel_sock(wg->creating_net, new4, &cfg);
+	setup_udp_tunnel_sock(net, new4, &cfg);
 
 #if IS_ENABLED(CONFIG_IPV6)
 	if (ipv6_mod_enabled()) {
 		port6.local_udp_port = inet_sk(new4->sk)->inet_sport;
-		ret = udp_sock_create(wg->creating_net, &port6, &new6);
+		ret = udp_sock_create(net, &port6, &new6);
 		if (ret < 0) {
 			udp_tunnel_sock_release(new4);
 			if (ret == -EADDRINUSE && !port && retries++ < 100)
 				goto retry;
 			pr_err("%s: Could not create IPv6 socket\n",
 			       wg->dev->name);
-			return ret;
+			goto out;
 		}
 		set_sock_opts(new6);
-		setup_udp_tunnel_sock(wg->creating_net, new6, &cfg);
+		setup_udp_tunnel_sock(net, new6, &cfg);
 	}
 #endif
 
 	wg_socket_reinit(wg, new4->sk, new6 ? new6->sk : NULL);
-	return 0;
+	ret = 0;
+out:
+	put_net(net);
+	return ret;
 }
 
 void wg_socket_reinit(struct wg_device *wg, struct sock *new4,

net/wireguard/src/tests/netns.sh

@@ -346,7 +346,8 @@ ip1 -4 rule add table main suppress_prefixlength 0
 if [[ $(ip1 -4 rule show all) == *suppress_prefixlength* ]]; then
 	# Flood the pings instead of sending just one, to trigger routing table reference counting bugs.
 	n1 ping -W 1 -c 100 -f 192.168.99.7
-	n1 ping -W 1 -c 100 -f abab::1111
+	# ca7a03c got ported to 5.2 when it shouldn't have.
+	[[ $(< /proc/version) =~ ^Linux\ version\ 5\.2[.\ ] ]] || n1 ping -W 1 -c 100 -f abab::1111
 fi
 
 # Have ns2 NAT into wg0 packets from ns0, but return an icmp error along the right route.
@@ -590,9 +591,20 @@ ip0 link set wg0 up
 kill $ncat_pid
 ip0 link del wg0
 
+# Ensure there aren't circular reference loops
+ip1 link add wg1 type wireguard
+ip2 link add wg2 type wireguard
+ip1 link set wg1 netns $netns2
+ip2 link set wg2 netns $netns1
+pp ip netns delete $netns1
+pp ip netns delete $netns2
+pp ip netns add $netns1
+pp ip netns add $netns2
+
+sleep 2 # Wait for cleanup and grace periods
 declare -A objects
 while read -t 0.1 -r line 2>/dev/null || [[ $? -ne 142 ]]; do
-	[[ $line =~ .*(wg[0-9]+:\ [A-Z][a-z]+\ [0-9]+)\ .*(created|destroyed).* ]] || continue
+	[[ $line =~ .*(wg[0-9]+:\ [A-Z][a-z]+\ ?[0-9]*)\ .*(created|destroyed).* ]] || continue
 	objects["${BASH_REMATCH[1]}"]+="${BASH_REMATCH[2]}"
 done < /dev/kmsg
 alldeleted=1

net/wireguard/src/tests/qemu/Makefile

@@ -46,8 +46,8 @@ endef
 ifneq ($(findstring https://,$(KERNEL_VERSION)),)
 KERNEL_URL := $(word 1,$(KERNEL_VERSION))
 KERNEL_NAME := $(word 2,$(KERNEL_VERSION))
-KERNEL_TAR := $(DISTFILES_PATH)/$(KERNEL_NAME)-$(notdir $(KERNEL_URL))
-KERNEL_PATH := $(BUILD_PATH)/$(KERNEL_NAME)
+KERNEL_TAR := $(DISTFILES_PATH)/linux-$(KERNEL_NAME)-$(notdir $(KERNEL_URL))
+KERNEL_PATH := $(BUILD_PATH)/linux-$(KERNEL_NAME)
 KERNEL_VERSION := $(KERNEL_NAME)
 $(KERNEL_TAR):
 	mkdir -p $(DISTFILES_PATH)

net/wireguard/src/version.h

@@ -1,3 +1,3 @@
 #ifndef WIREGUARD_VERSION
-#define WIREGUARD_VERSION "1.0.20200520"
+#define WIREGUARD_VERSION "1.0.20200712"
 #endif

techpack/audio/dsp/q6afe.c

@@ -3478,10 +3478,10 @@ int afe_tdm_port_start(u16 port_id, struct afe_tdm_port_config *tdm_port,
 
 	if (cal_block != NULL) {
 		afe_top = (struct audio_cal_info_afe_top *)cal_block->cal_info;
-		pr_info("%s: top_id:%x acdb_id:%d port_id:0x%x\n",
+		pr_debug("%s: top_id:%x acdb_id:%d port_id:0x%x\n",
 			__func__, afe_top->topology, afe_top->acdb_id, port_id);
 	} else {
-		pr_info("%s: port_id:0x%x\n", __func__, port_id);
+		pr_debug("%s: port_id:0x%x\n", __func__, port_id);
 	}
 
 	ret = afe_send_cmd_port_start(port_id);
@@ -4502,10 +4502,10 @@ static int __afe_port_start(u16 port_id, union afe_port_config *afe_config,
 
 	if (cal_block != NULL) {
 		afe_top = (struct audio_cal_info_afe_top *)cal_block->cal_info;
-		pr_info("%s: top_id:%x acdb_id:%d port_id:0x%x\n",
+		pr_debug("%s: top_id:%x acdb_id:%d port_id:0x%x\n",
 			__func__, afe_top->topology, afe_top->acdb_id, port_id);
 	} else {
-		pr_info("%s: port_id:0x%x\n", __func__, port_id);
+		pr_debug("%s: port_id:0x%x\n", __func__, port_id);
 	}
 
 	ret = afe_send_cmd_port_start(port_id);
@@ -7117,7 +7117,7 @@ int afe_close(int port_id)
 		ret = -EINVAL;
 		goto fail_cmd;
 	}
-	pr_info("%s: port_id = 0x%x\n", __func__, port_id);
+	pr_debug("%s: port_id = 0x%x\n", __func__, port_id);
 	if ((port_id == RT_PROXY_DAI_001_RX) ||
 			(port_id == RT_PROXY_DAI_002_TX)) {
 		pr_debug("%s: before decrementing pcm_afe_instance %d\n",